Changeset 772 for GPL/trunk/alsa-kernel/include

GPL/trunk

Property svn:mergeinfo changed
/GPL/branches/uniaud32-6.6-LTS (added) merged: 765,768-769
/GPL/branches/uniaud32-exp (added) merged: 735-741,743-744,748-751,753-760,762-764
/GPL/branches/uniaud32-next merged: 718-734

GPL/trunk/alsa-kernel/include/sound/ac97/codec.h

r617	r772
64	64	struct device_driver driver;
65	65	int (probe)(struct ac97_codec_device );
66		int (remove)(struct ac97_codec_device );
	66	void (remove)(struct ac97_codec_device dev);
67	67	void (shutdown)(struct ac97_codec_device );
68	68	const struct ac97_id *id_table;

GPL/trunk/alsa-kernel/include/sound/ac97_codec.h

-              r679
+              r772
 void snd_ac97_suspend(struct snd_ac97 *ac97);
 void snd_ac97_resume(struct snd_ac97 *ac97);
+#else
+static inline void snd_ac97_suspend(struct snd_ac97 *ac97) {}
+static inline void snd_ac97_resume(struct snd_ac97 *ac97) {}
 #endif
 int snd_ac97_reset(struct snd_ac97 *ac97, bool try_warm, unsigned int id,

GPL/trunk/alsa-kernel/include/sound/asequencer.h

-              r679
+              r772
 #define snd_seq_ev_is_reltime(ev)       (snd_seq_ev_timemode_type(ev) == SNDRV_SEQ_TIME_MODE_REL)
+/* check whether the given event is a UMP event */
+#ifndef TARGET_OS2
+#define snd_seq_ev_is_ump(ev) \
+        (IS_ENABLED(CONFIG_SND_SEQ_UMP) && ((ev)->flags & SNDRV_SEQ_EVENT_UMP))
+#else
+#define snd_seq_ev_is_ump(ev) \
+        (0 && ((ev)->flags & SNDRV_SEQ_EVENT_UMP))
+#endif
 /* queue sync port */
 #define snd_seq_queue_sync_port(q)      ((q) + 16)

GPL/trunk/alsa-kernel/include/sound/compress_driver.h

r717	r772
149	149	struct snd_compr {
150	150	const char *name;
151		struct device dev;
	151	struct device *dev;
152	152	struct snd_compr_ops *ops;
153	153	void *private_data;

GPL/trunk/alsa-kernel/include/sound/config.h

-              r679
+              r772
 #define CONFIG_PM
 #define CONFIG_PM_SLEEP
+#define CONFIG_SND_CTL_INPUT_VALIDATION 0
 #ifdef DEBUG
 #define CONFIG_SND_DEBUG_DETECT
 …
 #define CONFIG_SND_HDA_CODEC_CONEXANT
 #define CONFIG_SND_HDA_CODEC_CMEDIA
+/* #define CONFIG_SND_HDA_CODEC_HDMI not yet supported */
 #define CONFIG_SND_HDA_CODEC_REALTEK
 #define CONFIG_SND_HDA_CODEC_SIGMATEL
 #define CONFIG_SND_HDA_CODEC_SI3054
 #define CONFIG_SND_HDA_CODEC_VIA
+#define CONFIG_SND_HDA_COMPONENT
 #define CONFIG_SND_HDA_GENERIC
 #define CONFIG_SND_HDA_HWDEP
+/* #define CONFIG_SND_HDA_I915 not yet supported */
 #define CONFIG_SND_HDA_PREALLOC_SIZE  64
 #define CONFIG_SND_OSSEMUL

GPL/trunk/alsa-kernel/include/sound/control.h

-              r695
+              r772
 /* internal flag for skipping validations */
 #ifdef CONFIG_SND_CTL_VALIDATION
+#ifdef CONFIG_SND_CTL_DEBUG
 #define SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK        (1 << 24)
 #define snd_ctl_skip_validation(info) \
 …
         wait_queue_head_t change_sleep;
         spinlock_t read_lock;
         struct fasync_struct *fasync;
+        struct snd_fasync *fasync;
         int subscribed;                 /* read interface is activated */
         struct list_head events;        /* waiting events for read */
 …
 int snd_ctl_remove_id(struct snd_card * card, struct snd_ctl_elem_id *id);
 int snd_ctl_rename_id(struct snd_card * card, struct snd_ctl_elem_id *src_id, struct snd_ctl_elem_id *dst_id);
+void snd_ctl_rename(struct snd_card *card, struct snd_kcontrol *kctl, const char *name);
 int snd_ctl_activate_id(struct snd_card *card, struct snd_ctl_elem_id *id, int active);
+struct snd_kcontrol *snd_ctl_find_numid(struct snd_card * card, unsigned int numid);
+struct snd_kcontrol *snd_ctl_find_id(struct snd_card * card, struct snd_ctl_elem_id *id);
+struct snd_kcontrol *snd_ctl_find_numid_locked(struct snd_card *card, unsigned int numid);
+struct snd_kcontrol *snd_ctl_find_numid(struct snd_card *card, unsigned int numid);
+struct snd_kcontrol *snd_ctl_find_id_locked(struct snd_card *card, const struct snd_ctl_elem_id *id);
+struct snd_kcontrol *snd_ctl_find_id(struct snd_card *card, const struct snd_ctl_elem_id *id);
+/**
+ * snd_ctl_find_id_mixer - find the control instance with the given name string
+ * @card: the card instance
+ * @name: the name string
+ *
+ * Finds the control instance with the given name and
+ * @SNDRV_CTL_ELEM_IFACE_MIXER. Other fields are set to zero.
+ *
+ * This is merely a wrapper to snd_ctl_find_id().
+ *
+ * Return: The pointer of the instance if found, or %NULL if not.
+ */
+static inline struct snd_kcontrol *
+snd_ctl_find_id_mixer(struct snd_card *card, const char *name)
+{
+        struct snd_ctl_elem_id id = {0};
+        id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+        strscpy(id.name, name, sizeof(id.name));
+        return snd_ctl_find_id(card, &id);
+}
 int snd_ctl_create(struct snd_card *card);
 …
         return _snd_ctl_add_follower(master, follower, 0);
+}
+int snd_ctl_add_followers(struct snd_card *card, struct snd_kcontrol *master,
+                          const char * const *list);
 /**

GPL/trunk/alsa-kernel/include/sound/core.h

-              r717
+              r772
 #include <linux/stringify.h>
 #include <linux/printk.h>
+#include <linux/xarray.h>
 /* number of supported soundcards */
 …
         struct list_head devices;       /* devices */
         struct device ctl_dev;          /* control device */
+        struct device *ctl_dev;         /* control device */
         unsigned int last_numid;        /* last used numeric ID */
         struct rw_semaphore controls_rwsem;     /* controls list lock */
+        struct rw_semaphore controls_rwsem;     /* controls lock (list and values) */
         rwlock_t ctl_files_rwlock;      /* ctl_files list lock */
         int controls_count;             /* count of all controls */
 …
         struct list_head controls;      /* all controls for this card */
         struct list_head ctl_files;     /* active control files */
+#ifdef CONFIG_SND_CTL_FAST_LOOKUP
+        struct xarray ctl_numids;       /* hash table for numids */
+        struct xarray ctl_hash;         /* hash table for ctl id matching */
+        bool ctl_hash_collision;        /* ctl_hash collision seen? */
+#endif
         struct snd_info_entry *proc_root;       /* root for soundcard specific files */
 …
 extern int snd_major;
 extern int snd_ecards_limit;
 extern struct class *sound_class;
+extern const struct class sound_class;
 #ifdef CONFIG_SND_DEBUG
 extern struct dentry *sound_debugfs_root;
 …
 void snd_request_card(int card);
 void snd_device_initialize(struct device *dev, struct snd_card *card);
+int snd_device_alloc(struct device **dev_p, struct snd_card *card);
 int snd_register_device(int type, struct snd_card *card, int dev,
 …
                       struct snd_card **card_ret);
 int snd_card_disconnect(struct snd_card *card);
+void snd_card_disconnect(struct snd_card *card);
 void snd_card_disconnect_sync(struct snd_card *card);
 int snd_card_free(struct snd_card *card);
 int snd_card_free_when_closed(struct snd_card *card);
+void snd_card_free(struct snd_card *card);
+void snd_card_free_when_closed(struct snd_card *card);
 int snd_card_free_on_error(struct device *dev, int ret);
 void snd_card_set_id(struct snd_card *card, const char *id);
 …
 #endif
+/* async signal helpers */
+struct snd_fasync;
+int snd_fasync_helper(int fd, struct file *file, int on,
+                      struct snd_fasync **fasyncp);
+void snd_kill_fasync(struct snd_fasync *fasync, int signal, int poll);
+void snd_fasync_free(struct snd_fasync *fasync);
 #endif /* __SOUND_CORE_H */

GPL/trunk/alsa-kernel/include/sound/da7219-aad.h

-              r679
+              r772
 };
+enum da7219_aad_jack_ins_det_pty {
+        DA7219_AAD_JACK_INS_DET_PTY_LOW = 0,
+        DA7219_AAD_JACK_INS_DET_PTY_HIGH,
+};
 enum da7219_aad_jack_det_rate {
         DA7219_AAD_JACK_DET_RATE_32_64MS = 0,
 …
         enum da7219_aad_mic_det_thr mic_det_thr;
         enum da7219_aad_jack_ins_deb jack_ins_deb;
+        enum da7219_aad_jack_ins_det_pty jack_ins_det_pty;
         enum da7219_aad_jack_det_rate jack_det_rate;
         enum da7219_aad_jack_rem_deb jack_rem_deb;

GPL/trunk/alsa-kernel/include/sound/designware_i2s.h

-              r679
+              r772
 };
+struct dw_i2s_dev;
 struct i2s_platform_data {
         #define DWC_I2S_PLAY    (1 << 0)
 …
         bool (*filter)(struct dma_chan *chan, void *slave);
         int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
+        int (*i2s_pd_init)(struct dw_i2s_dev *dev);
 };

GPL/trunk/alsa-kernel/include/sound/dmaengine_pcm.h

-              r695
+              r772
  *   substream
  * @substream: PCM substream
+ *
+ * Return: DMA transfer direction
  */
 static inline enum dma_transfer_direction
 …
         struct dma_chan *chan);
 int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream);
+int snd_dmaengine_pcm_sync_stop(struct snd_pcm_substream *substream);
 int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
 …
  * src_addr_width member, not bytes) that can be send to or received from the
  * DAI in one burst.
- * @slave_id: Slave requester id for the DMA channel.
  * @filter_data: Custom DMA channel filter data, this will usually be used when
  * requesting the DMA channel.
 …
         enum dma_slave_buswidth addr_width;
         u32 maxburst;
-        unsigned int slave_id;
         void *filter_data;
         const char *chan_name;
 …
         int (*process)(struct snd_pcm_substream *substream,
                        int channel, unsigned long hwoff,
                        void *buf, unsigned long bytes);
+                       unsigned long bytes);
         dma_filter_fn compat_filter_fn;
         struct device *dma_dev;

GPL/trunk/alsa-kernel/include/sound/emu10k1.h

-              r717
+              r772
 #define EMUPAGESIZE     4096
-#define MAXREQVOICES    8
 #define MAXPAGES0       4096    /* 32 bit mode */
 #define MAXPAGES1       8192    /* 31 bit mode */
-#define RESERVED        0
-#define NUM_MIDI        16
 #define NUM_G           64              /* use all channels */
-#define NUM_FXSENDS     4
 #define NUM_EFX_PLAYBACK    16
 …
 #define TMEMSIZE        256*1024
-#define TMEMSIZEREG     4
 #define IP_TO_CP(ip) ((ip == 0) ? 0 : (((0x00001000uL | (ip & 0x00000FFFL)) << (((ip >> 12) & 0x000FL) + 4)) & 0xFFFF0000uL))
+// This is used to define hardware bit-fields (sub-registers) by combining
+// the bit shift and count with the actual register address. The passed
+// mask must represent a single run of adjacent bits.
+// The non-concatenating (_NC) variant should be used directly only for
+// sub-registers that do not follow the <register>_<field> naming pattern.
+#define SUB_REG_NC(reg, field, mask) \
+        enum { \
+                field ## _MASK = mask, \
+                field = reg | \
+                        (__builtin_ctz(mask) << 16) | \
+                        (__builtin_popcount(mask) << 24), \
+        };
+#define SUB_REG(reg, field, mask) SUB_REG_NC(reg, reg ## _ ## field, mask)
+// Macros for manipulating values of bit-fields declared using the above macros.
+// Best used with constant register addresses, as otherwise quite some code is
+// generated. The actual register read/write functions handle combined addresses
+// automatically, so use of these macros conveys no advantage when accessing a
+// single sub-register at a time.
+#define REG_SHIFT(r) (((r) >> 16) & 0x1f)
+#define REG_SIZE(r) (((r) >> 24) & 0x1f)
+#define REG_MASK0(r) ((1U << REG_SIZE(r)) - 1U)
+#define REG_MASK(r) (REG_MASK0(r) << REG_SHIFT(r))
+#define REG_VAL_GET(r, v) ((v & REG_MASK(r)) >> REG_SHIFT(r))
+#define REG_VAL_PUT(r, v) ((v) << REG_SHIFT(r))
+// List terminator for snd_emu10k1_ptr_write_multiple()
+#define REGLIST_END ~0
 // Audigy specify registers are prefixed with 'A_'
 …
 #define IPR_P16V                0x80000000      /* Bit set when the CA0151 P16V chip wishes
                                                    to interrupt */
 #define IPR_GPIOMSG             0x20000000      /* GPIO message interrupt (RE'd, still not sure
                                                    which INTE bits enable it)                   */
+#define IPR_WATERMARK_REACHED   0x40000000
+#define IPR_A_GPIO              0x20000000      /* GPIO input pin change                        */
 /* The next two interrupts are for the midi port on the Audigy Drive (A_MPU1)                   */
 …
 #define IPR_MIDIRECVBUFEMPTY    0x00000080      /* MIDI UART receive buffer empty               */
 #define IPR_CHANNELLOOP         0x00000040      /* Channel (half) loop interrupt(s) pending     */
+                                                /* The interrupt is triggered shortly after     */
+                                                /* CCR_READADDRESS has crossed the boundary;    */
+                                                /* due to the cache, this runs ahead of the     */
+                                                /* actual playback position.                    */
 #define IPR_CHANNELNUMBERMASK   0x0000003f      /* When IPR_CHANNELLOOP is set, indicates the   */
                                                 /* highest set channel in CLIPL, CLIPH, HLIPL,  */
                                                 /* or HLIPH.  When IP is written with CL set,   */
+                                                /* or HLIPH.  When IPR is written with CL set,  */
                                                 /* the bit in H/CLIPL or H/CLIPH corresponding  */
                                                 /* to the CIN value written will be cleared.    */
+                                                /* to the CN value written will be cleared.     */
 #define INTE                    0x0c            /* Interrupt enable register                    */
 …
                                                 /* lockups if enabled.                          */
+#define INTE_A_GPIOENABLE       0x00040000      /* Enable GPIO input change interrupts          */
 /* The next two interrupts are for the midi port on the Audigy Drive (A_MPU1)                   */
 #define INTE_A_MIDITXENABLE2    0x00020000      /* Enable MIDI transmit-buffer-empty interrupts */
 #define INTE_A_MIDIRXENABLE2    0x00010000      /* Enable MIDI receive-buffer-empty interrupts  */
+#define INTE_A_SPDIF_BUFFULL_ENABLE     0x00008000
+#define INTE_A_SPDIF_HALFBUFFULL_ENABLE 0x00004000
 #define INTE_SAMPLERATETRACKER  0x00002000      /* Enable sample rate tracker interrupts        */
 …
 #define WC                      0x10            /* Wall Clock register                          */
+#ifndef TARGET_OS2
+SUB_REG(WC, SAMPLECOUNTER,      0x03FFFFC0)     /* Sample periods elapsed since reset           */
+SUB_REG(WC, CURRENTCHANNEL,     0x0000003F)     /* Channel [0..63] currently being serviced     */
+                                                /* NOTE: Each channel takes 1/64th of a sample  */
+                                                /* period to be serviced.                       */
+#else
 #define WC_SAMPLECOUNTER_MASK   0x03FFFFC0      /* Sample periods elapsed since reset           */
 #define WC_SAMPLECOUNTER        0x14060010
 #define WC_CURRENTCHANNEL       0x0000003F      /* Channel [0..63] currently being serviced     */
+#define WC_CURRENTCHANNEL       0x0700003F      /* Channel [0..63] currently being serviced     */
                                                 /* NOTE: Each channel takes 1/64th of a sample  */
                                                 /* period to be serviced.                       */
+#endif
 #define HCFG                    0x14            /* Hardware config register                     */
                                                 /* NOTE: There is no reason to use the legacy   */
 …
 /* Specific to Alice2, CA0102 */
 #define HCFG_CODECFORMAT_AC97_1 0x00000000      /* AC97 CODEC format -- Ver 1.03                */
 #define HCFG_CODECFORMAT_AC97_2 0x00010000      /* AC97 CODEC format -- Ver 2.1                 */
 …
 /* Rest of HCFG 0x0000000f same as below. LOCKSOUNDCACHE etc.  */
 /* Older chips */
 #define HCFG_CODECFORMAT_AC97   0x00000000      /* AC97 CODEC format -- Primary Output          */
 #define HCFG_CODECFORMAT_I2S    0x00010000      /* I2S CODEC format -- Secondary (Rear) Output  */
 …
 #define HCFG_LOCKSOUNDCACHE     0x00000008      /* 1 = Cancel bustmaster accesses to soundcache */
                                                 /* NOTE: This should generally never be used.   */
+#ifndef TARGET_OS2
+SUB_REG(HCFG, LOCKTANKCACHE,    0x00000004)     /* 1 = Cancel bustmaster accesses to tankcache  */
+                                                /* NOTE: This should generally never be used.   */
+#else
 #define HCFG_LOCKTANKCACHE_MASK 0x00000004      /* 1 = Cancel bustmaster accesses to tankcache  */
                                                 /* NOTE: This should generally never be used.   */
 #define HCFG_LOCKTANKCACHE      0x01020014
+#endif
 #define HCFG_MUTEBUTTONENABLE   0x00000002      /* 1 = Master mute button sets AUDIOENABLE = 0. */
                                                 /* NOTE: This is a 'cheap' way to implement a   */
 …
                                                 /* completely initialized.                      */
 //For Audigy, MPU port move to 0x70-0x74 ptr register
+// On Audigy, the MPU port moved to the 0x70-0x74 ptr registers
 #define MUDATA                  0x18            /* MPU401 data register (8 bits)                */
 …
 #define MUSTAT_ORDYN            0x40            /* 0 = MUDATA can accept a command or data      */
+#define A_IOCFG                 0x18            /* GPIO on Audigy card (16bits)                 */
+#define A_GPINPUT_MASK          0xff00
+#define A_GPIO                  0x18            /* GPIO on Audigy card (16bits)                 */
+#define A_GPINPUT_MASK          0xff00          /* Alice/2 has 8 input pins                     */
+#define A3_GPINPUT_MASK         0x3f00          /* ... while Tina/2 has only 6                  */
 #define A_GPOUTPUT_MASK         0x00ff
+// The GPIO port is used for I/O config on Sound Blasters;
+// card-specific info can be found in the emu_chip_details table.
+// On E-MU cards the port is used as the interface to the FPGA.
 // Audigy output/GPIO stuff taken from the kX drivers
+#define A_IOCFG                 A_GPIO
 #define A_IOCFG_GPOUT0          0x0044          /* analog/digital                               */
 #define A_IOCFG_DISABLE_ANALOG  0x0040          /* = 'enable' for Audigy2 (chiprev=4)           */
 …
 #define A_IOCFG_PHONES_JACK     0x0100          /* LiveDrive                                    */
-/* outputs:
- *      for audigy2 platinum:   0xa00
- *      for a2 platinum ex:     0x1c00
- *      for a1 platinum:        0x0
- */
 #define TIMER                   0x1a            /* Timer terminal count register                */
                                                 /* NOTE: After the rate is changed, a maximum   */
                                                 /* of 1024 sample periods should be allowed     */
                                                 /* before the new rate is guaranteed accurate.  */
 #define TIMER_RATE_MASK         0x000003ff      /* Timer interrupt rate in sample periods       */
+#define TIMER_RATE_MASK         0x03ff          /* Timer interrupt rate in sample periods       */
                                                 /* 0 == 1024 periods, [1..4] are not useful     */
-#define TIMER_RATE              0x0a00001a
 #define AC97DATA                0x1c            /* AC97 register set data register (16 bit)     */
 …
                                                 /* 0x00000200 8-channel output. */
                                                 /* 0x00000004 pauses stream/irq fail. */
                                                 /* Rest of bits no nothing to sound output */
+                                                /* Rest of bits do nothing to sound output */
                                                 /* bit 0: Enable P16V audio.
                                                  * bit 1: Lock P16V record memory cache.
 …
 #define IPR3                    0x38            /* Cdif interrupt pending register              */
 #define INTE3                   0x3c            /* Cdif interrupt enable register.      */
 /************************************************************************************************/
 /* PCI function 1 registers, address = <val> + PCIBASE1                                         */
 …
 #define JOYSTICK_COMPARATOR     0xf0            /* Joystick comparator data                     */
 /********************************************************************************************************/
 /* Emu10k1 pointer-offset register set, accessed through the PTR and DATA registers                     */
 /********************************************************************************************************/
+// No official documentation was released for EMU10K1, but some info
+// about playback can be extrapolated from the EMU8K documents:
+// "AWE32/EMU8000 Programmerâs Guide" (emu8kpgm.pdf) - registers
+// "AWE32 Developer's Information Pack" (adip301.pdf) - high-level view
+// The short version:
+// - The engine has 64 playback channels, also called voices. The channels
+//   operate independently, except when paired for stereo (see below).
+// - PCM samples are fetched into the cache; see description of CD0 below.
+// - Samples are consumed at the rate CPF_CURRENTPITCH.
+// - 8-bit samples are transformed upon use: cooked = (raw ^ 0x80) << 8
+// - 8 samples are read at CCR_READADDRESS:CPF_FRACADDRESS and interpolated
+//   according to CCCA_INTERPROM_*. With CCCA_INTERPROM_0 selected and a zero
+//   CPF_FRACADDRESS, this results in CCR_READADDRESS[3] being used verbatim.
+// - The value is multiplied by CVCF_CURRENTVOL.
+// - The value goes through a filter with cutoff CVCF_CURRENTFILTER;
+//   delay stages Z1 and Z2.
+// - The value is added by so-called `sends` to 4 (EMU10K1) / 8 (EMU10K2)
+//   of the 16 (EMU10K1) / 64 (EMU10K2) FX bus accumulators via FXRT*,
+//   multiplied by a per-send amount (*_FXSENDAMOUNT_*).
+//   The scaling of the send amounts is exponential-ish.
+// - The DSP has a go at FXBUS* and outputs the values to EXTOUT* or EMU32OUT*.
+// - The pitch, volume, and filter cutoff can be modulated by two envelope
+//   engines and two low frequency oscillators.
+// - To avoid abrupt changes to the parameters (which may cause audible
+//   distortion), the modulation engine sets the target registers, towards
+//   which the current registers "swerve" gradually.
+// For the odd channel in a stereo pair, these registers are meaningless:
+//   CPF_STEREO, CPF_CURRENTPITCH, PTRX_PITCHTARGET, CCR_CACHEINVALIDSIZE,
+//   PSST_LOOPSTARTADDR, DSL_LOOPENDADDR, CCCA_CURRADDR
+// The somewhat non-obviously still meaningful ones are:
+//   CPF_STOP, CPF_FRACADDRESS, CCR_READADDRESS (!),
+//   CCCA_INTERPROM, CCCA_8BITSELECT (!)
+// (The envelope engine is ignored here, as stereo matters only for verbatim playback.)
 #define CPF                     0x00            /* Current pitch and fraction register                  */
+#ifndef TARGET_OS2
+SUB_REG(CPF, CURRENTPITCH,      0xffff0000)     /* Current pitch (linear, 0x4000 == unity pitch shift)  */
+#else
 #define CPF_CURRENTPITCH_MASK   0xffff0000      /* Current pitch (linear, 0x4000 == unity pitch shift)  */
 #define CPF_CURRENTPITCH        0x10100000
+#endif
 #define CPF_STEREO_MASK         0x00008000      /* 1 = Even channel interleave, odd channel locked      */
+#ifndef TARGET_OS2
+SUB_REG(CPF, STOP,              0x00004000)     /* 1 = Current pitch forced to 0                        */
+                                                /* Can be set only while matching bit in SOLEx is 1     */
+#else
+#define CPF_STOP                0x00004000      /* 1 = Current pitch forced to 0                        */
 #define CPF_STOP_MASK           0x00004000      /* 1 = Current pitch forced to 0                        */
+#endif
 #define CPF_FRACADDRESS_MASK    0x00003fff      /* Linear fractional address of the current channel     */
 #define PTRX                    0x01            /* Pitch target and send A/B amounts register           */
+#ifndef TARGET_OS2
+SUB_REG(PTRX, PITCHTARGET,      0xffff0000)     /* Pitch target of specified channel                    */
+SUB_REG(PTRX, FXSENDAMOUNT_A,   0x0000ff00)     /* Linear level of channel output sent to FX send bus A */
+SUB_REG(PTRX, FXSENDAMOUNT_B,   0x000000ff)     /* Linear level of channel output sent to FX send bus B */
+#else
 #define PTRX_PITCHTARGET_MASK   0xffff0000      /* Pitch target of specified channel                    */
 #define PTRX_PITCHTARGET        0x10100001
 …
 #define PTRX_FXSENDAMOUNT_B_MASK 0x000000ff     /* Linear level of channel output sent to FX send bus B */
 #define PTRX_FXSENDAMOUNT_B     0x08000001
+#endif
+// Note: the volumes are raw multpliers, so real 100% is impossible.
 #define CVCF                    0x02            /* Current volume and filter cutoff register            */
+#ifndef TARGET_OS2
+SUB_REG(CVCF, CURRENTVOL,       0xffff0000)     /* Current linear volume of specified channel           */
+SUB_REG(CVCF, CURRENTFILTER,    0x0000ffff)     /* Current filter cutoff frequency of specified channel */
+#else
 #define CVCF_CURRENTVOL_MASK    0xffff0000      /* Current linear volume of specified channel           */
 #define CVCF_CURRENTVOL         0x10100002
 #define CVCF_CURRENTFILTER_MASK 0x0000ffff      /* Current filter cutoff frequency of specified channel */
 #define CVCF_CURRENTFILTER      0x10000002
+#endif
 #define VTFT                    0x03            /* Volume target and filter cutoff target register      */
+#ifndef TARGET_OS2
+SUB_REG(VTFT, VOLUMETARGET,     0xffff0000)     /* Volume target of specified channel                   */
+SUB_REG(VTFT, FILTERTARGET,     0x0000ffff)     /* Filter cutoff target of specified channel            */
+#else
 #define VTFT_VOLUMETARGET_MASK  0xffff0000      /* Volume target of specified channel                   */
 #define VTFT_VOLUMETARGET       0x10100003
 #define VTFT_FILTERTARGET_MASK  0x0000ffff      /* Filter cutoff target of specified channel            */
 #define VTFT_FILTERTARGET       0x10000003
+#endif
 #define Z1                      0x05            /* Filter delay memory 1 register                       */
 …
 #define PSST                    0x06            /* Send C amount and loop start address register        */
+#ifndef TARGET_OS2
+SUB_REG(PSST, FXSENDAMOUNT_C,   0xff000000)     /* Linear level of channel output sent to FX send bus C */
+SUB_REG(PSST, LOOPSTARTADDR,    0x00ffffff)     /* Loop start address of the specified channel          */
+#else
 #define PSST_FXSENDAMOUNT_C_MASK 0xff000000     /* Linear level of channel output sent to FX send bus C */
 …
 #define PSST_LOOPSTARTADDR_MASK 0x00ffffff      /* Loop start address of the specified channel          */
 #define PSST_LOOPSTARTADDR      0x18000006
+#define DSL                     0x07            /* Send D amount and loop start address register        */
+#endif
+#define DSL                     0x07            /* Send D amount and loop end address register  */
+#ifndef TARGET_OS2
+SUB_REG(DSL, FXSENDAMOUNT_D,    0xff000000)     /* Linear level of channel output sent to FX send bus D */
+SUB_REG(DSL, LOOPENDADDR,       0x00ffffff)     /* Loop end address of the specified channel            */
+#else
 #define DSL_FXSENDAMOUNT_D_MASK 0xff000000      /* Linear level of channel output sent to FX send bus D */
 …
 #define DSL_LOOPENDADDR_MASK    0x00ffffff      /* Loop end address of the specified channel            */
 #define DSL_LOOPENDADDR         0x18000007
+#endif
 #define CCCA                    0x08            /* Filter Q, interp. ROM, byte size, cur. addr register */
+#ifndef TARGET_OS2
+SUB_REG(CCCA, RESONANCE,        0xf0000000)     /* Lowpass filter resonance (Q) height                  */
+#else
 #define CCCA_RESONANCE          0xf0000000      /* Lowpass filter resonance (Q) height                  */
+#define CCCA_INTERPROMMASK      0x0e000000      /* Selects passband of interpolation ROM                */
+#endif
+#define CCCA_INTERPROM_MASK     0x0e000000      /* Selects passband of interpolation ROM                */
                                                 /* 1 == full band, 7 == lowpass                         */
                                                 /* ROM 0 is used when pitch shifting downward or less   */
 …
 #define CCCA_INTERPROM_7        0x0e000000      /* Select interpolation ROM 7                           */
 #define CCCA_8BITSELECT         0x01000000      /* 1 = Sound memory for this channel uses 8-bit samples */
+                                                /* 8-bit samples are unsigned, 16-bit ones signed       */
+#ifndef TARGET_OS2
+SUB_REG(CCCA, CURRADDR,         0x00ffffff)     /* Current address of the selected channel              */
+#else
 #define CCCA_CURRADDR_MASK      0x00ffffff      /* Current address of the selected channel              */
 #define CCCA_CURRADDR           0x18000008
+#endif
 #define CCR                     0x09            /* Cache control register                               */
+#ifndef TARGET_OS2
+SUB_REG(CCR, CACHEINVALIDSIZE,  0xfe000000)     /* Number of invalid samples before the read address    */
+#else
 #define CCR_CACHEINVALIDSIZE    0x07190009
 #define CCR_CACHEINVALIDSIZE_MASK       0xfe000000      /* Number of invalid samples cache for this channel     */
+#endif
 #define CCR_CACHELOOPFLAG       0x01000000      /* 1 = Cache has a loop service pending                 */
 #define CCR_INTERLEAVEDSAMPLES  0x00800000      /* 1 = A cache service will fetch interleaved samples   */
+                                                /* Auto-set from CPF_STEREO_MASK                        */
 #define CCR_WORDSIZEDSAMPLES    0x00400000      /* 1 = A cache service will fetch word sized samples    */
+                                                /* Auto-set from CCCA_8BITSELECT                        */
+#ifndef TARGET_OS2
+SUB_REG(CCR, READADDRESS,       0x003f0000)     /* Next cached sample to play                           */
+SUB_REG(CCR, LOOPINVALSIZE,     0x0000fe00)     /* Number of invalid samples in cache prior to loop     */
+#else
 #define CCR_READADDRESS         0x06100009
 #define CCR_READADDRESS_MASK    0x003f0000      /* Location of cache just beyond current cache service  */
 #define CCR_LOOPINVALSIZE       0x0000fe00      /* Number of invalid samples in cache prior to loop     */
                                                 /* NOTE: This is valid only if CACHELOOPFLAG is set     */
+#endif
+                                                /* NOTE: This is valid only if CACHELOOPFLAG is set     */
 #define CCR_LOOPFLAG            0x00000100      /* Set for a single sample period when a loop occurs    */
+#ifndef TARGET_OS2
+SUB_REG(CCR, CACHELOOPADDRHI,   0x000000ff)     /* CLP_LOOPSTARTADDR's hi byte if CACHELOOPFLAG is set  */
+#else
 #define CCR_CACHELOOPADDRHI     0x000000ff      /* DSL_LOOPSTARTADDR's hi byte if CACHELOOPFLAG is set  */
+#endif
 #define CLP                     0x0a            /* Cache loop register (valid if CCR_CACHELOOPFLAG = 1) */
                                                 /* NOTE: This register is normally not used             */
+#ifndef TARGET_OS2
+SUB_REG(CLP, CACHELOOPADDR,     0x0000ffff)     /* Cache loop address low word                          */
+#else
 #define CLP_CACHELOOPADDR       0x0000ffff      /* Cache loop address (DSL_LOOPSTARTADDR [0..15])       */
+#endif
 #define FXRT                    0x0b            /* Effects send routing register                        */
 …
 #define FXRT_CHANNELD           0xf0000000      /* Effects send bus number for channel's effects send D */
-#define A_HR                    0x0b    /* High Resolution. 24bit playback from host to DSP. */
 #define MAPA                    0x0c            /* Cache map A                                          */
 #define MAPB                    0x0d            /* Cache map B                                          */
 …
 #define MAP_PTI_MASK1           0x00001fff      /* The 13 bit index to one of the 8192 PTE dwords       */
 /* 0x0e, 0x0f: Not used */
+/* 0x0e, 0x0f: Internal state, at least on Audigy */
 #define ENVVOL                  0x10            /* Volume envelope register                             */
 #define ENVVOL_MASK             0x0000ffff      /* Current value of volume envelope state variable      */
+#define ENVVOL_MASK             0x0000ffff      /* Current value of volume envelope state variable      */
                                                 /* 0x8000-n == 666*n usec delay                         */
 #define ATKHLDV                 0x11            /* Volume envelope hold and attack register             */
 #define ATKHLDV_PHASE0          0x00008000      /* 0 = Begin attack phase                               */
+#define ATKHLDV_PHASE0_MASK     0x00008000      /* 0 = Begin attack phase                               */
 #define ATKHLDV_HOLDTIME_MASK   0x00007f00      /* Envelope hold time (127-n == n*88.2msec)             */
 #define ATKHLDV_ATTACKTIME_MASK 0x0000007f      /* Envelope attack time, log encoded                    */
 …
 #define DCYSUSV                 0x12            /* Volume envelope sustain and decay register           */
 #define DCYSUSV_PHASE1_MASK     0x00008000      /* 0 = Begin attack phase, 1 = begin release phase      */
+#define DCYSUSV_PHASE1_MASK     0x00008000      /* 0 = Begin decay phase, 1 = begin release phase       */
 #define DCYSUSV_SUSTAINLEVEL_MASK 0x00007f00    /* 127 = full, 0 = off, 0.75dB increments               */
 #define DCYSUSV_CHANNELENABLE_MASK 0x00000080   /* 1 = Inhibit envelope engine from writing values in   */
+#define DCYSUSV_CHANNELENABLE_MASK 0x00000080   /* 0 = Inhibit envelope engine from writing values in   */
                                                 /* this channel and from writing to pitch, filter and   */
                                                 /* volume targets.                                      */
 …
 #define ATKHLDM                 0x15            /* Modulation envelope hold and attack register         */
 #define ATKHLDM_PHASE0          0x00008000      /* 0 = Begin attack phase                               */
+#define ATKHLDM_PHASE0_MASK     0x00008000      /* 0 = Begin attack phase                               */
 #define ATKHLDM_HOLDTIME        0x00007f00      /* Envelope hold time (127-n == n*42msec)               */
 #define ATKHLDM_ATTACKTIME      0x0000007f      /* Envelope attack time, log encoded                    */
 …
 #define DCYSUSM                 0x16            /* Modulation envelope decay and sustain register       */
 #define DCYSUSM_PHASE1_MASK     0x00008000      /* 0 = Begin attack phase, 1 = begin release phase      */
+#define DCYSUSM_PHASE1_MASK     0x00008000      /* 0 = Begin decay phase, 1 = begin release phase       */
 #define DCYSUSM_SUSTAINLEVEL_MASK 0x00007f00    /* 127 = full, 0 = off, 0.75dB increments               */
 #define DCYSUSM_DECAYTIME_MASK  0x0000007f      /* Envelope decay time, log encoded                     */
 …
 #define IFATN                   0x19            /* Initial filter cutoff and attenuation register       */
+#ifndef TARGET_OS2
+SUB_REG(IFATN, FILTERCUTOFF,    0x0000ff00)     /* Initial filter cutoff frequency in exponential units */
+                                                /* 6 most significant bits are semitones                */
+                                                /* 2 least significant bits are fractions               */
+SUB_REG(IFATN, ATTENUATION,     0x000000ff)     /* Initial attenuation in 0.375dB steps                 */
+#else
 #define IFATN_FILTERCUTOFF_MASK 0x0000ff00      /* Initial filter cutoff frequency in exponential units */
                                                 /* 6 most significant bits are semitones                */
 …
 #define IFATN_ATTENUATION_MASK  0x000000ff      /* Initial attenuation in 0.375dB steps                 */
 #define IFATN_ATTENUATION       0x08000019
+#endif
 #define PEFE                    0x1a            /* Pitch envelope and filter envelope amount register   */
+#ifndef TARGET_OS2
+SUB_REG(PEFE, PITCHAMOUNT,      0x0000ff00)     /* Pitch envlope amount                                 */
+                                                /* Signed 2's complement, +/- one octave peak extremes  */
+SUB_REG(PEFE, FILTERAMOUNT,     0x000000ff)     /* Filter envlope amount                                */
+                                                /* Signed 2's complement, +/- six octaves peak extremes */
+#else
 #define PEFE_PITCHAMOUNT_MASK   0x0000ff00      /* Pitch envlope amount                                 */
                                                 /* Signed 2's complement, +/- one octave peak extremes  */
 …
                                                 /* Signed 2's complement, +/- six octaves peak extremes */
 #define PEFE_FILTERAMOUNT       0x0800001a
+#endif
 #define FMMOD                   0x1b            /* Vibrato/filter modulation from LFO register          */
 #define FMMOD_MODVIBRATO        0x0000ff00      /* Vibrato LFO modulation depth                         */
 …
                                                 /* Signed 2's complement, +/- three octave extremes     */
 #define TREMFRQ                 0x1c            /* Tremolo amount and modulation LFO frequency register */
 #define TREMFRQ_DEPTH           0x0000ff00      /* Tremolo depth                                        */
                                                 /* Signed 2's complement, with +/- 12dB extremes        */
 #define TREMFRQ_FREQUENCY       0x000000ff      /* Tremolo LFO frequency                                */
                                                 /* ??Hz steps, maximum of ?? Hz.                        */
 #define FM2FRQ2                 0x1d            /* Vibrato amount and vibrato LFO frequency register    */
 #define FM2FRQ2_DEPTH           0x0000ff00      /* Vibrato LFO vibrato depth                            */
 …
 /* 0x1f: not used */
+#define CD0                     0x20            /* Cache data 0 register                                */
+#define CD1                     0x21            /* Cache data 1 register                                */
+#define CD2                     0x22            /* Cache data 2 register                                */
+#define CD3                     0x23            /* Cache data 3 register                                */
+#define CD4                     0x24            /* Cache data 4 register                                */
+#define CD5                     0x25            /* Cache data 5 register                                */
+#define CD6                     0x26            /* Cache data 6 register                                */
+#define CD7                     0x27            /* Cache data 7 register                                */
+#define CD8                     0x28            /* Cache data 8 register                                */
+#define CD9                     0x29            /* Cache data 9 register                                */
+#define CDA                     0x2a            /* Cache data A register                                */
+#define CDB                     0x2b            /* Cache data B register                                */
+#define CDC                     0x2c            /* Cache data C register                                */
+#define CDD                     0x2d            /* Cache data D register                                */
+#define CDE                     0x2e            /* Cache data E register                                */
+#define CDF                     0x2f            /* Cache data F register                                */
+/* 0x30-3f seem to be the same as 0x20-2f */
+// 32 cache registers (== 128 bytes) per channel follow.
+// In stereo mode, the two channels' caches are concatenated into one,
+// and hold the interleaved frames.
+// The cache holds 64 frames, so the upper half is not used in 8-bit mode.
+// All registers mentioned below count in frames.
+// The cache is a ring buffer; CCR_READADDRESS operates modulo 64.
+// The cache is filled from (CCCA_CURRADDR - CCR_CACHEINVALIDSIZE)
+// into (CCR_READADDRESS - CCR_CACHEINVALIDSIZE).
+// The engine has a fetch threshold of 32 bytes, so it tries to keep
+// CCR_CACHEINVALIDSIZE below 8 (16-bit stereo), 16 (16-bit mono,
+// 8-bit stereo), or 32 (8-bit mono). The actual transfers are pretty
+// unpredictable, especially if several voices are running.
+// Frames are consumed at CCR_READADDRESS, which is incremented afterwards,
+// along with CCCA_CURRADDR and CCR_CACHEINVALIDSIZE. This implies that the
+// actual playback position always lags CCCA_CURRADDR by exactly 64 frames.
+#define CD0                     0x20            /* Cache data registers 0 .. 0x1f                       */
 #define PTB                     0x40            /* Page table base register                             */
 …
                                                 /* simultaneously.                                      */
-#define FXWC_DEFAULTROUTE_C     (1<<0)          /* left emu out? */
-#define FXWC_DEFAULTROUTE_B     (1<<1)          /* right emu out? */
-#define FXWC_DEFAULTROUTE_A     (1<<12)
-#define FXWC_DEFAULTROUTE_D     (1<<13)
-#define FXWC_ADCLEFT            (1<<18)
-#define FXWC_CDROMSPDIFLEFT     (1<<18)
-#define FXWC_ADCRIGHT           (1<<19)
-#define FXWC_CDROMSPDIFRIGHT    (1<<19)
-#define FXWC_MIC                (1<<20)
-#define FXWC_ZOOMLEFT           (1<<20)
-#define FXWC_ZOOMRIGHT          (1<<21)
-#define FXWC_SPDIFLEFT          (1<<22)         /* 0x00400000 */
-#define FXWC_SPDIFRIGHT         (1<<23)         /* 0x00800000 */
 #define A_TBLSZ                 0x43    /* Effects Tank Internal Table Size. Only low byte or register used */
 …
 #define FXBA_MASK               0xfffff000      /* 20 bit base address                                  */
 #define A_HWM                   0x48    /* High PCI Water Mark - word access, defaults to 3f */
+#define A_HWM                   0x48            /* High PCI Water Mark - word access, defaults to 3f */
 #define MICBS                   0x49            /* Microphone buffer size register                      */
 …
 #define FXBS                    0x4b            /* FX buffer size register                              */
+/* register: 0x4c..4f: ffff-ffff current amounts, per-channel */
+/* The following mask values define the size of the ADC, MIX and FX buffers in bytes */
+/* The following mask values define the size of the ADC, MIC and FX buffers in bytes */
 #define ADCBS_BUFSIZE_NONE      0x00000000
 #define ADCBS_BUFSIZE_384       0x00000001
 …
 #define ADCBS_BUFSIZE_65536     0x0000001f
+/* Current Send B, A Amounts */
+#define A_CSBA                  0x4c
+/* Current Send D, C Amounts */
+#define A_CSDC                  0x4d
+/* Current Send F, E Amounts */
+#define A_CSFE                  0x4e
+/* Current Send H, G Amounts */
+#define A_CSHG                  0x4f
+#define CDCS                    0x50            /* CD-ROM digital channel status register       */
+#define GPSCS                   0x51            /* General Purpose SPDIF channel status register*/
+#define DBG                     0x52            /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP */
+/* S/PDIF Input C Channel Status */
+#define A_SPSC                  0x52
+#define REG53                   0x53            /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP */
+#define A_DBG                    0x53
+#define A_DBG_SINGLE_STEP        0x00020000     /* Set to zero to start dsp */
+#define A_DBG_ZC                 0x40000000     /* zero tram counter */
+#define A_DBG_STEP_ADDR          0x000003ff
+#define A_DBG_SATURATION_OCCURED 0x20000000
+#define A_DBG_SATURATION_ADDR    0x0ffc0000
+// NOTE: 0x54,55,56: 64-bit
+// On Audigy, the FX send amounts are not applied instantly, but determine
+// targets towards which the following registers swerve gradually.
+#define A_CSBA                  0x4c            /* FX send B & A current amounts                        */
+#define A_CSDC                  0x4d            /* FX send D & C current amounts                        */
+#define A_CSFE                  0x4e            /* FX send F & E current amounts                        */
+#define A_CSHG                  0x4f            /* FX send H & G current amounts                        */
+// NOTE: 0x50,51,52: 64-bit (split over voices 0 & 1)
+#define CDCS                    0x50            /* CD-ROM digital channel status register               */
+#define GPSCS                   0x51            /* General Purpose SPDIF channel status register        */
+// Corresponding EMU10K1_DBG_* constants are in the public header
+#define DBG                     0x52
+#define A_SPSC                  0x52            /* S/PDIF Input C Channel Status                        */
+#define REG53                   0x53            /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP     */
+// Corresponding A_DBG_* constants are in the public header
+#define A_DBG                   0x53
+// NOTE: 0x54,55,56: 64-bit (split over voices 0 & 1)
 #define SPCS0                   0x54            /* SPDIF output Channel Status 0 register       */
 …
 /* 0x57: Not used */
 /* The 32-bit CLIx and SOLx registers all have one bit per channel control/status               */
+/* The 32-bit CLIx and SOLEx registers all have one bit per channel control/status              */
 #define CLIEL                   0x58            /* Channel loop interrupt enable low register   */
 #define CLIEH                   0x59            /* Channel loop interrupt enable high register  */
 #define CLIPL                   0x5a            /* Channel loop interrupt pending low register  */
 #define CLIPH                   0x5b            /* Channel loop interrupt pending high register */
+// These cause CPF_STOP_MASK to be set shortly after CCCA_CURRADDR passes DSL_LOOPENDADDR.
+// Subsequent changes to the address registers don't resume; clearing the bit here or in CPF does.
+// The registers are NOT synchronized; the next serviced channel picks up immediately.
 #define SOLEL                   0x5c            /* Stop on loop enable low register             */
 #define SOLEH                   0x5d            /* Stop on loop enable high register            */
 …
 #define AC97SLOT                0x5f            /* additional AC97 slots enable bits            */
+#define AC97SLOT_REAR_RIGHT     0x01            /* Rear left */
+#define AC97SLOT_REAR_LEFT      0x02            /* Rear right */
+#define AC97SLOT_CNTR           0x10            /* Center enable */
+#define AC97SLOT_LFE            0x20            /* LFE enable */
+/* PCB Revision */
+#define A_PCB                   0x5f
+#define AC97SLOT_REAR_RIGHT     0x01            /* Rear left                                    */
+#define AC97SLOT_REAR_LEFT      0x02            /* Rear right                                   */
+#define AC97SLOT_CNTR           0x10            /* Center enable                                */
+#define AC97SLOT_LFE            0x20            /* LFE enable                                   */
+#define A_PCB                   0x5f            /* PCB Revision                                 */
 // NOTE: 0x60,61,62: 64-bit
 …
 #define MICIDX                  0x63            /* Microphone recording buffer index register   */
+#ifndef TARGET_OS2
+SUB_REG(MICIDX, IDX,            0x0000ffff)
+#else
 #define MICIDX_MASK             0x0000ffff      /* 16-bit value                                 */
 #define MICIDX_IDX              0x10000063
+#endif
 #define ADCIDX                  0x64            /* ADC recording buffer index register          */
+#ifndef TARGET_OS2
+SUB_REG(ADCIDX, IDX,            0x0000ffff)
+#else
 #define ADCIDX_MASK             0x0000ffff      /* 16 bit index field                           */
 #define ADCIDX_IDX              0x10000064
+#endif
 #define A_ADCIDX                0x63
+#ifndef TARGET_OS2
+SUB_REG(A_ADCIDX, IDX,          0x0000ffff)
+#else
 #define A_ADCIDX_IDX            0x10000063
+#endif
 #define A_MICIDX                0x64
+#ifndef TARGET_OS2
+SUB_REG(A_MICIDX, IDX,          0x0000ffff)
+#else
 #define A_MICIDX_IDX            0x10000064
+#endif
 #define FXIDX                   0x65            /* FX recording buffer index register           */
+#ifndef TARGET_OS2
+SUB_REG(FXIDX, IDX,             0x0000ffff)
+#else
 #define FXIDX_MASK              0x0000ffff      /* 16-bit value                                 */
 #define FXIDX_IDX               0x10000065
+/* The 32-bit HLIx and HLIPx registers all have one bit per channel control/status                      */
+#endif
+/* The 32-bit HLIEx and HLIPx registers all have one bit per channel control/status                     */
 #define HLIEL                   0x66            /* Channel half loop interrupt enable low register      */
 #define HLIEH                   0x67            /* Channel half loop interrupt enable high register     */
 #define HLIPL                   0x68            /* Channel half loop interrupt pending low register     */
 #define HLIPH                   0x69            /* Channel half loop interrupt pending high register    */
+/* S/PDIF Host Record Index (bypasses SRC) */
+#define A_SPRI                  0x6a
+/* S/PDIF Host Record Address */
+#define A_SPRA                  0x6b
+/* S/PDIF Host Record Control */
+#define A_SPRC                  0x6c
+/* Delayed Interrupt Counter & Enable */
+#define A_DICE                  0x6d
+/* Tank Table Base */
+#define A_TTB                   0x6e
+/* Tank Delay Offset */
+#define A_TDOF                  0x6f
+#define A_SPRI                  0x6a            /* S/PDIF Host Record Index (bypasses SRC)      */
+#define A_SPRA                  0x6b            /* S/PDIF Host Record Address                   */
+#define A_SPRC                  0x6c            /* S/PDIF Host Record Control                   */
+#define A_DICE                  0x6d            /* Delayed Interrupt Counter & Enable           */
+#define A_TTB                   0x6e            /* Tank Table Base                              */
+#define A_TDOF                  0x6f            /* Tank Delay Offset                            */
 /* This is the MPU port on the card (via the game port)                                         */
 …
 /* The next two are the Audigy equivalent of FXWC                                               */
 /* the Audigy can record any output (16bit, 48kHz, up to 64 channel simultaneously)             */
+/* the Audigy can record any output (16bit, 48kHz, up to 64 channels simultaneously)            */
 /* Each bit selects a channel for recording */
 #define A_FXWC1                 0x74            /* Selects 0x7f-0x60 for FX recording           */
 #define A_FXWC2                 0x75            /* Selects 0x9f-0x80 for FX recording           */
+/* Extended Hardware Control */
+#define A_SPDIF_SAMPLERATE      0x76            /* Set the sample rate of SPDIF output          */
+#define A_SAMPLE_RATE           0x76            /* Various sample rate settings. */
+#define A_SAMPLE_RATE_NOT_USED  0x0ffc111e      /* Bits that are not used and cannot be set.    */
+#define A_SAMPLE_RATE_UNKNOWN   0xf0030001      /* Bits that can be set, but have unknown use.  */
+#define A_EHC                   0x76            /* Extended Hardware Control */
+#define A_SPDIF_SAMPLERATE      A_EHC           /* Set the sample rate of SPDIF output          */
 #define A_SPDIF_RATE_MASK       0x000000e0      /* Any other values for rates, just use 48000   */
 #define A_SPDIF_48000           0x00000000
+#define A_SPDIF_48000           0x00000000      /* kX calls this BYPASS                         */
 #define A_SPDIF_192000          0x00000020
 #define A_SPDIF_96000           0x00000040
 #define A_SPDIF_44100           0x00000080
+#define A_SPDIF_MUTED           0x000000c0
+#ifndef TARGET_OS2
+SUB_REG_NC(A_EHC, A_I2S_CAPTURE_RATE, 0x00000e00)  /* This sets the capture PCM rate, but it is  */
+                                                   /* unclear if this sets the ADC rate as well. */
+#else
+#define A_I2S_CAPTURE_RATE      0x00000e00
 #define A_I2S_CAPTURE_RATE_MASK 0x00000e00      /* This sets the capture PCM rate, but it is    */
+#define A_I2S_CAPTURE_48000     0x00000000      /* unclear if this sets the ADC rate as well.   */
+#define A_I2S_CAPTURE_192000    0x00000200
+#define A_I2S_CAPTURE_96000     0x00000400
+#define A_I2S_CAPTURE_44100     0x00000800
+#define A_PCM_RATE_MASK         0x0000e000      /* This sets the playback PCM rate on the P16V  */
+#define A_PCM_48000             0x00000000
+#define A_PCM_192000            0x00002000
+#define A_PCM_96000             0x00004000
+#define A_PCM_44100             0x00008000
+/* I2S0 Sample Rate Tracker Status */
+#define A_SRT3                  0x77
+/* I2S1 Sample Rate Tracker Status */
+#define A_SRT4                  0x78
+/* I2S2 Sample Rate Tracker Status */
+#define A_SRT5                  0x79
+                                                   /* unclear if this sets the ADC rate as well. */
+#endif
+#define A_I2S_CAPTURE_48000     0x0
+#define A_I2S_CAPTURE_192000    0x1
+#define A_I2S_CAPTURE_96000     0x2
+#define A_I2S_CAPTURE_44100     0x4
+#define A_EHC_SRC48_MASK        0x0000e000      /* This sets the playback PCM rate on the P16V  */
+#define A_EHC_SRC48_BYPASS      0x00000000
+#define A_EHC_SRC48_192         0x00002000
+#define A_EHC_SRC48_96          0x00004000
+#define A_EHC_SRC48_44          0x00008000
+#define A_EHC_SRC48_MUTED       0x0000c000
+#define A_EHC_P17V_TVM          0x00000001      /* Tank virtual memory mode                     */
+#define A_EHC_P17V_SEL0_MASK    0x00030000      /* Aka A_EHC_P16V_PB_RATE; 00: 48, 01: 44.1, 10: 96, 11: 192 */
+#define A_EHC_P17V_SEL1_MASK    0x000c0000
+#define A_EHC_P17V_SEL2_MASK    0x00300000
+#define A_EHC_P17V_SEL3_MASK    0x00c00000
+#define A_EHC_ASYNC_BYPASS      0x80000000
+#define A_SRT3                  0x77            /* I2S0 Sample Rate Tracker Status              */
+#define A_SRT4                  0x78            /* I2S1 Sample Rate Tracker Status              */
+#define A_SRT5                  0x79            /* I2S2 Sample Rate Tracker Status              */
 /* - default to 0x01080000 on my audigy 2 ZS --rlrevell */
+/* Tank Table DMA Address */
+#define A_TTDA                  0x7a
+/* Tank Table DMA Data */
+#define A_TTDD                  0x7b
+#define A_SRT_ESTSAMPLERATE     0x001fffff
+#define A_SRT_RATELOCKED        0x01000000
+#define A_TTDA                  0x7a            /* Tank Table DMA Address                       */
+#define A_TTDD                  0x7b            /* Tank Table DMA Data                          */
+// In A_FXRT1 & A_FXRT2, the 0x80 bit of each byte completely disables the
+// filter (CVCF_CURRENTFILTER) for the corresponding channel. There is no
+// effect on the volume (CVCF_CURRENTVOLUME) or the interpolator's filter
+// (CCCA_INTERPROM_MASK).
 #define A_FXRT2                 0x7c
 …
 #define A_FXSENDAMOUNT_G_MASK   0x0000FF00
 #define A_FXSENDAMOUNT_H_MASK   0x000000FF
+/* 0x7c, 0x7e "high bit is used for filtering" */
 /* The send amounts for this one are the same as used with the emu10k1 */
 #define A_FXRT1                 0x7e
 …
 /* 0x7f: Not used */
+/* Each FX general purpose register is 32 bits in length, all bits are used                     */
+#define FXGPREGBASE             0x100           /* FX general purpose registers base            */
+#define A_FXGPREGBASE           0x400           /* Audigy GPRs, 0x400 to 0x5ff                  */
+#define A_TANKMEMCTLREGBASE     0x100           /* Tank memory control registers base - only for Audigy */
+#define A_TANKMEMCTLREG_MASK    0x1f            /* only 5 bits used - only for Audigy */
+/* Tank audio data is logarithmically compressed down to 16 bits before writing to TRAM and is  */
+/* decompressed back to 20 bits on a read.  There are a total of 160 locations, the last 32     */
+/* locations are for external TRAM.                                                             */
+#define TANKMEMDATAREGBASE      0x200           /* Tank memory data registers base              */
+#define TANKMEMDATAREG_MASK     0x000fffff      /* 20 bit tank audio data field                 */
+/* Combined address field and memory opcode or flag field.  160 locations, last 32 are external */
+#define TANKMEMADDRREGBASE      0x300           /* Tank memory address registers base           */
+#define TANKMEMADDRREG_ADDR_MASK 0x000fffff     /* 20 bit tank address field                    */
+#define TANKMEMADDRREG_CLEAR    0x00800000      /* Clear tank memory                            */
+#define TANKMEMADDRREG_ALIGN    0x00400000      /* Align read or write relative to tank access  */
+#define TANKMEMADDRREG_WRITE    0x00200000      /* Write to tank memory                         */
+#define TANKMEMADDRREG_READ     0x00100000      /* Read from tank memory                        */
+#define MICROCODEBASE           0x400           /* Microcode data base address                  */
+/* The public header defines the GPR and TRAM base addresses that
+ * are valid for _both_ CPU and DSP addressing. */
 /* Each DSP microcode instruction is mapped into 2 doublewords                                  */
 /* NOTE: When writing, always write the LO doubleword first.  Reads can be in either order.     */
+#define LOWORD_OPX_MASK         0x000ffc00      /* Instruction operand X                        */
+#define LOWORD_OPY_MASK         0x000003ff      /* Instruction operand Y                        */
+#define HIWORD_OPCODE_MASK      0x00f00000      /* Instruction opcode                           */
+#define HIWORD_RESULT_MASK      0x000ffc00      /* Instruction result                           */
+#define HIWORD_OPA_MASK         0x000003ff      /* Instruction operand A                        */
+/* Audigy Soundcard have a different instruction format */
+#define MICROCODEBASE           0x400           /* Microcode data base address                  */
 #define A_MICROCODEBASE         0x600
+#define A_LOWORD_OPY_MASK       0x000007ff
+#define A_LOWORD_OPX_MASK       0x007ff000
+#define A_HIWORD_OPCODE_MASK    0x0f000000
+#define A_HIWORD_RESULT_MASK    0x007ff000
+#define A_HIWORD_OPA_MASK       0x000007ff
 /************************************************************************************************/
 /* EMU1010m HANA FPGA registers                                                                 */
+/* E-MU Digital Audio System overview                                                           */
 /************************************************************************************************/
+// - These cards use a regular PCI-attached Audigy chip (Alice2/Tina/Tina2);
+//   the PCIe variants simply put the Audigy chip behind a PCI bridge.
+// - All physical PCM I/O is routed through an additional FPGA; the regular
+//   EXTIN/EXTOUT ports are unconnected.
+// - The FPGA has a signal routing matrix, to connect each destination (output
+//   socket or capture channel) to a source (input socket or playback channel).
+// - The FPGA is controlled via Audigy's GPIO port, while sample data is
+//   transmitted via proprietary EMU32 serial links. On first-generation
+//   E-MU 1010 cards, Audigy's I2S inputs are also used for sample data.
+// - The Audio/Micro Dock is attached to Hana via EDI, a "network" link.
+// - The Audigy chip operates in slave mode; the clock is supplied by the FPGA.
+//   Gen1 E-MU 1010 cards have two crystals (for 44.1 kHz and 48 kHz multiples),
+//   while the later cards use a single crystal and a PLL chip.
+// - The whole card is switched to 2x/4x mode to achieve 88.2/96/176.4/192 kHz
+//   sample rates. Alice2/Tina keeps running at 44.1/48 kHz, but multiple channels
+//   are bundled.
+// - The number of available EMU32/EDI channels is hit in 2x/4x mode, so the total
+//   number of usable inputs/outputs is limited, esp. with ADAT in use.
+// - S/PDIF is unavailable in 4x mode (only over TOSLINK on newer 1010 cards) due
+//   to being unspecified at 176.4/192 kHz. Therefore, the Dock's S/PDIF channels
+//   can overlap with the Dock's ADC/DAC's high channels.
+// - The code names are mentioned below and in the emu_chip_details table.
+/************************************************************************************************/
+/* EMU1010 FPGA registers                                                                       */
+/************************************************************************************************/
 #define EMU_HANA_DESTHI         0x00    /* 0000xxx  3 bits Link Destination */
 #define EMU_HANA_DESTLO         0x01    /* 00xxxxx  5 bits */
 #define EMU_HANA_SRCHI          0x02    /* 0000xxx  3 bits Link Source */
 #define EMU_HANA_SRCLO          0x03    /* 00xxxxx  5 bits */
 #define EMU_HANA_DOCK_PWR       0x04    /* 000000x  1 bits Audio Dock power */
 #define EMU_HANA_DOCK_PWR_ON            0x01 /* Audio Dock power on */
 #define EMU_HANA_WCLOCK         0x05    /* 0000xxx  3 bits Word Clock source select  */
                                         /* Must be written after power on to reset DLL */
 …
 #define EMU_HANA_WCLOCK_HANA_SPDIF_IN   0x02
 #define EMU_HANA_WCLOCK_HANA_ADAT_IN    0x03
 #define EMU_HANA_WCLOCK_SYNC_BNCN       0x04
+#define EMU_HANA_WCLOCK_SYNC_BNC        0x04
 #define EMU_HANA_WCLOCK_2ND_HANA        0x05
 #define EMU_HANA_WCLOCK_SRC_RESERVED    0x06
 …
 #define EMU_HANA_WCLOCK_MULT_RESERVED   0x18
+// If the selected external clock source is/becomes invalid or incompatible
+// with the clock multiplier, the clock source is reset to this value, and
+// a WCLK_CHANGED interrupt is raised.
 #define EMU_HANA_DEFCLOCK       0x06    /* 000000x  1 bits Default Word Clock  */
 #define EMU_HANA_DEFCLOCK_48K           0x00
 …
 #define EMU_HANA_SPDIF_MODE     0x0a    /* 00xxxxx  5 bits SPDIF MODE  */
 #define EMU_HANA_SPDIF_MODE_TX_COMSUMER 0x00
+#define EMU_HANA_SPDIF_MODE_TX_CONSUMER 0x00
 #define EMU_HANA_SPDIF_MODE_TX_PRO      0x01
 #define EMU_HANA_SPDIF_MODE_TX_NOCOPY   0x02
 #define EMU_HANA_SPDIF_MODE_RX_COMSUMER 0x00
+#define EMU_HANA_SPDIF_MODE_RX_CONSUMER 0x00
 #define EMU_HANA_SPDIF_MODE_RX_PRO      0x04
 #define EMU_HANA_SPDIF_MODE_RX_NOCOPY   0x08
 …
 #define EMU_HANA_MIDI_IN                0x0c    /* 000000x  1 bit  Control MIDI  */
+#define EMU_HANA_MIDI_IN_FROM_HAMOA     0x00 /* HAMOA MIDI in to Alice 2 MIDI B */
+#define EMU_HANA_MIDI_IN_FROM_DOCK      0x01 /* Audio Dock MIDI in to Alice 2 MIDI B */
+#define EMU_HANA_MIDI_INA_FROM_HAMOA    0x01 /* HAMOA MIDI in to Alice 2 MIDI A */
+#define EMU_HANA_MIDI_INA_FROM_DOCK1    0x02 /* Audio Dock-1 MIDI in to Alice 2 MIDI A */
+#define EMU_HANA_MIDI_INA_FROM_DOCK2    0x03 /* Audio Dock-2 MIDI in to Alice 2 MIDI A */
+#define EMU_HANA_MIDI_INB_FROM_HAMOA    0x08 /* HAMOA MIDI in to Alice 2 MIDI B */
+#define EMU_HANA_MIDI_INB_FROM_DOCK1    0x10 /* Audio Dock-1 MIDI in to Alice 2 MIDI B */
+#define EMU_HANA_MIDI_INB_FROM_DOCK2    0x18 /* Audio Dock-2 MIDI in to Alice 2 MIDI B */
 #define EMU_HANA_DOCK_LEDS_1    0x0d    /* 000xxxx  4 bit  Audio Dock LEDs  */
 …
 #define EMU_HANA_ADC_PADS       0x10    /* 0000xxx  3 bit  Audio Dock ADC 14dB pads */
 #define EMU_HANA_DOCK_ADC_PAD1  0x01    /* 14dB Attenuation on Audio Dock ADC 1 */
 #define EMU_HANA_DOCK_ADC_PAD2  0x02    /* 14dB Attenuation on Audio Dock ADC 2 */
 #define EMU_HANA_DOCK_ADC_PAD3  0x04    /* 14dB Attenuation on Audio Dock ADC 3 */
 #define EMU_HANA_0202_ADC_PAD1  0x08    /* 14dB Attenuation on 0202 ADC 1 */
+#define EMU_HANA_DOCK_ADC_PAD1          0x01    /* 14dB Attenuation on Audio Dock ADC 1 */
+#define EMU_HANA_DOCK_ADC_PAD2          0x02    /* 14dB Attenuation on Audio Dock ADC 2 */
+#define EMU_HANA_DOCK_ADC_PAD3          0x04    /* 14dB Attenuation on Audio Dock ADC 3 */
+#define EMU_HANA_0202_ADC_PAD1          0x08    /* 14dB Attenuation on 0202 ADC 1 */
 #define EMU_HANA_DOCK_MISC      0x11    /* 0xxxxxx  6 bit  Audio Dock misc bits */
 #define EMU_HANA_DOCK_DAC1_MUTE 0x01    /* DAC 1 Mute */
 #define EMU_HANA_DOCK_DAC2_MUTE 0x02    /* DAC 2 Mute */
 #define EMU_HANA_DOCK_DAC3_MUTE 0x04    /* DAC 3 Mute */
 #define EMU_HANA_DOCK_DAC4_MUTE 0x08    /* DAC 4 Mute */
+#define EMU_HANA_DOCK_DAC1_MUTE         0x01    /* DAC 1 Mute */
+#define EMU_HANA_DOCK_DAC2_MUTE         0x02    /* DAC 2 Mute */
+#define EMU_HANA_DOCK_DAC3_MUTE         0x04    /* DAC 3 Mute */
+#define EMU_HANA_DOCK_DAC4_MUTE         0x08    /* DAC 4 Mute */
 #define EMU_HANA_DOCK_PHONES_192_DAC1   0x00    /* DAC 1 Headphones source at 192kHz */
 #define EMU_HANA_DOCK_PHONES_192_DAC2   0x10    /* DAC 2 Headphones source at 192kHz */
 …
 #define EMU_HANA_MIDI_OUT       0x12    /* 00xxxxx  5 bit  Source for each MIDI out port */
 #define EMU_HANA_MIDI_OUT_0202  0x01 /* 0202 MIDI from Alice 2. 0 = A, 1 = B */
 #define EMU_HANA_MIDI_OUT_DOCK1 0x02 /* Audio Dock MIDI1 front, from Alice 2. 0 = A, 1 = B */
 #define EMU_HANA_MIDI_OUT_DOCK2 0x04 /* Audio Dock MIDI2 rear, from Alice 2. 0 = A, 1 = B */
 #define EMU_HANA_MIDI_OUT_SYNC2 0x08 /* Sync card. Not the actual MIDI out jack. 0 = A, 1 = B */
 #define EMU_HANA_MIDI_OUT_LOOP  0x10 /* 0 = bits (3:0) normal. 1 = MIDI loopback enabled. */
+#define EMU_HANA_MIDI_OUT_0202          0x01 /* 0202 MIDI from Alice 2. 0 = A, 1 = B */
+#define EMU_HANA_MIDI_OUT_DOCK1         0x02 /* Audio Dock MIDI1 front, from Alice 2. 0 = A, 1 = B */
+#define EMU_HANA_MIDI_OUT_DOCK2         0x04 /* Audio Dock MIDI2 rear, from Alice 2. 0 = A, 1 = B */
+#define EMU_HANA_MIDI_OUT_SYNC2         0x08 /* Sync card. Not the actual MIDI out jack. 0 = A, 1 = B */
+#define EMU_HANA_MIDI_OUT_LOOP          0x10 /* 0 = bits (3:0) normal. 1 = MIDI loopback enabled. */
 #define EMU_HANA_DAC_PADS       0x13    /* 00xxxxx  5 bit  DAC 14dB attenuation pads */
 #define EMU_HANA_DOCK_DAC_PAD1  0x01    /* 14dB Attenuation on AudioDock DAC 1. Left and Right */
 #define EMU_HANA_DOCK_DAC_PAD2  0x02    /* 14dB Attenuation on AudioDock DAC 2. Left and Right */
 #define EMU_HANA_DOCK_DAC_PAD3  0x04    /* 14dB Attenuation on AudioDock DAC 3. Left and Right */
 #define EMU_HANA_DOCK_DAC_PAD4  0x08    /* 14dB Attenuation on AudioDock DAC 4. Left and Right */
 #define EMU_HANA_0202_DAC_PAD1  0x10    /* 14dB Attenuation on 0202 DAC 1. Left and Right */
+#define EMU_HANA_DOCK_DAC_PAD1          0x01    /* 14dB Attenuation on AudioDock DAC 1. Left and Right */
+#define EMU_HANA_DOCK_DAC_PAD2          0x02    /* 14dB Attenuation on AudioDock DAC 2. Left and Right */
+#define EMU_HANA_DOCK_DAC_PAD3          0x04    /* 14dB Attenuation on AudioDock DAC 3. Left and Right */
+#define EMU_HANA_DOCK_DAC_PAD4          0x08    /* 14dB Attenuation on AudioDock DAC 4. Left and Right */
+#define EMU_HANA_0202_DAC_PAD1          0x10    /* 14dB Attenuation on 0202 DAC 1. Left and Right */
 /* 0x14 - 0x1f Unused R/W registers */
+#define EMU_HANA_IRQ_STATUS     0x20    /* 000xxxx  4 bits IRQ Status  */
+#if 0  /* Already defined for reg 0x09 IRQ_ENABLE */
+#define EMU_HANA_IRQ_WCLK_CHANGED       0x01
+#define EMU_HANA_IRQ_ADAT               0x02
+#define EMU_HANA_IRQ_DOCK               0x04
+#define EMU_HANA_IRQ_DOCK_LOST          0x08
+#endif
+#define EMU_HANA_IRQ_STATUS     0x20    /* 00xxxxx  5 bits IRQ Status  */
+                                        /* Same bits as for EMU_HANA_IRQ_ENABLE */
+                                        /* Reading the register resets it. */
 #define EMU_HANA_OPTION_CARDS   0x21    /* 000xxxx  4 bits Presence of option cards */
+#define EMU_HANA_OPTION_HAMOA   0x01    /* HAMOA card present */
+#define EMU_HANA_OPTION_SYNC    0x02    /* Sync card present */
+#define EMU_HANA_OPTION_DOCK_ONLINE     0x04    /* Audio Dock online and FPGA configured */
+#define EMU_HANA_OPTION_DOCK_OFFLINE    0x08    /* Audio Dock online and FPGA not configured */
+#define EMU_HANA_ID             0x22    /* 1010101  7 bits ID byte & 0x7f = 0x55 */
+#define EMU_HANA_OPTION_HAMOA           0x01    /* Hamoa (analog I/O) card present */
+#define EMU_HANA_OPTION_SYNC            0x02    /* Sync card present */
+#define EMU_HANA_OPTION_DOCK_ONLINE     0x04    /* Audio/Micro dock present and FPGA configured */
+#define EMU_HANA_OPTION_DOCK_OFFLINE    0x08    /* Audio/Micro dock present and FPGA not configured */
+#define EMU_HANA_ID             0x22    /* 1010101  7 bits ID byte & 0x7f = 0x55 with Alice2 */
+                                        /* 0010101  5 bits ID byte & 0x1f = 0x15 with Tina/2 */
 #define EMU_HANA_MAJOR_REV      0x23    /* 0000xxx  3 bit  Hana FPGA Major rev */
 …
 #define EMU_DOCK_BOARD_ID       0x27    /* 00000xx  2 bits Audio Dock ID pins */
+#define EMU_DOCK_BOARD_ID0      0x00    /* ID bit 0 */
+#define EMU_DOCK_BOARD_ID1      0x03    /* ID bit 1 */
+#define EMU_DOCK_BOARD_ID0              0x00    /* ID bit 0 */
+#define EMU_DOCK_BOARD_ID1              0x03    /* ID bit 1 */
+// The actual code disagrees about the bit width of the registers -
+// the formula used is freq = 0x1770000 / (((X_HI << 5) | X_LO) + 1)
 #define EMU_HANA_WC_SPDIF_HI    0x28    /* 0xxxxxx  6 bit  SPDIF IN Word clock, upper 6 bits */
 …
 #define EMU_HANA2_WC_SPDIF_HI   0x2e    /* 0xxxxxx  6 bit  HANA2 SPDIF IN Word clock, upper 6 bits */
 #define EMU_HANA2_WC_SPDIF_LO   0x2f    /* 0xxxxxx  6 bit  HANA2 SPDIF IN Word clock, lower 6 bits */
 /* 0x30 - 0x3f Unused Read only registers */
+// The meaning of this is not clear; kX-project just calls it "lock" in some info-only code.
+#define EMU_HANA_LOCK_STS_LO    0x38    /* 0xxxxxx  lower 6 bits */
+#define EMU_HANA_LOCK_STS_HI    0x39    /* 0xxxxxx  upper 6 bits */
 /************************************************************************************************/
 /* EMU1010m HANA Destinations                                                                   */
+/* EMU1010 Audio Destinations                                                                   */
 /************************************************************************************************/
+/* Hana, original 1010,1212,1820 using Alice2
+ * Destiniations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
+/* Hana, original 1010,1212m,1820[m] using Alice2
  * 0x00, 0x00-0x0f: 16 EMU32 channels to Alice2
  * 0x01, 0x10-0x1f: 32 Elink channels to Audio Dock
  * 0x01, 0x00: Dock DAC 1 Left
  * 0x01, 0x04: Dock DAC 1 Right
  * 0x01, 0x08: Dock DAC 2 Left
  * 0x01, 0x0c: Dock DAC 2 Right
  * 0x01, 0x10: Dock DAC 3 Left
  * 0x01, 0x12: PHONES Left
  * 0x01, 0x14: Dock DAC 3 Right
  * 0x01, 0x16: PHONES Right
  * 0x01, 0x18: Dock DAC 4 Left
  * 0x01, 0x1a: S/PDIF Left
  * 0x01, 0x1c: Dock DAC 4 Right
  * 0x01, 0x1e: S/PDIF Right
+ * 0x01, 0x00-0x1f: 32 EDI channels to Audio Dock
+ *       0x00: Dock DAC 1 Left
+ *       0x04: Dock DAC 1 Right
+ *       0x08: Dock DAC 2 Left
+ *       0x0c: Dock DAC 2 Right
+ *       0x10: Dock DAC 3 Left
+ *       0x12: PHONES Left (n/a in 2x/4x mode; output mirrors DAC4 Left)
+ *       0x14: Dock DAC 3 Right
+ *       0x16: PHONES Right (n/a in 2x/4x mode; output mirrors DAC4 Right)
+ *       0x18: Dock DAC 4 Left
+ *       0x1a: S/PDIF Left
+ *       0x1c: Dock DAC 4 Right
+ *       0x1e: S/PDIF Right
  * 0x02, 0x00: Hana S/PDIF Left
  * 0x02, 0x01: Hana S/PDIF Right
  * 0x03, 0x00: Hanoa DAC Left
  * 0x03, 0x01: Hanoa DAC Right
+ * 0x03, 0x00: Hamoa DAC Left
+ * 0x03, 0x01: Hamoa DAC Right
  * 0x04, 0x00-0x07: Hana ADAT
  * 0x05, 0x00: I2S0 Left to Alice2
 …
  * Not needed.
+ *
+ * Hana3, rev2 1010,1212,1616 using Tina
+ * Destinations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * Hana3, rev2 1010,1212m,1616[m] using Tina
  * 0x00, 0x00-0x0f: 16 EMU32A channels to Tina
  * 0x01, 0x10-0x1f: 32 EDI channels to Micro Dock
  * 0x01, 0x00: Dock DAC 1 Left
  * 0x01, 0x04: Dock DAC 1 Right
  * 0x01, 0x08: Dock DAC 2 Left
  * 0x01, 0x0c: Dock DAC 2 Right
  * 0x01, 0x10: Dock DAC 3 Left
  * 0x01, 0x12: Dock S/PDIF Left
  * 0x01, 0x14: Dock DAC 3 Right
  * 0x01, 0x16: Dock S/PDIF Right
  * 0x01, 0x18-0x1f: Dock ADAT 0-7
+ * 0x01, 0x00-0x1f: 32 EDI channels to Micro Dock
+ *       0x00: Dock DAC 1 Left
+ *       0x04: Dock DAC 1 Right
+ *       0x08: Dock DAC 2 Left
+ *       0x0c: Dock DAC 2 Right
+ *       0x10: Dock DAC 3 Left
+ *       0x12: Dock S/PDIF Left
+ *       0x14: Dock DAC 3 Right
+ *       0x16: Dock S/PDIF Right
+ *       0x18-0x1f: Dock ADAT 0-7
  * 0x02, 0x00: Hana3 S/PDIF Left
  * 0x02, 0x01: Hana3 S/PDIF Right
  * 0x03, 0x00: Hanoa DAC Left
  * 0x03, 0x01: Hanoa DAC Right
+ * 0x03, 0x00: Hamoa DAC Left
+ * 0x03, 0x01: Hamoa DAC Right
  * 0x04, 0x00-0x07: Hana3 ADAT 0-7
  * 0x05, 0x00-0x0f: 16 EMU32B channels to Tina
 …
+ *
  * HanaLite, rev1 0404 using Alice2
+ * Destiniations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * 0x00, 0x00-0x0f: 16 EMU32 channels to Alice2
+ * 0x01: Not used
+ * 0x02, 0x00: S/PDIF Left
+ * 0x02, 0x01: S/PDIF Right
+ * 0x03, 0x00: DAC Left
+ * 0x03, 0x01: DAC Right
+ * 0x04-0x07: Not used
+ *
+ * HanaLiteLite, rev2 0404 using Alice2
+ * Destiniations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * 0x00, 0x00-0x0f: 16 EMU32 channels to Alice2
+ * HanaLiteLite, rev2 0404 using Tina
+ * 0x00, 0x00-0x0f: 16 EMU32 channels to Alice2/Tina
  * 0x01: Not used
  * 0x02, 0x00: S/PDIF Left
 …
+ *
  * Mana, Cardbus 1616 using Tina2
- * Destinations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
  * 0x00, 0x00-0x0f: 16 EMU32A channels to Tina2
+ * 0x01, 0x10-0x1f: 32 EDI channels to Micro Dock
+ * 0x01, 0x00: Dock DAC 1 Left
+ * 0x01, 0x04: Dock DAC 1 Right
+ * 0x01, 0x08: Dock DAC 2 Left
+ * 0x01, 0x0c: Dock DAC 2 Right
+ * 0x01, 0x10: Dock DAC 3 Left
+ * 0x01, 0x12: Dock S/PDIF Left
+ * 0x01, 0x14: Dock DAC 3 Right
+ * 0x01, 0x16: Dock S/PDIF Right
+ * 0x01, 0x18-0x1f: Dock ADAT 0-7
+ * 0x01, 0x00-0x1f: 32 EDI channels to Micro Dock
+ *       (same as rev2 1010)
  * 0x02: Not used
  * 0x03, 0x00: Mana DAC Left
 …
  * 0x04, 0x00-0x0f: 16 EMU32B channels to Tina2
  * 0x05-0x07: Not used
+ *
+ *
  */
 /* 32-bit destinations of signal in the Hana FPGA. Destinations are either
+ * physical outputs of Hana, or outputs going to Alice2 (audigy) for capture
+ * - 16 x EMU_DST_ALICE2_EMU32_X.
+ */
+/* EMU32 = 32-bit serial channel between Alice2 (audigy) and Hana (FPGA) */
+/* EMU_DST_ALICE2_EMU32_X - data channels from Hana to Alice2 used for capture.
+ * Which data is fed into a EMU_DST_ALICE2_EMU32_X channel in Hana depends on
+ * setup of mixer control for each destination - see emumixer.c -
+ * snd_emu1010_output_enum_ctls[], snd_emu1010_input_enum_ctls[]
+ * physical outputs of Hana, or outputs going to Alice2/Tina for capture -
+ * 16 x EMU_DST_ALICE2_EMU32_X (2x on rev2 boards). Which data is fed into
+ * a channel depends on the mixer control setting for each destination - see
+ * the register arrays in emumixer.c.
  */
 #define EMU_DST_ALICE2_EMU32_0  0x000f  /* 16 EMU32 channels to Alice2 +0 to +0xf */
+                                        /* This channel is delayed by one sample. */
 #define EMU_DST_ALICE2_EMU32_1  0x0000  /* 16 EMU32 channels to Alice2 +0 to +0xf */
 #define EMU_DST_ALICE2_EMU32_2  0x0001  /* 16 EMU32 channels to Alice2 +0 to +0xf */
 …
 #define EMU_DST_HANA_SPDIF_LEFT1        0x0200  /* Hana SPDIF Left, 1st or 48kHz only */
 #define EMU_DST_HANA_SPDIF_LEFT2        0x0202  /* Hana SPDIF Left, 2nd or 96kHz */
+#define EMU_DST_HANA_SPDIF_LEFT3        0x0204  /* Hana SPDIF Left, 3rd or 192kHz */
+#define EMU_DST_HANA_SPDIF_LEFT4        0x0206  /* Hana SPDIF Left, 4th or 192kHz */
 #define EMU_DST_HANA_SPDIF_RIGHT1       0x0201  /* Hana SPDIF Right, 1st or 48kHz only */
 #define EMU_DST_HANA_SPDIF_RIGHT2       0x0203  /* Hana SPDIF Right, 2nd or 96kHz */
+#define EMU_DST_HANA_SPDIF_RIGHT3       0x0205  /* Hana SPDIF Right, 3rd or 192kHz */
+#define EMU_DST_HANA_SPDIF_RIGHT4       0x0207  /* Hana SPDIF Right, 4th or 192kHz */
 #define EMU_DST_HAMOA_DAC_LEFT1 0x0300  /* Hamoa DAC Left, 1st or 48kHz only */
 #define EMU_DST_HAMOA_DAC_LEFT2 0x0302  /* Hamoa DAC Left, 2nd or 96kHz */
 …
 #define EMU_DST_HAMOA_DAC_RIGHT3        0x0305  /* Hamoa DAC Right, 3rd or 192kHz */
 #define EMU_DST_HAMOA_DAC_RIGHT4        0x0307  /* Hamoa DAC Right, 4th or 192kHz */
+// In S/MUX mode, the samples of one channel are adjacent.
 #define EMU_DST_HANA_ADAT       0x0400  /* Hana ADAT 8 channel out +0 to +7 */
 #define EMU_DST_ALICE_I2S0_LEFT         0x0500  /* Alice2 I2S0 Left */
 …
 /* Additional destinations for 1616(M)/Microdock */
+/* Microdock S/PDIF OUT Left, 1st or 48kHz only */
+#define EMU_DST_MDOCK_SPDIF_LEFT1       0x0112
+/* Microdock S/PDIF OUT Left, 2nd or 96kHz */
+#define EMU_DST_MDOCK_SPDIF_LEFT2       0x0113
+/* Microdock S/PDIF OUT Right, 1st or 48kHz only */
+#define EMU_DST_MDOCK_SPDIF_RIGHT1      0x0116
+/* Microdock S/PDIF OUT Right, 2nd or 96kHz  */
+#define EMU_DST_MDOCK_SPDIF_RIGHT2      0x0117
+/* Microdock S/PDIF ADAT 8 channel out +8 to +f */
+#define EMU_DST_MDOCK_ADAT              0x0118
+/* Headphone jack on 1010 cardbus? 44.1/48kHz only? */
+#define EMU_DST_MANA_DAC_LEFT           0x0300
+/* Headphone jack on 1010 cardbus? 44.1/48kHz only? */
+#define EMU_DST_MANA_DAC_RIGHT          0x0301
+#define EMU_DST_MDOCK_SPDIF_LEFT1       0x0112  /* Microdock S/PDIF OUT Left, 1st or 48kHz only */
+#define EMU_DST_MDOCK_SPDIF_LEFT2       0x0113  /* Microdock S/PDIF OUT Left, 2nd or 96kHz */
+#define EMU_DST_MDOCK_SPDIF_RIGHT1      0x0116  /* Microdock S/PDIF OUT Right, 1st or 48kHz only */
+#define EMU_DST_MDOCK_SPDIF_RIGHT2      0x0117  /* Microdock S/PDIF OUT Right, 2nd or 96kHz  */
+#define EMU_DST_MDOCK_ADAT              0x0118  /* Microdock S/PDIF ADAT 8 channel out +8 to +f */
+#define EMU_DST_MANA_DAC_LEFT           0x0300  /* Headphone jack on 1010 cardbus? 44.1/48kHz only? */
+#define EMU_DST_MANA_DAC_RIGHT          0x0301  /* Headphone jack on 1010 cardbus? 44.1/48kHz only? */
 /************************************************************************************************/
 /* EMU1010m HANA Sources                                                                        */
+/* EMU1010 Audio Sources                                                                        */
 /************************************************************************************************/
+/* Hana, original 1010,1212,1820 using Alice2
+ * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * 0x00,0x00-0x1f: Silence
+ * 0x01, 0x10-0x1f: 32 Elink channels from Audio Dock
+ * 0x01, 0x00: Dock Mic A
+ * 0x01, 0x04: Dock Mic B
+ * 0x01, 0x08: Dock ADC 1 Left
+ * 0x01, 0x0c: Dock ADC 1 Right
+ * 0x01, 0x10: Dock ADC 2 Left
+ * 0x01, 0x14: Dock ADC 2 Right
+ * 0x01, 0x18: Dock ADC 3 Left
+ * 0x01, 0x1c: Dock ADC 3 Right
+ * 0x02, 0x00: Hana ADC Left
+ * 0x02, 0x01: Hana ADC Right
+/* Hana, original 1010,1212m,1820[m] using Alice2
+ * 0x00, 0x00-0x1f: Silence
+ * 0x01, 0x00-0x1f: 32 EDI channels from Audio Dock
+ *       0x00: Dock Mic A
+ *       0x04: Dock Mic B
+ *       0x08: Dock ADC 1 Left
+ *       0x0c: Dock ADC 1 Right
+ *       0x10: Dock ADC 2 Left
+ *       0x14: Dock ADC 2 Right
+ *       0x18: Dock ADC 3 Left
+ *       0x1c: Dock ADC 3 Right
+ * 0x02, 0x00: Hamoa ADC Left
+ * 0x02, 0x01: Hamoa ADC Right
  * 0x03, 0x00-0x0f: 16 inputs from Alice2 Emu32A output
  * 0x03, 0x10-0x1f: 16 inputs from Alice2 Emu32B output
 …
  * Not needed.
+ *
+ * Hana3, rev2 1010,1212,1616 using Tina
+ * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * 0x00,0x00-0x1f: Silence
+ * 0x01, 0x10-0x1f: 32 Elink channels from Audio Dock
+ * 0x01, 0x00: Dock Mic A
+ * 0x01, 0x04: Dock Mic B
+ * 0x01, 0x08: Dock ADC 1 Left
+ * 0x01, 0x0c: Dock ADC 1 Right
+ * 0x01, 0x10: Dock ADC 2 Left
+ * 0x01, 0x12: Dock S/PDIF Left
+ * 0x01, 0x14: Dock ADC 2 Right
+ * 0x01, 0x16: Dock S/PDIF Right
+ * 0x01, 0x18-0x1f: Dock ADAT 0-7
+ * 0x01, 0x18: Dock ADC 3 Left
+ * 0x01, 0x1c: Dock ADC 3 Right
+ * 0x02, 0x00: Hanoa ADC Left
+ * 0x02, 0x01: Hanoa ADC Right
+ * Hana3, rev2 1010,1212m,1616[m] using Tina
+ * 0x00, 0x00-0x1f: Silence
+ * 0x01, 0x00-0x1f: 32 EDI channels from Micro Dock
+ *       0x00: Dock Mic A
+ *       0x04: Dock Mic B
+ *       0x08: Dock ADC 1 Left
+ *       0x0c: Dock ADC 1 Right
+ *       0x10: Dock ADC 2 Left
+ *       0x12: Dock S/PDIF Left
+ *       0x14: Dock ADC 2 Right
+ *       0x16: Dock S/PDIF Right
+ *       0x18-0x1f: Dock ADAT 0-7
+ * 0x02, 0x00: Hamoa ADC Left
+ * 0x02, 0x01: Hamoa ADC Right
  * 0x03, 0x00-0x0f: 16 inputs from Tina Emu32A output
  * 0x03, 0x10-0x1f: 16 inputs from Tina Emu32B output
 …
+ *
  * HanaLite, rev1 0404 using Alice2
  * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
  * 0x00,0x00-0x1f: Silence
+ * HanaLiteLite, rev2 0404 using Tina
+ * 0x00, 0x00-0x1f: Silence
  * 0x01: Not used
  * 0x02, 0x00: ADC Left
  * 0x02, 0x01: ADC Right
+ * 0x03, 0x00-0x0f: 16 inputs from Alice2 Emu32A output
+ * 0x03, 0x10-0x1f: 16 inputs from Alice2 Emu32B output
+ * 0x04: Not used
+ * 0x05, 0x00: S/PDIF Left
+ * 0x05, 0x01: S/PDIF Right
+ * 0x06-0x07: Not used
+ *
+ * HanaLiteLite, rev2 0404 using Alice2
+ * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * 0x00,0x00-0x1f: Silence
+ * 0x01: Not used
+ * 0x02, 0x00: ADC Left
+ * 0x02, 0x01: ADC Right
+ * 0x03, 0x00-0x0f: 16 inputs from Alice2 Emu32A output
+ * 0x03, 0x10-0x1f: 16 inputs from Alice2 Emu32B output
+ * 0x03, 0x00-0x0f: 16 inputs from Alice2/Tina Emu32A output
+ * 0x03, 0x10-0x1f: 16 inputs from Alice2/Tina Emu32B output
  * 0x04: Not used
  * 0x05, 0x00: S/PDIF Left
 …
+ *
  * Mana, Cardbus 1616 using Tina2
+ * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
+ * 0x00,0x00-0x1f: Silence
+ * 0x01, 0x10-0x1f: 32 Elink channels from Audio Dock
+ * 0x01, 0x00: Dock Mic A
+ * 0x01, 0x04: Dock Mic B
+ * 0x01, 0x08: Dock ADC 1 Left
+ * 0x01, 0x0c: Dock ADC 1 Right
+ * 0x01, 0x10: Dock ADC 2 Left
+ * 0x01, 0x12: Dock S/PDIF Left
+ * 0x01, 0x14: Dock ADC 2 Right
+ * 0x01, 0x16: Dock S/PDIF Right
+ * 0x01, 0x18-0x1f: Dock ADAT 0-7
+ * 0x01, 0x18: Dock ADC 3 Left
+ * 0x01, 0x1c: Dock ADC 3 Right
+ * 0x00, 0x00-0x1f: Silence
+ * 0x01, 0x00-0x1f: 32 EDI channels from Micro Dock
+ *       (same as rev2 1010)
  * 0x02: Not used
  * 0x03, 0x00-0x0f: 16 inputs from Tina Emu32A output
  * 0x03, 0x10-0x1f: 16 inputs from Tina Emu32B output
+ * 0x03, 0x00-0x0f: 16 inputs from Tina2 Emu32A output
+ * 0x03, 0x10-0x1f: 16 inputs from Tina2 Emu32B output
  * 0x04-0x07: Not used
+ *
  */
 /* 32-bit sources of signal in the Hana FPGA. The sources are routed to
+ * destinations using mixer control for each destination - see emumixer.c
+ * Sources are either physical inputs of FPGA,
+ * or outputs from Alice (audigy) - 16 x EMU_SRC_ALICE_EMU32A +
+ * 16 x EMU_SRC_ALICE_EMU32B
+ * destinations using a mixer control for each destination - see emumixer.c.
+ * Sources are either physical inputs of Hana, or inputs from Alice2/Tina -
+ * 16 x EMU_SRC_ALICE_EMU32A + 16 x EMU_SRC_ALICE_EMU32B.
  */
 #define EMU_SRC_SILENCE         0x0000  /* Silence */
 …
 #define EMU_SRC_ALICE_EMU32A            0x0300  /* Alice2 EMU32a 16 outputs. +0 to +0xf */
 #define EMU_SRC_ALICE_EMU32B            0x0310  /* Alice2 EMU32b 16 outputs. +0 to +0xf */
+// In S/MUX mode, the samples of one channel are adjacent.
 #define EMU_SRC_HANA_ADAT       0x0400  /* Hana ADAT 8 channel in +0 to +7 */
 #define EMU_SRC_HANA_SPDIF_LEFT1        0x0500  /* Hana SPDIF Left, 1st or 48kHz only */
 #define EMU_SRC_HANA_SPDIF_LEFT2        0x0502  /* Hana SPDIF Left, 2nd or 96kHz */
+#define EMU_SRC_HANA_SPDIF_LEFT3        0x0504  /* Hana SPDIF Left, 3rd or 192kHz */
+#define EMU_SRC_HANA_SPDIF_LEFT4        0x0506  /* Hana SPDIF Left, 4th or 192kHz */
 #define EMU_SRC_HANA_SPDIF_RIGHT1       0x0501  /* Hana SPDIF Right, 1st or 48kHz only */
 #define EMU_SRC_HANA_SPDIF_RIGHT2       0x0503  /* Hana SPDIF Right, 2nd or 96kHz */
+#define EMU_SRC_HANA_SPDIF_RIGHT3       0x0505  /* Hana SPDIF Right, 3rd or 192kHz */
+#define EMU_SRC_HANA_SPDIF_RIGHT4       0x0507  /* Hana SPDIF Right, 4th or 192kHz */
 /* Additional inputs for 1616(M)/Microdock */
+/* Microdock S/PDIF Left, 1st or 48kHz only */
+#define EMU_SRC_MDOCK_SPDIF_LEFT1       0x0112
+/* Microdock S/PDIF Left, 2nd or 96kHz */
+#define EMU_SRC_MDOCK_SPDIF_LEFT2       0x0113
+/* Microdock S/PDIF Right, 1st or 48kHz only */
+#define EMU_SRC_MDOCK_SPDIF_RIGHT1      0x0116
+/* Microdock S/PDIF Right, 2nd or 96kHz */
+#define EMU_SRC_MDOCK_SPDIF_RIGHT2      0x0117
+/* Microdock ADAT 8 channel in +8 to +f */
+#define EMU_SRC_MDOCK_ADAT              0x0118
+#define EMU_SRC_MDOCK_SPDIF_LEFT1       0x0112  /* Microdock S/PDIF Left, 1st or 48kHz only */
+#define EMU_SRC_MDOCK_SPDIF_LEFT2       0x0113  /* Microdock S/PDIF Left, 2nd or 96kHz */
+#define EMU_SRC_MDOCK_SPDIF_RIGHT1      0x0116  /* Microdock S/PDIF Right, 1st or 48kHz only */
+#define EMU_SRC_MDOCK_SPDIF_RIGHT2      0x0117  /* Microdock S/PDIF Right, 2nd or 96kHz */
+#define EMU_SRC_MDOCK_ADAT              0x0118  /* Microdock ADAT 8 channel in +8 to +f */
 /* 0x600 and 0x700 no used */
+/* ------------------- CONSTANTS -------------------- */
+extern const char * const snd_emu10k1_fxbus[32];
+extern const char * const snd_emu10k1_sblive_ins[16];
+extern const char * const snd_emu10k1_audigy_ins[16];
+extern const char * const snd_emu10k1_sblive_outs[32];
+extern const char * const snd_emu10k1_audigy_outs[32];
+extern const s8 snd_emu10k1_sblive51_fxbus2_map[16];
 /* ------------------- STRUCTURES -------------------- */
 enum {
+        EMU10K1_UNUSED,  // This must be zero
         EMU10K1_EFX,
+        EMU10K1_EFX_IRQ,
         EMU10K1_PCM,
+        EMU10K1_PCM_IRQ,
         EMU10K1_SYNTH,
         EMU10K1_MIDI
+        EMU10K1_NUM_TYPES
 };
 …
 struct snd_emu10k1_voice {
+        struct snd_emu10k1 *emu;
+        int number;
+        unsigned int use: 1,
+            pcm: 1,
+            efx: 1,
+            synth: 1,
+            midi: 1;
+        unsigned char number;
+        unsigned char use;
+        unsigned char dirty;
+        unsigned char last;
         void (*interrupt)(struct snd_emu10k1 *emu, struct snd_emu10k1_voice *pvoice);
 …
         unsigned short running;
         unsigned short first_ptr;
+        snd_pcm_uframes_t resume_pos;
         struct snd_util_memblk *memblk;
+        unsigned int pitch_target;
         unsigned int start_addr;
         unsigned int ccca_start_addr;
 …
         unsigned char send_routing[3][8];
         unsigned char send_volume[3][8];
+        // 0x8000 is neutral. The mixer code rescales it to 0xffff to maintain
+        // backwards compatibility with user space.
         unsigned short attn[3];
         struct snd_emu10k1_pcm *epcm;
 …
 #define snd_emu10k1_compose_audigy_fxrt1(route) \
 ((unsigned int)route[0] | ((unsigned int)route[1] << 8) | ((unsigned int)route[2] << 16) | ((unsigned int)route[3] << 24))
+((unsigned int)route[0] | ((unsigned int)route[1] << 8) | ((unsigned int)route[2] << 16) | ((unsigned int)route[3] << 24) | 0x80808080)
 #define snd_emu10k1_compose_audigy_fxrt2(route) \
+((unsigned int)route[4] | ((unsigned int)route[5] << 8) | ((unsigned int)route[6] << 16) | ((unsigned int)route[7] << 24))
+((unsigned int)route[4] | ((unsigned int)route[5] << 8) | ((unsigned int)route[6] << 16) | ((unsigned int)route[7] << 24) | 0x80808080)
+#define snd_emu10k1_compose_audigy_sendamounts(vol) \
+(((unsigned int)vol[4] << 24) | ((unsigned int)vol[5] << 16) | ((unsigned int)vol[6] << 8) | (unsigned int)vol[7])
 struct snd_emu10k1_memblk {
 …
         unsigned int count;             /* count of GPR (1..16) */
         unsigned short gpr[32];         /* GPR number(s) */
         unsigned int value[32];
         unsigned int min;               /* minimum range */
         unsigned int max;               /* maximum range */
+        int value[32];
+        int min;                        /* minimum range */
+        int max;                        /* maximum range */
         unsigned int translation;       /* translation type (EMU10K1_GPR_TRANSLATION*) */
         struct snd_kcontrol *kcontrol;
 …
 struct snd_emu10k1_fx8010 {
+        unsigned short fxbus_mask;      /* used FX buses (bitmask) */
+        unsigned short extin_mask;      /* used external inputs (bitmask) */
+        unsigned short extout_mask;     /* used external outputs (bitmask) */
+        unsigned short pad1;
+        unsigned short extin_mask;      /* used external inputs (bitmask); not used for Audigy */
+        unsigned short extout_mask;     /* used external outputs (bitmask); not used for Audigy */
         unsigned int itram_size;        /* internal TRAM size in samples */
         struct snd_dma_buffer etram_pages; /* external TRAM pages and size */
 …
 };
+// Chip-o-logy:
+// - All SB Live! cards use EMU10K1 chips
+// - All SB Audigy cards use CA* chips, termed "emu10k2" by the driver
+// - Original Audigy uses CA0100 "Alice"
+// - Audigy 2 uses CA0102/CA10200 "Alice2"
+//   - Has an interface for CA0151 (P16V) "Alice3"
+// - Audigy 2 Value uses CA0108/CA10300 "Tina"
+//   - Approximately a CA0102 with an on-chip CA0151 (P17V)
+// - Audigy 2 ZS NB uses CA0109 "Tina2"
+//   - Cardbus version of CA0108
 struct snd_emu_chip_details {
         u32 vendor;
 …
         u32 subsystem;
         unsigned char revision;
+        unsigned char emu10k1_chip; /* Original SB Live. Not SB Live 24bit. */
+        unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */
+        unsigned char ca0102_chip;  /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */
+        unsigned char ca0108_chip;  /* Audigy 2 Value */
+        unsigned char ca_cardbus_chip; /* Audigy 2 ZS Notebook */
+        unsigned char ca0151_chip;  /* P16V */
+        unsigned char spk71;        /* Has 7.1 speakers */
+        unsigned char sblive51;     /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */
+        unsigned char spdif_bug;    /* Has Spdif phasing bug */
+        unsigned char ac97_chip;    /* Has an AC97 chip: 1 = mandatory, 2 = optional */
+        unsigned char ecard;        /* APS EEPROM */
+        unsigned char emu_model;     /* EMU model type */
+        unsigned char spi_dac;      /* SPI interface for DAC */
+        unsigned char i2c_adc;      /* I2C interface for ADC */
+        unsigned char adc_1361t;    /* Use Philips 1361T ADC */
+        unsigned char invert_shared_spdif; /* analog/digital switch inverted */
+        unsigned char emu_model;        /* EMU model type */
+#ifndef TARGET_OS2
+        unsigned int emu10k1_chip:1;    /* Original SB Live. Not SB Live 24bit. */
+                                        /* Redundant with emu10k2_chip being unset. */
+        unsigned int emu10k2_chip:1;    /* Audigy 1 or Audigy 2. */
+        unsigned int ca0102_chip:1;     /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */
+                                        /* Redundant with ca0108_chip being unset. */
+        unsigned int ca0108_chip:1;     /* Audigy 2 Value */
+        unsigned int ca_cardbus_chip:1; /* Audigy 2 ZS Notebook */
+        unsigned int ca0151_chip:1;     /* P16V */
+        unsigned int spk20:1;           /* Stereo only */
+        unsigned int spk71:1;           /* Has 7.1 speakers */
+        unsigned int no_adat:1;         /* Has no ADAT, only SPDIF */
+        unsigned int sblive51:1;        /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */
+        unsigned int spdif_bug:1;       /* Has Spdif phasing bug */
+        unsigned int ac97_chip:2;       /* Has an AC97 chip: 1 = mandatory, 2 = optional */
+        unsigned int ecard:1;           /* APS EEPROM */
+        unsigned int spi_dac:1;         /* SPI interface for DAC; requires ca0108_chip */
+        unsigned int i2c_adc:1;         /* I2C interface for ADC; requires ca0108_chip */
+        unsigned int adc_1361t:1;       /* Use Philips 1361T ADC */
+        unsigned int invert_shared_spdif:1;  /* analog/digital switch inverted */
+#else
+        unsigned int emu10k1_chip;      /* Original SB Live. Not SB Live 24bit. */
+                                        /* Redundant with emu10k2_chip being unset. */
+        unsigned int emu10k2_chip;      /* Audigy 1 or Audigy 2. */
+        unsigned int ca0102_chip;       /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */
+                                        /* Redundant with ca0108_chip being unset. */
+        unsigned int ca0108_chip;       /* Audigy 2 Value */
+        unsigned int ca_cardbus_chip;   /* Audigy 2 ZS Notebook */
+        unsigned int ca0151_chip;       /* P16V */
+        unsigned int spk20;             /* Stereo only */
+        unsigned int spk71;             /* Has 7.1 speakers */
+        unsigned int no_adat;           /* Has no ADAT, only SPDIF */
+        unsigned int sblive51;          /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */
+        unsigned int spdif_bug;         /* Has Spdif phasing bug */
+        unsigned int ac97_chip;         /* Has an AC97 chip: 1 = mandatory, 2 = optional */
+        unsigned int ecard;             /* APS EEPROM */
+        unsigned int spi_dac;           /* SPI interface for DAC; requires ca0108_chip */
+        unsigned int i2c_adc;           /* I2C interface for ADC; requires ca0108_chip */
+        unsigned int adc_1361t;         /* Use Philips 1361T ADC */
+        unsigned int invert_shared_spdif;  /* analog/digital switch inverted */
+#endif
         const char *driver;
         const char *name;
 …
 };
+#define NUM_OUTPUT_DESTS 28
+#define NUM_INPUT_DESTS 22
 struct snd_emu1010 {
         unsigned int output_source[64];
         unsigned int input_source[64];
+        unsigned char output_source[NUM_OUTPUT_DESTS];
+        unsigned char input_source[NUM_INPUT_DESTS];
         unsigned int adc_pads; /* bit mask */
         unsigned int dac_pads; /* bit mask */
+        unsigned int internal_clock; /* 44100 or 48000 */
+        unsigned int wclock;  /* Cached register value */
+        unsigned int word_clock;  /* Cached effective value */
+        unsigned int clock_source;
+        unsigned int clock_fallback;
         unsigned int optical_in; /* 0:SPDIF, 1:ADAT */
         unsigned int optical_out; /* 0:SPDIF, 1:ADAT */
+        struct delayed_work firmware_work;
+        u32 last_reg;
+        struct work_struct work;
 };
 …
         unsigned int serial;                    /* serial number */
         unsigned short model;                   /* subsystem id */
-        unsigned int card_type;                 /* EMU10K1_CARD_* */
         unsigned int ecard_ctrl;                /* ecard control bits */
         unsigned int address_mode;              /* address mode */
         unsigned long dma_mask;                 /* PCI DMA mask */
         bool iommu_workaround;                  /* IOMMU workaround needed */
-        unsigned int delay_pcm_irq;             /* in samples */
         int max_cache_pages;                    /* max memory size / PAGE_SIZE */
         struct snd_dma_buffer silent_page;      /* silent page */
 …
         int (*get_synth_voice)(struct snd_emu10k1 *emu);
         spinlock_t reg_lock;
         spinlock_t emu_lock;
         spinlock_t voice_lock;
+        spinlock_t reg_lock;  // high-level driver lock
+        spinlock_t emu_lock;  // low-level i/o lock
+        spinlock_t voice_lock;  // voice allocator lock
         spinlock_t spi_lock; /* serialises access to spi port */
         spinlock_t i2c_lock; /* serialises access to i2c port */
         struct snd_emu10k1_voice voices[NUM_G];
-        struct snd_emu10k1_voice p16v_voices[4];
-        struct snd_emu10k1_voice p16v_capture_voice;
         int p16v_device_offset;
         u32 p16v_capture_source;
 …
         struct snd_kcontrol *ctl_efx_send_volume;
         struct snd_kcontrol *ctl_efx_attn;
+        struct snd_kcontrol *ctl_clock_source;
         void (*hwvol_interrupt)(struct snd_emu10k1 *emu, unsigned int status);
 …
         void (*spdif_interrupt)(struct snd_emu10k1 *emu, unsigned int status);
         void (*dsp_interrupt)(struct snd_emu10k1 *emu);
+        void (*gpio_interrupt)(struct snd_emu10k1 *emu);
+        void (*p16v_interrupt)(struct snd_emu10k1 *emu);
         struct snd_pcm_substream *pcm_capture_substream;
         struct snd_pcm_substream *pcm_capture_mic_substream;
         struct snd_pcm_substream *pcm_capture_efx_substream;
-        struct snd_pcm_substream *pcm_playback_efx_substream;
         struct snd_timer *timer;
 …
 unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn);
 void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data);
+void snd_emu10k1_ptr_write_multiple(struct snd_emu10k1 *emu, unsigned int chn, ...);
 unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn);
 void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data);
 int snd_emu10k1_spi_write(struct snd_emu10k1 * emu, unsigned int data);
 int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
+int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value);
+int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value);
+int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, u32 dst, u32 src);
+void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
+void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value);
+void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src);
+u32 snd_emu1010_fpga_link_dst_src_read(struct snd_emu10k1 *emu, u32 dst);
+int snd_emu1010_get_raw_rate(struct snd_emu10k1 *emu, u8 src);
+void snd_emu1010_update_clock(struct snd_emu10k1 *emu);
 unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc);
 void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb);
 …
 void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum);
 void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum);
+#if 0
 void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum);
 void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum);
+#endif
+void snd_emu10k1_voice_set_loop_stop_multiple(struct snd_emu10k1 *emu, u64 voices);
+void snd_emu10k1_voice_clear_loop_stop_multiple(struct snd_emu10k1 *emu, u64 voices);
+int snd_emu10k1_voice_clear_loop_stop_multiple_atomic(struct snd_emu10k1 *emu, u64 voices);
 void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait);
 static inline unsigned int snd_emu10k1_wc(struct snd_emu10k1 *emu) { return (inl(emu->port + WC) >> 6) & 0xfffff; }
 unsigned short snd_emu10k1_ac97_read(struct snd_ac97 *ac97, unsigned short reg);
 void snd_emu10k1_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short data);
-unsigned int snd_emu10k1_rate_to_pitch(unsigned int rate);
 #ifdef CONFIG_PM_SLEEP
 …
 /* voice allocation */
+int snd_emu10k1_voice_alloc(struct snd_emu10k1 *emu, int type, int pair, struct snd_emu10k1_voice **rvoice);
+int snd_emu10k1_voice_alloc(struct snd_emu10k1 *emu, int type, int count, int channels,
+                            struct snd_emu10k1_pcm *epcm, struct snd_emu10k1_voice **rvoice);
 int snd_emu10k1_voice_free(struct snd_emu10k1 *emu, struct snd_emu10k1_voice *pvoice);

GPL/trunk/alsa-kernel/include/sound/emux_synth.h

-              r679
+              r772
         int (*oss_ioctl)(struct snd_emux *emu, int cmd, int p1, int p2);
 #endif
+        int (*get_pitch_shift)(struct snd_emux *emu);
 };
 …
         int mem_size;           /* memory size (in byte) */
         int num_ports;          /* number of ports to be created */
-        int pitch_shift;        /* pitch shift value (for Emu10k1) */
         struct snd_emux_operators ops;  /* operators */
         void *hw;               /* hardware */

GPL/trunk/alsa-kernel/include/sound/hda_codec.h

-              r717
+              r772
 #include <sound/hda_regmap.h>
-#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
-#define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
 /*
  * Structures
 …
         unsigned int bus_probing :1;    /* during probing process */
         unsigned int keep_power:1;      /* keep power up for notification */
+        unsigned int jackpoll_in_suspend:1; /* keep jack polling during
+                                             * runtime suspend
+                                             */
         int primary_dig_out_type;       /* primary digital out PCM type */
 …
         unsigned int configured:1; /* codec was configured */
         unsigned int in_freeing:1; /* being released */
-        unsigned int registered:1; /* codec was registered */
         unsigned int display_power_control:1; /* needs display power */
         unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
 …
         unsigned int relaxed_resume:1;  /* don't resume forcibly for jack */
         unsigned int forced_resume:1; /* forced resume for jack */
+        unsigned int mst_no_extra_pcms:1; /* no backup PCMs for DP-MST */
+        unsigned int no_stream_clean_at_suspend:1; /* do not clean streams at suspend */
+        unsigned int ctl_dev_id:1; /* old control element id build behaviour */
 #ifdef CONFIG_PM
 …
 #define hda_codec_dev(_dev)     (&(_dev)->core.dev)
-#define hdac_to_hda_priv(_hdac) \
-                        container_of(_hdac, struct hdac_hda_priv, codec.core)
 #define hdac_to_hda_codec(_hdac) container_of(_hdac, struct hda_codec, core)
 …
  * constructors
  */
+#ifndef TARGET_OS2
+__printf(3, 4)
+#endif
+struct hda_codec *
+snd_hda_codec_device_init(struct hda_bus *bus, unsigned int codec_addr,
+                          const char *fmt, ...);
 int snd_hda_codec_new(struct hda_bus *bus, struct snd_card *card,
                       unsigned int codec_addr, struct hda_codec **codecp);
 int snd_hda_codec_device_new(struct hda_bus *bus, struct snd_card *card,
+                      unsigned int codec_addr, struct hda_codec *codec);
+                      unsigned int codec_addr, struct hda_codec *codec,
+                      bool snddev_managed);
 int snd_hda_codec_configure(struct hda_codec *codec);
 int snd_hda_codec_update_widgets(struct hda_codec *codec);
+void snd_hda_codec_register(struct hda_codec *codec);
+void snd_hda_codec_unregister(struct hda_codec *codec);
+void snd_hda_codec_cleanup_for_unbind(struct hda_codec *codec);
 /*
 …
 #define snd_hda_power_down_pm(codec)    snd_hdac_power_down_pm(&(codec)->core)
 #ifdef CONFIG_PM
+void snd_hda_codec_set_power_save(struct hda_codec *codec, int delay);
 void snd_hda_set_power_save(struct hda_bus *bus, int delay);
 void snd_hda_update_power_acct(struct hda_codec *codec);
 #else
+static inline void snd_hda_codec_set_power_save(struct hda_codec *codec, int delay) {}
 static inline void snd_hda_set_power_save(struct hda_bus *bus, int delay) {}
 #endif

GPL/trunk/alsa-kernel/include/sound/hda_register.h

-              r695
+              r772
 #define AZX_ML_INTERVAL                 0x40
+/* HDaudio registers valid for HDaudio and HDaudio extended links */
 #define AZX_REG_ML_LCAP                 0x00
+#define AZX_ML_HDA_LCAP_ALT             BIT(28)
+#define AZX_ML_HDA_LCAP_ALT_HDA         0x0
+#define AZX_ML_HDA_LCAP_ALT_HDA_EXT     0x1
+#define AZX_ML_HDA_LCAP_INTC            BIT(27)         /* only used if ALT == 1 */
+#define AZX_ML_HDA_LCAP_OFLS            BIT(26)         /* only used if ALT == 1 */
+#define AZX_ML_HDA_LCAP_LSS             BIT(23)         /* only used if ALT == 1 */
+#define AZX_ML_HDA_LCAP_SLCOUNT         GENMASK(22, 20) /* only used if ALT == 1 */
 #define AZX_REG_ML_LCTL                 0x04
+#define AZX_ML_LCTL_INTSTS              BIT(31)         /* only used if ALT == 1 */
+#define AZX_ML_LCTL_CPA                 BIT(23)
+#define AZX_ML_LCTL_CPA_SHIFT           23
+#define AZX_ML_LCTL_SPA                 BIT(16)
+#define AZX_ML_LCTL_SPA_SHIFT           16
+#define AZX_ML_LCTL_INTEN               BIT(5)          /* only used if ALT == 1 */
+#define AZX_ML_LCTL_OFLEN               BIT(4)          /* only used if ALT == 1 */
+#define AZX_ML_LCTL_SCF                 GENMASK(3, 0)   /* only used if ALT == 0 */
 #define AZX_REG_ML_LOSIDV               0x08
+/* bit0 is reserved, with BIT(1) mapping to stream1 */
+#define AZX_ML_LOSIDV_STREAM_MASK       0xFFFE
 #define AZX_REG_ML_LSDIID               0x0C
+#define AZX_REG_ML_LSDIID_OFFSET(x)     (0x0C + (x) * 0x02)     /* only used if ALT == 1 */
+/* HDaudio registers only valid if LCAP.ALT == 0 */
 #define AZX_REG_ML_LPSOO                0x10
 #define AZX_REG_ML_LPSIO                0x12
 …
 #define AZX_REG_ML_LINPAY               0x30
+/* bit0 is reserved, with BIT(1) mapping to stream1 */
+#define ML_LOSIDV_STREAM_MASK           0xFFFE
+#define ML_LCTL_SCF_MASK                        0xF
+#define AZX_MLCTL_SPA                           (0x1 << 16)
+#define AZX_MLCTL_CPA                           (0x1 << 23)
+#define AZX_MLCTL_SPA_SHIFT                     16
+#define AZX_MLCTL_CPA_SHIFT                     23
+/* HDaudio Extended link registers only valid if LCAP.ALT == 1 */
+#define AZX_REG_ML_LSYNC                0x1C
+#define AZX_REG_ML_LSYNC_CMDSYNC        BIT(24)
+#define AZX_REG_ML_LSYNC_CMDSYNC_SHIFT  24
+#define AZX_REG_ML_LSYNC_SYNCGO         BIT(23)
+#define AZX_REG_ML_LSYNC_SYNCPU         BIT(20)
+#define AZX_REG_ML_LSYNC_SYNCPRD        GENMASK(19, 0)
+#define AZX_REG_ML_LEPTR                0x20
+#define AZX_REG_ML_LEPTR_ID             GENMASK(31, 24)
+#define AZX_REG_ML_LEPTR_ID_SHIFT       24
+#define AZX_REG_ML_LEPTR_ID_SDW         0x00
+#define AZX_REG_ML_LEPTR_ID_INTEL_SSP   0xC0
+#define AZX_REG_ML_LEPTR_ID_INTEL_DMIC  0xC1
+#define AZX_REG_ML_LEPTR_ID_INTEL_UAOL  0xC2
+#define AZX_REG_ML_LEPTR_VER            GENMASK(23, 20)
+#define AZX_REG_ML_LEPTR_PTR            GENMASK(19, 0)
 /* registers for DMA Resume Capability Structure */

GPL/trunk/alsa-kernel/include/sound/hda_verbs.h

r679	r772
462	462	#define AC_DE_IA (1<<2)
463	463
464		/* device ~~device~~ types (0x0-0xf) */
	464	/* device types (0x0-0xf) */
465	465	enum {
466	466	AC_JACK_LINE_OUT,

GPL/trunk/alsa-kernel/include/sound/hdaudio.h

-              r695
+              r772
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/iopoll.h>
+#include <linux/pci.h>
 #include <linux/pm_runtime.h>
 #include <linux/timecounter.h>
 …
         bool caps_overwriting:1; /* caps overwrite being in process */
         bool cache_coef:1;      /* cache COEF read/write too */
+        unsigned int registered:1; /* codec was registered */
 };
 …
 void snd_hdac_device_unregister(struct hdac_device *codec);
 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
+int snd_hdac_codec_modalias(const struct hdac_device *hdac, char *buf, size_t size);
 int snd_hdac_refresh_widgets(struct hdac_device *codec);
 …
         bool polling_mode:1;
         bool needs_damn_long_delay:1;
+        bool not_use_interrupts:1;      /* prohibiting the RIRB IRQ */
+        bool access_sdnctl_in_dword:1;  /* accessing the sdnctl register by dword */
         int poll_count;
 …
 #define snd_hdac_reg_writel(bus, addr, val)     writel(val, addr)
 #define snd_hdac_reg_readl(bus, addr)   readl(addr)
+#define snd_hdac_reg_writeq(bus, addr, val)     writeq(val, addr)
+#define snd_hdac_reg_readq(bus, addr)           readq(addr)
 /*
 …
                              (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
+/* update register macro */
+#define snd_hdac_updatel(addr, reg, mask, val)          \
+        writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg)
+#define snd_hdac_updatew(addr, reg, mask, val)          \
+        writew(((readw(addr + reg) & ~(mask)) | (val)), addr + reg)
 /*
  * HD-audio stream
 …
         void __iomem *sd_addr;  /* stream descriptor pointer */
+        void __iomem *spib_addr; /* software position in buffers stream pointer */
+        void __iomem *fifo_addr; /* software position Max fifos stream pointer */
+        void __iomem *dpibr_addr; /* DMA position in buffer resume pointer */
+        u32 dpib;               /* DMA position in buffer */
+        u32 lpib;               /* Linear position in buffer */
         u32 sd_int_sta_mask;    /* stream int status mask */
 …
 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
                                            struct snd_pcm_substream *substream);
+void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev);
 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
 …
 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
                                 unsigned int format_val);
+void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
+void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
+void snd_hdac_stream_start(struct hdac_stream *azx_dev);
 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
+void snd_hdac_stop_streams(struct hdac_bus *bus);
+void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
 …
 int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
                                 struct snd_pcm_substream *substream);
+void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip,
+                                   bool enable, int index);
+int snd_hdac_stream_set_spib(struct hdac_bus *bus,
+                             struct hdac_stream *azx_dev, u32 value);
+int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
+                                   struct hdac_stream *azx_dev);
+void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
+                                 bool enable, int index);
+int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev);
+int snd_hdac_stream_set_dpibr(struct hdac_bus *bus,
+                              struct hdac_stream *azx_dev, u32 value);
+int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value);
 /*
 …
 #define snd_hdac_stream_readb(dev, reg) \
         snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
+#define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \
+        read_poll_timeout_atomic(snd_hdac_reg_readb, val, cond, delay_us, timeout_us, \
+                                 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
+#define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \
+        read_poll_timeout_atomic(snd_hdac_reg_readl, val, cond, delay_us, timeout_us, \
+                                 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
 /* update a register, pass without AZX_REG_ prefix */
 …
              (ptr) = snd_array_elem(array, ++(idx)))
+/*
+ * Device matching
+ */
+#ifndef TARGET_OS2
+#define HDA_CONTROLLER_IS_HSW(pci) (pci_match_id((struct pci_device_id []){ \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_0) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_2) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_3) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BDW) }, \
+                        { } \
+                }, pci))
+#define HDA_CONTROLLER_IS_APL(pci) (pci_match_id((struct pci_device_id []){ \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_APL) }, \
+                        { } \
+                }, pci))
+#define HDA_CONTROLLER_IN_GPU(pci) (pci_match_id((struct pci_device_id []){ \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG1) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_0) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_1) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_2) }, \
+                        { } \
+                }, pci) || HDA_CONTROLLER_IS_HSW(pci))
+#else
+#define HDA_CONTROLLER_IS_HSW(pci) 0
+#define HDA_CONTROLLER_IS_APL(pci) 0
+#define HDA_CONTROLLER_IN_GPU(pci) 0
+#endif
 #endif /* __SOUND_HDAUDIO_H */

GPL/trunk/alsa-kernel/include/sound/hdaudio_ext.h

-              r717
+              r772
 #define __SOUND_HDAUDIO_EXT_H
+#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/iopoll.h>
 #include <sound/hdaudio.h>
 …
 void snd_hdac_ext_bus_exit(struct hdac_bus *bus);
-int snd_hdac_ext_bus_device_init(struct hdac_bus *bus, int addr,
-                                struct hdac_device *hdev, int type);
-void snd_hdac_ext_bus_device_exit(struct hdac_device *hdev);
 void snd_hdac_ext_bus_device_remove(struct hdac_bus *bus);
 …
 void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *chip, bool enable);
-void snd_hdac_ext_stream_spbcap_enable(struct hdac_bus *chip,
-                                 bool enable, int index);
 int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus);
+struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_bus *bus,
+                                                const char *codec_name);
+struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_addr(struct hdac_bus *bus, int addr);
+struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_name(struct hdac_bus *bus,
+                                                         const char *codec_name);
 enum hdac_ext_stream_type {
 …
  * @pphc_addr: processing pipe host stream pointer
  * @pplc_addr: processing pipe link stream pointer
- * @spib_addr: software position in buffers stream pointer
- * @fifo_addr: software position Max fifos stream pointer
- * @dpibr_addr: DMA position in buffer resume pointer
- * @dpib: DMA position in buffer
- * @lpib: Linear position in buffer
  * @decoupled: stream host and link is decoupled
  * @link_locked: link is locked
 …
         void __iomem *pplc_addr;
+        void __iomem *spib_addr;
+        void __iomem *fifo_addr;
+        u32 pphcllpl;
+        u32 pphcllpu;
+        u32 pphcldpl;
+        u32 pphcldpu;
-        void __iomem *dpibr_addr;
-        u32 dpib;
-        u32 lpib;
         bool decoupled:1;
         bool link_locked:1;
 …
         container_of(s, struct hdac_ext_stream, hstream)
-void snd_hdac_ext_stream_init(struct hdac_bus *bus,
-                                struct hdac_ext_stream *stream, int idx,
-                                int direction, int tag);
 int snd_hdac_ext_stream_init_all(struct hdac_bus *bus, int start_idx,
                 int num_stream, int dir);
 void snd_hdac_stream_free_all(struct hdac_bus *bus);
 void snd_hdac_link_free_all(struct hdac_bus *bus);
+                                 int num_stream, int dir);
+void snd_hdac_ext_stream_free_all(struct hdac_bus *bus);
+void snd_hdac_ext_link_free_all(struct hdac_bus *bus);
 struct hdac_ext_stream *snd_hdac_ext_stream_assign(struct hdac_bus *bus,
                                            struct snd_pcm_substream *substream,
                                            int type);
+void snd_hdac_ext_stream_release(struct hdac_ext_stream *azx_dev, int type);
+void snd_hdac_ext_stream_release(struct hdac_ext_stream *hext_stream, int type);
+struct hdac_ext_stream *snd_hdac_ext_cstream_assign(struct hdac_bus *bus,
+                                                    struct snd_compr_stream *cstream);
 void snd_hdac_ext_stream_decouple_locked(struct hdac_bus *bus,
                                   struct hdac_ext_stream *azx_dev, bool decouple);
+                                         struct hdac_ext_stream *hext_stream, bool decouple);
 void snd_hdac_ext_stream_decouple(struct hdac_bus *bus,
                                 struct hdac_ext_stream *azx_dev, bool decouple);
-void snd_hdac_ext_stop_streams(struct hdac_bus *bus);
+int snd_hdac_ext_stream_set_spib(struct hdac_bus *bus,
+                                 struct hdac_ext_stream *stream, u32 value);
+int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_bus *bus,
+                                 struct hdac_ext_stream *stream);
+void snd_hdac_ext_stream_drsm_enable(struct hdac_bus *bus,
+                                bool enable, int index);
+int snd_hdac_ext_stream_set_dpibr(struct hdac_bus *bus,
+                                struct hdac_ext_stream *stream, u32 value);
+int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value);
+void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream);
+void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream);
+void snd_hdac_ext_link_stream_reset(struct hdac_ext_stream *hstream);
+int snd_hdac_ext_link_stream_setup(struct hdac_ext_stream *stream, int fmt);
+void snd_hdac_ext_stream_start(struct hdac_ext_stream *hext_stream);
+void snd_hdac_ext_stream_clear(struct hdac_ext_stream *hext_stream);
+void snd_hdac_ext_stream_reset(struct hdac_ext_stream *hext_stream);
+int snd_hdac_ext_stream_setup(struct hdac_ext_stream *hext_stream, int fmt);
 struct hdac_ext_link {
 …
 };
 int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link);
 int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link);
+int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *hlink);
+int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *hlink);
 int snd_hdac_ext_bus_link_power_up_all(struct hdac_bus *bus);
 int snd_hdac_ext_bus_link_power_down_all(struct hdac_bus *bus);
 void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link,
                                  int stream);
 void snd_hdac_ext_link_clear_stream_id(struct hdac_ext_link *link,
                                  int stream);
+void snd_hdac_ext_bus_link_set_stream_id(struct hdac_ext_link *hlink,
+                                         int stream);
+void snd_hdac_ext_bus_link_clear_stream_id(struct hdac_ext_link *hlink,
+                                           int stream);
 int snd_hdac_ext_bus_link_get(struct hdac_bus *bus, struct hdac_ext_link *link);
 int snd_hdac_ext_bus_link_put(struct hdac_bus *bus, struct hdac_ext_link *link);
+int snd_hdac_ext_bus_link_get(struct hdac_bus *bus, struct hdac_ext_link *hlink);
+int snd_hdac_ext_bus_link_put(struct hdac_bus *bus, struct hdac_ext_link *hlink);
 void snd_hdac_ext_bus_link_power(struct hdac_device *codec, bool enable);
+/* update register macro */
+#define snd_hdac_updatel(addr, reg, mask, val)          \
+        writel(((readl(addr + reg) & ~(mask)) | (val)), \
+                addr + reg)
+#define snd_hdac_adsp_writeb(chip, reg, value) \
+        snd_hdac_reg_writeb(chip, (chip)->dsp_ba + (reg), value)
+#define snd_hdac_adsp_readb(chip, reg) \
+        snd_hdac_reg_readb(chip, (chip)->dsp_ba + (reg))
+#define snd_hdac_adsp_writew(chip, reg, value) \
+        snd_hdac_reg_writew(chip, (chip)->dsp_ba + (reg), value)
+#define snd_hdac_adsp_readw(chip, reg) \
+        snd_hdac_reg_readw(chip, (chip)->dsp_ba + (reg))
+#define snd_hdac_adsp_writel(chip, reg, value) \
+        snd_hdac_reg_writel(chip, (chip)->dsp_ba + (reg), value)
+#define snd_hdac_adsp_readl(chip, reg) \
+        snd_hdac_reg_readl(chip, (chip)->dsp_ba + (reg))
+#define snd_hdac_adsp_writeq(chip, reg, value) \
+        snd_hdac_reg_writeq(chip, (chip)->dsp_ba + (reg), value)
+#define snd_hdac_adsp_readq(chip, reg) \
+        snd_hdac_reg_readq(chip, (chip)->dsp_ba + (reg))
+#define snd_hdac_updatew(addr, reg, mask, val)          \
+        writew(((readw(addr + reg) & ~(mask)) | (val)), \
+                addr + reg)
+#define snd_hdac_adsp_updateb(chip, reg, mask, val) \
+        snd_hdac_adsp_writeb(chip, reg, \
+                        (snd_hdac_adsp_readb(chip, reg) & ~(mask)) | (val))
+#define snd_hdac_adsp_updatew(chip, reg, mask, val) \
+        snd_hdac_adsp_writew(chip, reg, \
+                        (snd_hdac_adsp_readw(chip, reg) & ~(mask)) | (val))
+#define snd_hdac_adsp_updatel(chip, reg, mask, val) \
+        snd_hdac_adsp_writel(chip, reg, \
+                        (snd_hdac_adsp_readl(chip, reg) & ~(mask)) | (val))
+#define snd_hdac_adsp_updateq(chip, reg, mask, val) \
+        snd_hdac_adsp_writeq(chip, reg, \
+                        (snd_hdac_adsp_readq(chip, reg) & ~(mask)) | (val))
+#define snd_hdac_adsp_readb_poll(chip, reg, val, cond, delay_us, timeout_us) \
+        readb_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
+                           delay_us, timeout_us)
+#define snd_hdac_adsp_readw_poll(chip, reg, val, cond, delay_us, timeout_us) \
+        readw_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
+                           delay_us, timeout_us)
+#define snd_hdac_adsp_readl_poll(chip, reg, val, cond, delay_us, timeout_us) \
+        readl_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
+                           delay_us, timeout_us)
+#define snd_hdac_adsp_readq_poll(chip, reg, val, cond, delay_us, timeout_us) \
+        readq_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
+                           delay_us, timeout_us)
 struct hdac_ext_device;

GPL/trunk/alsa-kernel/include/sound/hdmi-codec.h

-              r703
+              r772
         unsigned int bit_clk_inv:1;
         unsigned int frame_clk_inv:1;
         unsigned int bit_clk_master:1;
         unsigned int frame_clk_master:1;
+        unsigned int bit_clk_provider:1;
+        unsigned int frame_clk_provider:1;
         /* bit_fmt could be standard PCM format or
          * IEC958 encoded format. ALSA IEC958 plugin will pass
 …
         const struct hdmi_codec_ops *ops;
         uint i2s:1;
+        uint no_i2s_playback:1;
+        uint no_i2s_capture:1;
         uint spdif:1;
+        uint no_spdif_playback:1;
+        uint no_spdif_capture:1;
         int max_i2s_channels;
         void *data;

GPL/trunk/alsa-kernel/include/sound/hwdep.h

r679	r772
54	54	void *private_data;
55	55	void (private_free) (struct snd_hwdep hwdep);
56		struct device dev;
	56	struct device *dev;
57	57
58	58	struct mutex open_mutex;

GPL/trunk/alsa-kernel/include/sound/info.h

r679	r772
123	123	struct snd_info_entry *parent);
124	124	void snd_info_free_entry(struct snd_info_entry *entry);
125		~~int snd_info_store_text(struct snd_info_entry *entry);~~
126		~~int snd_info_restore_text(struct snd_info_entry *entry);~~
127	125
128	126	int snd_info_card_create(struct snd_card *card);

GPL/trunk/alsa-kernel/include/sound/intel-dsp-config.h

-              r695
+              r772
         SND_INTEL_DSP_DRIVER_SST,
         SND_INTEL_DSP_DRIVER_SOF,
+        SND_INTEL_DSP_DRIVER_LAST = SND_INTEL_DSP_DRIVER_SOF
+        SND_INTEL_DSP_DRIVER_AVS,
+        SND_INTEL_DSP_DRIVER_LAST = SND_INTEL_DSP_DRIVER_AVS
 };

GPL/trunk/alsa-kernel/include/sound/intel-nhlt.h

-              r689
+              r772
 #include <linux/acpi.h>
+#if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_SND_INTEL_NHLT)
+enum nhlt_link_type {
+        NHLT_LINK_HDA = 0,
+        NHLT_LINK_DSP = 1,
+        NHLT_LINK_DMIC = 2,
+        NHLT_LINK_SSP = 3,
+        NHLT_LINK_INVALID
+};
+enum nhlt_device_type {
+        NHLT_DEVICE_BT = 0,
+        NHLT_DEVICE_DMIC = 1,
+        NHLT_DEVICE_I2S = 4,
+        NHLT_DEVICE_INVALID
+};
 struct wav_fmt {
 …
         u8 sub_fmt[16];
 } __packed;
-enum nhlt_link_type {
-        NHLT_LINK_HDA = 0,
-        NHLT_LINK_DSP = 1,
-        NHLT_LINK_DMIC = 2,
-        NHLT_LINK_SSP = 3,
-        NHLT_LINK_INVALID
-};
-enum nhlt_device_type {
-        NHLT_DEVICE_BT = 0,
-        NHLT_DEVICE_DMIC = 1,
-        NHLT_DEVICE_I2S = 4,
-        NHLT_DEVICE_INVALID
-};
 struct nhlt_specific_cfg {
 …
 };
+#if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_SND_INTEL_NHLT)
 struct nhlt_acpi_table *intel_nhlt_init(struct device *dev);
 …
 int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt);
+bool intel_nhlt_has_endpoint_type(struct nhlt_acpi_table *nhlt, u8 link_type);
+int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8 device_type);
+int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num);
+struct nhlt_specific_cfg *
+intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt,
+                             u32 bus_id, u8 link_type, u8 vbps, u8 bps,
+                             u8 num_ch, u32 rate, u8 dir, u8 dev_type);
 #else
-struct nhlt_acpi_table;
 static inline struct nhlt_acpi_table *intel_nhlt_init(struct device *dev)
 …
         return 0;
+}
+static inline bool intel_nhlt_has_endpoint_type(struct nhlt_acpi_table *nhlt,
+                                                u8 link_type)
+{
+        return false;
+}
+static inline int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8 device_type)
+{
+        return 0;
+}
+static inline int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num)
+{
+        return 0;
+}
+static inline struct nhlt_specific_cfg *
+intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt,
+                             u32 bus_id, u8 link_type, u8 vbps, u8 bps,
+                             u8 num_ch, u32 rate, u8 dir, u8 dev_type)
+{
+        return NULL;
+}
 #endif

GPL/trunk/alsa-kernel/include/sound/madera-pdata.h

r679	r772
10	10	#define MADERA_CODEC_PDATA_H
11	11
12		#include <linux/~~kernel~~.h>
	12	#include <linux/types.h>
13	13
14	14	#define MADERA_MAX_INPUT 6

GPL/trunk/alsa-kernel/include/sound/memalloc.h

-              r717
+              r772
 #define __SOUND_MEMALLOC_H
+#include <linux/dma-direction.h>
 #include <asm/page.h>
 struct device;
 struct vm_area_struct;
+struct sg_table;
 /*
 …
 struct snd_dma_device {
         int type;                       /* SNDRV_DMA_TYPE_XXX */
+        enum dma_data_direction dir;    /* DMA direction */
+        bool need_sync;                 /* explicit sync needed? */
         struct device *dev;             /* generic device */
 };
-#define snd_dma_continuous_data(x)      ((struct device *)(__force unsigned long)(x))
 /*
 …
 #define SNDRV_DMA_TYPE_DEV              2       /* generic device continuous */
 #define SNDRV_DMA_TYPE_DEV_WC           5       /* continuous write-combined */
-#ifdef CONFIG_SND_DMA_SGBUF
-#define SNDRV_DMA_TYPE_DEV_SG           3       /* generic device SG-buffer */
-#define SNDRV_DMA_TYPE_DEV_WC_SG        6       /* SG write-combined */
-#else
-#define SNDRV_DMA_TYPE_DEV_SG   SNDRV_DMA_TYPE_DEV /* no SG-buf support */
-#define SNDRV_DMA_TYPE_DEV_WC_SG        SNDRV_DMA_TYPE_DEV_WC
-#endif
 #ifdef CONFIG_GENERIC_ALLOCATOR
 #define SNDRV_DMA_TYPE_DEV_IRAM         4       /* generic device iram-buffer */
 …
 #endif
 #define SNDRV_DMA_TYPE_VMALLOC          7       /* vmalloc'ed buffer */
+#define SNDRV_DMA_TYPE_NONCONTIG        8       /* non-coherent SG buffer */
+#define SNDRV_DMA_TYPE_NONCOHERENT      9       /* non-coherent buffer */
+#ifdef CONFIG_SND_DMA_SGBUF
+#define SNDRV_DMA_TYPE_DEV_SG           SNDRV_DMA_TYPE_NONCONTIG
+#define SNDRV_DMA_TYPE_DEV_WC_SG        6       /* SG write-combined */
+#else
+#define SNDRV_DMA_TYPE_DEV_SG   SNDRV_DMA_TYPE_DEV /* no SG-buf support */
+#define SNDRV_DMA_TYPE_DEV_WC_SG        SNDRV_DMA_TYPE_DEV_WC
+#endif
+/* fallback types, don't use those directly */
+#ifdef CONFIG_SND_DMA_SGBUF
+#define SNDRV_DMA_TYPE_DEV_SG_FALLBACK          10
+#define SNDRV_DMA_TYPE_DEV_WC_SG_FALLBACK       11
+#endif
 /*
 …
 /* allocate/release a buffer */
+int snd_dma_alloc_pages(int type, struct device *dev, size_t size,
+                        struct snd_dma_buffer *dmab);
+int snd_dma_alloc_dir_pages(int type, struct device *dev,
+                            enum dma_data_direction dir, size_t size,
+                            struct snd_dma_buffer *dmab);
+static inline int snd_dma_alloc_pages(int type, struct device *dev,
+                                      size_t size, struct snd_dma_buffer *dmab)
+{
+        return snd_dma_alloc_dir_pages(type, dev, DMA_BIDIRECTIONAL, size, dmab);
+}
 int snd_dma_alloc_pages_fallback(int type, struct device *dev, size_t size,
                                  struct snd_dma_buffer *dmab);
 …
 int snd_dma_buffer_mmap(struct snd_dma_buffer *dmab,
                         struct vm_area_struct *area);
+enum snd_dma_sync_mode { SNDRV_DMA_SYNC_CPU, SNDRV_DMA_SYNC_DEVICE };
+#ifdef CONFIG_HAS_DMA
+void snd_dma_buffer_sync(struct snd_dma_buffer *dmab,
+                         enum snd_dma_sync_mode mode);
+#else
+static inline void snd_dma_buffer_sync(struct snd_dma_buffer *dmab,
+                                       enum snd_dma_sync_mode mode) {}
+#endif
 dma_addr_t snd_sgbuf_get_addr(struct snd_dma_buffer *dmab, size_t offset);
 …
 /* device-managed memory allocator */
+struct snd_dma_buffer *snd_devm_alloc_pages(struct device *dev, int type,
+                                            size_t size);
+struct snd_dma_buffer *snd_devm_alloc_dir_pages(struct device *dev, int type,
+                                                enum dma_data_direction dir,
+                                                size_t size);
+static inline struct snd_dma_buffer *
+snd_devm_alloc_pages(struct device *dev, int type, size_t size)
+{
+        return snd_devm_alloc_dir_pages(dev, type, DMA_BIDIRECTIONAL, size);
+}
+static inline struct sg_table *
+snd_dma_noncontig_sg_table(struct snd_dma_buffer *dmab)
+{
+        return dmab->private_data;
+}
 #ifdef TARGET_OS2
 int snd_free_sgbuf_pages(struct snd_dma_buffer *dmab);

GPL/trunk/alsa-kernel/include/sound/pcm-indirect.h

-              r679
+              r772
                         diff += runtime->boundary;
                 if (diff < 0)
                         return -EINVAL;
+                        return -EPIPE;
                 rec->sw_ready += (int)frames_to_bytes(runtime, diff);
                 rec->appl_ptr = appl_ptr;
 …
+{
         int bytes = ptr - rec->hw_io;
+        int err;
         if (bytes < 0)
                 bytes += rec->hw_buffer_size;
 …
         if (rec->sw_io >= rec->sw_buffer_size)
                 rec->sw_io -= rec->sw_buffer_size;
+        if (substream->ops->ack)
+                substream->ops->ack(substream);
+        if (substream->ops->ack) {
+                err = substream->ops->ack(substream);
+                if (err == -EPIPE)
+                        return SNDRV_PCM_POS_XRUN;
+        }
         return bytes_to_frames(substream->runtime, rec->sw_io);
+}
 …
                         diff += runtime->boundary;
                 if (diff < 0)
                         return -EINVAL;
+                        return -EPIPE;
                 rec->sw_ready -= frames_to_bytes(runtime, diff);
                 rec->appl_ptr = appl_ptr;
 …
         int qsize;
         int bytes = ptr - rec->hw_io;
+        int err;
         if (bytes < 0)
                 bytes += rec->hw_buffer_size;
 …
         if (rec->sw_io >= rec->sw_buffer_size)
                 rec->sw_io -= rec->sw_buffer_size;
+        if (substream->ops->ack)
+                substream->ops->ack(substream);
+        if (substream->ops->ack) {
+                err = substream->ops->ack(substream);
+                if (err == -EPIPE)
+                        return SNDRV_PCM_POS_XRUN;
+        }
         return bytes_to_frames(substream->runtime, rec->sw_io);
+}

GPL/trunk/alsa-kernel/include/sound/pcm.h

-              r717
+              r772
 #include <linux/pm_qos.h>
 #include <linux/refcount.h>
+#include <linux/uio.h>
 #define snd_pcm_substream_chip(substream) ((substream)->private_data)
 …
 struct snd_pcm_status64;
 struct snd_pcm_substream;
 struct snd_pcm_audio_tstamp_config; /* definitions further down */
 struct snd_pcm_audio_tstamp_report;
 …
         int (*fill_silence)(struct snd_pcm_substream *substream, int channel,
                             unsigned long pos, unsigned long bytes);
+        int (*copy_user)(struct snd_pcm_substream *substream, int channel,
+                         unsigned long pos, void __user *buf,
+                         unsigned long bytes);
+        int (*copy_kernel)(struct snd_pcm_substream *substream, int channel,
+                           unsigned long pos, void *buf, unsigned long bytes);
+#ifndef TARGET_OS2
+        int (*copy)(struct snd_pcm_substream *substream, int channel,
+                    unsigned long pos, struct iov_iter *iter, unsigned long bytes);
+#else
+        int (*copy)(struct snd_pcm_substream *substream, int channel,
+                    unsigned long pos, void *iter, unsigned long bytes);
+#endif
         struct page *(*page)(struct snd_pcm_substream *substream,
                              unsigned long offset);
 …
 /* If you change this don't forget to change rates[] table in pcm_native.c */
 #define SNDRV_PCM_RATE_5512             (1<<0)          /* 5512Hz */
 #define SNDRV_PCM_RATE_8000             (1<<1)          /* 8000Hz */
 #define SNDRV_PCM_RATE_11025            (1<<2)          /* 11025Hz */
 #define SNDRV_PCM_RATE_16000            (1<<3)          /* 16000Hz */
 #define SNDRV_PCM_RATE_22050            (1<<4)          /* 22050Hz */
 #define SNDRV_PCM_RATE_32000            (1<<5)          /* 32000Hz */
 #define SNDRV_PCM_RATE_44100            (1<<6)          /* 44100Hz */
 #define SNDRV_PCM_RATE_48000            (1<<7)          /* 48000Hz */
 #define SNDRV_PCM_RATE_64000            (1<<8)          /* 64000Hz */
 #define SNDRV_PCM_RATE_88200            (1<<9)          /* 88200Hz */
 #define SNDRV_PCM_RATE_96000            (1<<10)         /* 96000Hz */
 #define SNDRV_PCM_RATE_176400           (1<<11)         /* 176400Hz */
 #define SNDRV_PCM_RATE_192000           (1<<12)         /* 192000Hz */
 #define SNDRV_PCM_RATE_352800           (1<<13)         /* 352800Hz */
 #define SNDRV_PCM_RATE_384000           (1<<14)         /* 384000Hz */
 #define SNDRV_PCM_RATE_CONTINUOUS       (1<<30)         /* continuous range */
 #define SNDRV_PCM_RATE_KNOT             (1<<31)         /* supports more non-continuos rates */
+#define SNDRV_PCM_RATE_5512             (1U<<0)         /* 5512Hz */
+#define SNDRV_PCM_RATE_8000             (1U<<1)         /* 8000Hz */
+#define SNDRV_PCM_RATE_11025            (1U<<2)         /* 11025Hz */
+#define SNDRV_PCM_RATE_16000            (1U<<3)         /* 16000Hz */
+#define SNDRV_PCM_RATE_22050            (1U<<4)         /* 22050Hz */
+#define SNDRV_PCM_RATE_32000            (1U<<5)         /* 32000Hz */
+#define SNDRV_PCM_RATE_44100            (1U<<6)         /* 44100Hz */
+#define SNDRV_PCM_RATE_48000            (1U<<7)         /* 48000Hz */
+#define SNDRV_PCM_RATE_64000            (1U<<8)         /* 64000Hz */
+#define SNDRV_PCM_RATE_88200            (1U<<9)         /* 88200Hz */
+#define SNDRV_PCM_RATE_96000            (1U<<10)        /* 96000Hz */
+#define SNDRV_PCM_RATE_176400           (1U<<11)        /* 176400Hz */
+#define SNDRV_PCM_RATE_192000           (1U<<12)        /* 192000Hz */
+#define SNDRV_PCM_RATE_352800           (1U<<13)        /* 352800Hz */
+#define SNDRV_PCM_RATE_384000           (1U<<14)        /* 384000Hz */
+#define SNDRV_PCM_RATE_CONTINUOUS       (1U<<30)        /* continuous range */
+#define SNDRV_PCM_RATE_KNOT             (1U<<31)        /* supports more non-continuos rates */
 #define SNDRV_PCM_RATE_8000_44100       (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_11025|\
 …
 #define SNDRV_PCM_FMTBIT_U24_LE         _SNDRV_PCM_FMTBIT(U24_LE)
 #define SNDRV_PCM_FMTBIT_U24_BE         _SNDRV_PCM_FMTBIT(U24_BE)
+// For S32/U32 formats, 'msbits' hardware parameter is often used to deliver information about the
+// available bit count in most significant bit. It's for the case of so-called 'left-justified' or
+// `right-padding` sample which has less width than 32 bit.
 #define SNDRV_PCM_FMTBIT_S32_LE         _SNDRV_PCM_FMTBIT(S32_LE)
 #define SNDRV_PCM_FMTBIT_S32_BE         _SNDRV_PCM_FMTBIT(S32_BE)
 …
 struct snd_pcm_runtime {
         /* -- Status -- */
+        snd_pcm_state_t state;          /* stream state */
+        snd_pcm_state_t suspended_state; /* suspended stream state */
         struct snd_pcm_substream *trigger_master;
         struct timespec64 trigger_tstamp;       /* trigger timestamp */
 …
         unsigned int no_period_wakeup: 1;
         /* -- SW params -- */
         int tstamp_mode;                /* mmap timestamp is updated */
+        /* -- SW params; see struct snd_pcm_sw_params for comments -- */
+        int tstamp_mode;
         unsigned int period_step;
         snd_pcm_uframes_t start_threshold;
         snd_pcm_uframes_t stop_threshold;
         snd_pcm_uframes_t silence_threshold; /* Silence filling happens when
                                                 noise is nearest than this */
         snd_pcm_uframes_t silence_size; /* Silence filling size */
+        snd_pcm_uframes_t boundary;     /* pointers wrap point */
+        snd_pcm_uframes_t silence_threshold;
+        snd_pcm_uframes_t silence_size;
+        snd_pcm_uframes_t boundary;
+        /* internal data of auto-silencer */
         snd_pcm_uframes_t silence_start; /* starting pointer to silence area */
         snd_pcm_uframes_t silence_filled; /* size filled with silence */
+        snd_pcm_uframes_t silence_filled; /* already filled part of silence area */
         union snd_pcm_sync_id sync;     /* hardware synchronization ID */
 …
         wait_queue_head_t sleep;        /* poll sleep */
         wait_queue_head_t tsleep;       /* transfer sleep */
         struct fasync_struct *fasync;
+        struct snd_fasync *fasync;
         bool stop_operating;            /* sync_stop will be called */
         struct mutex buffer_mutex;      /* protect for buffer changes */
 …
 #endif
         struct snd_kcontrol *chmap_kctl; /* channel-mapping controls */
         struct device dev;
+        struct device *dev;
 };
 …
  * @substream: substream to check
+ *
  * Returns true if the given substream is being linked with others.
+ * Return: true if the given substream is being linked with others
  */
 static inline int snd_pcm_stream_linked(struct snd_pcm_substream *substream)
 …
 void snd_pcm_stream_unlock_irq(struct snd_pcm_substream *substream);
 unsigned long _snd_pcm_stream_lock_irqsave(struct snd_pcm_substream *substream);
+unsigned long _snd_pcm_stream_lock_irqsave_nested(struct snd_pcm_substream *substream);
 /**
 …
 /**
+ * snd_pcm_stream_lock_irqsave_nested - Single-nested PCM stream locking
+ * @substream: PCM substream
+ * @flags: irq flags
+ *
+ * This locks the PCM stream like snd_pcm_stream_lock_irqsave() but with
+ * the single-depth lockdep subclass.
+ */
+#define snd_pcm_stream_lock_irqsave_nested(substream, flags)            \
+        do {                                                            \
+                typecheck(unsigned long, flags);                        \
+                flags = _snd_pcm_stream_lock_irqsave_nested(substream); \
+        } while (0)
+/**
  * snd_pcm_group_for_each_entry - iterate over the linked substreams
  * @s: the iterator
 …
  * @substream: substream to check
+ *
  * Returns true if the given substream is in the state RUNNING, or in the
+ * Return: true if the given substream is in the state RUNNING, or in the
  * state DRAINING for playback.
  */
 static inline int snd_pcm_running(struct snd_pcm_substream *substream)
+{
         return (substream->runtime->status->state == SNDRV_PCM_STATE_RUNNING ||
                 (substream->runtime->status->state == SNDRV_PCM_STATE_DRAINING &&
+        return (substream->runtime->state == SNDRV_PCM_STATE_RUNNING ||
+                (substream->runtime->state == SNDRV_PCM_STATE_DRAINING &&
                  substream->stream == SNDRV_PCM_STREAM_PLAYBACK));
+}
+/**
+ * __snd_pcm_set_state - Change the current PCM state
+ * @runtime: PCM runtime to set
+ * @state: the current state to set
+ *
+ * Call within the stream lock
+ */
+static inline void __snd_pcm_set_state(struct snd_pcm_runtime *runtime,
+                                       snd_pcm_state_t state)
+{
+        runtime->state = state;
+        runtime->status->state = state; /* copy for mmap */
+}
 …
  * @runtime: PCM runtime instance
  * @size: size in bytes
+ *
+ * Return: the size in samples
  */
 static inline ssize_t bytes_to_samples(struct snd_pcm_runtime *runtime, ssize_t size)
 …
  * @runtime: PCM runtime instance
  * @size: size in bytes
+ *
+ * Return: the size in frames
  */
 static inline snd_pcm_sframes_t bytes_to_frames(struct snd_pcm_runtime *runtime, ssize_t size)
 …
  * @runtime: PCM runtime instance
  * @size: size in samples
+ *
+ * Return: the byte size
  */
 static inline ssize_t samples_to_bytes(struct snd_pcm_runtime *runtime, ssize_t size)
 …
  * @runtime: PCM runtime instance
  * @size: size in frames
+ *
+ * Return: the byte size
  */
 static inline ssize_t frames_to_bytes(struct snd_pcm_runtime *runtime, snd_pcm_sframes_t size)
 …
  * @runtime: PCM runtime instance
  * @bytes: size in bytes
+ *
+ * Return: true if aligned, or false if not
  */
 static inline int frame_aligned(struct snd_pcm_runtime *runtime, ssize_t bytes)
 …
  * snd_pcm_lib_buffer_bytes - Get the buffer size of the current PCM in bytes
  * @substream: PCM substream
+ *
+ * Return: buffer byte size
  */
 static inline size_t snd_pcm_lib_buffer_bytes(struct snd_pcm_substream *substream)
 …
  * snd_pcm_lib_period_bytes - Get the period size of the current PCM in bytes
  * @substream: PCM substream
+ *
+ * Return: period byte size
  */
 static inline size_t snd_pcm_lib_period_bytes(struct snd_pcm_substream *substream)
 …
+ *
  * Result is between 0 ... (boundary - 1)
+ *
+ * Return: available frame size
  */
 static inline snd_pcm_uframes_t snd_pcm_playback_avail(struct snd_pcm_runtime *runtime)
 …
+ *
  * Result is between 0 ... (boundary - 1)
+ *
+ * Return: available frame size
  */
 static inline snd_pcm_uframes_t snd_pcm_capture_avail(struct snd_pcm_runtime *runtime)
 …
  * snd_pcm_playback_hw_avail - Get the queued space for playback
  * @runtime: PCM runtime instance
+ *
+ * Return: available frame size
  */
 static inline snd_pcm_sframes_t snd_pcm_playback_hw_avail(struct snd_pcm_runtime *runtime)
 …
  * snd_pcm_capture_hw_avail - Get the free space for capture
  * @runtime: PCM runtime instance
+ *
+ * Return: available frame size
  */
 static inline snd_pcm_sframes_t snd_pcm_capture_hw_avail(struct snd_pcm_runtime *runtime)
 …
  * params_channels - Get the number of channels from the hw params
  * @p: hw params
+ *
+ * Return: the number of channels
  */
 static inline unsigned int params_channels(const struct snd_pcm_hw_params *p)
 …
  * params_rate - Get the sample rate from the hw params
  * @p: hw params
+ *
+ * Return: the sample rate
  */
 static inline unsigned int params_rate(const struct snd_pcm_hw_params *p)
 …
  * params_period_size - Get the period size (in frames) from the hw params
  * @p: hw params
+ *
+ * Return: the period size in frames
  */
 static inline unsigned int params_period_size(const struct snd_pcm_hw_params *p)
 …
  * params_periods - Get the number of periods from the hw params
  * @p: hw params
+ *
+ * Return: the number of periods
  */
 static inline unsigned int params_periods(const struct snd_pcm_hw_params *p)
 …
  * params_buffer_size - Get the buffer size (in frames) from the hw params
  * @p: hw params
+ *
+ * Return: the buffer size in frames
  */
 static inline unsigned int params_buffer_size(const struct snd_pcm_hw_params *p)
 …
  * params_buffer_bytes - Get the buffer size (in bytes) from the hw params
  * @p: hw params
+ *
+ * Return: the buffer size in bytes
  */
 static inline unsigned int params_buffer_bytes(const struct snd_pcm_hw_params *p)
 …
  * allocation of a larger buffer unlike the standard one.
  * The function may return -ENOMEM error, hence the caller must check it.
+ *
+ * Return: zero if successful, or a negative error code
  */
 static inline int __must_check
 …
  * all substream.  If any of allocation fails, it returns -ENOMEM, hence the
  * caller must check the return value.
+ *
+ * Return: zero if successful, or a negative error code
  */
 static inline int __must_check
 …
  * @substream: PCM substream
  * @ofs: byte offset
+ *
+ * Return: DMA address
  */
 static inline dma_addr_t
 …
  * @ofs: byte offset
  * @size: byte size to examine
+ *
+ * Return: chunk size
  */
 static inline unsigned int
 …
 /**
  * snd_pcm_stream_str - Get a string naming the direction of a stream
  * @substream: the pcm substream instance
+ *
  * Return: A string naming the direction of the stream.
  */
 static inline const char *snd_pcm_stream_str(struct snd_pcm_substream *substream)
+{
         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ * snd_pcm_direction_name - Get a string naming the direction of a stream
+ * @direction: Stream's direction, one of SNDRV_PCM_STREAM_XXX
+ *
+ * Returns a string naming the direction of the stream.
+ */
+static inline const char *snd_pcm_direction_name(int direction)
+{
+        if (direction == SNDRV_PCM_STREAM_PLAYBACK)
                 return "Playback";
         else
                 return "Capture";
+}
+/**
+ * snd_pcm_stream_str - Get a string naming the direction of a stream
+ * @substream: the pcm substream instance
+ *
+ * Return: A string naming the direction of the stream.
+ */
+static inline const char *snd_pcm_stream_str(struct snd_pcm_substream *substream)
+{
+        return snd_pcm_direction_name(substream->stream);
+}
 …
  * @info: chmap information
  * @idx: the substream number index
+ *
+ * Return: the matched PCM substream, or NULL if not found
  */
 static inline struct snd_pcm_substream *
 …
  * pcm_format_to_bits - Strong-typed conversion of pcm_format to bitwise
  * @pcm_format: PCM format
+ *
+ * Return: 64bit mask corresponding to the given PCM format
  */
 static inline u64 pcm_format_to_bits(snd_pcm_format_t pcm_format)
 …
 int pcm_dbg(struct snd_pcm *dev, const char *fmt, ...);
 #endif
+/* helpers for copying between iov_iter and iomem */
+int copy_to_iter_fromio(struct iov_iter *itert, const void __iomem *src,
+                        size_t count);
+int copy_from_iter_toio(void __iomem *dst, struct iov_iter *iter, size_t count);
 struct snd_pcm_status64 {

GPL/trunk/alsa-kernel/include/sound/pxa2xx-lib.h

-              r717
+              r772
 extern void pxa2xx_ac97_hw_remove(struct platform_device *dev);
+/* modem registers, used by touchscreen driver */
+u32 pxa2xx_ac97_read_modr(void);
+u32 pxa2xx_ac97_read_misr(void);
 #endif

GPL/trunk/alsa-kernel/include/sound/rawmidi.h

-              r717
+              r772
 #include <sound/seq_device.h>
 #endif
+#include <sound/info.h>
 /*
 …
         void (*get_port_info)(struct snd_rawmidi *rmidi, int number,
                               struct snd_seq_port_info *info);
+        long (*ioctl)(struct snd_rawmidi *rmidi, unsigned int cmd,
+                      void __user *argp);
+        void (*proc_read)(struct snd_info_entry *entry,
+                          struct snd_info_buffer *buf);
 };
 …
         size_t avail;           /* max used buffer for wakeup */
         size_t xruns;           /* over/underruns counter */
+        size_t align;           /* alignment (0 = byte stream, 3 = UMP) */
         int buffer_ref;         /* buffer reference count */
         /* misc */
-        spinlock_t lock;
         wait_queue_head_t sleep;
         /* event handler (new bytes, input only) */
 …
         int use_count;                  /* use counter (for output) */
         size_t bytes;
+        spinlock_t lock;
         struct snd_rawmidi *rmidi;
         struct snd_rawmidi_str *pstr;
 …
         wait_queue_head_t open_wait;
         struct device dev;
+        struct device *dev;
         struct snd_info_entry *proc_entry;
 …
                          const struct snd_rawmidi_ops *ops);
+/* internal */
+int snd_rawmidi_init(struct snd_rawmidi *rmidi,
+                     struct snd_card *card, char *id, int device,
+                     int output_count, int input_count,
+                     unsigned int info_flags);
+int snd_rawmidi_free(struct snd_rawmidi *rmidi);
 /* callbacks */
 …
 int snd_rawmidi_transmit(struct snd_rawmidi_substream *substream,
                          unsigned char *buffer, int count);
-int __snd_rawmidi_transmit_peek(struct snd_rawmidi_substream *substream,
-                              unsigned char *buffer, int count);
-int __snd_rawmidi_transmit_ack(struct snd_rawmidi_substream *substream,
-                               int count);
 int snd_rawmidi_proceed(struct snd_rawmidi_substream *substream);
 …
 int snd_rawmidi_info_select(struct snd_card *card, struct snd_rawmidi_info *info);
 int snd_rawmidi_kernel_open(struct snd_card *card, int device, int subdevice,
+int snd_rawmidi_kernel_open(struct snd_rawmidi *rmidi, int subdevice,
                             int mode, struct snd_rawmidi_file *rfile);
 int snd_rawmidi_kernel_release(struct snd_rawmidi_file *rfile);

GPL/trunk/alsa-kernel/include/sound/rt5665.h

r679	r772
32	32	bool in4_diff;
33	33
34		~~int ldo1_en; /* GPIO for LDO1_EN */~~
35
36	34	enum rt5665_dmic1_data_pin dmic1_data_pin;
37	35	enum rt5665_dmic2_data_pin dmic2_data_pin;

GPL/trunk/alsa-kernel/include/sound/rt5668.h

-              r679
+              r772
 struct rt5668_platform_data {
-        int ldo1_en; /* GPIO for LDO1_EN */
         enum rt5668_dmic1_data_pin dmic1_data_pin;
         enum rt5668_dmic1_clk_pin dmic1_clk_pin;

GPL/trunk/alsa-kernel/include/sound/rt5682.h

-              r695
+              r772
 struct rt5682_platform_data {
-        int ldo1_en; /* GPIO for LDO1_EN */
         enum rt5682_dmic1_data_pin dmic1_data_pin;
         enum rt5682_dmic1_clk_pin dmic1_clk_pin;

GPL/trunk/alsa-kernel/include/sound/seq_device.h

r679	r772
79	79	#define SNDRV_SEQ_DEV_ID_MIDISYNTH "seq-midi"
80	80	#define SNDRV_SEQ_DEV_ID_OPL3 "opl3-synth"
	81	#define SNDRV_SEQ_DEV_ID_UMP "seq-ump-client"
81	82
82	83	#endif /* __SOUND_SEQ_DEVICE_H */

GPL/trunk/alsa-kernel/include/sound/seq_kernel.h

-              r679
+              r772
 int snd_seq_expand_var_event(const struct snd_seq_event *event, int count, char *buf,
                              int in_kernel, int size_aligned);
+int snd_seq_expand_var_event_at(const struct snd_seq_event *event, int count,
+                                char *buf, int offset);
 int snd_seq_dump_var_event(const struct snd_seq_event *event,
                            snd_seq_dump_func_t func, void *private_data);
+/* size of the event packet; it can be greater than snd_seq_event size */
+static inline size_t snd_seq_event_packet_size(struct snd_seq_event *ev)
+{
+        if (snd_seq_ev_is_ump(ev))
+                return sizeof(struct snd_seq_ump_event);
+        return sizeof(struct snd_seq_event);
+}
 /* interface for OSS emulation */

GPL/trunk/alsa-kernel/include/sound/simple_card_utils.h

-              r695
+              r772
 #define asoc_simple_init_mic(card, sjack, prefix) \
         asoc_simple_init_jack(card, sjack, 0, prefix, NULL)
+struct asoc_simple_tdm_width_map {
+        u8 sample_bits;
+        u8 slot_count;
+        u16 slot_width;
+};
 struct asoc_simple_dai {
 …
         unsigned int rx_slot_mask;
         struct clk *clk;
+        bool clk_fixed;
+        struct asoc_simple_tdm_width_map *tdm_width_map;
+        int n_tdm_widths;
 };
 …
         u32 convert_rate;
         u32 convert_channels;
+        const char *convert_sample_format;
 };
 …
                 struct asoc_simple_dai *cpu_dai;
                 struct asoc_simple_dai *codec_dai;
-                struct snd_soc_dai_link_component *cpus;
-                struct snd_soc_dai_link_component *codecs;
-                struct snd_soc_dai_link_component *platforms;
                 struct asoc_simple_data adata;
                 struct snd_soc_codec_conf *codec_conf;
 …
         struct asoc_simple_jack hp_jack;
         struct asoc_simple_jack mic_jack;
+        struct snd_soc_jack *aux_jacks;
         struct snd_soc_dai_link *dai_link;
         struct asoc_simple_dai *dais;
         struct snd_soc_dai_link_component *dlcs;
-        struct snd_soc_dai_link_component dummy;
         struct snd_soc_codec_conf *codec_conf;
         struct gpio_desc *pa_gpio;
 …
              (i)++)
 #define SNDRV_MAX_LINKS 128
+#define SNDRV_MAX_LINKS 512
 struct link_info {
 …
                              char *prefix,
                              unsigned int *retfmt);
+int asoc_simple_parse_tdm_width_map(struct device *dev, struct device_node *np,
+                                    struct asoc_simple_dai *dai);
 __printf(3, 4)
 int asoc_simple_set_dailink_name(struct device *dev,
 …
                                   int is_single_links);
+int asoc_simple_clean_reference(struct snd_soc_card *card);
+void asoc_simple_convert_fixup(struct asoc_simple_data *data,
+                                      struct snd_pcm_hw_params *params);
+void asoc_simple_clean_reference(struct snd_soc_card *card);
 void asoc_simple_parse_convert(struct device_node *np, char *prefix,
                                struct asoc_simple_data *data);
+bool asoc_simple_is_convert_required(const struct asoc_simple_data *data);
 int asoc_simple_parse_routing(struct snd_soc_card *card,
 …
                                struct asoc_simple_jack *sjack,
                                int is_hp, char *prefix, char *pin);
+int asoc_simple_init_aux_jacks(struct asoc_simple_priv *priv,
+                                char *prefix);
 int asoc_simple_init_priv(struct asoc_simple_priv *priv,
                                struct link_info *li);
 …
 int asoc_graph_card_probe(struct snd_soc_card *card);
+int asoc_graph_is_ports0(struct device_node *port);
+int asoc_graph_parse_dai(struct device *dev, struct device_node *ep,
+                         struct snd_soc_dai_link_component *dlc, int *is_single_link);
 #ifdef DEBUG

GPL/trunk/alsa-kernel/include/sound/soc-acpi-intel-match.h

-              r695
+              r772
  * pdata or machine ops
  */
-extern struct snd_soc_acpi_mach snd_soc_acpi_intel_haswell_machines[];
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_broadwell_machines[];
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_baytrail_machines[];
 …
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_jsl_machines[];
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_adl_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_lnl_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_machines[];
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_sdw_machines[];
 …
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[];
 extern struct snd_soc_acpi_mach snd_soc_acpi_intel_adl_sdw_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_sdw_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_sdw_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_lnl_sdw_machines[];
+extern struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_sdw_machines[];
 /*

GPL/trunk/alsa-kernel/include/sound/soc-acpi.h

-              r695
+              r772
 #include <linux/acpi.h>
 #include <linux/mod_devicetable.h>
+#include <linux/soundwire/sdw.h>
 struct snd_soc_acpi_package_context {
 …
  * @platform: string used for HDAudio codec support
  * @codec_mask: used for HDAudio support
+ * @dmic_num: number of SoC- or chipset-attached PDM digital microphones
  * @common_hdmi_codec_drv: use commom HDAudio HDMI codec driver
+ * @link_mask: links enabled on the board
+ * @links: array of link _ADR descriptors, null terminated
+ * @link_mask: SoundWire links enabled on the board
+ * @links: array of SoundWire link _ADR descriptors, null terminated
+ * @i2s_link_mask: I2S/TDM links enabled on the board
  * @num_dai_drivers: number of elements in @dai_drivers
  * @dai_drivers: pointer to dai_drivers, used e.g. in nocodec mode
+ * @subsystem_vendor: optional PCI SSID vendor value
+ * @subsystem_device: optional PCI SSID device value
+ * @subsystem_id_set: true if a value has been written to
+ *                    subsystem_vendor and subsystem_device.
  */
 struct snd_soc_acpi_mach_params {
 …
         u32 link_mask;
         const struct snd_soc_acpi_link_adr *links;
+        u32 i2s_link_mask;
         u32 num_dai_drivers;
         struct snd_soc_dai_driver *dai_drivers;
+        unsigned short subsystem_vendor;
+        unsigned short subsystem_device;
+        bool subsystem_id_set;
 };
 …
 };
+/*
+ * when set the topology uses the -ssp<N> suffix, where N is determined based on
+ * BIOS or DMI information
+ */
+#define SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER BIT(0)
+/*
+ * when more than one SSP is reported in the link mask, use the most significant.
+ * This choice was found to be valid on platforms with ES8336 codecs.
+ */
+#define SND_SOC_ACPI_TPLG_INTEL_SSP_MSB BIT(1)
+/*
+ * when set the topology uses the -dmic<N>ch suffix, where N is determined based on
+ * BIOS or DMI information
+ */
+#define SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER BIT(2)
 /**
  * snd_soc_acpi_mach: ACPI-based machine descriptor. Most of the fields are
 …
+ *
  * @id: ACPI ID (usually the codec's) used to find a matching machine driver.
+ * @uid: ACPI Unique ID, can be used to disambiguate matches.
+ * @comp_ids: list of compatible audio codecs using the same machine driver,
+ * firmware and topology
  * @link_mask: describes required board layout, e.g. for SoundWire.
  * @links: array of link _ADR descriptors, null terminated.
  * @drv_name: machine driver name
  * @fw_filename: firmware file name. Used when SOF is not enabled.
+ * @tplg_filename: topology file name. Used when SOF is not enabled.
  * @board: board name
  * @machine_quirk: pointer to quirk, usually based on DMI information when
 …
  * @pdata: intended for platform data or machine specific-ops. This structure
  *  is not constant since this field may be updated at run-time
- * @sof_fw_filename: Sound Open Firmware file name, if enabled
  * @sof_tplg_filename: Sound Open Firmware topology file name, if enabled
+ * @tplg_quirk_mask: quirks to select different topology files dynamically
  */
 /* Descriptor for SST ASoC machine driver */
 struct snd_soc_acpi_mach {
+        const u8 id[ACPI_ID_LEN];
+        u8 id[ACPI_ID_LEN];
+        const char *uid;
+        const struct snd_soc_acpi_codecs *comp_ids;
         const u32 link_mask;
         const struct snd_soc_acpi_link_adr *links;
         const char *drv_name;
         const char *fw_filename;
+        const char *tplg_filename;
         const char *board;
         struct snd_soc_acpi_mach * (*machine_quirk)(void *arg);
 …
         void *pdata;
         struct snd_soc_acpi_mach_params mach_params;
-        const char *sof_fw_filename;
         const char *sof_tplg_filename;
+        const u32 tplg_quirk_mask;
 };
 …
+}
+bool snd_soc_acpi_sdw_link_slaves_found(struct device *dev,
+                                        const struct snd_soc_acpi_link_adr *link,
+                                        struct sdw_extended_slave_id *ids,
+                                        int num_slaves);
 #endif

GPL/trunk/alsa-kernel/include/sound/soc-component.h

-              r695
+              r772
         int (*set_jack)(struct snd_soc_component *component,
                         struct snd_soc_jack *jack,  void *data);
+        int (*get_jack_type)(struct snd_soc_component *component);
         /* DT */
 …
                 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
                 struct snd_pcm_audio_tstamp_report *audio_tstamp_report);
         int (*copy_user)(struct snd_soc_component *component,
                          struct snd_pcm_substream *substream, int channel,
                          unsigned long pos, void __user *buf,
                          unsigned long bytes);
+        int (*copy)(struct snd_soc_component *component,
+                    struct snd_pcm_substream *substream, int channel,
+                    unsigned long pos, struct iov_iter *iter,
+                    unsigned long bytes);
         struct page *(*page)(struct snd_soc_component *component,
                              struct snd_pcm_substream *substream,
 …
         int (*ack)(struct snd_soc_component *component,
                    struct snd_pcm_substream *substream);
+        snd_pcm_sframes_t (*delay)(struct snd_soc_component *component,
+                                   struct snd_pcm_substream *substream);
         const struct snd_compress_ops *compress_ops;
 …
         int probe_order;
         int remove_order;
+        /*
+         * soc_pcm_trigger() start/stop sequence.
+         * see also
+         *      snd_soc_dai_link
+         *      soc_pcm_trigger()
+         */
+        enum snd_soc_trigger_order trigger_start;
+        enum snd_soc_trigger_order trigger_stop;
         /*
 …
         unsigned int suspend_bias_off:1;
         unsigned int use_pmdown_time:1; /* care pmdown_time at stop */
+        /*
+         * Indicates that the component does not care about the endianness of
+         * PCM audio data and the core will ensure that both LE and BE variants
+         * of each used format are present. Typically this is because the
+         * component sits behind a bus that abstracts away the endian of the
+         * original data, ie. one for which the transmission endian is defined
+         * (I2S/SLIMbus/SoundWire), or the concept of endian doesn't exist (PDM,
+         * analogue).
+         */
         unsigned int endianness:1;
         unsigned int non_legacy_dai_naming:1;
+        unsigned int legacy_dai_naming:1;
         /* this component uses topology and ignore machine driver FEs */
 …
         bool use_dai_pcm_id;    /* use DAI link PCM ID as PCM device number */
         int be_pcm_base;        /* base device ID for all BE PCMs */
+#ifdef CONFIG_DEBUG_FS
+        const char *debugfs_prefix;
+#endif
 };
 …
         /* function mark */
         struct snd_pcm_substream *mark_module;
+        void *mark_module;
         struct snd_pcm_substream *mark_open;
         struct snd_pcm_substream *mark_hw_params;
 …
         void *mark_pm;
-#ifdef CONFIG_DEBUG_FS
         struct dentry *debugfs_root;
         const char *debugfs_prefix;
-#endif
 };
 …
 int snd_soc_component_set_jack(struct snd_soc_component *component,
                                struct snd_soc_jack *jack, void *data);
+int snd_soc_component_get_jack_type(struct snd_soc_component *component);
 void snd_soc_component_seq_notifier(struct snd_soc_component *component,
 …
         snd_soc_component_module_get(component, substream, 1)
 int snd_soc_component_module_get(struct snd_soc_component *component,
+                                 struct snd_pcm_substream *substream,
+                                 int upon_open);
+                                 void *mark, int upon_open);
 #define snd_soc_component_module_put_when_remove(component)     \
         snd_soc_component_module_put(component, NULL, 0, 0)
 …
         snd_soc_component_module_put(component, substream, 1, rollback)
 void snd_soc_component_module_put(struct snd_soc_component *component,
+                                  struct snd_pcm_substream *substream,
+                                  int upon_open, int rollback);
+                                  void *mark, int upon_open, int rollback);
 static inline void snd_soc_component_set_drvdata(struct snd_soc_component *c,
 …
         const char *pin);
+/* component controls */
+int snd_soc_component_notify_control(struct snd_soc_component *component,
+                                     const char * const ctl);
 /* component driver ops */
 int snd_soc_component_open(struct snd_soc_component *component,
 …
                                         const struct of_phandle_args *args,
                                         const char **dai_name);
+int snd_soc_component_compr_open(struct snd_compr_stream *cstream);
+void snd_soc_component_compr_free(struct snd_compr_stream *cstream,
+int snd_soc_component_compr_open(struct snd_soc_component *component,
+                                 struct snd_compr_stream *cstream);
+void snd_soc_component_compr_free(struct snd_soc_component *component,
+                                  struct snd_compr_stream *cstream,
                                   int rollback);
 int snd_soc_component_compr_trigger(struct snd_compr_stream *cstream, int cmd);
 …
                                 unsigned int cmd, void *arg);
 int snd_soc_pcm_component_sync_stop(struct snd_pcm_substream *substream);
 int snd_soc_pcm_component_copy_user(struct snd_pcm_substream *substream,
                                     int channel, unsigned long pos,
                                     void __user *buf, unsigned long bytes);
+int snd_soc_pcm_component_copy(struct snd_pcm_substream *substream,
+                               int channel, unsigned long pos,
+                               struct iov_iter *iter, unsigned long bytes);
 struct page *snd_soc_pcm_component_page(struct snd_pcm_substream *substream,
                                         unsigned long offset);
 …
                                           void *stream, int rollback);
 int snd_soc_pcm_component_ack(struct snd_pcm_substream *substream);
+void snd_soc_pcm_component_delay(struct snd_pcm_substream *substream,
+                                 snd_pcm_sframes_t *cpu_delay, snd_pcm_sframes_t *codec_delay);
 #endif /* __SOC_COMPONENT_H */

GPL/trunk/alsa-kernel/include/sound/soc-dai.h

-              r703
+              r772
 #define SND_SOC_DAIFMT_CBM_CFS          SND_SOC_DAIFMT_CBP_CFC
 #define SND_SOC_DAIFMT_CBS_CFS          SND_SOC_DAIFMT_CBC_CFC
+/* when passed to set_fmt directly indicate if the device is provider or consumer */
+#define SND_SOC_DAIFMT_BP_FP            SND_SOC_DAIFMT_CBP_CFP
+#define SND_SOC_DAIFMT_BC_FP            SND_SOC_DAIFMT_CBC_CFP
+#define SND_SOC_DAIFMT_BP_FC            SND_SOC_DAIFMT_CBP_CFC
+#define SND_SOC_DAIFMT_BC_FC            SND_SOC_DAIFMT_CBC_CFC
 /* Describes the possible PCM format */
 …
 void snd_soc_dai_shutdown(struct snd_soc_dai *dai,
                           struct snd_pcm_substream *substream, int rollback);
-snd_pcm_sframes_t snd_soc_dai_delay(struct snd_soc_dai *dai,
-                                    struct snd_pcm_substream *substream);
 void snd_soc_dai_suspend(struct snd_soc_dai *dai);
 void snd_soc_dai_resume(struct snd_soc_dai *dai);
 …
 int snd_soc_pcm_dai_bespoke_trigger(struct snd_pcm_substream *substream,
                                     int cmd);
+void snd_soc_pcm_dai_delay(struct snd_pcm_substream *substream,
+                           snd_pcm_sframes_t *cpu_delay, snd_pcm_sframes_t *codec_delay);
 int snd_soc_dai_compr_startup(struct snd_soc_dai *dai,
 …
                                    struct snd_compr_metadata *metadata);
+const char *snd_soc_dai_name_get(struct snd_soc_dai *dai);
 struct snd_soc_dai_ops {
+        /* DAI driver callbacks */
+        int (*probe)(struct snd_soc_dai *dai);
+        int (*remove)(struct snd_soc_dai *dai);
+        /* compress dai */
+        int (*compress_new)(struct snd_soc_pcm_runtime *rtd, int num);
+        /* Optional Callback used at pcm creation*/
+        int (*pcm_new)(struct snd_soc_pcm_runtime *rtd,
+                       struct snd_soc_dai *dai);
         /*
          * DAI clocking configuration, all optional.
 …
         int (*set_tristate)(struct snd_soc_dai *dai, int tristate);
         int (*set_sdw_stream)(struct snd_soc_dai *dai,
                         void *stream, int direction);
         void *(*get_sdw_stream)(struct snd_soc_dai *dai, int direction);
+        int (*set_stream)(struct snd_soc_dai *dai,
+                          void *stream, int direction);
+        void *(*get_stream)(struct snd_soc_dai *dai, int direction);
         /*
 …
         int num_auto_selectable_formats;
+        /* probe ordering - for components with runtime dependencies */
+        int probe_order;
+        int remove_order;
         /* bit field */
         unsigned int no_capture_mute:1;
+        unsigned int mute_unmute_on_trigger:1;
 };
 …
         unsigned int base;
         struct snd_soc_dobj dobj;
+        /* DAI driver callbacks */
+        int (*probe)(struct snd_soc_dai *dai);
+        int (*remove)(struct snd_soc_dai *dai);
+        /* compress dai */
+        int (*compress_new)(struct snd_soc_pcm_runtime *rtd, int num);
+        /* Optional Callback used at pcm creation*/
+        int (*pcm_new)(struct snd_soc_pcm_runtime *rtd,
+                       struct snd_soc_dai *dai);
+        struct of_phandle_args *dai_args;
         /* ops */
 …
         unsigned int symmetric_channels:1;
         unsigned int symmetric_sample_bits:1;
+        /* probe ordering - for components with runtime dependencies */
+        int probe_order;
+        int remove_order;
+};
+/* for Playback/Capture */
+struct snd_soc_dai_stream {
+        struct snd_soc_dapm_widget *widget;
+        unsigned int active;    /* usage count */
+        unsigned int tdm_mask;  /* CODEC TDM slot masks and params (for fixup) */
+        void *dma_data;         /* DAI DMA data */
 };
 …
         /* DAI runtime info */
+        unsigned int stream_active[SNDRV_PCM_STREAM_LAST + 1]; /* usage count */
+        struct snd_soc_dapm_widget *playback_widget;
+        struct snd_soc_dapm_widget *capture_widget;
+        /* DAI DMA data */
+        void *playback_dma_data;
+        void *capture_dma_data;
+        struct snd_soc_dai_stream stream[SNDRV_PCM_STREAM_LAST + 1];
         /* Symmetry data - only valid if symmetry is being enforced */
 …
         /* parent platform/codec */
         struct snd_soc_component *component;
-        /* CODEC TDM slot masks and params (for fixup) */
-        unsigned int tx_mask;
-        unsigned int rx_mask;
         struct list_head list;
 …
+}
+#define snd_soc_dai_get_widget_playback(dai)    snd_soc_dai_get_widget(dai, SNDRV_PCM_STREAM_PLAYBACK)
+#define snd_soc_dai_get_widget_capture(dai)     snd_soc_dai_get_widget(dai, SNDRV_PCM_STREAM_CAPTURE)
 static inline
+struct snd_soc_dapm_widget *snd_soc_dai_get_widget(
+        struct snd_soc_dai *dai, int stream)
+{
+        return (stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+                dai->playback_widget : dai->capture_widget;
+}
+static inline void *snd_soc_dai_get_dma_data(const struct snd_soc_dai *dai,
+                                             const struct snd_pcm_substream *ss)
+{
+        return (ss->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+                dai->playback_dma_data : dai->capture_dma_data;
+}
+static inline void snd_soc_dai_set_dma_data(struct snd_soc_dai *dai,
+                                            const struct snd_pcm_substream *ss,
+                                            void *data)
+{
+        if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
+                dai->playback_dma_data = data;
+        else
+                dai->capture_dma_data = data;
+}
+static inline void snd_soc_dai_init_dma_data(struct snd_soc_dai *dai,
+                                             void *playback, void *capture)
+{
+        dai->playback_dma_data = playback;
+        dai->capture_dma_data = capture;
+struct snd_soc_dapm_widget *snd_soc_dai_get_widget(struct snd_soc_dai *dai, int stream)
+{
+        return dai->stream[stream].widget;
+}
+#define snd_soc_dai_set_widget_playback(dai, widget)    snd_soc_dai_set_widget(dai, SNDRV_PCM_STREAM_PLAYBACK, widget)
+#define snd_soc_dai_set_widget_capture(dai,  widget)    snd_soc_dai_set_widget(dai, SNDRV_PCM_STREAM_CAPTURE,  widget)
+static inline
+void snd_soc_dai_set_widget(struct snd_soc_dai *dai, int stream, struct snd_soc_dapm_widget *widget)
+{
+        dai->stream[stream].widget = widget;
+}
+#define snd_soc_dai_dma_data_get_playback(dai)  snd_soc_dai_dma_data_get(dai, SNDRV_PCM_STREAM_PLAYBACK)
+#define snd_soc_dai_dma_data_get_capture(dai)   snd_soc_dai_dma_data_get(dai, SNDRV_PCM_STREAM_CAPTURE)
+#define snd_soc_dai_get_dma_data(dai, ss)       snd_soc_dai_dma_data_get(dai, ss->stream)
+static inline void *snd_soc_dai_dma_data_get(const struct snd_soc_dai *dai, int stream)
+{
+        return dai->stream[stream].dma_data;
+}
+#define snd_soc_dai_dma_data_set_playback(dai, data)    snd_soc_dai_dma_data_set(dai, SNDRV_PCM_STREAM_PLAYBACK, data)
+#define snd_soc_dai_dma_data_set_capture(dai,  data)    snd_soc_dai_dma_data_set(dai, SNDRV_PCM_STREAM_CAPTURE,  data)
+#define snd_soc_dai_set_dma_data(dai, ss, data)         snd_soc_dai_dma_data_set(dai, ss->stream, data)
+static inline void snd_soc_dai_dma_data_set(struct snd_soc_dai *dai, int stream, void *data)
+{
+        dai->stream[stream].dma_data = data;
+}
+static inline void snd_soc_dai_init_dma_data(struct snd_soc_dai *dai, void *playback, void *capture)
+{
+        snd_soc_dai_dma_data_set_playback(dai, playback);
+        snd_soc_dai_dma_data_set_capture(dai,  capture);
+}
+static inline unsigned int snd_soc_dai_tdm_mask_get(struct snd_soc_dai *dai, int stream)
+{
+        return dai->stream[stream].tdm_mask;
+}
+static inline void snd_soc_dai_tdm_mask_set(struct snd_soc_dai *dai, int stream,
+                                            unsigned int tdm_mask)
+{
+        dai->stream[stream].tdm_mask = tdm_mask;
+}
+static inline unsigned int snd_soc_dai_stream_active(struct snd_soc_dai *dai, int stream)
+{
+        /* see snd_soc_dai_action() for setup */
+        return dai->stream[stream].active;
+}
 …
 /**
  * snd_soc_dai_set_sdw_stream() - Configures a DAI for SDW stream operation
+ * snd_soc_dai_set_stream() - Configures a DAI for stream operation
  * @dai: DAI
  * @stream: STREAM
+ * @stream: STREAM (opaque structure depending on DAI type)
  * @direction: Stream direction(Playback/Capture)
  * SoundWire subsystem doesn't have a notion of direction and we reuse
+ * Some subsystems, such as SoundWire, don't have a notion of direction and we reuse
  * the ASoC stream direction to configure sink/source ports.
  * Playback maps to source ports and Capture for sink ports.
 …
  * Returns 0 on success, a negative error code otherwise.
  */
 static inline int snd_soc_dai_set_sdw_stream(struct snd_soc_dai *dai,
                                 void *stream, int direction)
+{
         if (dai->driver->ops->set_sdw_stream)
                 return dai->driver->ops->set_sdw_stream(dai, stream, direction);
+static inline int snd_soc_dai_set_stream(struct snd_soc_dai *dai,
+                                         void *stream, int direction)
+{
+        if (dai->driver->ops->set_stream)
+                return dai->driver->ops->set_stream(dai, stream, direction);
         else
                 return -ENOTSUPP;
 …
 /**
  * snd_soc_dai_get_sdw_stream() - Retrieves SDW stream from DAI
+ * snd_soc_dai_get_stream() - Retrieves stream from DAI
  * @dai: DAI
  * @direction: Stream direction(Playback/Capture)
+ *
  * This routine only retrieves that was previously configured
  * with snd_soc_dai_get_sdw_stream()
+ * with snd_soc_dai_get_stream()
+ *
  * Returns pointer to stream or an ERR_PTR value, e.g.
  * ERR_PTR(-ENOTSUPP) if callback is not supported;
  */
 static inline void *snd_soc_dai_get_sdw_stream(struct snd_soc_dai *dai,
                                                int direction)
+{
         if (dai->driver->ops->get_sdw_stream)
                 return dai->driver->ops->get_sdw_stream(dai, direction);
+static inline void *snd_soc_dai_get_stream(struct snd_soc_dai *dai,
+                                           int direction)
+{
+        if (dai->driver->ops->get_stream)
+                return dai->driver->ops->get_stream(dai, direction);
         else
                 return ERR_PTR(-ENOTSUPP);
+}
-static inline unsigned int
-snd_soc_dai_stream_active(struct snd_soc_dai *dai, int stream)
+{
-        return dai->stream_active[stream];
+}
 #endif

GPL/trunk/alsa-kernel/include/sound/soc-dapm.h

-              r679
+              r772
 struct device;
+struct snd_pcm_substream;
 struct snd_soc_pcm_runtime;
 struct soc_enum;
 …
 /* codec domain */
 #define SND_SOC_DAPM_VMID(wname) \
+{       .id = snd_soc_dapm_vmid, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_vmid, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0}
 /* platform domain */
 #define SND_SOC_DAPM_SIGGEN(wname) \
+{       .id = snd_soc_dapm_siggen, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_siggen, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM }
 #define SND_SOC_DAPM_SINK(wname) \
+{       .id = snd_soc_dapm_sink, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_sink, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM }
 #define SND_SOC_DAPM_INPUT(wname) \
+{       .id = snd_soc_dapm_input, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_input, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM }
 #define SND_SOC_DAPM_OUTPUT(wname) \
+{       .id = snd_soc_dapm_output, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_output, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM }
 #define SND_SOC_DAPM_MIC(wname, wevent) \
+{       .id = snd_soc_dapm_mic, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mic, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
         .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD}
 #define SND_SOC_DAPM_HP(wname, wevent) \
+{       .id = snd_soc_dapm_hp, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_hp, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
         .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
 #define SND_SOC_DAPM_SPK(wname, wevent) \
+{       .id = snd_soc_dapm_spk, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_spk, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
         .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
 #define SND_SOC_DAPM_LINE(wname, wevent) \
+{       .id = snd_soc_dapm_line, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_line, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
         .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
 …
 #define SND_SOC_DAPM_PGA(wname, wreg, wshift, winvert,\
          wcontrols, wncontrols) \
+{       .id = snd_soc_dapm_pga, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pga, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols}
 #define SND_SOC_DAPM_OUT_DRV(wname, wreg, wshift, winvert,\
          wcontrols, wncontrols) \
+{       .id = snd_soc_dapm_out_drv, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_out_drv, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols}
 #define SND_SOC_DAPM_MIXER(wname, wreg, wshift, winvert, \
          wcontrols, wncontrols)\
+{       .id = snd_soc_dapm_mixer, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols}
 #define SND_SOC_DAPM_MIXER_NAMED_CTL(wname, wreg, wshift, winvert, \
          wcontrols, wncontrols)\
+{       .id = snd_soc_dapm_mixer_named_ctl, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer_named_ctl, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols}
 /* DEPRECATED: use SND_SOC_DAPM_SUPPLY */
 #define SND_SOC_DAPM_MICBIAS(wname, wreg, wshift, winvert) \
+{       .id = snd_soc_dapm_micbias, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_micbias, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = NULL, .num_kcontrols = 0}
 #define SND_SOC_DAPM_SWITCH(wname, wreg, wshift, winvert, wcontrols) \
+{       .id = snd_soc_dapm_switch, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_switch, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1}
 #define SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols) \
+{       .id = snd_soc_dapm_mux, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mux, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1}
 #define SND_SOC_DAPM_DEMUX(wname, wreg, wshift, winvert, wcontrols) \
+{       .id = snd_soc_dapm_demux, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_demux, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1}
 …
 #define SOC_PGA_ARRAY(wname, wreg, wshift, winvert,\
          wcontrols) \
+{       .id = snd_soc_dapm_pga, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pga, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols)}
 #define SOC_MIXER_ARRAY(wname, wreg, wshift, winvert, \
          wcontrols)\
+{       .id = snd_soc_dapm_mixer, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols)}
 #define SOC_MIXER_NAMED_CTL_ARRAY(wname, wreg, wshift, winvert, \
          wcontrols)\
+{       .id = snd_soc_dapm_mixer_named_ctl, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer_named_ctl, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols)}
 …
 #define SND_SOC_DAPM_PGA_E(wname, wreg, wshift, winvert, wcontrols, \
         wncontrols, wevent, wflags) \
+{       .id = snd_soc_dapm_pga, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pga, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols, \
 …
 #define SND_SOC_DAPM_OUT_DRV_E(wname, wreg, wshift, winvert, wcontrols, \
         wncontrols, wevent, wflags) \
+{       .id = snd_soc_dapm_out_drv, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_out_drv, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols, \
 …
 #define SND_SOC_DAPM_MIXER_E(wname, wreg, wshift, winvert, wcontrols, \
         wncontrols, wevent, wflags) \
+{       .id = snd_soc_dapm_mixer, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = wncontrols, \
 …
 #define SND_SOC_DAPM_MIXER_NAMED_CTL_E(wname, wreg, wshift, winvert, \
         wcontrols, wncontrols, wevent, wflags) \
+{       .id = snd_soc_dapm_mixer, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, \
 …
 #define SND_SOC_DAPM_SWITCH_E(wname, wreg, wshift, winvert, wcontrols, \
         wevent, wflags) \
+{       .id = snd_soc_dapm_switch, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_switch, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1, \
 …
 #define SND_SOC_DAPM_MUX_E(wname, wreg, wshift, winvert, wcontrols, \
         wevent, wflags) \
+{       .id = snd_soc_dapm_mux, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mux, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1, \
 …
 #define SND_SOC_DAPM_PGA_S(wname, wsubseq, wreg, wshift, winvert, \
         wevent, wflags) \
+{       .id = snd_soc_dapm_pga, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pga, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags, \
 …
 #define SND_SOC_DAPM_SUPPLY_S(wname, wsubseq, wreg, wshift, winvert, wevent, \
         wflags) \
+{       .id = snd_soc_dapm_supply, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_supply, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags, .subseq = wsubseq}
 …
 #define SOC_PGA_E_ARRAY(wname, wreg, wshift, winvert, wcontrols, \
         wevent, wflags) \
+{       .id = snd_soc_dapm_pga, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pga, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols), \
 …
 #define SOC_MIXER_E_ARRAY(wname, wreg, wshift, winvert, wcontrols, \
         wevent, wflags) \
+{       .id = snd_soc_dapm_mixer, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols), \
 …
 #define SOC_MIXER_NAMED_CTL_E_ARRAY(wname, wreg, wshift, winvert, \
         wcontrols, wevent, wflags) \
+{       .id = snd_soc_dapm_mixer, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_mixer, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols), \
 …
 /* events that are pre and post DAPM */
 #define SND_SOC_DAPM_PRE(wname, wevent) \
+{       .id = snd_soc_dapm_pre, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pre, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
         .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD}
 #define SND_SOC_DAPM_POST(wname, wevent) \
+{       .id = snd_soc_dapm_post, .name = wname, .kcontrol_news = NULL, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_post, .name = wname, .kcontrol_news = NULL, \
         .num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
         .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD}
 …
 /* stream domain */
 #define SND_SOC_DAPM_AIF_IN(wname, stname, wchan, wreg, wshift, winvert) \
+{       .id = snd_soc_dapm_aif_in, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_aif_in, .name = wname, .sname = stname, \
         .channel = wchan, SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), }
 #define SND_SOC_DAPM_AIF_IN_E(wname, stname, wchan, wreg, wshift, winvert, \
                               wevent, wflags)                           \
+{       .id = snd_soc_dapm_aif_in, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_aif_in, .name = wname, .sname = stname, \
         .channel = wchan, SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags }
 #define SND_SOC_DAPM_AIF_OUT(wname, stname, wchan, wreg, wshift, winvert) \
+{       .id = snd_soc_dapm_aif_out, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_aif_out, .name = wname, .sname = stname, \
         .channel = wchan, SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), }
 #define SND_SOC_DAPM_AIF_OUT_E(wname, stname, wchan, wreg, wshift, winvert, \
                              wevent, wflags)                            \
+{       .id = snd_soc_dapm_aif_out, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_aif_out, .name = wname, .sname = stname, \
         .channel = wchan, SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags }
 #define SND_SOC_DAPM_DAC(wname, stname, wreg, wshift, winvert) \
+{       .id = snd_soc_dapm_dac, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_dac, .name = wname, .sname = stname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert) }
 #define SND_SOC_DAPM_DAC_E(wname, stname, wreg, wshift, winvert, \
                            wevent, wflags)                              \
+{       .id = snd_soc_dapm_dac, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_dac, .name = wname, .sname = stname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags}
 #define SND_SOC_DAPM_ADC(wname, stname, wreg, wshift, winvert) \
+{       .id = snd_soc_dapm_adc, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_adc, .name = wname, .sname = stname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), }
 #define SND_SOC_DAPM_ADC_E(wname, stname, wreg, wshift, winvert, \
                            wevent, wflags)                              \
+{       .id = snd_soc_dapm_adc, .name = wname, .sname = stname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_adc, .name = wname, .sname = stname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags}
 #define SND_SOC_DAPM_CLOCK_SUPPLY(wname) \
+{       .id = snd_soc_dapm_clock_supply, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_clock_supply, .name = wname, \
         .reg = SND_SOC_NOPM, .event = dapm_clock_event, \
         .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }
 …
 /* generic widgets */
 #define SND_SOC_DAPM_REG(wid, wname, wreg, wshift, wmask, won_val, woff_val) \
+{       .id = wid, .name = wname, .kcontrol_news = NULL, .num_kcontrols = 0, \
+(struct snd_soc_dapm_widget) { \
+        .id = wid, .name = wname, .kcontrol_news = NULL, .num_kcontrols = 0, \
         .reg = wreg, .shift = wshift, .mask = wmask, \
         .on_val = won_val, .off_val = woff_val, }
 #define SND_SOC_DAPM_SUPPLY(wname, wreg, wshift, winvert, wevent, wflags) \
+{       .id = snd_soc_dapm_supply, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_supply, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .event = wevent, .event_flags = wflags}
 #define SND_SOC_DAPM_REGULATOR_SUPPLY(wname, wdelay, wflags)        \
+{       .id = snd_soc_dapm_regulator_supply, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_regulator_supply, .name = wname, \
         .reg = SND_SOC_NOPM, .shift = wdelay, .event = dapm_regulator_event, \
         .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD, \
         .on_val = wflags}
 #define SND_SOC_DAPM_PINCTRL(wname, active, sleep) \
+{       .id = snd_soc_dapm_pinctrl, .name = wname, \
+(struct snd_soc_dapm_widget) { \
+        .id = snd_soc_dapm_pinctrl, .name = wname, \
         .priv = (&(struct snd_soc_dapm_pinctrl_priv) \
                 { .active_state = active, .sleep_state = sleep,}), \
 …
 #define SND_SOC_DAPM_STREAM_SUSPEND             0x4
 #define SND_SOC_DAPM_STREAM_RESUME              0x8
 #define SND_SOC_DAPM_STREAM_PAUSE_PUSH  0x10
+#define SND_SOC_DAPM_STREAM_PAUSE_PUSH          0x10
 #define SND_SOC_DAPM_STREAM_PAUSE_RELEASE       0x20
 /* dapm event types */
+#define SND_SOC_DAPM_PRE_PMU    0x1     /* before widget power up */
+#define SND_SOC_DAPM_POST_PMU   0x2             /* after widget power up */
+#define SND_SOC_DAPM_PRE_PMD    0x4     /* before widget power down */
+#define SND_SOC_DAPM_POST_PMD   0x8             /* after widget power down */
+#define SND_SOC_DAPM_PRE_REG    0x10    /* before audio path setup */
+#define SND_SOC_DAPM_POST_REG   0x20    /* after audio path setup */
+#define SND_SOC_DAPM_WILL_PMU   0x40    /* called at start of sequence */
+#define SND_SOC_DAPM_WILL_PMD   0x80    /* called at start of sequence */
+#define SND_SOC_DAPM_PRE_POST_PMD \
+                                (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD)
+#define SND_SOC_DAPM_PRE_POST_PMU \
+                                (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU)
+#define SND_SOC_DAPM_PRE_PMU            0x1     /* before widget power up */
+#define SND_SOC_DAPM_POST_PMU           0x2     /* after  widget power up */
+#define SND_SOC_DAPM_PRE_PMD            0x4     /* before widget power down */
+#define SND_SOC_DAPM_POST_PMD           0x8     /* after  widget power down */
+#define SND_SOC_DAPM_PRE_REG            0x10    /* before audio path setup */
+#define SND_SOC_DAPM_POST_REG           0x20    /* after  audio path setup */
+#define SND_SOC_DAPM_WILL_PMU           0x40    /* called at start of sequence */
+#define SND_SOC_DAPM_WILL_PMD           0x80    /* called at start of sequence */
+#define SND_SOC_DAPM_PRE_POST_PMD       (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD)
+#define SND_SOC_DAPM_PRE_POST_PMU       (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU)
 /* convenience event type detection */
+#define SND_SOC_DAPM_EVENT_ON(e)        \
+        (e & (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU))
+#define SND_SOC_DAPM_EVENT_OFF(e)       \
+        (e & (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD))
+#define SND_SOC_DAPM_EVENT_ON(e)        (e & (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU))
+#define SND_SOC_DAPM_EVENT_OFF(e)       (e & (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD))
 /* regulator widget flags */
 #define SND_SOC_DAPM_REGULATOR_BYPASS     0x1     /* bypass when disabled */
+#define SND_SOC_DAPM_REGULATOR_BYPASS   0x1     /* bypass when disabled */
 struct snd_soc_dapm_widget;
 …
 };
+int dapm_regulator_event(struct snd_soc_dapm_widget *w,
+                         struct snd_kcontrol *kcontrol, int event);
+int dapm_clock_event(struct snd_soc_dapm_widget *w,
+                         struct snd_kcontrol *kcontrol, int event);
+int dapm_pinctrl_event(struct snd_soc_dapm_widget *w,
+                         struct snd_kcontrol *kcontrol, int event);
+int dapm_regulator_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event);
+int dapm_clock_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event);
+int dapm_pinctrl_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event);
 /* dapm controls */
+int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol,
+        struct snd_ctl_elem_value *ucontrol);
+int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol,
+        struct snd_ctl_elem_value *ucontrol);
+int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol);
+int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol);
 int snd_soc_dapm_get_enum_double(struct snd_kcontrol *kcontrol,
         struct snd_ctl_elem_value *ucontrol);
 …
         struct snd_ctl_elem_value *uncontrol);
 int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm,
+        const struct snd_soc_dapm_widget *widget,
+        int num);
+struct snd_soc_dapm_widget *snd_soc_dapm_new_control(
+                struct snd_soc_dapm_context *dapm,
+        const struct snd_soc_dapm_widget *widget, int num);
+struct snd_soc_dapm_widget *snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm,
                 const struct snd_soc_dapm_widget *widget);
+struct snd_soc_dapm_widget *snd_soc_dapm_new_control_unlocked(
+                struct snd_soc_dapm_context *dapm,
+struct snd_soc_dapm_widget *snd_soc_dapm_new_control_unlocked(struct snd_soc_dapm_context *dapm,
                 const struct snd_soc_dapm_widget *widget);
 int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
                                  struct snd_soc_dai *dai);
+int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, struct snd_soc_dai *dai);
+void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w);
 int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card);
 void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card);
 int snd_soc_dapm_update_dai(struct snd_pcm_substream *substream,
                             struct snd_pcm_hw_params *params,
                             struct snd_soc_dai *dai);
+                            struct snd_pcm_hw_params *params, struct snd_soc_dai *dai);
+int snd_soc_dapm_widget_name_cmp(struct snd_soc_dapm_widget *widget, const char *s);
 /* dapm path setup */
 …
 void snd_soc_dapm_free(struct snd_soc_dapm_context *dapm);
 void snd_soc_dapm_init(struct snd_soc_dapm_context *dapm,
+                       struct snd_soc_card *card,
+                       struct snd_soc_component *component);
+                       struct snd_soc_card *card, struct snd_soc_component *component);
 int snd_soc_dapm_add_routes(struct snd_soc_dapm_context *dapm,
                             const struct snd_soc_dapm_route *route, int num);
 …
                              const struct snd_soc_dapm_route *route, int num);
 void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w);
-void snd_soc_dapm_reset_cache(struct snd_soc_dapm_context *dapm);
 /* dapm events */
+void snd_soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream,
+        int event);
+void snd_soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, int event);
 void snd_soc_dapm_stream_stop(struct snd_soc_pcm_runtime *rtd, int stream);
 void snd_soc_dapm_shutdown(struct snd_soc_card *card);
 …
 /* external DAPM widget events */
 int snd_soc_dapm_mixer_update_power(struct snd_soc_dapm_context *dapm,
+                struct snd_kcontrol *kcontrol, int connect,
+                struct snd_soc_dapm_update *update);
+                struct snd_kcontrol *kcontrol, int connect, struct snd_soc_dapm_update *update);
 int snd_soc_dapm_mux_update_power(struct snd_soc_dapm_context *dapm,
                 struct snd_kcontrol *kcontrol, int mux, struct soc_enum *e,
 …
 /* dapm sys fs - used by the core */
 extern struct attribute *soc_dapm_dev_attrs[];
+void snd_soc_dapm_debugfs_init(struct snd_soc_dapm_context *dapm,
+                                struct dentry *parent);
+void snd_soc_dapm_debugfs_init(struct snd_soc_dapm_context *dapm, struct dentry *parent);
 /* dapm audio pin control and status */
+int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm,
+                            const char *pin);
+int snd_soc_dapm_enable_pin_unlocked(struct snd_soc_dapm_context *dapm,
+                                     const char *pin);
+int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm,
+                             const char *pin);
+int snd_soc_dapm_disable_pin_unlocked(struct snd_soc_dapm_context *dapm,
+                                      const char *pin);
+int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_disable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
 int snd_soc_dapm_nc_pin(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_nc_pin_unlocked(struct snd_soc_dapm_context *dapm,
+                                 const char *pin);
+int snd_soc_dapm_get_pin_status(struct snd_soc_dapm_context *dapm,
+                                const char *pin);
+int snd_soc_dapm_nc_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_get_pin_status(struct snd_soc_dapm_context *dapm, const char *pin);
 int snd_soc_dapm_sync(struct snd_soc_dapm_context *dapm);
 int snd_soc_dapm_sync_unlocked(struct snd_soc_dapm_context *dapm);
+int snd_soc_dapm_force_enable_pin(struct snd_soc_dapm_context *dapm,
+                                  const char *pin);
+int snd_soc_dapm_force_enable_pin_unlocked(struct snd_soc_dapm_context *dapm,
+                                           const char *pin);
+int snd_soc_dapm_ignore_suspend(struct snd_soc_dapm_context *dapm,
+                                const char *pin);
+int snd_soc_dapm_force_enable_pin(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_force_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
+int snd_soc_dapm_ignore_suspend(struct snd_soc_dapm_context *dapm, const char *pin);
 unsigned int dapm_kcontrol_get_value(const struct snd_kcontrol *kcontrol);
 …
 int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream,
         struct snd_soc_dapm_widget_list **list,
+        bool (*custom_stop_condition)(struct snd_soc_dapm_widget *,
+                                      enum snd_soc_dapm_direction));
+        bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, enum snd_soc_dapm_direction));
 void snd_soc_dapm_dai_free_widgets(struct snd_soc_dapm_widget_list **list);
+struct snd_soc_dapm_context *snd_soc_dapm_kcontrol_dapm(
+        struct snd_kcontrol *kcontrol);
+struct snd_soc_dapm_widget *snd_soc_dapm_kcontrol_widget(
+                struct snd_kcontrol *kcontrol);
+int snd_soc_dapm_force_bias_level(struct snd_soc_dapm_context *dapm,
+        enum snd_soc_bias_level level);
+struct snd_soc_dapm_context *snd_soc_dapm_kcontrol_dapm(struct snd_kcontrol *kcontrol);
+struct snd_soc_dapm_widget *snd_soc_dapm_kcontrol_widget(struct snd_kcontrol *kcontrol);
+int snd_soc_dapm_force_bias_level(struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level);
 /* dapm widget types */
 …
         snd_soc_dapm_input = 0,         /* input pin */
         snd_soc_dapm_output,            /* output pin */
         snd_soc_dapm_mux,                       /* selects 1 analog signal from many inputs */
         snd_soc_dapm_demux,                     /* connects the input to one of multiple outputs */
         snd_soc_dapm_mixer,                     /* mixes several analog signals together */
         snd_soc_dapm_mixer_named_ctl,           /* mixer with named controls */
         snd_soc_dapm_pga,                       /* programmable gain/attenuation (volume) */
         snd_soc_dapm_out_drv,                   /* output driver */
         snd_soc_dapm_adc,                       /* analog to digital converter */
         snd_soc_dapm_dac,                       /* digital to analog converter */
+        snd_soc_dapm_mux,               /* selects 1 analog signal from many inputs */
+        snd_soc_dapm_demux,             /* connects the input to one of multiple outputs */
+        snd_soc_dapm_mixer,             /* mixes several analog signals together */
+        snd_soc_dapm_mixer_named_ctl,   /* mixer with named controls */
+        snd_soc_dapm_pga,               /* programmable gain/attenuation (volume) */
+        snd_soc_dapm_out_drv,           /* output driver */
+        snd_soc_dapm_adc,               /* analog to digital converter */
+        snd_soc_dapm_dac,               /* digital to analog converter */
         snd_soc_dapm_micbias,           /* microphone bias (power) - DEPRECATED: use snd_soc_dapm_supply */
         snd_soc_dapm_mic,                       /* microphone */
         snd_soc_dapm_hp,                        /* headphones */
         snd_soc_dapm_spk,                       /* speaker */
         snd_soc_dapm_line,                      /* line input/output */
+        snd_soc_dapm_mic,               /* microphone */
+        snd_soc_dapm_hp,                /* headphones */
+        snd_soc_dapm_spk,               /* speaker */
+        snd_soc_dapm_line,              /* line input/output */
         snd_soc_dapm_switch,            /* analog switch */
         snd_soc_dapm_vmid,                      /* codec bias/vmid - to minimise pops */
         snd_soc_dapm_pre,                       /* machine specific pre widget - exec first */
         snd_soc_dapm_post,                      /* machine specific post widget - exec last */
+        snd_soc_dapm_vmid,              /* codec bias/vmid - to minimise pops */
+        snd_soc_dapm_pre,               /* machine specific pre widget - exec first */
+        snd_soc_dapm_post,              /* machine specific post widget - exec last */
         snd_soc_dapm_supply,            /* power/clock supply */
         snd_soc_dapm_pinctrl,           /* pinctrl */
 …
 };
-enum snd_soc_dapm_subclass {
-        SND_SOC_DAPM_CLASS_INIT         = 0,
-        SND_SOC_DAPM_CLASS_RUNTIME      = 1,
-};
 /*
  * DAPM audio route definition.
 …
         /* status */
         u32 connect:1;  /* source and sink widgets are connected */
         u32 walking:1;  /* path is in the process of being walked */
         u32 weak:1;     /* path ignored for power management */
+        u32 connect:1;          /* source and sink widgets are connected */
+        u32 walking:1;          /* path is in the process of being walked */
+        u32 weak:1;             /* path ignored for power management */
         u32 is_supply:1;        /* At least one of the connected widgets is a supply */
 …
 struct snd_soc_dapm_widget {
         enum snd_soc_dapm_type id;
         const char *name;               /* widget name */
         const char *sname;      /* stream name */
+        const char *name;                       /* widget name */
+        const char *sname;                      /* stream name */
         struct list_head list;
         struct snd_soc_dapm_context *dapm;
 …
         unsigned char new:1;                    /* cnew complete */
         unsigned char force:1;                  /* force state */
         unsigned char ignore_suspend:1;         /* kept enabled over suspend */
+        unsigned char ignore_suspend:1;         /* kept enabled over suspend */
         unsigned char new_power:1;              /* power from this run */
         unsigned char power_checked:1;          /* power checked this run */
         unsigned char is_supply:1;              /* Widget is a supply type widget */
         unsigned char is_ep:2;                  /* Widget is a endpoint type widget */
+        unsigned char no_wname_in_kcontrol_name:1; /* No widget name prefix in kcontrol name */
         int subseq;                             /* sort within widget type */
 …
 };
-struct snd_soc_dapm_wcache {
-        struct snd_soc_dapm_widget *widget;
-};
 /* DAPM context */
 struct snd_soc_dapm_context {
         enum snd_soc_bias_level bias_level;
+        unsigned int idle_bias_off:1; /* Use BIAS_OFF instead of STANDBY */
+        /* Go to BIAS_OFF in suspend if the DAPM context is idle */
+        unsigned int suspend_bias_off:1;
+        struct device *dev; /* from parent - for debug */
+        struct snd_soc_component *component; /* parent component */
+        struct snd_soc_card *card; /* parent card */
+        /* bit field */
+        unsigned int idle_bias_off:1;           /* Use BIAS_OFF instead of STANDBY */
+        unsigned int suspend_bias_off:1;        /* Use BIAS_OFF in suspend if the DAPM is idle */
+        struct device *dev;                     /* from parent - for debug */
+        struct snd_soc_component *component;    /* parent component */
+        struct snd_soc_card *card;              /* parent card */
         /* used during DAPM updates */
 …
         struct list_head list;
         struct snd_soc_dapm_wcache path_sink_cache;
         struct snd_soc_dapm_wcache path_source_cache;
+        struct snd_soc_dapm_widget *wcache_sink;
+        struct snd_soc_dapm_widget *wcache_source;
 #ifdef CONFIG_DEBUG_FS
 …
 #define SND_SOC_DAPM_DIR_TO_EP(x) BIT(x)
 #define SND_SOC_DAPM_EP_SOURCE SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_IN)
 #define SND_SOC_DAPM_EP_SINK SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_OUT)
+#define SND_SOC_DAPM_EP_SOURCE  SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_IN)
+#define SND_SOC_DAPM_EP_SINK    SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_OUT)
 /**
  * snd_soc_dapm_widget_for_each_sink_path - Iterates over all paths in the
+ * snd_soc_dapm_widget_for_each_path - Iterates over all paths in the
  *   specified direction of a widget
  * @w: The widget
 …
 /**
  * snd_soc_dapm_widget_for_each_sink_path_safe - Iterates over all paths in the
+ * snd_soc_dapm_widget_for_each_path_safe - Iterates over all paths in the
  *   specified direction of a widget
  * @w: The widget
 …
  * @next_p: Temporary storage for the next path
+ *
  *  This function works like snd_soc_dapm_widget_for_each_sink_path, expect that
+ *  This function works like snd_soc_dapm_widget_for_each_path, expect that
  *  it is safe to remove the current path from the list while iterating
  */

GPL/trunk/alsa-kernel/include/sound/soc-dpcm.h

-              r695
+              r772
         struct list_head list_fe;
-        /* hw params for this link - may be different for each link */
-        struct snd_pcm_hw_params hw_params;
 #ifdef CONFIG_DEBUG_FS
         struct dentry *debugfs_state;
 …
         int users;
-        struct snd_pcm_runtime *runtime;
         struct snd_pcm_hw_params hw_params;
 …
         int trigger_pending; /* trigger cmd + 1 if pending, 0 if not */
+        int be_start; /* refcount protected by BE stream pcm lock */
+        int be_pause; /* refcount protected by BE stream pcm lock */
+        bool fe_pause; /* used to track STOP after PAUSE */
 };
 …
 int snd_soc_dpcm_can_be_params(struct snd_soc_pcm_runtime *fe,
                 struct snd_soc_pcm_runtime *be, int stream);
+/* can this BE perform prepare */
+int snd_soc_dpcm_can_be_prepared(struct snd_soc_pcm_runtime *fe,
+                                 struct snd_soc_pcm_runtime *be, int stream);
 /* is the current PCM operation for this FE ? */
 …
 int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir,
         int event);
+bool dpcm_end_walk_at_be(struct snd_soc_dapm_widget *widget, enum snd_soc_dapm_direction dir);
+int widget_in_list(struct snd_soc_dapm_widget_list *list,
+                   struct snd_soc_dapm_widget *widget);
 #define dpcm_be_dai_startup_rollback(fe, stream, last)  \

GPL/trunk/alsa-kernel/include/sound/soc-topology.h

-              r717
+              r772
         unsigned int index;     /* objects can belong in different groups */
         struct list_head list;
         struct snd_soc_tplg_ops *ops;
+        int (*unload)(struct snd_soc_component *comp, struct snd_soc_dobj *dobj);
         union {
                 struct snd_soc_dobj_control control;
 …
         /* completion - called at completion of firmware loading */
         void (*complete)(struct snd_soc_component *);
+        int (*complete)(struct snd_soc_component *comp);
         /* manifest - optional to inform component of manifest */

GPL/trunk/alsa-kernel/include/sound/soc.h

-              r703
+              r772
         ((unsigned long)&(struct soc_mixer_control) \
         {.reg = xreg, .rreg = xreg, .shift = shift_left, \
         .rshift = shift_right, .max = xmax, .platform_max = xmax, \
+        .rshift = shift_right, .max = xmax, \
         .invert = xinvert, .autodisable = xautodisable})
 #define SOC_DOUBLE_S_VALUE(xreg, shift_left, shift_right, xmin, xmax, xsign_bit, xinvert, xautodisable) \
         ((unsigned long)&(struct soc_mixer_control) \
         {.reg = xreg, .rreg = xreg, .shift = shift_left, \
         .rshift = shift_right, .min = xmin, .max = xmax, .platform_max = xmax, \
+        .rshift = shift_right, .min = xmin, .max = xmax, \
         .sign_bit = xsign_bit, .invert = xinvert, .autodisable = xautodisable})
 #define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, xautodisable) \
 …
 #define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
         ((unsigned long)&(struct soc_mixer_control) \
         {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
+        {.reg = xreg, .max = xmax, .invert = xinvert})
 #define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \
         ((unsigned long)&(struct soc_mixer_control) \
         {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
         .max = xmax, .platform_max = xmax, .invert = xinvert})
+        .max = xmax, .invert = xinvert})
 #define SOC_DOUBLE_R_S_VALUE(xlreg, xrreg, xshift, xmin, xmax, xsign_bit, xinvert) \
         ((unsigned long)&(struct soc_mixer_control) \
         {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
         .max = xmax, .min = xmin, .platform_max = xmax, .sign_bit = xsign_bit, \
+        .max = xmax, .min = xmin, .sign_bit = xsign_bit, \
         .invert = xinvert})
 #define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
         ((unsigned long)&(struct soc_mixer_control) \
         {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
         .min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
+        .min = xmin, .max = xmax, .invert = xinvert})
 #define SOC_SINGLE(xname, reg, shift, max, invert) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 …
                 {.reg = xreg, .rreg = xreg, .shift = xshift, \
                  .rshift = xshift,  .min = xmin, .max = xmax, \
                  .platform_max = xmax, .invert = xinvert} }
+                 .invert = xinvert} }
 #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 …
                 {.reg = xreg, .rreg = xreg, .shift = xshift, \
                  .rshift = xshift, .min = xmin, .max = xmax, \
                  .platform_max = xmax, .invert = xinvert} }
+                 .invert = xinvert} }
 #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
 …
         .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
                                           max, invert, 0) }
+#define SOC_DOUBLE_SX_TLV(xname, xreg, shift_left, shift_right, xmin, xmax, tlv_array) \
+{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
+        .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
+        SNDRV_CTL_ELEM_ACCESS_READWRITE, \
+        .tlv.p  = (tlv_array), \
+        .info = snd_soc_info_volsw_sx, \
+        .get = snd_soc_get_volsw_sx, \
+        .put = snd_soc_put_volsw_sx, \
+        .private_value = (unsigned long)&(struct soc_mixer_control) \
+                {.reg = xreg, .rreg = xreg, \
+                .shift = shift_left, .rshift = shift_right, \
+                .max = xmax, .min = xmin} }
 #define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
 …
         .private_value = SOC_DOUBLE_R_S_VALUE(reg_left, reg_right, xshift, \
                                             xmin, xmax, xsign_bit, xinvert) }
+#define SOC_SINGLE_S_TLV(xname, xreg, xshift, xmin, xmax, xsign_bit, xinvert, tlv_array) \
+        SOC_DOUBLE_R_S_TLV(xname, xreg, xreg, xshift, xmin, xmax, xsign_bit, xinvert, tlv_array)
 #define SOC_SINGLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
 {       .iface  = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
 …
         .private_value = (unsigned long)&(struct soc_mixer_control) \
         {.reg = xreg, .rreg = xreg,  \
          .min = xmin, .max = xmax, .platform_max = xmax, \
+         .min = xmin, .max = xmax, \
         .sign_bit = 7,} }
 #define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
 …
                 {.reg = xreg, .rreg = xreg, .shift = xshift, \
                  .rshift = xshift, .min = xmin, .max = xmax, \
                  .platform_max = xmax, .invert = xinvert} }
+                 .invert = xinvert} }
 #define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
          xhandler_get, xhandler_put, tlv_array) \
 …
         .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
                                             xmax, xinvert) }
+#define SOC_DOUBLE_R_S_EXT_TLV(xname, reg_left, reg_right, xshift, xmin, xmax, \
+                               xsign_bit, xinvert, xhandler_get, xhandler_put, \
+                               tlv_array) \
+{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
+        .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
+                  SNDRV_CTL_ELEM_ACCESS_READWRITE, \
+        .tlv.p = (tlv_array), \
+        .info = snd_soc_info_volsw, \
+        .get = xhandler_get, .put = xhandler_put, \
+        .private_value = SOC_DOUBLE_R_S_VALUE(reg_left, reg_right, xshift, \
+                                              xmin, xmax, xsign_bit, xinvert) }
+#define SOC_SINGLE_S_EXT_TLV(xname, xreg, xshift, xmin, xmax, \
+                             xsign_bit, xinvert, xhandler_get, xhandler_put, \
+                             tlv_array) \
+        SOC_DOUBLE_R_S_EXT_TLV(xname, xreg, xreg, xshift, xmin, xmax, \
+                               xsign_bit, xinvert, xhandler_get, xhandler_put, \
+                               tlv_array)
 #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 …
 struct snd_soc_jack_gpio;
-typedef int (*hw_write_t)(void *,const char* ,int);
 enum snd_soc_pcm_subclass {
         SND_SOC_PCM_CLASS_PCM   = 0,
 …
 int snd_soc_register_card(struct snd_soc_card *card);
 int snd_soc_unregister_card(struct snd_soc_card *card);
+void snd_soc_unregister_card(struct snd_soc_card *card);
 int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card);
 #ifdef CONFIG_PM_SLEEP
 …
 int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
 int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
+int snd_soc_tdm_params_to_bclk(struct snd_pcm_hw_params *params,
+                               int tdm_width, int tdm_slots, int slot_multiple);
 /* set runtime hw params */
 …
         struct snd_ctl_elem_value *ucontrol);
+enum snd_soc_trigger_order {
+                                                /* start                        stop                 */
+        SND_SOC_TRIGGER_ORDER_DEFAULT   = 0,    /* Link->Component->DAI         DAI->Component->Link */
+        SND_SOC_TRIGGER_ORDER_LDC,              /* Link->DAI->Component         Component->DAI->Link */
+        SND_SOC_TRIGGER_ORDER_MAX,
+};
 /* SoC PCM stream information */
 struct snd_soc_pcm_stream {
 …
         void (*shutdown)(struct snd_compr_stream *);
         int (*set_params)(struct snd_compr_stream *);
-        int (*trigger)(struct snd_compr_stream *);
 };
 …
         struct device_node *of_node;
         const char *dai_name;
+        struct of_phandle_args *dai_args;
+};
+struct snd_soc_dai_link_codec_ch_map {
+        unsigned int connected_cpu_id;
+        unsigned int ch_mask;
 };
 …
         unsigned int num_codecs;
+        struct snd_soc_dai_link_codec_ch_map *codec_ch_maps;
         /*
          * You MAY specify the link's platform/PCM/DMA driver, either by
 …
         int id; /* optional ID for machine driver link identification */
+        const struct snd_soc_pcm_stream *params;
+        unsigned int num_params;
+        /*
+         * for Codec2Codec
+         */
+        const struct snd_soc_pcm_stream *c2c_params;
+        unsigned int num_c2c_params;
         unsigned int dai_fmt;           /* format to set on init */
 …
         const struct snd_soc_ops *ops;
         const struct snd_soc_compr_ops *compr_ops;
+        /*
+         * soc_pcm_trigger() start/stop sequence.
+         * see also
+         *      snd_soc_component_driver
+         *      soc_pcm_trigger()
+         */
+        enum snd_soc_trigger_order trigger_start;
+        enum snd_soc_trigger_order trigger_stop;
         /* Mark this pcm with non atomic ops */
 …
         unsigned int ignore:1;
-        /* This flag will reorder stop sequence. By enabling this flag
-         * DMA controller stop sequence will be invoked first followed by
-         * CPU DAI driver stop sequence
-         */
-        unsigned int stop_dma_first:1;
 #ifdef CONFIG_SND_SOC_TOPOLOGY
         struct snd_soc_dobj dobj; /* For topology */
 …
 };
+/* REMOVE ME */
+#define asoc_link_to_cpu        snd_soc_link_to_cpu
+#define asoc_link_to_codec      snd_soc_link_to_codec
+#define asoc_link_to_platform   snd_soc_link_to_platform
 static inline struct snd_soc_dai_link_component*
 asoc_link_to_cpu(struct snd_soc_dai_link *link, int n) {
+snd_soc_link_to_cpu(struct snd_soc_dai_link *link, int n) {
         return &(link)->cpus[n];
+}
 static inline struct snd_soc_dai_link_component*
 asoc_link_to_codec(struct snd_soc_dai_link *link, int n) {
+snd_soc_link_to_codec(struct snd_soc_dai_link *link, int n) {
         return &(link)->codecs[n];
+}
 static inline struct snd_soc_dai_link_component*
 asoc_link_to_platform(struct snd_soc_dai_link *link, int n) {
+snd_soc_link_to_platform(struct snd_soc_dai_link *link, int n) {
         return &(link)->platforms[n];
+}
 …
         for ((i) = 0;                                                   \
              ((i) < link->num_codecs) &&                                \
                      ((codec) = asoc_link_to_codec(link, i));           \
+                     ((codec) = snd_soc_link_to_codec(link, i));                \
              (i)++)
 …
         for ((i) = 0;                                                   \
              ((i) < link->num_platforms) &&                             \
                      ((platform) = asoc_link_to_platform(link, i));     \
+                     ((platform) = snd_soc_link_to_platform(link, i));  \
              (i)++)
 …
         for ((i) = 0;                                                   \
              ((i) < link->num_cpus) &&                                  \
                      ((cpu) = asoc_link_to_cpu(link, i));               \
+                     ((cpu) = snd_soc_link_to_cpu(link, i));            \
              (i)++)
 …
 #define COMP_DUMMY()                    { .name = "snd-soc-dummy", .dai_name = "snd-soc-dummy-dai", }
+/* REMOVE ME */
+#define asoc_dummy_dlc          snd_soc_dummy_dlc
 extern struct snd_soc_dai_link_component null_dailink_component[0];
+extern struct snd_soc_dai_link_component snd_soc_dummy_dlc;
 …
         char dmi_longname[80];
 #endif /* CONFIG_DMI */
+#ifdef CONFIG_PCI
+        /*
+         * PCI does not define 0 as invalid, so pci_subsystem_set indicates
+         * whether a value has been written to these fields.
+         */
+        unsigned short pci_subsystem_vendor;
+        unsigned short pci_subsystem_device;
+        bool pci_subsystem_set;
+#endif /* CONFIG_PCI */
         char topology_shortname[32];
 …
         enum snd_soc_pcm_subclass pcm_subclass;
-        spinlock_t dpcm_lock;
         int (*probe)(struct snd_soc_card *card);
         int (*late_probe)(struct snd_soc_card *card);
+        void (*fixup_controls)(struct snd_soc_card *card);
         int (*remove)(struct snd_soc_card *card);
 …
         list_for_each_entry_safe(w, _w, &card->widgets, list)
+static inline int snd_soc_card_is_instantiated(struct snd_soc_card *card)
+{
+        return card && card->instantiated;
+}
 /* SoC machine DAI configuration, glues a codec and cpu DAI together */
 struct snd_soc_pcm_runtime {
 …
         struct snd_pcm_ops ops;
         unsigned int params_select; /* currently selected param for dai link */
+        unsigned int c2c_params_select; /* currently selected c2c_param for dai link */
         /* Dynamic PCM BE runtime data */
+        struct snd_soc_dpcm_runtime dpcm[2];
+        struct snd_soc_dpcm_runtime dpcm[SNDRV_PCM_STREAM_LAST + 1];
+        struct snd_soc_dapm_widget *c2c_widget[SNDRV_PCM_STREAM_LAST + 1];
         long pmdown_time;
 …
          * see
          *      soc_new_pcm_runtime()
          *      asoc_rtd_to_cpu()
          *      asoc_rtd_to_codec()
+         *      snd_soc_rtd_to_cpu()
+         *      snd_soc_rtd_to_codec()
          */
         struct snd_soc_dai **dais;
-        unsigned int num_codecs;
-        unsigned int num_cpus;
-        struct snd_soc_dapm_widget *playback_widget;
-        struct snd_soc_dapm_widget *capture_widget;
         struct delayed_work delayed_work;
 …
         unsigned int fe_compr:1; /* for Dynamic PCM */
+        bool initialized;
         int num_components;
         struct snd_soc_component *components[]; /* CPU/Codec/Platform */
 };
+/* REMOVE ME */
+#define asoc_rtd_to_cpu         snd_soc_rtd_to_cpu
+#define asoc_rtd_to_codec       snd_soc_rtd_to_codec
+#define asoc_substream_to_rtd   snd_soc_substream_to_rtd
 /* see soc_new_pcm_runtime()  */
 #define asoc_rtd_to_cpu(rtd, n)   (rtd)->dais[n]
 #define asoc_rtd_to_codec(rtd, n) (rtd)->dais[n + (rtd)->num_cpus]
 #define asoc_substream_to_rtd(substream) \
+#define snd_soc_rtd_to_cpu(rtd, n)   (rtd)->dais[n]
+#define snd_soc_rtd_to_codec(rtd, n) (rtd)->dais[n + (rtd)->dai_link->num_cpus]
+#define snd_soc_substream_to_rtd(substream) \
         (struct snd_soc_pcm_runtime *)snd_pcm_substream_chip(substream)
 …
 #define for_each_rtd_cpu_dais(rtd, i, dai)                              \
         for ((i) = 0;                                                   \
              ((i) < rtd->num_cpus) && ((dai) = asoc_rtd_to_cpu(rtd, i)); \
+             ((i) < rtd->dai_link->num_cpus) && ((dai) = snd_soc_rtd_to_cpu(rtd, i)); \
              (i)++)
 #define for_each_rtd_codec_dais(rtd, i, dai)                            \
         for ((i) = 0;                                                   \
              ((i) < rtd->num_codecs) && ((dai) = asoc_rtd_to_codec(rtd, i)); \
+             ((i) < rtd->dai_link->num_codecs) && ((dai) = snd_soc_rtd_to_codec(rtd, i)); \
              (i)++)
 #define for_each_rtd_dais(rtd, i, dai)                                  \
         for ((i) = 0;                                                   \
              ((i) < (rtd)->num_cpus + (rtd)->num_codecs) &&             \
+             ((i) < (rtd)->dai_link->num_cpus + (rtd)->dai_link->num_codecs) && \
                      ((dai) = (rtd)->dais[i]);                          \
              (i)++)
 …
 /* mixer control */
 struct soc_mixer_control {
+        int min, max, platform_max;
+        /* Minimum and maximum specified as written to the hardware */
+        int min, max;
+        /* Limited maximum value specified as presented through the control */
+        int platform_max;
         int reg, rreg;
         unsigned int shift, rshift;
 …
 int snd_soc_of_parse_audio_simple_widgets(struct snd_soc_card *card,
                                           const char *propname);
+int snd_soc_of_parse_pin_switches(struct snd_soc_card *card, const char *prop);
 int snd_soc_of_get_slot_mask(struct device_node *np,
                              const char *prop_name,
 …
 int snd_soc_of_parse_aux_devs(struct snd_soc_card *card, const char *propname);
 unsigned int snd_soc_daifmt_clock_provider_fliped(unsigned int dai_fmt);
+unsigned int snd_soc_daifmt_clock_provider_flipped(unsigned int dai_fmt);
 unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame);
 …
                 snd_soc_daifmt_parse_clock_provider_as_bitmap(np, prefix))
+int snd_soc_get_stream_cpu(struct snd_soc_dai_link *dai_link, int stream);
+int snd_soc_get_dlc(const struct of_phandle_args *args,
+                    struct snd_soc_dai_link_component *dlc);
+int snd_soc_of_get_dlc(struct device_node *of_node,
+                       struct of_phandle_args *args,
+                       struct snd_soc_dai_link_component *dlc,
+                       int index);
 int snd_soc_get_dai_id(struct device_node *ep);
 int snd_soc_get_dai_name(const struct of_phandle_args *args,
                          const char **dai_name);
 int snd_soc_of_get_dai_name(struct device_node *of_node,
                             const char **dai_name);
+                            const char **dai_name, int index);
 int snd_soc_of_get_dai_link_codecs(struct device *dev,
                                    struct device_node *of_node,
                                    struct snd_soc_dai_link *dai_link);
 void snd_soc_of_put_dai_link_codecs(struct snd_soc_dai_link *dai_link);
+int snd_soc_add_pcm_runtime(struct snd_soc_card *card,
+                            struct snd_soc_dai_link *dai_link);
+int snd_soc_of_get_dai_link_cpus(struct device *dev,
+                                 struct device_node *of_node,
+                                 struct snd_soc_dai_link *dai_link);
+void snd_soc_of_put_dai_link_cpus(struct snd_soc_dai_link *dai_link);
+int snd_soc_add_pcm_runtimes(struct snd_soc_card *card,
+                             struct snd_soc_dai_link *dai_link,
+                             int num_dai_link);
 void snd_soc_remove_pcm_runtime(struct snd_soc_card *card,
                                 struct snd_soc_pcm_runtime *rtd);
+void snd_soc_dlc_use_cpu_as_platform(struct snd_soc_dai_link_component *platforms,
+                                     struct snd_soc_dai_link_component *cpus);
+struct of_phandle_args *snd_soc_copy_dai_args(struct device *dev,
+                                              struct of_phandle_args *args);
+struct snd_soc_dai *snd_soc_get_dai_via_args(struct of_phandle_args *dai_args);
 struct snd_soc_dai *snd_soc_register_dai(struct snd_soc_component *component,
                                          struct snd_soc_dai_driver *dai_drv,
 …
 extern const struct dev_pm_ops snd_soc_pm_ops;
+/* Helper functions */
+static inline void snd_soc_dapm_mutex_lock(struct snd_soc_dapm_context *dapm)
+{
+        mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
+}
+static inline void snd_soc_dapm_mutex_unlock(struct snd_soc_dapm_context *dapm)
+{
+        mutex_unlock(&dapm->card->dapm_mutex);
+}
+/*
+ *      DAPM helper functions
+ */
+enum snd_soc_dapm_subclass {
+        SND_SOC_DAPM_CLASS_ROOT         = 0,
+        SND_SOC_DAPM_CLASS_RUNTIME      = 1,
+};
+static inline void _snd_soc_dapm_mutex_lock_root_c(struct snd_soc_card *card)
+{
+        mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_ROOT);
+}
+static inline void _snd_soc_dapm_mutex_lock_c(struct snd_soc_card *card)
+{
+        mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
+}
+static inline void _snd_soc_dapm_mutex_unlock_c(struct snd_soc_card *card)
+{
+        mutex_unlock(&card->dapm_mutex);
+}
+static inline void _snd_soc_dapm_mutex_assert_held_c(struct snd_soc_card *card)
+{
+        lockdep_assert_held(&card->dapm_mutex);
+}
+static inline void _snd_soc_dapm_mutex_lock_root_d(struct snd_soc_dapm_context *dapm)
+{
+        _snd_soc_dapm_mutex_lock_root_c(dapm->card);
+}
+static inline void _snd_soc_dapm_mutex_lock_d(struct snd_soc_dapm_context *dapm)
+{
+        _snd_soc_dapm_mutex_lock_c(dapm->card);
+}
+static inline void _snd_soc_dapm_mutex_unlock_d(struct snd_soc_dapm_context *dapm)
+{
+        _snd_soc_dapm_mutex_unlock_c(dapm->card);
+}
+static inline void _snd_soc_dapm_mutex_assert_held_d(struct snd_soc_dapm_context *dapm)
+{
+        _snd_soc_dapm_mutex_assert_held_c(dapm->card);
+}
+#define snd_soc_dapm_mutex_lock_root(x) _Generic((x),                   \
+        struct snd_soc_card * :         _snd_soc_dapm_mutex_lock_root_c, \
+        struct snd_soc_dapm_context * : _snd_soc_dapm_mutex_lock_root_d)(x)
+#define snd_soc_dapm_mutex_lock(x) _Generic((x),                        \
+        struct snd_soc_card * :         _snd_soc_dapm_mutex_lock_c,     \
+        struct snd_soc_dapm_context * : _snd_soc_dapm_mutex_lock_d)(x)
+#define snd_soc_dapm_mutex_unlock(x) _Generic((x),                      \
+        struct snd_soc_card * :         _snd_soc_dapm_mutex_unlock_c,   \
+        struct snd_soc_dapm_context * : _snd_soc_dapm_mutex_unlock_d)(x)
+#define snd_soc_dapm_mutex_assert_held(x) _Generic((x),                 \
+        struct snd_soc_card * :         _snd_soc_dapm_mutex_assert_held_c, \
+        struct snd_soc_dapm_context * : _snd_soc_dapm_mutex_assert_held_d)(x)
+/*
+ *      PCM helper functions
+ */
+static inline void _snd_soc_dpcm_mutex_lock_c(struct snd_soc_card *card)
+{
+        mutex_lock_nested(&card->pcm_mutex, card->pcm_subclass);
+}
+static inline void _snd_soc_dpcm_mutex_unlock_c(struct snd_soc_card *card)
+{
+        mutex_unlock(&card->pcm_mutex);
+}
+static inline void _snd_soc_dpcm_mutex_assert_held_c(struct snd_soc_card *card)
+{
+        lockdep_assert_held(&card->pcm_mutex);
+}
+static inline void _snd_soc_dpcm_mutex_lock_r(struct snd_soc_pcm_runtime *rtd)
+{
+        _snd_soc_dpcm_mutex_lock_c(rtd->card);
+}
+static inline void _snd_soc_dpcm_mutex_unlock_r(struct snd_soc_pcm_runtime *rtd)
+{
+        _snd_soc_dpcm_mutex_unlock_c(rtd->card);
+}
+static inline void _snd_soc_dpcm_mutex_assert_held_r(struct snd_soc_pcm_runtime *rtd)
+{
+        _snd_soc_dpcm_mutex_assert_held_c(rtd->card);
+}
+#define snd_soc_dpcm_mutex_lock(x) _Generic((x),                        \
+         struct snd_soc_card * :        _snd_soc_dpcm_mutex_lock_c,     \
+         struct snd_soc_pcm_runtime * : _snd_soc_dpcm_mutex_lock_r)(x)
+#define snd_soc_dpcm_mutex_unlock(x) _Generic((x),                      \
+         struct snd_soc_card * :        _snd_soc_dpcm_mutex_unlock_c,   \
+         struct snd_soc_pcm_runtime * : _snd_soc_dpcm_mutex_unlock_r)(x)
+#define snd_soc_dpcm_mutex_assert_held(x) _Generic((x),         \
+        struct snd_soc_card * :         _snd_soc_dpcm_mutex_assert_held_c, \
+        struct snd_soc_pcm_runtime * :  _snd_soc_dpcm_mutex_assert_held_r)(x)
 #include <sound/soc-component.h>

GPL/trunk/alsa-kernel/include/sound/sof.h

-              r717
+              r772
 struct snd_sof_dsp_ops;
+struct snd_sof_dev;
+/**
+ * enum sof_fw_state - DSP firmware state definitions
+ * @SOF_FW_BOOT_NOT_STARTED:    firmware boot is not yet started
+ * @SOF_DSPLESS_MODE:           DSP is not used
+ * @SOF_FW_BOOT_PREPARE:        preparing for boot (firmware loading for exaqmple)
+ * @SOF_FW_BOOT_IN_PROGRESS:    firmware boot is in progress
+ * @SOF_FW_BOOT_FAILED:         firmware boot failed
+ * @SOF_FW_BOOT_READY_FAILED:   firmware booted but fw_ready op failed
+ * @SOF_FW_BOOT_READY_OK:       firmware booted and fw_ready op passed
+ * @SOF_FW_BOOT_COMPLETE:       firmware is booted up and functional
+ * @SOF_FW_CRASHED:             firmware crashed after successful boot
+ */
+enum sof_fw_state {
+        SOF_FW_BOOT_NOT_STARTED = 0,
+        SOF_DSPLESS_MODE,
+        SOF_FW_BOOT_PREPARE,
+        SOF_FW_BOOT_IN_PROGRESS,
+        SOF_FW_BOOT_FAILED,
+        SOF_FW_BOOT_READY_FAILED,
+        SOF_FW_BOOT_READY_OK,
+        SOF_FW_BOOT_COMPLETE,
+        SOF_FW_CRASHED,
+};
+/* DSP power states */
+enum sof_dsp_power_states {
+        SOF_DSP_PM_D0,
+        SOF_DSP_PM_D1,
+        SOF_DSP_PM_D2,
+        SOF_DSP_PM_D3,
+};
+/* Definitions for multiple IPCs */
+enum sof_ipc_type {
+        SOF_IPC_TYPE_3,
+        SOF_IPC_TYPE_4,
+        SOF_IPC_TYPE_COUNT
+};
+#define SOF_IPC         SOF_IPC_TYPE_3
+#define SOF_INTEL_IPC4  SOF_IPC_TYPE_4
 /*
 …
  */
 struct snd_sof_pdata {
-        const struct firmware *fw;
         const char *name;
         const char *platform;
+        /*
+         * PCI SSID. As PCI does not define 0 as invalid, the subsystem_id_set
+         * flag indicates that a value has been written to these members.
+         */
+        unsigned short subsystem_vendor;
+        unsigned short subsystem_device;
+        bool subsystem_id_set;
         struct device *dev;
-        /* indicate how many first bytes shouldn't be loaded into DSP memory. */
-        size_t fw_offset;
         /*
 …
         const char *tplg_filename;
+        /* loadable external libraries available under this directory */
+        const char *fw_lib_prefix;
         /* machine */
         struct platform_device *pdev_mach;
         const struct snd_soc_acpi_mach *machine;
+        const struct snd_sof_of_mach *of_machine;
         void *hw_pdata;
+        enum sof_ipc_type ipc_type;
 };
 …
         /* list of machines using this configuration */
         struct snd_soc_acpi_mach *machines;
+        struct snd_sof_of_mach *of_machines;
         /* alternate list of machines using this configuration */
 …
         int resindex_imr_base;
         int irqindex_host_ipc;
-        int resindex_dma_base;
-        /* DMA only valid when resindex_dma_base != -1*/
-        int dma_engine;
-        int dma_size;
         /* IPC timeouts in ms */
 …
         const char *nocodec_tplg_filename;
+        /* defaults paths for firmware and topology files */
+        const char *default_fw_path;
+        const char *default_tplg_path;
+        /* information on supported IPCs */
+        unsigned int ipc_supported_mask;
+        enum sof_ipc_type ipc_default;
+        /* The platform supports DSPless mode */
+        bool dspless_mode_supported;
+        /* defaults paths for firmware, library and topology files */
+        const char *default_fw_path[SOF_IPC_TYPE_COUNT];
+        const char *default_lib_path[SOF_IPC_TYPE_COUNT];
+        const char *default_tplg_path[SOF_IPC_TYPE_COUNT];
         /* default firmware name */
         const char *default_fw_filename;
+        const char *default_fw_filename[SOF_IPC_TYPE_COUNT];
+        const struct snd_sof_dsp_ops *ops;
+        struct snd_sof_dsp_ops *ops;
+        int (*ops_init)(struct snd_sof_dev *sdev);
+        void (*ops_free)(struct snd_sof_dev *sdev);
 };

GPL/trunk/alsa-kernel/include/sound/version.h

r717	r772
1	1	/* include/version.h */
2		#define CONFIG_SND_VERSION "~~5.15.59~~"
	2	#define CONFIG_SND_VERSION "6.6.85"
3	3	#define CONFIG_SND_DATE ""

GPL/trunk/alsa-kernel/include/uapi/sound/asequencer.h

-              r615
+              r772
  *  Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
  *            (c) 1998-1999 by Jaroslav Kysela <perex@perex.cz>
+ *
+ *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
+ *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
+ *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
  */
 #ifndef _UAPI__SOUND_ASEQUENCER_H
 …
 /** version of the sequencer */
 #define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 2)
+#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 3)
 /**
 …
 #define SNDRV_SEQ_PRIORITY_MASK         (1<<4)
+#define SNDRV_SEQ_EVENT_UMP             (1<<5)  /* event holds a UMP packet */
         /* note event */
 …
 #endif
+union snd_seq_event_data { /* event data... */
+        struct snd_seq_ev_note note;
+        struct snd_seq_ev_ctrl control;
+        struct snd_seq_ev_raw8 raw8;
+        struct snd_seq_ev_raw32 raw32;
+        struct snd_seq_ev_ext ext;
+        struct snd_seq_ev_queue_control queue;
+        union snd_seq_timestamp time;
+        struct snd_seq_addr addr;
+        struct snd_seq_connect connect;
+        struct snd_seq_result result;
+        struct snd_seq_ev_quote quote;
+};
         /* sequencer event */
 …
         union snd_seq_timestamp time;   /* schedule time */
         struct snd_seq_addr source;     /* source address */
         struct snd_seq_addr dest;       /* destination address */
+        union {                         /* event data... */
+                struct snd_seq_ev_note note;
+                struct snd_seq_ev_ctrl control;
+                struct snd_seq_ev_raw8 raw8;
+                struct snd_seq_ev_raw32 raw32;
+                struct snd_seq_ev_ext ext;
+                struct snd_seq_ev_queue_control queue;
+                union snd_seq_timestamp time;
+                struct snd_seq_addr addr;
+                struct snd_seq_connect connect;
+                struct snd_seq_result result;
+                struct snd_seq_ev_quote quote;
+        } data;
+};
+        union snd_seq_event_data data;
+};
+        /* (compatible) event for UMP-capable clients */
+struct snd_seq_ump_event {
+        snd_seq_event_type_t type;      /* event type */
+        unsigned char flags;            /* event flags */
+        char tag;
+        unsigned char queue;            /* schedule queue */
+        union snd_seq_timestamp time;   /* schedule time */
+        struct snd_seq_addr source;     /* source address */
+        struct snd_seq_addr dest;       /* destination address */
+        union {
+                union snd_seq_event_data data;
+                unsigned int ump[4];
+        };
+};
 /*
 …
         /* event filter flags */
+#define SNDRV_SEQ_FILTER_BROADCAST      (1<<0)  /* accept broadcast messages */
+#define SNDRV_SEQ_FILTER_MULTICAST      (1<<1)  /* accept multicast messages */
+#define SNDRV_SEQ_FILTER_BOUNCE         (1<<2)  /* accept bounce event in error */
+#define SNDRV_SEQ_FILTER_USE_EVENT      (1<<31) /* use event filter */
+#define SNDRV_SEQ_FILTER_BROADCAST      (1U<<0) /* accept broadcast messages */
+#define SNDRV_SEQ_FILTER_MULTICAST      (1U<<1) /* accept multicast messages */
+#define SNDRV_SEQ_FILTER_BOUNCE         (1U<<2) /* accept bounce event in error */
+#define SNDRV_SEQ_FILTER_NO_CONVERT     (1U<<30) /* don't convert UMP events */
+#define SNDRV_SEQ_FILTER_USE_EVENT      (1U<<31)        /* use event filter */
 struct snd_seq_client_info {
 …
         int card;                       /* RO: card number[kernel] */
         int pid;                        /* RO: pid[user] */
+        char reserved[56];              /* for future use */
+};
+        unsigned int midi_version;      /* MIDI version */
+        unsigned int group_filter;      /* UMP group filter bitmap
+                                         * (bit 0 = groupless messages,
+                                         *  bit 1-16 = messages for groups 1-16)
+                                         */
+        char reserved[48];              /* for future use */
+};
+/* MIDI version numbers in client info */
+#define SNDRV_SEQ_CLIENT_LEGACY_MIDI            0       /* Legacy client */
+#define SNDRV_SEQ_CLIENT_UMP_MIDI_1_0           1       /* UMP MIDI 1.0 */
+#define SNDRV_SEQ_CLIENT_UMP_MIDI_2_0           2       /* UMP MIDI 2.0 */
 /* client pool size */
 …
 #define SNDRV_SEQ_PORT_CAP_SUBS_WRITE   (1<<6)  /* allow write subscription */
 #define SNDRV_SEQ_PORT_CAP_NO_EXPORT    (1<<7)  /* routing not allowed */
+#define SNDRV_SEQ_PORT_CAP_INACTIVE     (1<<8)  /* inactive port */
+#define SNDRV_SEQ_PORT_CAP_UMP_ENDPOINT (1<<9)  /* MIDI 2.0 UMP Endpoint port */
         /* port type */
 …
 #define SNDRV_SEQ_PORT_TYPE_MIDI_MT32   (1<<5)  /* MT-32 compatible device */
 #define SNDRV_SEQ_PORT_TYPE_MIDI_GM2    (1<<6)  /* General MIDI 2 compatible device */
+#define SNDRV_SEQ_PORT_TYPE_MIDI_UMP    (1<<7)  /* UMP */
 /* other standards...*/
 …
 #define SNDRV_SEQ_PORT_FLG_TIME_REAL    (1<<2)
+/* port direction */
+#define SNDRV_SEQ_PORT_DIR_UNKNOWN      0
+#define SNDRV_SEQ_PORT_DIR_INPUT        1
+#define SNDRV_SEQ_PORT_DIR_OUTPUT       2
+#define SNDRV_SEQ_PORT_DIR_BIDIRECTION  3
 struct snd_seq_port_info {
         struct snd_seq_addr addr;       /* client/port numbers */
 …
         unsigned int flags;             /* misc. conditioning */
         unsigned char time_queue;       /* queue # for timestamping */
+        char reserved[59];              /* for future use */
+        unsigned char direction;        /* port usage direction (r/w/bidir) */
+        unsigned char ump_group;        /* 0 = UMP EP (no conversion), 1-16 = UMP group number */
+        char reserved[57];              /* for future use */
 };
 …
 };
+/*
+ * UMP-specific information
+ */
+/* type of UMP info query */
+#define SNDRV_SEQ_CLIENT_UMP_INFO_ENDPOINT      0
+#define SNDRV_SEQ_CLIENT_UMP_INFO_BLOCK         1
+struct snd_seq_client_ump_info {
+        int client;                     /* client number to inquire/set */
+        int type;                       /* type to inquire/set */
+        unsigned char info[512];        /* info (either UMP ep or block info) */
+} __packed;
 /*
 …
 #define SNDRV_SEQ_IOCTL_SYSTEM_INFO     _IOWR('S', 0x02, struct snd_seq_system_info)
 #define SNDRV_SEQ_IOCTL_RUNNING_MODE    _IOWR('S', 0x03, struct snd_seq_running_info)
+#define SNDRV_SEQ_IOCTL_USER_PVERSION   _IOW('S', 0x04, int)
 #define SNDRV_SEQ_IOCTL_GET_CLIENT_INFO _IOWR('S', 0x10, struct snd_seq_client_info)
 #define SNDRV_SEQ_IOCTL_SET_CLIENT_INFO _IOW ('S', 0x11, struct snd_seq_client_info)
+#define SNDRV_SEQ_IOCTL_GET_CLIENT_UMP_INFO     _IOWR('S', 0x12, struct snd_seq_client_ump_info)
+#define SNDRV_SEQ_IOCTL_SET_CLIENT_UMP_INFO     _IOWR('S', 0x13, struct snd_seq_client_ump_info)
 #define SNDRV_SEQ_IOCTL_CREATE_PORT     _IOWR('S', 0x20, struct snd_seq_port_info)

GPL/trunk/alsa-kernel/include/uapi/sound/asoc.h

-              r695
+              r772
  * Copyright (C) 2012 Texas Instruments Inc.
  * Copyright (C) 2015 Intel Corporation.
+ *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ *
  * Simple file API to load FW that includes mixers, coefficients, DAPM graphs,
 …
         __le32 num_elems;       /* number of elements in array */
         union {
                 struct snd_soc_tplg_vendor_uuid_elem uuid[0];
                 struct snd_soc_tplg_vendor_value_elem value[0];
                 struct snd_soc_tplg_vendor_string_elem string[0];
+                __DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_uuid_elem, uuid);
+                __DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_value_elem, value);
+                __DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_string_elem, string);
         };
 } __attribute__((packed));
 …
         __le32 size;    /* in bytes of private data */
         union {
                 char data[0];
                 struct snd_soc_tplg_vendor_array array[0];
+                __DECLARE_FLEX_ARRAY(char, data);
+                __DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_array, array);
         };
 } __attribute__((packed));

GPL/trunk/alsa-kernel/include/uapi/sound/asound.h

-              r717
+              r772
  *  Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
  *                             Abramo Bagnara <abramo@alsa-project.org>
+ *
+ *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
+ *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
+ *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
  */
 …
 #ifndef __bitwise
 #define __bitwise
+#endif
+#ifndef __packed
+#define __packed
 #endif
 …
 #define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
 #define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
+/*
+ * For S32/U32 formats, 'msbits' hardware parameter is often used to deliver information about the
+ * available bit count in most significant bit. It's for the case of so-called 'left-justified' or
+ * `right-padding` sample which has less width than 32 bit.
+ */
 #define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
 #define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
 …
 #define SNDRV_PCM_INFO_BATCH            0x00000010      /* double buffering */
 #define SNDRV_PCM_INFO_SYNC_APPLPTR     0x00000020      /* need the explicit sync of appl_ptr update */
+#define SNDRV_PCM_INFO_PERFECT_DRAIN    0x00000040      /* silencing at the end of stream is not required */
 #define SNDRV_PCM_INFO_INTERLEAVED      0x00000100      /* channels are interleaved */
 #define SNDRV_PCM_INFO_NONINTERLEAVED   0x00000200      /* channels are not interleaved */
 …
 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000  /* report synchronized audio/system time */
 #define SNDRV_PCM_INFO_EXPLICIT_SYNC    0x10000000      /* needs explicit sync of pointers and data */
+#define SNDRV_PCM_INFO_NO_REWINDS       0x20000000      /* hardware can only support monotonic changes of appl_ptr */
 #define SNDRV_PCM_INFO_DRAIN_TRIGGER    0x40000000              /* internal kernel flag - trigger in drain */
 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES   0x80000000      /* internal kernel flag - FIFO size is in frames */
 …
 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER       (1<<1)  /* export buffer */
 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP    (1<<2)  /* disable period wakeups */
+#define SNDRV_PCM_HW_PARAMS_NO_DRAIN_SILENCE    (1<<3)  /* suppress drain with the filling
+                                                         * of the silence samples
+                                                         */
 struct snd_interval {
 …
         snd_pcm_uframes_t xfer_align;           /* obsolete: xfer size need to be a multiple */
         snd_pcm_uframes_t start_threshold;      /* min hw_avail frames for automatic start */
+        snd_pcm_uframes_t stop_threshold;       /* min avail frames for automatic stop */
+        snd_pcm_uframes_t silence_threshold;    /* min distance from noise for silence filling */
+        snd_pcm_uframes_t silence_size;         /* silence block size */
+        /*
+         * The following two thresholds alleviate playback buffer underruns; when
+         * hw_avail drops below the threshold, the respective action is triggered:
+         */
+        snd_pcm_uframes_t stop_threshold;       /* - stop playback */
+        snd_pcm_uframes_t silence_threshold;    /* - pre-fill buffer with silence */
+        snd_pcm_uframes_t silence_size;         /* max size of silence pre-fill; when >= boundary,
+                                                 * fill played area with silence immediately */
         snd_pcm_uframes_t boundary;             /* pointers wrap point */
         unsigned int proto;                     /* protocol version */
 …
         __pad_before_uframe __pad1;
         snd_pcm_uframes_t appl_ptr;      /* RW: appl ptr (0...boundary-1) */
+        __pad_before_uframe __pad2;
+        __pad_before_uframe __pad2;      // This should be __pad_after_uframe, but binary
+                                         // backwards compatibility constraints prevent a fix.
         __pad_before_uframe __pad3;
 …
  */
 #define SNDRV_RAWMIDI_VERSION           SNDRV_PROTOCOL_VERSION(2, 0, 2)
+#define SNDRV_RAWMIDI_VERSION           SNDRV_PROTOCOL_VERSION(2, 0, 4)
 enum {
 …
 #define SNDRV_RAWMIDI_INFO_INPUT                0x00000002
 #define SNDRV_RAWMIDI_INFO_DUPLEX               0x00000004
+#define SNDRV_RAWMIDI_INFO_UMP                  0x00000008
 struct snd_rawmidi_info {
 …
 #endif
+/* UMP EP info flags */
+#define SNDRV_UMP_EP_INFO_STATIC_BLOCKS         0x01
+/* UMP EP Protocol / JRTS capability bits */
+#define SNDRV_UMP_EP_INFO_PROTO_MIDI_MASK       0x0300
+#define SNDRV_UMP_EP_INFO_PROTO_MIDI1           0x0100 /* MIDI 1.0 */
+#define SNDRV_UMP_EP_INFO_PROTO_MIDI2           0x0200 /* MIDI 2.0 */
+#define SNDRV_UMP_EP_INFO_PROTO_JRTS_MASK       0x0003
+#define SNDRV_UMP_EP_INFO_PROTO_JRTS_TX         0x0001 /* JRTS Transmit */
+#define SNDRV_UMP_EP_INFO_PROTO_JRTS_RX         0x0002 /* JRTS Receive */
+/* UMP Endpoint information */
+struct snd_ump_endpoint_info {
+        int card;                       /* card number */
+        int device;                     /* device number */
+        unsigned int flags;             /* additional info */
+        unsigned int protocol_caps;     /* protocol capabilities */
+        unsigned int protocol;          /* current protocol */
+        unsigned int num_blocks;        /* # of function blocks */
+        unsigned short version;         /* UMP major/minor version */
+        unsigned short family_id;       /* MIDI device family ID */
+        unsigned short model_id;        /* MIDI family model ID */
+        unsigned int manufacturer_id;   /* MIDI manufacturer ID */
+        unsigned char sw_revision[4];   /* software revision */
+        unsigned short padding;
+        unsigned char name[128];        /* endpoint name string */
+        unsigned char product_id[128];  /* unique product id string */
+        unsigned char reserved[32];
+} __packed;
+/* UMP direction */
+#define SNDRV_UMP_DIR_INPUT             0x01
+#define SNDRV_UMP_DIR_OUTPUT            0x02
+#define SNDRV_UMP_DIR_BIDIRECTION       0x03
+/* UMP block info flags */
+#define SNDRV_UMP_BLOCK_IS_MIDI1        (1U << 0) /* MIDI 1.0 port w/o restrict */
+#define SNDRV_UMP_BLOCK_IS_LOWSPEED     (1U << 1) /* 31.25Kbps B/W MIDI1 port */
+/* UMP block user-interface hint */
+#define SNDRV_UMP_BLOCK_UI_HINT_UNKNOWN         0x00
+#define SNDRV_UMP_BLOCK_UI_HINT_RECEIVER        0x01
+#define SNDRV_UMP_BLOCK_UI_HINT_SENDER          0x02
+#define SNDRV_UMP_BLOCK_UI_HINT_BOTH            0x03
+/* UMP groups and blocks */
+#define SNDRV_UMP_MAX_GROUPS            16
+#define SNDRV_UMP_MAX_BLOCKS            32
+/* UMP Block information */
+struct snd_ump_block_info {
+        int card;                       /* card number */
+        int device;                     /* device number */
+        unsigned char block_id;         /* block ID (R/W) */
+        unsigned char direction;        /* UMP direction */
+        unsigned char active;           /* Activeness */
+        unsigned char first_group;      /* first group ID */
+        unsigned char num_groups;       /* number of groups */
+        unsigned char midi_ci_version;  /* MIDI-CI support version */
+        unsigned char sysex8_streams;   /* max number of sysex8 streams */
+        unsigned char ui_hint;          /* user interface hint */
+        unsigned int flags;             /* various info flags */
+        unsigned char name[128];        /* block name string */
+        unsigned char reserved[32];
+} __packed;
 #define SNDRV_RAWMIDI_IOCTL_PVERSION    _IOR('W', 0x00, int)
 #define SNDRV_RAWMIDI_IOCTL_INFO        _IOR('W', 0x01, struct snd_rawmidi_info)
 …
 #define SNDRV_RAWMIDI_IOCTL_DROP        _IOW('W', 0x30, int)
 #define SNDRV_RAWMIDI_IOCTL_DRAIN       _IOW('W', 0x31, int)
+/* Additional ioctls for UMP rawmidi devices */
+#define SNDRV_UMP_IOCTL_ENDPOINT_INFO   _IOR('W', 0x40, struct snd_ump_endpoint_info)
+#define SNDRV_UMP_IOCTL_BLOCK_INFO      _IOR('W', 0x41, struct snd_ump_block_info)
 /*
 …
  ****************************************************************************/
 #define SNDRV_CTL_VERSION               SNDRV_PROTOCOL_VERSION(2, 0, 8)
+#define SNDRV_CTL_VERSION               SNDRV_PROTOCOL_VERSION(2, 0, 9)
 /******************** This section used in uniaud.dll interface *********************/
 …
 #define SNDRV_CTL_ELEM_ACCESS_READWRITE         (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE          (1<<2)  /* control value may be changed without a notification */
 // (1 << 3) is unused.
+/* (1 << 3) is unused. */
 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ          (1<<4)  /* TLV read is possible */
 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE         (1<<5)  /* TLV write is possible */
 …
         unsigned int length;    /* in bytes aligned to 4 */
 #ifndef TARGET_OS2
         unsigned int tlv[0];    /* first TLV */
+        unsigned int tlv[];     /* first TLV */
 #else
         unsigned int tlv[1];    /* first TLV */
 …
 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO    _IOWR('U', 0x41, struct snd_rawmidi_info)
 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
+#define SNDRV_CTL_IOCTL_UMP_NEXT_DEVICE _IOWR('U', 0x43, int)
+#define SNDRV_CTL_IOCTL_UMP_ENDPOINT_INFO _IOWR('U', 0x44, struct snd_ump_endpoint_info)
+#define SNDRV_CTL_IOCTL_UMP_BLOCK_INFO  _IOWR('U', 0x45, struct snd_ump_block_info)
 #define SNDRV_CTL_IOCTL_POWER           _IOWR('U', 0xd0, int)
 #define SNDRV_CTL_IOCTL_POWER_STATE     _IOR('U', 0xd1, int)

GPL/trunk/alsa-kernel/include/uapi/sound/asound_fm.h

-              r615
+              r772
+ *
  *  Direct FM control
+ *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
+ *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
+ *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
  */

GPL/trunk/alsa-kernel/include/uapi/sound/compress_offload.h

-              r629
+              r772
  *  Authors:    Vinod Koul <vinod.koul@linux.intel.com>
  *              Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
- *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; version 2 of the License.
+ *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *  General Public License for more details.
+ *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
  */
 #ifndef __COMPRESS_OFFLOAD_H
 …
 /**
  * enum sndrv_compress_encoder
+ * enum sndrv_compress_encoder - encoder metadata key
  * @SNDRV_COMPRESS_ENCODER_PADDING: no of samples appended by the encoder at the
  * end of the track

GPL/trunk/alsa-kernel/include/uapi/sound/compress_params.h

-              r629
+              r772
  *              Vinod Koul <vinod.koul@linux.intel.com>
+ *
- *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; version 2 of the License.
+ *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *  General Public License for more details.
+ *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
  * The definitions in this file are derived from the OpenMAX AL version 1.1
+ * and OpenMAX IL v 1.1.2 header files which contain the copyright notice below.
+ * and OpenMAX IL v 1.1.2 header files which contain the copyright notice below
+ * and are licensed under the MIT license.
+ *
  * Copyright (c) 2007-2010 The Khronos Group Inc.
+ *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and/or associated documentation files (the
- * "Materials "), to deal in the Materials without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Materials, and to
- * permit persons to whom the Materials are furnished to do so, subject to
- * the following conditions:
+ *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Materials.
+ *
- * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+ *
  */
 #ifndef __SND_COMPRESS_PARAMS_H
 …
 /**
  * struct snd_enc_vorbis
+ * struct snd_enc_vorbis - Vorbis encoder parameters
  * @quality: Sets encoding quality to n, between -1 (low) and 10 (high).
  * In the default mode of operation, the quality level is 3.
 …
 /**
  * struct snd_enc_real
+ * struct snd_enc_real - RealAudio encoder parameters
  * @quant_bits: number of coupling quantization bits in the stream
  * @start_region: coupling start region in the stream
 …
 /**
  * struct snd_enc_flac
+ * struct snd_enc_flac - FLAC encoder parameters
  * @num: serial number, valid only for OGG formats
  *      needs to be set by application

GPL/trunk/alsa-kernel/include/uapi/sound/emu10k1.h

-              r629
+              r772
  *                   Creative Labs, Inc.
  *  Definitions for EMU10K1 (SB Live!) chips
+ *
+ *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
+ *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
+ *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
  */
 #ifndef _UAPI__SOUND_EMU10K1_H
 …
  * ---- FX8010 ----
  */
-#define EMU10K1_CARD_CREATIVE                   0x00000000
-#define EMU10K1_CARD_EMUAPS                     0x00000001
 #define EMU10K1_FX8010_PCM_COUNT                8
 …
 #define iSKIP    0x0f   /* R = A (cc_reg), X (count), Y (cc_test) */
+#define LOWORD_OPX_MASK         0x000ffc00      /* Instruction operand X                        */
+#define LOWORD_OPY_MASK         0x000003ff      /* Instruction operand Y                        */
+#define HIWORD_OPCODE_MASK      0x00f00000      /* Instruction opcode                           */
+#define HIWORD_RESULT_MASK      0x000ffc00      /* Instruction result                           */
+#define HIWORD_OPA_MASK         0x000003ff      /* Instruction operand A                        */
+/* Audigy Soundcards have a different instruction format */
+#define A_LOWORD_OPX_MASK       0x007ff000
+#define A_LOWORD_OPY_MASK       0x000007ff
+#define A_HIWORD_OPCODE_MASK    0x0f000000
+#define A_HIWORD_RESULT_MASK    0x007ff000
+#define A_HIWORD_OPA_MASK       0x000007ff
 /* GPRs */
 #define FXBUS(x)        (0x00 + (x))    /* x = 0x00 - 0x0f */
 …
 #define FXBUS2(x)       (0x30 + (x))    /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bits */
                                         /* NB: 0x31 and 0x32 are shared with Center/LFE on SB live 5.1 */
+#define A_FXBUS(x)      (0x00 + (x))    /* x = 0x00 - 0x3f FX buses */
+#define A_EXTIN(x)      (0x40 + (x))    /* x = 0x00 - 0x0f physical ins */
+#define A_P16VIN(x)     (0x50 + (x))    /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */
+#define A_EXTOUT(x)     (0x60 + (x))    /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown   */
+#define A_FXBUS2(x)     (0x80 + (x))    /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */
+#define A_EMU32OUTH(x)  (0xa0 + (x))    /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" */
+#define A_EMU32OUTL(x)  (0xb0 + (x))    /* x = 0x00 - 0x0f "EMU32_OUT_01 - _0F" */
+#define A3_EMU32IN(x)   (0x160 + (x))   /* x = 0x00 - 0x1f "EMU32_IN_00 - _1F" - Only when .device = 0x0008 */
+#define A3_EMU32OUT(x)  (0x1E0 + (x))   /* x = 0x00 - 0x1f "EMU32_OUT_00 - _1F" - Only when .device = 0x0008 */
 #define C_00000000      0x40
 …
 #define GPR_IRQ         0x5a            /* IRQ register */
 #define GPR_DBAC        0x5b            /* TRAM Delay Base Address Counter */
-#define GPR(x)          (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */
-#define ITRAM_DATA(x)   (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
-#define ETRAM_DATA(x)   (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
-#define ITRAM_ADDR(x)   (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
-#define ETRAM_ADDR(x)   (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
-#define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
-#define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
-#define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
-#define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
-#define A_ITRAM_CTL(x)  (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
-#define A_ETRAM_CTL(x)  (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
-#define A_FXBUS(x)      (0x00 + (x))    /* x = 0x00 - 0x3f FX buses */
-#define A_EXTIN(x)      (0x40 + (x))    /* x = 0x00 - 0x0f physical ins */
-#define A_P16VIN(x)     (0x50 + (x))    /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */
-#define A_EXTOUT(x)     (0x60 + (x))    /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown   */
-#define A_FXBUS2(x)     (0x80 + (x))    /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */
-#define A_EMU32OUTH(x)  (0xa0 + (x))    /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" - ??? */
-#define A_EMU32OUTL(x)  (0xb0 + (x))    /* x = 0x00 - 0x0f "EMU32_OUT_1 - _F" - ??? */
-#define A3_EMU32IN(x)   (0x160 + (x))   /* x = 0x00 - 0x3f "EMU32_IN_00 - _3F" - Only when .device = 0x0008 */
-#define A3_EMU32OUT(x)  (0x1E0 + (x))   /* x = 0x00 - 0x0f "EMU32_OUT_00 - _3F" - Only when .device = 0x0008 */
-#define A_GPR(x)        (A_FXGPREGBASE + (x))
-/* cc_reg constants */
-#define CC_REG_NORMALIZED C_00000001
-#define CC_REG_BORROW   C_00000002
-#define CC_REG_MINUS    C_00000004
-#define CC_REG_ZERO     C_00000008
-#define CC_REG_SATURATE C_00000010
-#define CC_REG_NONZERO  C_00000100
-/* FX buses */
-#define FXBUS_PCM_LEFT          0x00
-#define FXBUS_PCM_RIGHT         0x01
-#define FXBUS_PCM_LEFT_REAR     0x02
-#define FXBUS_PCM_RIGHT_REAR    0x03
-#define FXBUS_MIDI_LEFT         0x04
-#define FXBUS_MIDI_RIGHT        0x05
-#define FXBUS_PCM_CENTER        0x06
-#define FXBUS_PCM_LFE           0x07
-#define FXBUS_PCM_LEFT_FRONT    0x08
-#define FXBUS_PCM_RIGHT_FRONT   0x09
-#define FXBUS_MIDI_REVERB       0x0c
-#define FXBUS_MIDI_CHORUS       0x0d
-#define FXBUS_PCM_LEFT_SIDE     0x0e
-#define FXBUS_PCM_RIGHT_SIDE    0x0f
-#define FXBUS_PT_LEFT           0x14
-#define FXBUS_PT_RIGHT          0x15
-/* Inputs */
-#define EXTIN_AC97_L       0x00 /* AC'97 capture channel - left */
-#define EXTIN_AC97_R       0x01 /* AC'97 capture channel - right */
-#define EXTIN_SPDIF_CD_L   0x02 /* internal S/PDIF CD - onboard - left */
-#define EXTIN_SPDIF_CD_R   0x03 /* internal S/PDIF CD - onboard - right */
-#define EXTIN_ZOOM_L       0x04 /* Zoom Video I2S - left */
-#define EXTIN_ZOOM_R       0x05 /* Zoom Video I2S - right */
-#define EXTIN_TOSLINK_L    0x06 /* LiveDrive - TOSLink Optical - left */
-#define EXTIN_TOSLINK_R    0x07 /* LiveDrive - TOSLink Optical - right */
-#define EXTIN_LINE1_L      0x08 /* LiveDrive - Line/Mic 1 - left */
-#define EXTIN_LINE1_R      0x09 /* LiveDrive - Line/Mic 1 - right */
-#define EXTIN_COAX_SPDIF_L 0x0a /* LiveDrive - Coaxial S/PDIF - left */
-#define EXTIN_COAX_SPDIF_R 0x0b /* LiveDrive - Coaxial S/PDIF - right */
-#define EXTIN_LINE2_L      0x0c /* LiveDrive - Line/Mic 2 - left */
-#define EXTIN_LINE2_R      0x0d /* LiveDrive - Line/Mic 2 - right */
-/* Outputs */
-#define EXTOUT_AC97_L      0x00 /* AC'97 playback channel - left */
-#define EXTOUT_AC97_R      0x01 /* AC'97 playback channel - right */
-#define EXTOUT_TOSLINK_L   0x02 /* LiveDrive - TOSLink Optical - left */
-#define EXTOUT_TOSLINK_R   0x03 /* LiveDrive - TOSLink Optical - right */
-#define EXTOUT_AC97_CENTER 0x04 /* SB Live 5.1 - center */
-#define EXTOUT_AC97_LFE    0x05 /* SB Live 5.1 - LFE */
-#define EXTOUT_HEADPHONE_L 0x06 /* LiveDrive - Headphone - left */
-#define EXTOUT_HEADPHONE_R 0x07 /* LiveDrive - Headphone - right */
-#define EXTOUT_REAR_L      0x08 /* Rear channel - left */
-#define EXTOUT_REAR_R      0x09 /* Rear channel - right */
-#define EXTOUT_ADC_CAP_L   0x0a /* ADC Capture buffer - left */
-#define EXTOUT_ADC_CAP_R   0x0b /* ADC Capture buffer - right */
-#define EXTOUT_MIC_CAP     0x0c /* MIC Capture buffer */
-#define EXTOUT_AC97_REAR_L 0x0d /* SB Live 5.1 (c) 2003 - Rear Left */
-#define EXTOUT_AC97_REAR_R 0x0e /* SB Live 5.1 (c) 2003 - Rear Right */
-#define EXTOUT_ACENTER     0x11 /* Analog Center */
-#define EXTOUT_ALFE        0x12 /* Analog LFE */
-/* Audigy Inputs */
-#define A_EXTIN_AC97_L          0x00    /* AC'97 capture channel - left */
-#define A_EXTIN_AC97_R          0x01    /* AC'97 capture channel - right */
-#define A_EXTIN_SPDIF_CD_L      0x02    /* digital CD left */
-#define A_EXTIN_SPDIF_CD_R      0x03    /* digital CD left */
-#define A_EXTIN_OPT_SPDIF_L     0x04    /* audigy drive Optical SPDIF - left */
-#define A_EXTIN_OPT_SPDIF_R     0x05    /*                              right */
-#define A_EXTIN_LINE2_L         0x08    /* audigy drive line2/mic2 - left */
-#define A_EXTIN_LINE2_R         0x09    /*                           right */
-#define A_EXTIN_ADC_L           0x0a    /* Philips ADC - left */
-#define A_EXTIN_ADC_R           0x0b    /*               right */
-#define A_EXTIN_AUX2_L          0x0c    /* audigy drive aux2 - left */
-#define A_EXTIN_AUX2_R          0x0d    /*                   - right */
-/* Audigiy Outputs */
-#define A_EXTOUT_FRONT_L        0x00    /* digital front left */
-#define A_EXTOUT_FRONT_R        0x01    /*               right */
-#define A_EXTOUT_CENTER         0x02    /* digital front center */
-#define A_EXTOUT_LFE            0x03    /* digital front lfe */
-#define A_EXTOUT_HEADPHONE_L    0x04    /* headphone audigy drive left */
-#define A_EXTOUT_HEADPHONE_R    0x05    /*                        right */
-#define A_EXTOUT_REAR_L         0x06    /* digital rear left */
-#define A_EXTOUT_REAR_R         0x07    /*              right */
-#define A_EXTOUT_AFRONT_L       0x08    /* analog front left */
-#define A_EXTOUT_AFRONT_R       0x09    /*              right */
-#define A_EXTOUT_ACENTER        0x0a    /* analog center */
-#define A_EXTOUT_ALFE           0x0b    /* analog LFE */
-#define A_EXTOUT_ASIDE_L        0x0c    /* analog side left  - Audigy 2 ZS */
-#define A_EXTOUT_ASIDE_R        0x0d    /*             right - Audigy 2 ZS */
-#define A_EXTOUT_AREAR_L        0x0e    /* analog rear left */
-#define A_EXTOUT_AREAR_R        0x0f    /*             right */
-#define A_EXTOUT_AC97_L         0x10    /* AC97 left (front) */
-#define A_EXTOUT_AC97_R         0x11    /*      right */
-#define A_EXTOUT_ADC_CAP_L      0x16    /* ADC capture buffer left */
-#define A_EXTOUT_ADC_CAP_R      0x17    /*                    right */
-#define A_EXTOUT_MIC_CAP        0x18    /* Mic capture buffer */
 /* Audigy constants */
 …
 #define A_GPR_DBACE     0xde            /* TRAM Delay Base Address Counter - external */
+/* definitions for debug register */
+/* Each FX general purpose register is 32 bits in length, all bits are used                     */
+#define FXGPREGBASE             0x100           /* FX general purpose registers base            */
+#define A_FXGPREGBASE           0x400           /* Audigy GPRs, 0x400 to 0x5ff                  */
+#define A_TANKMEMCTLREGBASE     0x100           /* Tank memory control registers base - only for Audigy */
+#define A_TANKMEMCTLREG_MASK    0x1f            /* only 5 bits used - only for Audigy */
+/* Tank audio data is logarithmically compressed down to 16 bits before writing to TRAM and is  */
+/* decompressed back to 20 bits on a read.  There are a total of 160 locations, the last 32     */
+/* locations are for external TRAM.                                                             */
+#define TANKMEMDATAREGBASE      0x200           /* Tank memory data registers base              */
+#define TANKMEMDATAREG_MASK     0x000fffff      /* 20 bit tank audio data field                 */
+/* Combined address field and memory opcode or flag field.  160 locations, last 32 are external */
+#define TANKMEMADDRREGBASE      0x300           /* Tank memory address registers base           */
+#define TANKMEMADDRREG_ADDR_MASK 0x000fffff     /* 20 bit tank address field                    */
+#define TANKMEMADDRREG_CLEAR    0x00800000      /* Clear tank memory                            */
+#define TANKMEMADDRREG_ALIGN    0x00400000      /* Align read or write relative to tank access  */
+#define TANKMEMADDRREG_WRITE    0x00200000      /* Write to tank memory                         */
+#define TANKMEMADDRREG_READ     0x00100000      /* Read from tank memory                        */
+#define GPR(x)          (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */
+#define ITRAM_DATA(x)   (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
+#define ETRAM_DATA(x)   (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
+#define ITRAM_ADDR(x)   (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
+#define ETRAM_ADDR(x)   (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
+#define A_GPR(x)        (A_FXGPREGBASE + (x))
+#define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
+#define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
+#define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
+#define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
+#define A_ITRAM_CTL(x)  (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
+#define A_ETRAM_CTL(x)  (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
+/* cc_reg constants */
+#define CC_REG_NORMALIZED C_00000001
+#define CC_REG_BORROW   C_00000002
+#define CC_REG_MINUS    C_00000004
+#define CC_REG_ZERO     C_00000008
+#define CC_REG_SATURATE C_00000010
+#define CC_REG_NONZERO  C_00000100
+#define A_CC_REG_NORMALIZED     A_C_00000001
+#define A_CC_REG_BORROW         A_C_00000002
+#define A_CC_REG_MINUS          A_C_00000004
+#define A_CC_REG_ZERO           A_C_00000008
+#define A_CC_REG_SATURATE       A_C_00000010
+#define A_CC_REG_NONZERO        A_C_00000100
+/* FX buses */
+// These are arbitrary mappings; our DSP code simply expects
+// the config files to route the channels this way.
+// The numbers are documented in {audigy,sb-live}-mixer.rst.
+#define FXBUS_PCM_LEFT          0x00
+#define FXBUS_PCM_RIGHT         0x01
+#define FXBUS_PCM_LEFT_REAR     0x02
+#define FXBUS_PCM_RIGHT_REAR    0x03
+#define FXBUS_MIDI_LEFT         0x04
+#define FXBUS_MIDI_RIGHT        0x05
+#define FXBUS_PCM_CENTER        0x06
+#define FXBUS_PCM_LFE           0x07
+#define FXBUS_PCM_LEFT_FRONT    0x08
+#define FXBUS_PCM_RIGHT_FRONT   0x09
+#define FXBUS_MIDI_REVERB       0x0c
+#define FXBUS_MIDI_CHORUS       0x0d
+#define FXBUS_PCM_LEFT_SIDE     0x0e
+#define FXBUS_PCM_RIGHT_SIDE    0x0f
+#define FXBUS_PT_LEFT           0x14
+#define FXBUS_PT_RIGHT          0x15
+/* Inputs */
+#define EXTIN_AC97_L       0x00 /* AC'97 capture channel - left */
+#define EXTIN_AC97_R       0x01 /* AC'97 capture channel - right */
+#define EXTIN_SPDIF_CD_L   0x02 /* internal S/PDIF CD - onboard - left */
+#define EXTIN_SPDIF_CD_R   0x03 /* internal S/PDIF CD - onboard - right */
+#define EXTIN_ZOOM_L       0x04 /* Zoom Video I2S - left */
+#define EXTIN_ZOOM_R       0x05 /* Zoom Video I2S - right */
+#define EXTIN_TOSLINK_L    0x06 /* LiveDrive - TOSLink Optical - left */
+#define EXTIN_TOSLINK_R    0x07 /* LiveDrive - TOSLink Optical - right */
+#define EXTIN_LINE1_L      0x08 /* LiveDrive - Line/Mic 1 - left */
+#define EXTIN_LINE1_R      0x09 /* LiveDrive - Line/Mic 1 - right */
+#define EXTIN_COAX_SPDIF_L 0x0a /* LiveDrive - Coaxial S/PDIF - left */
+#define EXTIN_COAX_SPDIF_R 0x0b /* LiveDrive - Coaxial S/PDIF - right */
+#define EXTIN_LINE2_L      0x0c /* LiveDrive - Line/Mic 2 - left */
+#define EXTIN_LINE2_R      0x0d /* LiveDrive - Line/Mic 2 - right */
+/* Outputs */
+#define EXTOUT_AC97_L      0x00 /* AC'97 playback channel - left */
+#define EXTOUT_AC97_R      0x01 /* AC'97 playback channel - right */
+#define EXTOUT_TOSLINK_L   0x02 /* LiveDrive - TOSLink Optical - left */
+#define EXTOUT_TOSLINK_R   0x03 /* LiveDrive - TOSLink Optical - right */
+#define EXTOUT_AC97_CENTER 0x04 /* SB Live 5.1 - center */
+#define EXTOUT_AC97_LFE    0x05 /* SB Live 5.1 - LFE */
+#define EXTOUT_HEADPHONE_L 0x06 /* LiveDrive - Headphone - left */
+#define EXTOUT_HEADPHONE_R 0x07 /* LiveDrive - Headphone - right */
+#define EXTOUT_REAR_L      0x08 /* Rear channel - left */
+#define EXTOUT_REAR_R      0x09 /* Rear channel - right */
+#define EXTOUT_ADC_CAP_L   0x0a /* ADC Capture buffer - left */
+#define EXTOUT_ADC_CAP_R   0x0b /* ADC Capture buffer - right */
+#define EXTOUT_MIC_CAP     0x0c /* MIC Capture buffer */
+#define EXTOUT_AC97_REAR_L 0x0d /* SB Live 5.1 (c) 2003 - Rear Left */
+#define EXTOUT_AC97_REAR_R 0x0e /* SB Live 5.1 (c) 2003 - Rear Right */
+#define EXTOUT_ACENTER     0x11 /* Analog Center */
+#define EXTOUT_ALFE        0x12 /* Analog LFE */
+/* Audigy Inputs */
+#define A_EXTIN_AC97_L          0x00    /* AC'97 capture channel - left */
+#define A_EXTIN_AC97_R          0x01    /* AC'97 capture channel - right */
+#define A_EXTIN_SPDIF_CD_L      0x02    /* digital CD left */
+#define A_EXTIN_SPDIF_CD_R      0x03    /* digital CD left */
+#define A_EXTIN_OPT_SPDIF_L     0x04    /* audigy drive Optical SPDIF - left */
+#define A_EXTIN_OPT_SPDIF_R     0x05    /*                              right */
+#define A_EXTIN_LINE2_L         0x08    /* audigy drive line2/mic2 - left */
+#define A_EXTIN_LINE2_R         0x09    /*                           right */
+#define A_EXTIN_ADC_L           0x0a    /* Philips ADC - left */
+#define A_EXTIN_ADC_R           0x0b    /*               right */
+#define A_EXTIN_AUX2_L          0x0c    /* audigy drive aux2 - left */
+#define A_EXTIN_AUX2_R          0x0d    /*                   - right */
+/* Audigiy Outputs */
+#define A_EXTOUT_FRONT_L        0x00    /* digital front left */
+#define A_EXTOUT_FRONT_R        0x01    /*               right */
+#define A_EXTOUT_CENTER         0x02    /* digital front center */
+#define A_EXTOUT_LFE            0x03    /* digital front lfe */
+#define A_EXTOUT_HEADPHONE_L    0x04    /* headphone audigy drive left */
+#define A_EXTOUT_HEADPHONE_R    0x05    /*                        right */
+#define A_EXTOUT_REAR_L         0x06    /* digital rear left */
+#define A_EXTOUT_REAR_R         0x07    /*              right */
+#define A_EXTOUT_AFRONT_L       0x08    /* analog front left */
+#define A_EXTOUT_AFRONT_R       0x09    /*              right */
+#define A_EXTOUT_ACENTER        0x0a    /* analog center */
+#define A_EXTOUT_ALFE           0x0b    /* analog LFE */
+#define A_EXTOUT_ASIDE_L        0x0c    /* analog side left  - Audigy 2 ZS */
+#define A_EXTOUT_ASIDE_R        0x0d    /*             right - Audigy 2 ZS */
+#define A_EXTOUT_AREAR_L        0x0e    /* analog rear left */
+#define A_EXTOUT_AREAR_R        0x0f    /*             right */
+#define A_EXTOUT_AC97_L         0x10    /* AC97 left (front) */
+#define A_EXTOUT_AC97_R         0x11    /*      right */
+#define A_EXTOUT_ADC_CAP_L      0x16    /* ADC capture buffer left */
+#define A_EXTOUT_ADC_CAP_R      0x17    /*                    right */
+#define A_EXTOUT_MIC_CAP        0x18    /* Mic capture buffer */
+/* Definitions for debug register. Note that these are for emu10k1 ONLY. */
 #define EMU10K1_DBG_ZC                  0x80000000      /* zero tram counter */
 #define EMU10K1_DBG_SATURATION_OCCURED  0x02000000      /* saturation control */
 …
 #define EMU10K1_DBG_SINGLE_STEP_ADDR    0x000001ff      /* single step address */
 /* tank memory address line */
 #ifndef __KERNEL__
 #define TANKMEMADDRREG_ADDR_MASK 0x000fffff     /* 20 bit tank address field                    */
 #define TANKMEMADDRREG_CLEAR     0x00800000     /* Clear tank memory                            */
 #define TANKMEMADDRREG_ALIGN     0x00400000     /* Align read or write relative to tank access  */
 #define TANKMEMADDRREG_WRITE     0x00200000     /* Write to tank memory                         */
 #define TANKMEMADDRREG_READ      0x00100000     /* Read from tank memory                        */
 #endif
+/* Definitions for emu10k2 debug register. */
+#define A_DBG_ZC                        0x40000000      /* zero tram counter */
+#define A_DBG_SATURATION_OCCURED        0x20000000
+#define A_DBG_SATURATION_ADDR           0x0ffc0000
+#define A_DBG_SINGLE_STEP               0x00020000      /* Set to zero to start dsp */
+#define A_DBG_STEP                      0x00010000
+#define A_DBG_CONDITION_CODE            0x0000f800
+#define A_DBG_STEP_ADDR                 0x000003ff
 struct snd_emu10k1_fx8010_info {
 …
 #define EMU10K1_GPR_TRANSLATION_TREBLE          3
 #define EMU10K1_GPR_TRANSLATION_ONOFF           4
+#define EMU10K1_GPR_TRANSLATION_NEGATE          5
+#define EMU10K1_GPR_TRANSLATION_NEG_TABLE100    6
 enum emu10k1_ctl_elem_iface {
 …
         unsigned int count;             /* count of GPR (1..16) */
         unsigned short gpr[32];         /* GPR number(s) */
         unsigned int value[32];         /* initial values */
         unsigned int min;               /* minimum range */
         unsigned int max;               /* maximum range */
+        int value[32];                  /* initial values */
+        int min;                        /* minimum range */
+        int max;                        /* maximum range */
         unsigned int translation;       /* translation type (EMU10K1_GPR_TRANSLATION*) */
         const unsigned int *tlv;

GPL/trunk/alsa-kernel/include/uapi/sound/tlv.h

-              r615
+              r772
 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
-/*
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
+ *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- */
 #ifndef __UAPI_SOUND_TLV_H

/GPL/branches/uniaud32-6.6-LTS (added)	merged: 765,768-769
/GPL/branches/uniaud32-exp (added)	merged: 735-741,743-744,748-751,753-760,762-764
/GPL/branches/uniaud32-next	merged: 718-734

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