Changeset 772 for GPL/trunk/alsa-kernel/include/sound/hdaudio.h

Timestamp:

Apr 19, 2025, 8:08:37 PM (4 months ago)

Author:

David Azarewicz

Message:

Merge in changes from 6.6-LTS branch.
Fixed additional 25+ problems.

Location:

GPL/trunk

Files:

• . (modified) (1 prop)
• alsa-kernel/include/sound/hdaudio.h (modified) (12 diffs)

GPL/trunk/alsa-kernel/include/sound/hdaudio.h

@@ -10 +10 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/iopoll.h>
+#include <linux/pci.h>
 #include <linux/pm_runtime.h>
 #include <linux/timecounter.h>
@@ -93 +96 @@
         bool caps_overwriting:1; /* caps overwrite being in process */
         bool cache_coef:1;      /* cache COEF read/write too */
+        unsigned int registered:1; /* codec was registered */
 };
 
@@ -121 +125 @@
 void snd_hdac_device_unregister(struct hdac_device *codec);
 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
-int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
+int snd_hdac_codec_modalias(const struct hdac_device *hdac, char *buf, size_t size);
 
 int snd_hdac_refresh_widgets(struct hdac_device *codec);
@@ -356 +360 @@
         bool polling_mode:1;
         bool needs_damn_long_delay:1;
+        bool not_use_interrupts:1;      /* prohibiting the RIRB IRQ */
+        bool access_sdnctl_in_dword:1;  /* accessing the sdnctl register by dword */
 
         int poll_count;
@@ -460 +466 @@
 #define snd_hdac_reg_writel(bus, addr, val)     writel(val, addr)
 #define snd_hdac_reg_readl(bus, addr)   readl(addr)
+#define snd_hdac_reg_writeq(bus, addr, val)     writeq(val, addr)
+#define snd_hdac_reg_readq(bus, addr)           readq(addr)
 
 /*
@@ -502 +510 @@
                              (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
 
+/* update register macro */
+#define snd_hdac_updatel(addr, reg, mask, val)          \
+        writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg)
+
+#define snd_hdac_updatew(addr, reg, mask, val)          \
+        writew(((readw(addr + reg) & ~(mask)) | (val)), addr + reg)
+
 /*
  * HD-audio stream
@@ -521 +536 @@
 
         void __iomem *sd_addr;  /* stream descriptor pointer */
+
+        void __iomem *spib_addr; /* software position in buffers stream pointer */
+        void __iomem *fifo_addr; /* software position Max fifos stream pointer */
+
+        void __iomem *dpibr_addr; /* DMA position in buffer resume pointer */
+        u32 dpib;               /* DMA position in buffer */
+        u32 lpib;               /* Linear position in buffer */
 
         u32 sd_int_sta_mask;    /* stream int status mask */
@@ -561 +583 @@
 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
                                            struct snd_pcm_substream *substream);
+void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev);
 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
@@ -570 +593 @@
 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
                                 unsigned int format_val);
-void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
-void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
+void snd_hdac_stream_start(struct hdac_stream *azx_dev);
 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
+void snd_hdac_stop_streams(struct hdac_bus *bus);
+void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
@@ -582 +606 @@
 int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
                                 struct snd_pcm_substream *substream);
+
+void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip,
+                                   bool enable, int index);
+int snd_hdac_stream_set_spib(struct hdac_bus *bus,
+                             struct hdac_stream *azx_dev, u32 value);
+int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
+                                   struct hdac_stream *azx_dev);
+void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
+                                 bool enable, int index);
+int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev);
+int snd_hdac_stream_set_dpibr(struct hdac_bus *bus,
+                              struct hdac_stream *azx_dev, u32 value);
+int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value);
 
 /*
@@ -599 +636 @@
 #define snd_hdac_stream_readb(dev, reg) \
         snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
+#define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \
+        read_poll_timeout_atomic(snd_hdac_reg_readb, val, cond, delay_us, timeout_us, \
+                                 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
+#define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \
+        read_poll_timeout_atomic(snd_hdac_reg_readl, val, cond, delay_us, timeout_us, \
+                                 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
 
 /* update a register, pass without AZX_REG_ prefix */
@@ -677 +720 @@
              (ptr) = snd_array_elem(array, ++(idx)))
 
+/*
+ * Device matching
+ */
+
+#ifndef TARGET_OS2
+#define HDA_CONTROLLER_IS_HSW(pci) (pci_match_id((struct pci_device_id []){ \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_0) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_2) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_3) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BDW) }, \
+                        { } \
+                }, pci))
+
+#define HDA_CONTROLLER_IS_APL(pci) (pci_match_id((struct pci_device_id []){ \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_APL) }, \
+                        { } \
+                }, pci))
+
+#define HDA_CONTROLLER_IN_GPU(pci) (pci_match_id((struct pci_device_id []){ \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG1) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_0) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_1) }, \
+                        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_2) }, \
+                        { } \
+                }, pci) || HDA_CONTROLLER_IS_HSW(pci))
+#else
+#define HDA_CONTROLLER_IS_HSW(pci) 0
+#define HDA_CONTROLLER_IS_APL(pci) 0
+#define HDA_CONTROLLER_IN_GPU(pci) 0
+#endif
 #endif /* __SOUND_HDAUDIO_H */