Changeset 70
- Timestamp:
- Jan 14, 2006, 6:38:48 PM (20 years ago)
- Location:
- GPL/trunk/alsa-kernel/pci
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
GPL/trunk/alsa-kernel/pci/atiixp.c
r32 r70 27 27 #include <linux/pci.h> 28 28 #include <linux/slab.h> 29 #include <linux/moduleparam.h> 29 30 #include <sound/core.h> 30 31 #include <sound/pcm.h> … … 39 40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}"); 40 41 41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 44 static int ac97_clock[SNDRV_CARDS] = {48000,0,0,0,0,0,0,0}; 45 static char *ac97_quirk[SNDRV_CARDS]; 46 static int spdif_aclink[SNDRV_CARDS] = {1,1,1,1,1,1,1,1}; 47 48 //module_param_array(index, int, NULL, 0444); 42 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ 43 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 44 static int ac97_clock = 48000; 45 static char *ac97_quirk; 46 static int spdif_aclink = 1; 47 48 //module_param(index, int, 0444); 49 49 MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); 50 //module_param _array(id, charp, NULL, 0444);50 //module_param(id, charp, 0444); 51 51 MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); 52 //module_param_array(enable, bool, NULL, 0444); 53 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller."); 54 //module_param_array(ac97_clock, int, NULL, 0444); 52 //module_param(ac97_clock, int, 0444); 55 53 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); 56 //module_param _array(ac97_quirk, charp, NULL, 0444);54 //module_param(ac97_quirk, charp, 0444); 57 55 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 58 //module_param _array(spdif_aclink, bool, NULL, 0444);56 //module_param(spdif_aclink, bool, 0444); 59 57 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 58 59 /* just for backward compatibility */ 60 static int enable; 61 //module_param(enable, bool, 0444); 60 62 61 63 … … 196 198 197 199 198 /* 199 */ 200 201 typedef struct snd_atiixp atiixp_t; 202 typedef struct snd_atiixp_dma atiixp_dma_t; 203 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t; 204 200 struct atiixp; 205 201 206 202 /* … … 208 204 */ 209 205 210 typedefstruct atiixp_dma_desc {206 struct atiixp_dma_desc { 211 207 u32 addr; /* DMA buffer address */ 212 208 u16 status; /* status bits */ 213 209 u16 size; /* size of the packet in dwords */ 214 210 u32 next; /* address of the next packet descriptor */ 215 } atiixp_dma_desc_t;211 }; 216 212 217 213 /* … … 228 224 * constants and callbacks for each DMA type 229 225 */ 230 struct snd_atiixp_dma_ops {226 struct atiixp_dma_ops { 231 227 int type; /* ATI_DMA_XXX */ 232 228 unsigned int llp_offset; /* LINKPTR offset */ 233 229 unsigned int dt_cur; /* DT_CUR offset */ 234 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */ 235 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */ 236 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */ 230 /* called from open callback */ 231 void (*enable_dma)(struct atiixp *chip, int on); 232 /* called from trigger (START/STOP) */ 233 void (*enable_transfer)(struct atiixp *chip, int on); 234 /* called from trigger (STOP only) */ 235 void (*flush_dma)(struct atiixp *chip); 237 236 }; 238 237 … … 240 239 * DMA stream 241 240 */ 242 struct snd_atiixp_dma {243 const atiixp_dma_ops_t*ops;241 struct atiixp_dma { 242 const struct atiixp_dma_ops *ops; 244 243 struct snd_dma_buffer desc_buf; 245 s nd_pcm_substream_t*substream; /* assigned PCM substream */244 struct snd_pcm_substream *substream; /* assigned PCM substream */ 246 245 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ 247 246 unsigned int period_bytes, periods; 248 247 int opened; 249 250 248 int running; 249 int suspended; 251 250 int pcm_open_flag; 252 253 251 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ 252 unsigned int saved_curptr; 254 253 }; 255 254 … … 257 256 * ATI IXP chip 258 257 */ 259 struct snd_atiixp {260 s nd_card_t*card;258 struct atiixp { 259 struct snd_card *card; 261 260 struct pci_dev *pci; 262 261 … … 264 263 void __iomem *remap_addr; 265 264 int irq; 266 267 ac97_bus_t*ac97_bus;268 ac97_t*ac97[NUM_ATI_CODECS];265 266 struct snd_ac97_bus *ac97_bus; 267 struct snd_ac97 *ac97[NUM_ATI_CODECS]; 269 268 270 269 spinlock_t reg_lock; 271 270 272 atiixp_dma_tdmas[NUM_ATI_DMAS];271 struct atiixp_dma dmas[NUM_ATI_DMAS]; 273 272 struct ac97_pcm *pcms[NUM_ATI_PCMS]; 274 s nd_pcm_t*pcmdevs[NUM_ATI_PCMDEVS];273 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; 275 274 276 275 int max_channels; /* max. channels for PCM out */ … … 303 302 * return 1 if the bits changed. 304 303 */ 305 static int snd_atiixp_update_bits( atiixp_t*chip, unsigned int reg,304 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg, 306 305 unsigned int mask, unsigned int value) 307 306 { 308 void __iomem *addr = (char 307 void __iomem *addr = (char*)chip->remap_addr + reg; 309 308 unsigned int data, old_data; 310 309 old_data = data = readl(addr); … … 321 320 */ 322 321 #define atiixp_write(chip,reg,value) \ 323 writel(value, (char 322 writel(value, (char*)chip->remap_addr + ATI_REG_##reg) 324 323 #define atiixp_read(chip,reg) \ 325 readl((char 324 readl((char*)chip->remap_addr + ATI_REG_##reg) 326 325 #define atiixp_update(chip,reg,mask,val) \ 327 326 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) … … 335 334 336 335 #define ATI_DESC_LIST_SIZE \ 337 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof( atiixp_dma_desc_t))336 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) 338 337 339 338 /* … … 344 343 * a static RING of buffer descriptors is used. 345 344 * 346 * the ring is built in this function, and is set up to the hardware. 347 */ 348 static int atiixp_build_dma_packets( atiixp_t *chip, atiixp_dma_t*dma,349 snd_pcm_substream_t*substream,350 unsigned int periods,351 unsigned int period_bytes)345 * the ring is built in this function, and is set up to the hardware. 346 */ 347 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 348 struct snd_pcm_substream *substream, 349 unsigned int periods, 350 unsigned int period_bytes) 352 351 { 353 352 unsigned int i; … … 359 358 360 359 if (dma->desc_buf.area == NULL) { 361 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 362 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0) 360 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, 361 snd_dma_pci_data(chip->pci), 362 ATI_DESC_LIST_SIZE, 363 &dma->desc_buf) < 0) 363 364 return -ENOMEM; 364 365 dma->period_bytes = dma->periods = 0; /* clear */ … … 370 371 /* reset DMA before changing the descriptor table */ 371 372 spin_lock_irqsave(&chip->reg_lock, flags); 372 writel(0, (char 373 writel(0, (char*)chip->remap_addr + dma->ops->llp_offset); 373 374 dma->ops->enable_dma(chip, 0); 374 375 dma->ops->enable_dma(chip, 1); … … 379 380 desc_addr = (u32)dma->desc_buf.addr; 380 381 for (i = 0; i < periods; i++) { 381 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i]; 382 struct atiixp_dma_desc *desc; 383 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; 382 384 desc->addr = cpu_to_le32(addr); 383 385 desc->status = 0; 384 386 desc->size = period_bytes >> 2; /* in dwords */ 385 desc_addr += sizeof( atiixp_dma_desc_t);387 desc_addr += sizeof(struct atiixp_dma_desc); 386 388 if (i == periods - 1) 387 389 desc->next = cpu_to_le32((u32)dma->desc_buf.addr); … … 392 394 393 395 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 394 (char 396 (char*)chip->remap_addr + dma->ops->llp_offset); 395 397 396 398 dma->period_bytes = period_bytes; … … 403 405 * remove the ring buffer and release it if assigned 404 406 */ 405 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream) 407 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 408 struct snd_pcm_substream *substream) 406 409 { 407 410 if (dma->desc_buf.area) { 408 writel(0, (char 411 writel(0, (char*)chip->remap_addr + dma->ops->llp_offset); 409 412 snd_dma_free_pages(&dma->desc_buf); 410 413 dma->desc_buf.area = NULL; … … 415 418 * AC97 interface 416 419 */ 417 static int snd_atiixp_acquire_codec( atiixp_t*chip)420 static int snd_atiixp_acquire_codec(struct atiixp *chip) 418 421 { 419 422 int timeout = 1000; … … 429 432 } 430 433 431 static unsigned short snd_atiixp_codec_read( atiixp_t*chip, unsigned short codec, unsigned short reg)434 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg) 432 435 { 433 436 unsigned int data; … … 457 460 458 461 459 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val) 462 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec, 463 unsigned short reg, unsigned short val) 460 464 { 461 465 unsigned int data; 462 466 463 467 if (snd_atiixp_acquire_codec(chip) < 0) 464 468 return; … … 470 474 471 475 472 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg) 473 { 474 atiixp_t *chip = ac97->private_data; 475 return snd_atiixp_codec_read(chip, ac97->num, reg); 476 } 477 478 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val) 479 { 480 atiixp_t *chip = ac97->private_data; 476 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, 477 unsigned short reg) 478 { 479 struct atiixp *chip = ac97->private_data; 480 return snd_atiixp_codec_read(chip, ac97->num, reg); 481 482 } 483 484 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 485 unsigned short val) 486 { 487 struct atiixp *chip = ac97->private_data; 481 488 snd_atiixp_codec_write(chip, ac97->num, reg, val); 482 489 } … … 485 492 * reset AC link 486 493 */ 487 static int snd_atiixp_aclink_reset( atiixp_t*chip)494 static int snd_atiixp_aclink_reset(struct atiixp *chip) 488 495 { 489 496 int timeout; … … 498 505 udelay(10); 499 506 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); 500 507 501 508 timeout = 10; 502 509 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { … … 505 512 ATI_REG_CMD_AC_SYNC); 506 513 atiixp_read(chip, CMD); 507 m sleep(1);514 mdelay(1); 508 515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 509 516 if (--timeout) { … … 521 528 522 529 #ifdef CONFIG_PM 523 static int snd_atiixp_aclink_down( atiixp_t*chip)530 static int snd_atiixp_aclink_down(struct atiixp *chip) 524 531 { 525 532 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ … … 546 553 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) 547 554 548 static int snd_atiixp_codec_detect( atiixp_t*chip)555 static int snd_atiixp_codec_detect(struct atiixp *chip) 549 556 { 550 557 int timeout; … … 555 562 timeout = 50; 556 563 while (timeout-- > 0) { 557 m sleep(1);564 mdelay(1); 558 565 if (chip->codec_not_ready_bits) 559 566 break; … … 572 579 * enable DMA and irqs 573 580 */ 574 static int snd_atiixp_chip_start( atiixp_t*chip)581 static int snd_atiixp_chip_start(struct atiixp *chip) 575 582 { 576 583 unsigned int reg; … … 602 609 * disable DMA and IRQs 603 610 */ 604 static int snd_atiixp_chip_stop( atiixp_t*chip)611 static int snd_atiixp_chip_stop(struct atiixp *chip) 605 612 { 606 613 /* clear interrupt source */ … … 621 628 * correctly... 622 629 */ 623 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(s nd_pcm_substream_t*substream)624 { 625 atiixp_t*chip = snd_pcm_substream_chip(substream);626 s nd_pcm_runtime_t*runtime = substream->runtime;627 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;628 629 630 631 632 curptr = readl((char*)chip->remap_addr + dma->ops->dt_cur);633 634 635 636 637 638 639 640 641 642 630 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) 631 { 632 struct atiixp *chip = snd_pcm_substream_chip(substream); 633 struct snd_pcm_runtime *runtime = substream->runtime; 634 struct atiixp_dma *dma = runtime->private_data; 635 unsigned int curptr; 636 int timeout = 1000; 637 638 while (timeout--) { 639 curptr = readl((char*)chip->remap_addr + dma->ops->dt_cur); 640 if (curptr < dma->buf_addr) 641 continue; 642 curptr -= dma->buf_addr; 643 if (curptr >= dma->buf_bytes) 644 continue; 645 return bytes_to_frames(runtime, curptr); 646 } 647 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n", 648 readl((char*)chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); 649 return 0; 643 650 } 644 651 … … 646 653 * XRUN detected, and stop the PCM substream 647 654 */ 648 static void snd_atiixp_xrun_dma( atiixp_t *chip, atiixp_dma_t*dma)655 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma) 649 656 { 650 657 if (! dma->substream || ! dma->running) … … 657 664 * the period ack. update the substream. 658 665 */ 659 static void snd_atiixp_update_dma( atiixp_t *chip, atiixp_dma_t*dma)666 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma) 660 667 { 661 668 if (! dma->substream || ! dma->running) … … 666 673 /* set BUS_BUSY interrupt bit if any DMA is running */ 667 674 /* call with spinlock held */ 668 static void snd_atiixp_check_bus_busy( atiixp_t*chip)675 static void snd_atiixp_check_bus_busy(struct atiixp *chip) 669 676 { 670 677 unsigned int bus_busy; … … 681 688 * calling the lowlevel callbacks in it 682 689 */ 683 static int snd_atiixp_pcm_trigger(s nd_pcm_substream_t*substream, int cmd)684 { 685 atiixp_t*chip = snd_pcm_substream_chip(substream);686 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;690 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 691 { 692 struct atiixp *chip = snd_pcm_substream_chip(substream); 693 struct atiixp_dma *dma = substream->runtime->private_data; 687 694 int err = 0; 688 695 … … 691 698 spin_lock(&chip->reg_lock); 692 699 switch (cmd) { 693 694 695 700 case SNDRV_PCM_TRIGGER_START: 701 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 702 case SNDRV_PCM_TRIGGER_RESUME: 696 703 dma->ops->enable_transfer(chip, 1); 697 698 704 dma->running = 1; 705 dma->suspended = 0; 699 706 break; 700 701 702 707 case SNDRV_PCM_TRIGGER_STOP: 708 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 709 case SNDRV_PCM_TRIGGER_SUSPEND: 703 710 dma->ops->enable_transfer(chip, 0); 704 705 711 dma->running = 0; 712 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND; 706 713 break; 707 714 default: … … 728 735 729 736 /* flush FIFO of analog OUT DMA */ 730 static void atiixp_out_flush_dma( atiixp_t*chip)737 static void atiixp_out_flush_dma(struct atiixp *chip) 731 738 { 732 739 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH); … … 734 741 735 742 /* enable/disable analog OUT DMA */ 736 static void atiixp_out_enable_dma( atiixp_t*chip, int on)743 static void atiixp_out_enable_dma(struct atiixp *chip, int on) 737 744 { 738 745 unsigned int data; … … 749 756 750 757 /* start/stop transfer over OUT DMA */ 751 static void atiixp_out_enable_transfer( atiixp_t*chip, int on)758 static void atiixp_out_enable_transfer(struct atiixp *chip, int on) 752 759 { 753 760 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN, … … 756 763 757 764 /* enable/disable analog IN DMA */ 758 static void atiixp_in_enable_dma( atiixp_t*chip, int on)765 static void atiixp_in_enable_dma(struct atiixp *chip, int on) 759 766 { 760 767 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN, … … 763 770 764 771 /* start/stop analog IN DMA */ 765 static void atiixp_in_enable_transfer( atiixp_t*chip, int on)772 static void atiixp_in_enable_transfer(struct atiixp *chip, int on) 766 773 { 767 774 if (on) { … … 782 789 783 790 /* flush FIFO of analog IN DMA */ 784 static void atiixp_in_flush_dma( atiixp_t*chip)791 static void atiixp_in_flush_dma(struct atiixp *chip) 785 792 { 786 793 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH); … … 788 795 789 796 /* enable/disable SPDIF OUT DMA */ 790 static void atiixp_spdif_enable_dma( atiixp_t*chip, int on)797 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on) 791 798 { 792 799 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN, … … 795 802 796 803 /* start/stop SPDIF OUT DMA */ 797 static void atiixp_spdif_enable_transfer( atiixp_t*chip, int on)804 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on) 798 805 { 799 806 unsigned int data; … … 807 814 808 815 /* flush FIFO of SPDIF OUT DMA */ 809 static void atiixp_spdif_flush_dma( atiixp_t*chip)816 static void atiixp_spdif_flush_dma(struct atiixp *chip) 810 817 { 811 818 int timeout; … … 814 821 atiixp_spdif_enable_dma(chip, 0); 815 822 atiixp_spdif_enable_transfer(chip, 1); 816 823 817 824 timeout = 100; 818 825 do { … … 826 833 827 834 /* set up slots and formats for SPDIF OUT */ 828 static int snd_atiixp_spdif_prepare(s nd_pcm_substream_t*substream)829 { 830 atiixp_t*chip = snd_pcm_substream_chip(substream);835 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream) 836 { 837 struct atiixp *chip = snd_pcm_substream_chip(substream); 831 838 832 839 spin_lock_irq(&chip->reg_lock); … … 853 860 854 861 /* set up slots and formats for analog OUT */ 855 static int snd_atiixp_playback_prepare(s nd_pcm_substream_t*substream)856 { 857 atiixp_t*chip = snd_pcm_substream_chip(substream);862 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) 863 { 864 struct atiixp *chip = snd_pcm_substream_chip(substream); 858 865 unsigned int data; 859 866 … … 892 899 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN, 893 900 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0); 894 901 895 902 spin_unlock_irq(&chip->reg_lock); 896 903 return 0; … … 898 905 899 906 /* set up slots and formats for analog IN */ 900 static int snd_atiixp_capture_prepare(s nd_pcm_substream_t*substream)901 { 902 atiixp_t*chip = snd_pcm_substream_chip(substream);907 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) 908 { 909 struct atiixp *chip = snd_pcm_substream_chip(substream); 903 910 904 911 spin_lock_irq(&chip->reg_lock); … … 913 920 * hw_params - allocate the buffer and set up buffer descriptors 914 921 */ 915 static int snd_atiixp_pcm_hw_params(s nd_pcm_substream_t*substream,916 snd_pcm_hw_params_t*hw_params)917 { 918 atiixp_t*chip = snd_pcm_substream_chip(substream);919 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;922 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, 923 struct snd_pcm_hw_params *hw_params) 924 { 925 struct atiixp *chip = snd_pcm_substream_chip(substream); 926 struct atiixp_dma *dma = substream->runtime->private_data; 920 927 int err; 921 928 … … 951 958 } 952 959 953 static int snd_atiixp_pcm_hw_free(s nd_pcm_substream_t *substream)954 { 955 atiixp_t*chip = snd_pcm_substream_chip(substream);956 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;960 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) 961 { 962 struct atiixp *chip = snd_pcm_substream_chip(substream); 963 struct atiixp_dma *dma = substream->runtime->private_data; 957 964 958 965 if (dma->pcm_open_flag) { … … 970 977 * pcm hardware definition, identical for all DMA types 971 978 */ 972 static s nd_pcm_hardware_tsnd_atiixp_pcm_hw =973 { 974 /*.info = */(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |975 976 979 static struct snd_pcm_hardware snd_atiixp_pcm_hw = 980 { 981 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 982 SNDRV_PCM_INFO_BLOCK_TRANSFER | 983 SNDRV_PCM_INFO_PAUSE | 977 984 SNDRV_PCM_INFO_RESUME | 978 985 SNDRV_PCM_INFO_MMAP_VALID), 979 /*.formats = */SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 980 /*.rates = */SNDRV_PCM_RATE_48000, 981 /*.rate_min = */48000, 982 /*.rate_max = */48000, 983 /*.channels_min = */ 2, 984 /*.channels_max = */ 2, 985 /*.buffer_bytes_max = */256 * 1024, 986 /*.period_bytes_min = */32, 987 /*.period_bytes_max = */128 * 1024, 988 /*.periods_min = */ 2, 989 /*.periods_max = */ ATI_MAX_DESCRIPTORS, 990 0 986 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 987 .rates = SNDRV_PCM_RATE_48000, 988 .rate_min = 48000, 989 .rate_max = 48000, 990 .channels_min = 2, 991 .channels_max = 2, 992 .buffer_bytes_max = 256 * 1024, 993 .period_bytes_min = 32, 994 .period_bytes_max = 128 * 1024, 995 .periods_min = 2, 996 .periods_max = ATI_MAX_DESCRIPTORS, 991 997 }; 992 998 993 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type) 994 { 995 atiixp_t *chip = snd_pcm_substream_chip(substream); 996 snd_pcm_runtime_t *runtime = substream->runtime; 999 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, 1000 struct atiixp_dma *dma, int pcm_type) 1001 { 1002 struct atiixp *chip = snd_pcm_substream_chip(substream); 1003 struct snd_pcm_runtime *runtime = substream->runtime; 997 1004 int err; 998 1005 … … 1024 1031 } 1025 1032 1026 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma) 1027 { 1028 atiixp_t *chip = snd_pcm_substream_chip(substream); 1033 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, 1034 struct atiixp_dma *dma) 1035 { 1036 struct atiixp *chip = snd_pcm_substream_chip(substream); 1029 1037 /* disable DMA bits */ 1030 1038 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); … … 1039 1047 /* 1040 1048 */ 1041 static int snd_atiixp_playback_open(s nd_pcm_substream_t*substream)1042 { 1043 atiixp_t*chip = snd_pcm_substream_chip(substream);1049 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) 1050 { 1051 struct atiixp *chip = snd_pcm_substream_chip(substream); 1044 1052 int err; 1045 1053 … … 1057 1065 } 1058 1066 1059 static int snd_atiixp_playback_close(s nd_pcm_substream_t*substream)1060 { 1061 atiixp_t*chip = snd_pcm_substream_chip(substream);1067 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) 1068 { 1069 struct atiixp *chip = snd_pcm_substream_chip(substream); 1062 1070 int err; 1063 1071 down(&chip->open_mutex); … … 1067 1075 } 1068 1076 1069 static int snd_atiixp_capture_open(s nd_pcm_substream_t*substream)1070 { 1071 atiixp_t*chip = snd_pcm_substream_chip(substream);1077 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) 1078 { 1079 struct atiixp *chip = snd_pcm_substream_chip(substream); 1072 1080 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); 1073 1081 } 1074 1082 1075 static int snd_atiixp_capture_close(s nd_pcm_substream_t*substream)1076 { 1077 atiixp_t*chip = snd_pcm_substream_chip(substream);1083 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) 1084 { 1085 struct atiixp *chip = snd_pcm_substream_chip(substream); 1078 1086 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); 1079 1087 } 1080 1088 1081 static int snd_atiixp_spdif_open(s nd_pcm_substream_t*substream)1082 { 1083 atiixp_t*chip = snd_pcm_substream_chip(substream);1089 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream) 1090 { 1091 struct atiixp *chip = snd_pcm_substream_chip(substream); 1084 1092 int err; 1085 1093 down(&chip->open_mutex); … … 1092 1100 } 1093 1101 1094 static int snd_atiixp_spdif_close(s nd_pcm_substream_t*substream)1095 { 1096 atiixp_t*chip = snd_pcm_substream_chip(substream);1102 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream) 1103 { 1104 struct atiixp *chip = snd_pcm_substream_chip(substream); 1097 1105 int err; 1098 1106 down(&chip->open_mutex); … … 1106 1114 1107 1115 /* AC97 playback */ 1108 static snd_pcm_ops_t snd_atiixp_playback_ops = { 1109 /*.open = */ snd_atiixp_playback_open, 1110 /*.close = */ snd_atiixp_playback_close, 1111 /*.ioctl = */ snd_pcm_lib_ioctl, 1112 /*.hw_params = */ snd_atiixp_pcm_hw_params, 1113 /*.hw_free = */ snd_atiixp_pcm_hw_free, 1114 /*.prepare = */ snd_atiixp_playback_prepare, 1115 /*.trigger = */ snd_atiixp_pcm_trigger, 1116 /*.pointer = */ snd_atiixp_pcm_pointer, 1117 0,0,0,0 1116 static struct snd_pcm_ops snd_atiixp_playback_ops = { 1117 .open = snd_atiixp_playback_open, 1118 .close = snd_atiixp_playback_close, 1119 .ioctl = snd_pcm_lib_ioctl, 1120 .hw_params = snd_atiixp_pcm_hw_params, 1121 .hw_free = snd_atiixp_pcm_hw_free, 1122 .prepare = snd_atiixp_playback_prepare, 1123 .trigger = snd_atiixp_pcm_trigger, 1124 .pointer = snd_atiixp_pcm_pointer, 1118 1125 }; 1119 1126 1120 1127 /* AC97 capture */ 1121 static snd_pcm_ops_t snd_atiixp_capture_ops = { 1122 /*.open = */ snd_atiixp_capture_open, 1123 /*.close = */ snd_atiixp_capture_close, 1124 /*.ioctl = */ snd_pcm_lib_ioctl, 1125 /*.hw_params = */ snd_atiixp_pcm_hw_params, 1126 /*.hw_free = */ snd_atiixp_pcm_hw_free, 1127 /*.prepare = */ snd_atiixp_capture_prepare, 1128 /*.trigger = */ snd_atiixp_pcm_trigger, 1129 /*.pointer = */ snd_atiixp_pcm_pointer, 1130 0,0,0,0 1128 static struct snd_pcm_ops snd_atiixp_capture_ops = { 1129 .open = snd_atiixp_capture_open, 1130 .close = snd_atiixp_capture_close, 1131 .ioctl = snd_pcm_lib_ioctl, 1132 .hw_params = snd_atiixp_pcm_hw_params, 1133 .hw_free = snd_atiixp_pcm_hw_free, 1134 .prepare = snd_atiixp_capture_prepare, 1135 .trigger = snd_atiixp_pcm_trigger, 1136 .pointer = snd_atiixp_pcm_pointer, 1131 1137 }; 1132 1138 1133 1139 /* SPDIF playback */ 1134 static snd_pcm_ops_t snd_atiixp_spdif_ops = { 1135 /*.open = */ snd_atiixp_spdif_open, 1136 /*.close = */ snd_atiixp_spdif_close, 1137 /*.ioctl = */ snd_pcm_lib_ioctl, 1138 /*.hw_params = */ snd_atiixp_pcm_hw_params, 1139 /*.hw_free = */ snd_atiixp_pcm_hw_free, 1140 /*.prepare = */ snd_atiixp_spdif_prepare, 1141 /*.trigger = */ snd_atiixp_pcm_trigger, 1142 /*.pointer = */ snd_atiixp_pcm_pointer, 1143 0,0,0,0 1140 static struct snd_pcm_ops snd_atiixp_spdif_ops = { 1141 .open = snd_atiixp_spdif_open, 1142 .close = snd_atiixp_spdif_close, 1143 .ioctl = snd_pcm_lib_ioctl, 1144 .hw_params = snd_atiixp_pcm_hw_params, 1145 .hw_free = snd_atiixp_pcm_hw_free, 1146 .prepare = snd_atiixp_spdif_prepare, 1147 .trigger = snd_atiixp_pcm_trigger, 1148 .pointer = snd_atiixp_pcm_pointer, 1144 1149 }; 1145 1150 1146 1151 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = { 1147 /* front PCM */ 1148 { 1149 0,0, 1150 /*.exclusive = */1, 1151 0,0,0,0, 1152 /*.r = */{{ 1153 /*.slots = */(1 << AC97_SLOT_PCM_LEFT) | 1154 (1 << AC97_SLOT_PCM_RIGHT) | 1155 (1 << AC97_SLOT_PCM_CENTER) | 1156 (1 << AC97_SLOT_PCM_SLEFT) | 1157 (1 << AC97_SLOT_PCM_SRIGHT) | 1158 (1 << AC97_SLOT_LFE), 1159 {0}, 1160 {0}, 1161 0 1162 }, {0} 1163 }, 1164 0 1165 }, 1166 /* PCM IN #1 */ 1167 { 1168 0, 1169 /*.stream = */1, 1170 /*.exclusive = */1, 1171 0,0,0,0, 1172 /*.r = */{ { 1173 /*.slots =*/ (1 << AC97_SLOT_PCM_LEFT) | 1174 (1 << AC97_SLOT_PCM_RIGHT), 1175 {0}, 1176 {0}, 1177 0 1178 },{0} 1179 }, 0 1180 }, 1181 /* S/PDIF OUT (optional) */ 1182 { 1183 0, 0, 1184 /*.exclusive = */1, 1185 0, 1186 /*.spdif = */1, 1187 0,0, 1188 /*.r = */{ { 1189 /*.slots =*/ (1 << AC97_SLOT_SPDIF_LEFT2) | 1190 (1 << AC97_SLOT_SPDIF_RIGHT2), 1191 {0}, 1192 {0}, 1193 0 1194 1195 }, {0} 1196 }, 0 1197 }, 1152 /* front PCM */ 1153 { 1154 .exclusive = 1, 1155 .r = { { 1156 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1157 (1 << AC97_SLOT_PCM_RIGHT) | 1158 (1 << AC97_SLOT_PCM_CENTER) | 1159 (1 << AC97_SLOT_PCM_SLEFT) | 1160 (1 << AC97_SLOT_PCM_SRIGHT) | 1161 (1 << AC97_SLOT_LFE) 1162 } 1163 } 1164 }, 1165 /* PCM IN #1 */ 1166 { 1167 .stream = 1, 1168 .exclusive = 1, 1169 .r = { { 1170 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1171 (1 << AC97_SLOT_PCM_RIGHT) 1172 } 1173 } 1174 }, 1175 /* S/PDIF OUT (optional) */ 1176 { 1177 .exclusive = 1, 1178 .spdif = 1, 1179 .r = { { 1180 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) | 1181 (1 << AC97_SLOT_SPDIF_RIGHT2) 1182 } 1183 } 1184 }, 1198 1185 }; 1199 1186 1200 static atiixp_dma_ops_tsnd_atiixp_playback_dma_ops = {1201 /*.type = */ATI_DMA_PLAYBACK,1202 /*.llp_offset = */ATI_REG_OUT_DMA_LINKPTR,1203 /*.dt_cur = */ATI_REG_OUT_DMA_DT_CUR,1204 /*.enable_dma = */atiixp_out_enable_dma,1205 /*.enable_transfer = */atiixp_out_enable_transfer,1206 /*.flush_dma = */atiixp_out_flush_dma,1187 static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { 1188 .type = ATI_DMA_PLAYBACK, 1189 .llp_offset = ATI_REG_OUT_DMA_LINKPTR, 1190 .dt_cur = ATI_REG_OUT_DMA_DT_CUR, 1191 .enable_dma = atiixp_out_enable_dma, 1192 .enable_transfer = atiixp_out_enable_transfer, 1193 .flush_dma = atiixp_out_flush_dma, 1207 1194 }; 1208 1209 static atiixp_dma_ops_tsnd_atiixp_capture_dma_ops = {1210 /*.type = */ATI_DMA_CAPTURE,1211 /*.llp_offset = */ATI_REG_IN_DMA_LINKPTR,1212 /*.dt_cur = */ATI_REG_IN_DMA_DT_CUR,1213 /*.enable_dma = */atiixp_in_enable_dma,1214 /*.enable_transfer = */atiixp_in_enable_transfer,1215 /*.flush_dma = */atiixp_in_flush_dma,1195 1196 static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { 1197 .type = ATI_DMA_CAPTURE, 1198 .llp_offset = ATI_REG_IN_DMA_LINKPTR, 1199 .dt_cur = ATI_REG_IN_DMA_DT_CUR, 1200 .enable_dma = atiixp_in_enable_dma, 1201 .enable_transfer = atiixp_in_enable_transfer, 1202 .flush_dma = atiixp_in_flush_dma, 1216 1203 }; 1217 1218 static atiixp_dma_ops_tsnd_atiixp_spdif_dma_ops = {1219 /*.type = */ATI_DMA_SPDIF,1220 /*.llp_offset = */ATI_REG_SPDF_DMA_LINKPTR,1221 /*.dt_cur = */ATI_REG_SPDF_DMA_DT_CUR,1222 /*.enable_dma = */atiixp_spdif_enable_dma,1223 /*.enable_transfer = */atiixp_spdif_enable_transfer,1224 /*.flush_dma = */atiixp_spdif_flush_dma,1204 1205 static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { 1206 .type = ATI_DMA_SPDIF, 1207 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR, 1208 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR, 1209 .enable_dma = atiixp_spdif_enable_dma, 1210 .enable_transfer = atiixp_spdif_enable_transfer, 1211 .flush_dma = atiixp_spdif_flush_dma, 1225 1212 }; 1226 1227 1228 static int __devinit snd_atiixp_pcm_new( atiixp_t*chip)1229 { 1230 s nd_pcm_t*pcm;1231 ac97_bus_t*pbus = chip->ac97_bus;1213 1214 1215 static int __devinit snd_atiixp_pcm_new(struct atiixp *chip) 1216 { 1217 struct snd_pcm *pcm; 1218 struct snd_ac97_bus *pbus = chip->ac97_bus; 1232 1219 int err, i, num_pcms; 1233 1220 … … 1258 1245 1259 1246 /* PCM #0: analog I/O */ 1260 err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm); 1247 err = snd_pcm_new(chip->card, "ATI IXP AC97", 1248 ATI_PCMDEV_ANALOG, 1, 1, &pcm); 1261 1249 if (err < 0) 1262 1250 return err; … … 1268 1256 1269 1257 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1270 snd_dma_pci_data(chip->pci), 64*1024, 128*1024); 1258 snd_dma_pci_data(chip->pci), 1259 64*1024, 128*1024); 1271 1260 1272 1261 /* no SPDIF support on codec? */ 1273 1262 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates) 1274 1263 return 0; 1275 1264 1276 1265 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */ 1277 1266 if (chip->pcms[ATI_PCM_SPDIF]) … … 1279 1268 1280 1269 /* PCM #1: spdif playback */ 1281 err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm); 1270 err = snd_pcm_new(chip->card, "ATI IXP IEC958", 1271 ATI_PCMDEV_DIGITAL, 1, 0, &pcm); 1282 1272 if (err < 0) 1283 1273 return err; … … 1291 1281 1292 1282 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1293 snd_dma_pci_data(chip->pci), 64*1024, 128*1024); 1283 snd_dma_pci_data(chip->pci), 1284 64*1024, 128*1024); 1294 1285 1295 1286 /* pre-select AC97 SPDIF slots 10/11 */ 1296 1287 for (i = 0; i < NUM_ATI_CODECS; i++) { 1297 1288 if (chip->ac97[i]) 1298 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4); 1289 snd_ac97_update_bits(chip->ac97[i], 1290 AC97_EXTENDED_STATUS, 1291 0x03 << 4, 0x03 << 4); 1299 1292 } 1300 1293 … … 1309 1302 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs) 1310 1303 { 1311 atiixp_t*chip = dev_id;1312 1304 struct atiixp *chip = dev_id; 1305 unsigned int status; 1313 1306 1314 1307 status = atiixp_read(chip, ISR); … … 1346 1339 atiixp_write(chip, ISR, status); 1347 1340 1348 #ifdef TARGET_OS21349 eoi_irq(irq);1350 #endif //TARGET_OS21351 1352 1341 return IRQ_HANDLED; 1353 1342 } … … 1359 1348 1360 1349 static struct ac97_quirk ac97_quirks[] __devinitdata = { 1361 { 1362 0x103c, 1363 0x006b,0,0, 1364 "HP Pavilion ZV5030US", 1365 AC97_TUNE_MUTE_LED 1366 }, 1367 {0} /* terminator */ 1350 { 1351 .subvendor = 0x103c, 1352 .subdevice = 0x006b, 1353 .name = "HP Pavilion ZV5030US", 1354 .type = AC97_TUNE_MUTE_LED 1355 }, 1356 { 1357 .subvendor = 0x103c, 1358 .subdevice = 0x308b, 1359 .name = "HP nx6125", 1360 .type = AC97_TUNE_MUTE_LED 1361 }, 1362 {0} /* terminator */ 1368 1363 }; 1369 1364 1370 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock, const char *quirk_override) 1371 { 1372 ac97_bus_t *pbus; 1373 ac97_template_t ac97; 1365 static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock, 1366 const char *quirk_override) 1367 { 1368 struct snd_ac97_bus *pbus; 1369 struct snd_ac97_template ac97; 1374 1370 int i, err; 1375 1371 int codec_count; 1376 static ac97_bus_ops_t ops = { 1377 0, 1378 /*.write = */snd_atiixp_ac97_write, 1379 /*.read = */snd_atiixp_ac97_read, 0,0 1372 static struct snd_ac97_bus_ops ops = { 1373 .write = snd_atiixp_ac97_write, 1374 .read = snd_atiixp_ac97_read, 1380 1375 }; 1381 1376 static unsigned int codec_skip[NUM_ATI_CODECS] = { … … 1391 1386 return err; 1392 1387 pbus->clock = clock; 1393 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with modem driver */1394 1388 chip->ac97_bus = pbus; 1395 1389 … … 1403 1397 ac97.num = i; 1404 1398 ac97.scaps = AC97_SCAP_SKIP_MODEM; 1399 if (! chip->spdif_over_aclink) 1400 ac97.scaps |= AC97_SCAP_NO_SPDIF; 1405 1401 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 1406 1402 chip->ac97[i] = NULL; /* to be sure */ … … 1416 1412 } 1417 1413 1418 1414 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); 1419 1415 1420 1416 return 0; … … 1426 1422 * power management 1427 1423 */ 1428 static int snd_atiixp_suspend(snd_card_t *card, unsigned int state) 1429 { 1430 atiixp_t *chip = card->pm_private_data; 1424 static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state) 1425 { 1426 struct snd_card *card = pci_get_drvdata(pci); 1427 struct atiixp *chip = card->private_data; 1431 1428 int i; 1432 1429 1433 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1434 if (chip->pcmdevs[i]) { 1435 atiixp_dma_t *dma = &chip->dmas[i]; 1436 if (dma->substream && dma->running) 1437 dma->saved_curptr = readl((char*)chip->remap_addr + dma->ops->dt_cur); 1438 snd_pcm_suspend_all(chip->pcmdevs[i]); 1439 } 1430 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1431 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1432 if (chip->pcmdevs[i]) { 1433 struct atiixp_dma *dma = &chip->dmas[i]; 1434 if (dma->substream && dma->running) 1435 dma->saved_curptr = readl((char*)chip->remap_addr + 1436 dma->ops->dt_cur); 1437 snd_pcm_suspend_all(chip->pcmdevs[i]); 1438 } 1440 1439 for (i = 0; i < NUM_ATI_CODECS; i++) 1441 if (chip->ac97[i]) 1442 snd_ac97_suspend(chip->ac97[i]); 1440 snd_ac97_suspend(chip->ac97[i]); 1443 1441 snd_atiixp_aclink_down(chip); 1444 1442 snd_atiixp_chip_stop(chip); 1445 1443 1446 pci_set_power_state(chip->pci, 3); 1447 pci_disable_device(chip->pci); 1448 return 0; 1449 } 1450 1451 static int snd_atiixp_resume(snd_card_t *card, unsigned int state) 1452 { 1453 atiixp_t *chip = card->pm_private_data; 1444 pci_set_power_state(pci, PCI_D3hot); 1445 pci_disable_device(pci); 1446 pci_save_state(pci); 1447 return 0; 1448 } 1449 1450 static int snd_atiixp_resume(struct pci_dev *pci) 1451 { 1452 struct snd_card *card = pci_get_drvdata(pci); 1453 struct atiixp *chip = card->private_data; 1454 1454 int i; 1455 1455 1456 pci_enable_device(chip->pci); 1457 pci_set_power_state(chip->pci, 0); 1458 pci_set_master(chip->pci); 1456 pci_restore_state(pci); 1457 pci_enable_device(pci); 1458 pci_set_power_state(pci, PCI_D0); 1459 pci_set_master(pci); 1459 1460 1460 1461 snd_atiixp_aclink_reset(chip); … … 1462 1463 1463 1464 for (i = 0; i < NUM_ATI_CODECS; i++) 1464 if (chip->ac97[i]) 1465 snd_ac97_resume(chip->ac97[i]); 1466 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1467 if (chip->pcmdevs[i]) { 1468 atiixp_dma_t *dma = &chip->dmas[i]; 1469 if (dma->substream && dma->suspended) { 1470 dma->ops->enable_dma(chip, 1); 1471 dma->substream->ops->prepare(dma->substream); 1472 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 1473 (char*)chip->remap_addr + dma->ops->llp_offset); 1474 writel(dma->saved_curptr, (char*)chip->remap_addr + dma->ops->dt_cur); 1475 } 1476 } 1477 1478 return 0; 1465 snd_ac97_resume(chip->ac97[i]); 1466 1467 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1468 if (chip->pcmdevs[i]) { 1469 struct atiixp_dma *dma = &chip->dmas[i]; 1470 if (dma->substream && dma->suspended) { 1471 dma->ops->enable_dma(chip, 1); 1472 dma->substream->ops->prepare(dma->substream); 1473 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 1474 (char*)chip->remap_addr + dma->ops->llp_offset); 1475 writel(dma->saved_curptr, (char*)chip->remap_addr + 1476 dma->ops->dt_cur); 1477 } 1478 } 1479 1480 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1481 return 0; 1479 1482 } 1480 1483 #endif /* CONFIG_PM */ 1481 1484 1482 1485 1486 #ifdef CONFIG_PROC_FS 1483 1487 /* 1484 1488 * proc interface for register dump 1485 1489 */ 1486 1490 1487 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer) 1488 { 1489 atiixp_t *chip = entry->private_data; 1491 static void snd_atiixp_proc_read(struct snd_info_entry *entry, 1492 struct snd_info_buffer *buffer) 1493 { 1494 struct atiixp *chip = entry->private_data; 1490 1495 int i; 1491 1496 … … 1494 1499 } 1495 1500 1496 static void __devinit snd_atiixp_proc_init( atiixp_t*chip)1497 { 1498 s nd_info_entry_t*entry;1501 static void __devinit snd_atiixp_proc_init(struct atiixp *chip) 1502 { 1503 struct snd_info_entry *entry; 1499 1504 1500 1505 if (! snd_card_proc_new(chip->card, "atiixp", &entry)) 1501 1506 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read); 1502 1507 } 1503 1508 #else /* !CONFIG_PROC_FS */ 1509 #define snd_atiixp_proc_init(chip) 1510 #endif 1504 1511 1505 1512 … … 1508 1515 */ 1509 1516 1510 static int snd_atiixp_free( atiixp_t*chip)1517 static int snd_atiixp_free(struct atiixp *chip) 1511 1518 { 1512 1519 if (chip->irq < 0) … … 1516 1523 __hw_end: 1517 1524 if (chip->irq >= 0) 1518 free_irq(chip->irq, (void *)chip);1525 free_irq(chip->irq, chip); 1519 1526 if (chip->remap_addr) 1520 1527 iounmap(chip->remap_addr); … … 1525 1532 } 1526 1533 1527 static int snd_atiixp_dev_free(s nd_device_t*device)1528 { 1529 atiixp_t*chip = device->device_data;1534 static int snd_atiixp_dev_free(struct snd_device *device) 1535 { 1536 struct atiixp *chip = device->device_data; 1530 1537 return snd_atiixp_free(chip); 1531 1538 } … … 1534 1541 * constructor for chip instance 1535 1542 */ 1536 static int __devinit snd_atiixp_create(s nd_card_t*card,1543 static int __devinit snd_atiixp_create(struct snd_card *card, 1537 1544 struct pci_dev *pci, 1538 atiixp_t**r_chip)1539 { 1540 static s nd_device_ops_tops = {1541 snd_atiixp_dev_free,0,0,01545 struct atiixp **r_chip) 1546 { 1547 static struct snd_device_ops ops = { 1548 .dev_free = snd_atiixp_dev_free, 1542 1549 }; 1543 atiixp_t*chip;1550 struct atiixp *chip; 1544 1551 int err; 1545 1552 … … 1547 1554 return err; 1548 1555 1549 chip = k calloc(1,sizeof(*chip), GFP_KERNEL);1556 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1550 1557 if (chip == NULL) { 1551 1558 pci_disable_device(pci); … … 1571 1578 } 1572 1579 1573 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) { 1580 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, 1581 card->shortname, chip)) { 1574 1582 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1575 1583 snd_atiixp_free(chip); … … 1595 1603 const struct pci_device_id *pci_id) 1596 1604 { 1597 static int dev; 1598 snd_card_t *card; 1599 atiixp_t *chip; 1605 struct snd_card *card; 1606 struct atiixp *chip; 1600 1607 unsigned char revision; 1601 1608 int err; 1602 1609 1603 if (dev >= SNDRV_CARDS) 1604 return -ENODEV; 1605 if (!enable[dev]) { 1606 dev++; 1607 return -ENOENT; 1608 } 1609 1610 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 1610 card = snd_card_new(index, id, THIS_MODULE, 0); 1611 1611 if (card == NULL) 1612 1612 return -ENOMEM; … … 1614 1614 pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 1615 1615 1616 strcpy(card->driver, spdif_aclink [dev]? "ATIIXP" : "ATIIXP-SPDMA");1616 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA"); 1617 1617 strcpy(card->shortname, "ATI IXP"); 1618 1618 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) 1619 1619 goto __error; 1620 card->private_data = chip; 1620 1621 1621 1622 if ((err = snd_atiixp_aclink_reset(chip)) < 0) 1622 1623 goto __error; 1623 1624 1624 chip->spdif_over_aclink = spdif_aclink [dev];1625 1626 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev], ac97_quirk[dev])) < 0)1625 chip->spdif_over_aclink = spdif_aclink; 1626 1627 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0) 1627 1628 goto __error; 1628 1629 1629 1630 if ((err = snd_atiixp_pcm_new(chip)) < 0) 1630 1631 goto __error; 1631 1632 1632 1633 snd_atiixp_proc_init(chip); 1633 1634 … … 1639 1640 chip->addr, chip->irq); 1640 1641 1641 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);1642 1643 1642 if ((err = snd_card_register(card)) < 0) 1644 1643 goto __error; 1645 1644 1646 1645 pci_set_drvdata(pci, card); 1647 dev++;1648 1646 return 0; 1649 1647 … … 1660 1658 1661 1659 static struct pci_driver driver = { 1662 0,0,0, 1663 "ATI IXP AC97 controller", 1664 snd_atiixp_ids, 1665 snd_atiixp_probe, 1666 snd_atiixp_remove, 1667 SND_PCI_PM_CALLBACKS 1660 .name = "ATI IXP AC97 controller", 1661 .id_table = snd_atiixp_ids, 1662 .probe = snd_atiixp_probe, 1663 .remove = __devexit_p(snd_atiixp_remove), 1664 #ifdef CONFIG_PM 1665 .suspend = snd_atiixp_suspend, 1666 .resume = snd_atiixp_resume, 1667 #endif 1668 1668 }; 1669 1669 … … 1671 1671 static int __init alsa_card_atiixp_init(void) 1672 1672 { 1673 return pci_ module_init(&driver);1673 return pci_register_driver(&driver); 1674 1674 } 1675 1675 -
GPL/trunk/alsa-kernel/pci/bt87x.c
r32 r70 792 792 BT_DEVICE(879, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */ 793 793 BT_DEVICE(878, 0x0070, 0xff01, 44100), /* Viewcast Osprey 200 */ 794 /* AVerMedia Studio No. 103, 203, ...? */ 795 BT_DEVICE(878, 0x1461, 0x0003, 48000), 794 796 {0} 795 797 }; … … 817 819 818 820 supported = pci_match_device(snd_bt87x_ids, pci); 819 if (supported )821 if (supported && supported->driver_data > 0) 820 822 return supported->driver_data; 821 823 -
GPL/trunk/alsa-kernel/pci/ens1370.c
r34 r70 20 20 */ 21 21 22 #define SNDRV_MAIN_OBJECT_FILE 22 /* Power-Management-Code ( CONFIG_PM ) 23 * for ens1371 only ( FIXME ) 24 * derived from cs4281.c, atiixp.c and via82xx.c 25 * using http://www.alsa-project.org/~iwai/writing-an-alsa-driver/c1540.htm 26 * by Kurt J. Bosch 27 */ 28 23 29 #include <sound/driver.h> 30 #include <asm/io.h> 31 #include <linux/delay.h> 32 #include <linux/interrupt.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/slab.h> 36 //#include <linux/gameport.h> 37 #include <linux/moduleparam.h> 38 #include <sound/core.h> 24 39 #include <sound/control.h> 25 40 #include <sound/pcm.h> … … 30 45 #include <sound/ak4531_codec.h> 31 46 #endif 32 #define SNDRV_GET_ID33 47 #include <sound/initval.h> 48 #include <sound/asoundef.h> 49 50 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880 51 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 52 #endif 34 53 35 54 #ifndef CHIP1371 … … 47 66 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Thomas Sailer <sailer@ife.ee.ethz.ch>"); 48 67 MODULE_LICENSE("GPL"); 49 MODULE_CLASSES("{sound}");50 68 #ifdef CHIP1370 51 69 MODULE_DESCRIPTION("Ensoniq AudioPCI ES1370"); 52 MODULE_ DEVICES("{{Ensoniq,AudioPCI-97 ES1370},"53 70 MODULE_SUPPORTED_DEVICE("{{Ensoniq,AudioPCI-97 ES1370}," 71 "{Creative Labs,SB PCI64/128 (ES1370)}}"); 54 72 #endif 55 73 #ifdef CHIP1371 56 74 MODULE_DESCRIPTION("Ensoniq/Creative AudioPCI ES1371+"); 57 MODULE_DEVICES("{{Ensoniq,AudioPCI ES1371/73}," 58 "{Ensoniq,AudioPCI ES1373}," 59 "{Creative Labs,Ectiva EV1938}," 60 "{Creative Labs,SB PCI64/128 (ES1371/73)}," 61 "{Creative Labs,Vibra PCI128}," 62 "{Ectiva,EV1938}}"); 75 MODULE_SUPPORTED_DEVICE("{{Ensoniq,AudioPCI ES1371/73}," 76 "{Ensoniq,AudioPCI ES1373}," 77 "{Creative Labs,Ectiva EV1938}," 78 "{Creative Labs,SB PCI64/128 (ES1371/73)}," 79 "{Creative Labs,Vibra PCI128}," 80 "{Ectiva,EV1938}}"); 81 #endif 82 83 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 84 #define SUPPORT_JOYSTICK 63 85 #endif 64 86 … … 66 88 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 67 89 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable switches */ 68 69 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 90 #ifdef SUPPORT_JOYSTICK 91 #ifdef CHIP1371 92 static int joystick_port[SNDRV_CARDS]; 93 #else 94 static int joystick[SNDRV_CARDS]; 95 #endif 96 #endif 97 #ifdef CHIP1371 98 static int spdif[SNDRV_CARDS]; 99 static int lineio[SNDRV_CARDS]; 100 #endif 101 102 //module_param_array(index, int, NULL, 0444); 70 103 MODULE_PARM_DESC(index, "Index value for Ensoniq AudioPCI soundcard."); 71 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC); 72 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s"); 104 //module_param_array(id, charp, NULL, 0444); 73 105 MODULE_PARM_DESC(id, "ID string for Ensoniq AudioPCI soundcard."); 74 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC); 75 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 106 //module_param_array(enable, bool, NULL, 0444); 76 107 MODULE_PARM_DESC(enable, "Enable Ensoniq AudioPCI soundcard."); 77 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC); 78 79 #include <dbgos2.h> 80 81 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880 82 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 83 #endif 84 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371 85 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371 108 #ifdef SUPPORT_JOYSTICK 109 #ifdef CHIP1371 110 //module_param_array(joystick_port, int, NULL, 0444); 111 MODULE_PARM_DESC(joystick_port, "Joystick port address."); 112 #else 113 //module_param_array(joystick, bool, NULL, 0444); 114 MODULE_PARM_DESC(joystick, "Enable joystick."); 115 #endif 116 #endif /* SUPPORT_JOYSTICK */ 117 #ifdef CHIP1371 118 //module_param_array(spdif, int, NULL, 0444); 119 MODULE_PARM_DESC(spdif, "S/PDIF output (-1 = none, 0 = auto, 1 = force)."); 120 //module_param_array(lineio, int, NULL, 0444); 121 MODULE_PARM_DESC(lineio, "Line In to Rear Out (0 = auto, 1 = force)."); 86 122 #endif 87 123 88 124 /* ES1371 chip ID */ 89 125 /* This is a little confusing because all ES1371 compatible chips have the 90 same DEVICE_ID, the only thing differentiating them is the REV_ID field.91 This is only significant if you want to enable features on the later parts.92 Yes, I know it's stupid and why didn't we use the sub IDs?93 126 same DEVICE_ID, the only thing differentiating them is the REV_ID field. 127 This is only significant if you want to enable features on the later parts. 128 Yes, I know it's stupid and why didn't we use the sub IDs? 129 */ 94 130 #define ES1371REV_ES1373_A 0x04 95 131 #define ES1371REV_ES1373_B 0x06 … … 117 153 #define ES_1373_RECEN_B (1<<27) /* mix record with playback for I2S/SPDIF out */ 118 154 #define ES_1373_SPDIF_THRU (1<<26) /* 0 = SPDIF thru mode, 1 = SPDIF == dig out */ 119 #define ES_1371_JOY_ASEL(o) (((o)&0x03)<<24) 155 #define ES_1371_JOY_ASEL(o) (((o)&0x03)<<24)/* joystick port mapping */ 120 156 #define ES_1371_JOY_ASELM (0x03<<24) /* mask for above */ 121 157 #define ES_1371_JOY_ASELI(i) (((i)>>24)&0x03) 122 #define ES_1371_GPIO_IN(i) (((i)>>20)&0x0f) 123 #define ES_1370_PCLKDIVO(o) (((o)&0x1fff)<<16) 158 #define ES_1371_GPIO_IN(i) (((i)>>20)&0x0f)/* GPIO in [3:0] pins - R/O */ 159 #define ES_1370_PCLKDIVO(o) (((o)&0x1fff)<<16)/* clock divide ratio for DAC2 */ 124 160 #define ES_1370_PCLKDIVM ((0x1fff)<<16) /* mask for above */ 125 #define ES_1370_PCLKDIVI(i) (((i)>>16)&0x1fff) 126 #define ES_1371_GPIO_OUT(o) (((o)&0x0f)<<16) 161 #define ES_1370_PCLKDIVI(i) (((i)>>16)&0x1fff)/* clock divide ratio for DAC2 */ 162 #define ES_1371_GPIO_OUT(o) (((o)&0x0f)<<16)/* GPIO out [3:0] pins - W/R */ 127 163 #define ES_1371_GPIO_OUTM (0x0f<<16) /* mask for above */ 128 164 #define ES_MSFMTSEL (1<<15) /* MPEG serial data format; 0 = SONY, 1 = I2S */ 129 165 #define ES_1370_M_SBB (1<<14) /* clock source for DAC - 0 = clock generator; 1 = MPEG clocks */ 130 166 #define ES_1371_SYNC_RES (1<<14) /* Warm AC97 reset */ 131 #define ES_1370_WTSRSEL(o) (((o)&0x03)<<12) 167 #define ES_1370_WTSRSEL(o) (((o)&0x03)<<12)/* fixed frequency clock for DAC1 */ 132 168 #define ES_1370_WTSRSELM (0x03<<12) /* mask for above */ 133 169 #define ES_1371_ADC_STOP (1<<13) /* disable CCB transfer capture information */ … … 136 172 #define ES_1371_M_CB (1<<11) /* capture clock source; 0 = AC'97 ADC; 1 = I2S */ 137 173 #define ES_CCB_INTRM (1<<10) /* CCB voice interrupts enable */ 138 #define ES_1370_M_CB (1<<9) /* capture clock source; 0 = ADC; 1 = MPEG */139 #define ES_1370_XCTL0 (1<<8) /* generap purpose output bit */140 #define ES_1371_PDLEV(o) (((o)&0x03)<<8) 174 #define ES_1370_M_CB (1<<9) /* capture clock source; 0 = ADC; 1 = MPEG */ 175 #define ES_1370_XCTL0 (1<<8) /* generap purpose output bit */ 176 #define ES_1371_PDLEV(o) (((o)&0x03)<<8) /* current power down level */ 141 177 #define ES_1371_PDLEVM (0x03<<8) /* mask for above */ 142 #define ES_BREQ (1<<7) /* memory bus request enable */143 #define ES_DAC1_EN (1<<6) /* DAC1 playback channel enable */144 #define ES_DAC2_EN (1<<5) /* DAC2 playback channel enable */145 #define ES_ADC_EN (1<<4) /* ADC capture channel enable */146 #define ES_UART_EN (1<<3) /* UART enable */147 #define ES_JYSTK_EN (1<<2) /* Joystick module enable */148 #define ES_1370_CDC_EN (1<<1) /* Codec interface enable */149 #define ES_1371_XTALCKDIS (1<<1) /* Xtal clock disable */150 #define ES_1370_SERR_DISABLE (1<<0) /* PCI serr signal disable */151 #define ES_1371_PCICLKDIS (1<<0) /* PCI clock disable */178 #define ES_BREQ (1<<7) /* memory bus request enable */ 179 #define ES_DAC1_EN (1<<6) /* DAC1 playback channel enable */ 180 #define ES_DAC2_EN (1<<5) /* DAC2 playback channel enable */ 181 #define ES_ADC_EN (1<<4) /* ADC capture channel enable */ 182 #define ES_UART_EN (1<<3) /* UART enable */ 183 #define ES_JYSTK_EN (1<<2) /* Joystick module enable */ 184 #define ES_1370_CDC_EN (1<<1) /* Codec interface enable */ 185 #define ES_1371_XTALCKDIS (1<<1) /* Xtal clock disable */ 186 #define ES_1370_SERR_DISABLE (1<<0) /* PCI serr signal disable */ 187 #define ES_1371_PCICLKDIS (1<<0) /* PCI clock disable */ 152 188 #define ES_REG_STATUS 0x04 /* R/O: Interrupt/Chip select status register */ 153 #define ES_INTR (1<<31) /* Interrupt is pending */154 #define ES_1371_ST_AC97_RST (1<<29) 189 #define ES_INTR (1<<31) /* Interrupt is pending */ 190 #define ES_1371_ST_AC97_RST (1<<29) /* CT5880 AC'97 Reset bit */ 155 191 #define ES_1373_REAR_BIT27 (1<<27) /* rear bits: 000 - front, 010 - mirror, 101 - separate */ 156 192 #define ES_1373_REAR_BIT26 (1<<26) … … 159 195 #define ES_1373_SPDIF_EN (1<<18) /* SPDIF enable */ 160 196 #define ES_1373_SPDIF_TEST (1<<17) /* SPDIF test */ 161 #define ES_1371_TEST (1<<16) 197 #define ES_1371_TEST (1<<16) /* test ASIC */ 162 198 #define ES_1373_GPIO_INT(i) (((i)&0x0f)>>12)/* GPIO [3:0] pins - interrupt pending */ 163 #define ES_1370_CSTAT (1<<10) /* CODEC is busy or register write in progress */164 #define ES_1370_CBUSY (1<<9) /* CODEC is busy */165 #define ES_1370_CWRIP (1<<8) /* CODEC register write in progress */199 #define ES_1370_CSTAT (1<<10) /* CODEC is busy or register write in progress */ 200 #define ES_1370_CBUSY (1<<9) /* CODEC is busy */ 201 #define ES_1370_CWRIP (1<<8) /* CODEC register write in progress */ 166 202 #define ES_1371_SYNC_ERR (1<<8) /* CODEC synchronization error occurred */ 167 #define ES_1371_VC(i) (((i)>>6)&0x03) 168 #define ES_1370_VC(i) (((i)>>5)&0x03) 169 #define ES_1371_MPWR (1<<5) /* power level interrupt pending */170 #define ES_MCCB (1<<4) /* CCB interrupt pending */171 #define ES_UART (1<<3) /* UART interrupt pending */172 #define ES_DAC1 (1<<2) /* DAC1 channel interrupt pending */173 #define ES_DAC2 (1<<1) /* DAC2 channel interrupt pending */174 #define ES_ADC (1<<0) /* ADC channel interrupt pending */203 #define ES_1371_VC(i) (((i)>>6)&0x03) /* voice code from CCB module */ 204 #define ES_1370_VC(i) (((i)>>5)&0x03) /* voice code from CCB module */ 205 #define ES_1371_MPWR (1<<5) /* power level interrupt pending */ 206 #define ES_MCCB (1<<4) /* CCB interrupt pending */ 207 #define ES_UART (1<<3) /* UART interrupt pending */ 208 #define ES_DAC1 (1<<2) /* DAC1 channel interrupt pending */ 209 #define ES_DAC2 (1<<1) /* DAC2 channel interrupt pending */ 210 #define ES_ADC (1<<0) /* ADC channel interrupt pending */ 175 211 #define ES_REG_UART_DATA 0x08 /* R/W: UART data register */ 176 212 #define ES_REG_UART_STATUS 0x09 /* R/O: UART status register */ 177 213 #define ES_RXINT (1<<7) /* RX interrupt occurred */ 178 214 #define ES_TXINT (1<<2) /* TX interrupt occurred */ 179 #define ES_TXRDY (1<<1) /* transmitter ready */180 #define ES_RXRDY (1<<0) /* receiver ready */215 #define ES_TXRDY (1<<1) /* transmitter ready */ 216 #define ES_RXRDY (1<<0) /* receiver ready */ 181 217 #define ES_REG_UART_CONTROL 0x09 /* W/O: UART control register */ 182 #define ES_RXINTEN (1<<7) /* RX interrupt enable */183 #define ES_TXINTENO(o) (((o)&0x03)<<5) 218 #define ES_RXINTEN (1<<7) /* RX interrupt enable */ 219 #define ES_TXINTENO(o) (((o)&0x03)<<5) /* TX interrupt enable */ 184 220 #define ES_TXINTENM (0x03<<5) /* mask for above */ 185 221 #define ES_TXINTENI(i) (((i)>>5)&0x03) 186 #define ES_CNTRL(o) (((o)&0x03)<<0) 222 #define ES_CNTRL(o) (((o)&0x03)<<0) /* control */ 187 223 #define ES_CNTRLM (0x03<<0) /* mask for above */ 188 224 #define ES_REG_UART_RES 0x0a /* R/W: UART reserver register */ 189 #define ES_TEST_MODE (1<<0) /* test mode enabled */225 #define ES_TEST_MODE (1<<0) /* test mode enabled */ 190 226 #define ES_REG_MEM_PAGE 0x0c /* R/W: Memory page register */ 191 #define ES_MEM_PAGEO(o) (((o)&0x0f)<<0) 227 #define ES_MEM_PAGEO(o) (((o)&0x0f)<<0) /* memory page select - out */ 192 228 #define ES_MEM_PAGEM (0x0f<<0) /* mask for above */ 193 #define ES_MEM_PAGEI(i) (((i)>>0)&0x0f)/* memory page select - in */229 #define ES_MEM_PAGEI(i) (((i)>>0)&0x0f) /* memory page select - in */ 194 230 #define ES_REG_1370_CODEC 0x10 /* W/O: Codec write register address */ 195 231 #define ES_1370_CODEC_WRITE(a,d) ((((a)&0xff)<<8)|(((d)&0xff)<<0)) … … 203 239 204 240 #define ES_REG_1371_SMPRATE 0x10 /* W/R: Codec rate converter interface register */ 205 #define ES_1371_SRC_RAM_ADDRO(o) (((o)&0x7f)<<25) 241 #define ES_1371_SRC_RAM_ADDRO(o) (((o)&0x7f)<<25)/* address of the sample rate converter */ 206 242 #define ES_1371_SRC_RAM_ADDRM (0x7f<<25) /* mask for above */ 207 #define ES_1371_SRC_RAM_ADDRI(i) (((i)>>25)&0x7f) 243 #define ES_1371_SRC_RAM_ADDRI(i) (((i)>>25)&0x7f)/* address of the sample rate converter */ 208 244 #define ES_1371_SRC_RAM_WE (1<<24) /* R/W: read/write control for sample rate converter */ 209 245 #define ES_1371_SRC_RAM_BUSY (1<<23) /* R/O: sample rate memory is busy */ … … 212 248 #define ES_1371_DIS_P2 (1<<20) /* playback channel 1 accumulator update disable */ 213 249 #define ES_1371_DIS_R1 (1<<19) /* capture channel accumulator update disable */ 214 #define ES_1371_SRC_RAM_DATAO(o) (((o)&0xffff)<<0) 250 #define ES_1371_SRC_RAM_DATAO(o) (((o)&0xffff)<<0)/* current value of the sample rate converter */ 215 251 #define ES_1371_SRC_RAM_DATAM (0xffff<<0) /* mask for above */ 216 #define ES_1371_SRC_RAM_DATAI(i) (((i)>>0)&0xffff) 252 #define ES_1371_SRC_RAM_DATAI(i) (((i)>>0)&0xffff)/* current value of the sample rate converter */ 217 253 218 254 #define ES_REG_1371_LEGACY 0x18 /* W/R: Legacy control/status register */ … … 220 256 #define ES_1371_HIB (1<<30) /* host interrupt blocking enable */ 221 257 #define ES_1371_VSB (1<<29) /* SB; 0 = addr 0x220xH, 1 = 0x22FxH */ 222 #define ES_1371_VMPUO(o) (((o)&0x03)<<27) 258 #define ES_1371_VMPUO(o) (((o)&0x03)<<27)/* base register address; 0 = 0x320xH; 1 = 0x330xH; 2 = 0x340xH; 3 = 0x350xH */ 223 259 #define ES_1371_VMPUM (0x03<<27) /* mask for above */ 224 #define ES_1371_VMPUI(i) (((i)>>27)&0x03) 225 #define ES_1371_VCDCO(o) (((o)&0x03)<<25) 260 #define ES_1371_VMPUI(i) (((i)>>27)&0x03)/* base register address */ 261 #define ES_1371_VCDCO(o) (((o)&0x03)<<25)/* CODEC; 0 = 0x530xH; 1 = undefined; 2 = 0xe80xH; 3 = 0xF40xH */ 226 262 #define ES_1371_VCDCM (0x03<<25) /* mask for above */ 227 #define ES_1371_VCDCI(i) (((i)>>25)&0x03) 263 #define ES_1371_VCDCI(i) (((i)>>25)&0x03)/* CODEC address */ 228 264 #define ES_1371_FIRQ (1<<24) /* force an interrupt */ 229 265 #define ES_1371_SDMACAP (1<<23) /* enable event capture for slave DMA controller */ … … 235 271 #define ES_1371_CDCCAP (1<<17) /* enable event capture for CODEC registers */ 236 272 #define ES_1371_BACAP (1<<16) /* enable event capture for SoundScape base address */ 237 #define ES_1371_EXI(i) (((i)>>8)&0x07) 238 #define ES_1371_AI(i) (((i)>>3)&0x1f) 273 #define ES_1371_EXI(i) (((i)>>8)&0x07) /* event number */ 274 #define ES_1371_AI(i) (((i)>>3)&0x1f) /* event significant I/O address */ 239 275 #define ES_1371_WR (1<<2) /* event capture; 0 = read; 1 = write */ 240 276 #define ES_1371_LEGINT (1<<0) /* interrupt for legacy events; 0 = interrupt did occur */ … … 244 280 #define ES_REG_SERIAL 0x20 /* R/W: Serial interface control register */ 245 281 #define ES_1371_DAC_TEST (1<<22) /* DAC test mode enable */ 246 #define ES_P2_END_INCO(o) (((o)&0x07)<<19) 282 #define ES_P2_END_INCO(o) (((o)&0x07)<<19)/* binary offset value to increment / loop end */ 247 283 #define ES_P2_END_INCM (0x07<<19) /* mask for above */ 248 #define ES_P2_END_INCI(i) (((i)>>16)&0x07) 249 #define ES_P2_ST_INCO(o) (((o)&0x07)<<16) 284 #define ES_P2_END_INCI(i) (((i)>>16)&0x07)/* binary offset value to increment / loop end */ 285 #define ES_P2_ST_INCO(o) (((o)&0x07)<<16)/* binary offset value to increment / start */ 250 286 #define ES_P2_ST_INCM (0x07<<16) /* mask for above */ 251 #define ES_P2_ST_INCI(i) (((i)<<16)&0x07) 287 #define ES_P2_ST_INCI(i) (((i)<<16)&0x07)/* binary offset value to increment / start */ 252 288 #define ES_R1_LOOP_SEL (1<<15) /* ADC; 0 - loop mode; 1 = stop mode */ 253 289 #define ES_P2_LOOP_SEL (1<<14) /* DAC2; 0 - loop mode; 1 = stop mode */ … … 256 292 #define ES_P1_PAUSE (1<<11) /* DAC1; 0 - play mode; 1 = pause mode */ 257 293 #define ES_R1_INT_EN (1<<10) /* ADC interrupt enable */ 258 #define ES_P2_INT_EN (1<<9) /* DAC2 interrupt enable */259 #define ES_P1_INT_EN (1<<8) /* DAC1 interrupt enable */260 #define ES_P1_SCT_RLD (1<<7) /* force sample counter reload for DAC1 */261 #define ES_P2_DAC_SEN (1<<6) /* when stop mode: 0 - DAC2 play back zeros; 1 = DAC2 play back last sample */262 #define ES_R1_MODEO(o) (((o)&0x03)<<4) 294 #define ES_P2_INT_EN (1<<9) /* DAC2 interrupt enable */ 295 #define ES_P1_INT_EN (1<<8) /* DAC1 interrupt enable */ 296 #define ES_P1_SCT_RLD (1<<7) /* force sample counter reload for DAC1 */ 297 #define ES_P2_DAC_SEN (1<<6) /* when stop mode: 0 - DAC2 play back zeros; 1 = DAC2 play back last sample */ 298 #define ES_R1_MODEO(o) (((o)&0x03)<<4) /* ADC mode; 0 = 8-bit mono; 1 = 8-bit stereo; 2 = 16-bit mono; 3 = 16-bit stereo */ 263 299 #define ES_R1_MODEM (0x03<<4) /* mask for above */ 264 300 #define ES_R1_MODEI(i) (((i)>>4)&0x03) 265 #define ES_P2_MODEO(o) (((o)&0x03)<<2) 301 #define ES_P2_MODEO(o) (((o)&0x03)<<2) /* DAC2 mode; -- '' -- */ 266 302 #define ES_P2_MODEM (0x03<<2) /* mask for above */ 267 303 #define ES_P2_MODEI(i) (((i)>>2)&0x03) 268 #define ES_P1_MODEO(o) (((o)&0x03)<<0) 304 #define ES_P1_MODEO(o) (((o)&0x03)<<0) /* DAC1 mode; -- '' -- */ 269 305 #define ES_P1_MODEM (0x03<<0) /* mask for above */ 270 306 #define ES_P1_MODEI(i) (((i)>>0)&0x03) … … 344 380 /* 345 381 346 */ 347 348 typedef struct _snd_ensoniq ensoniq_t; 349 350 struct _snd_ensoniq { 351 spinlock_t reg_lock; 352 struct semaphore src_mutex; 353 354 int irq; 355 356 unsigned long playback1size; 357 unsigned long playback2size; 358 unsigned long capture3size; 359 360 unsigned long port; 361 unsigned int mode; 362 unsigned int uartm; /* UART mode */ 363 364 unsigned int ctrl; /* control register */ 365 unsigned int sctrl; /* serial control register */ 366 unsigned int cssr; /* control status register */ 367 unsigned int uartc; /* uart control register */ 368 unsigned int rev; /* chip revision */ 369 370 union { 382 */ 383 384 struct ensoniq { 385 spinlock_t reg_lock; 386 struct semaphore src_mutex; 387 388 int irq; 389 390 unsigned long playback1size; 391 unsigned long playback2size; 392 unsigned long capture3size; 393 394 unsigned long port; 395 unsigned int mode; 396 unsigned int uartm; /* UART mode */ 397 398 unsigned int ctrl; /* control register */ 399 unsigned int sctrl; /* serial control register */ 400 unsigned int cssr; /* control status register */ 401 unsigned int uartc; /* uart control register */ 402 unsigned int rev; /* chip revision */ 403 404 union { 371 405 #ifdef CHIP1371 372 373 ac97_t*ac97;374 406 struct { 407 struct snd_ac97 *ac97; 408 } es1371; 375 409 #else 376 struct { 377 int pclkdiv_lock; 378 ak4531_t *ak4531; 379 } es1370; 380 #endif 381 } u; 382 383 struct pci_dev *pci; 384 unsigned short subsystem_vendor_id; 385 unsigned short subsystem_device_id; 386 snd_card_t *card; 387 snd_pcm_t *pcm1; /* DAC1/ADC PCM */ 388 snd_pcm_t *pcm2; /* DAC2 PCM */ 389 snd_pcm_substream_t *playback1_substream; 390 snd_pcm_substream_t *playback2_substream; 391 snd_pcm_substream_t *capture_substream; 392 unsigned int p1_dma_size; 393 unsigned int p2_dma_size; 394 unsigned int c_dma_size; 395 unsigned int p1_period_size; 396 unsigned int p2_period_size; 397 unsigned int c_period_size; 398 snd_rawmidi_t *rmidi; 399 snd_rawmidi_substream_t *midi_input; 400 snd_rawmidi_substream_t *midi_output; 401 402 unsigned int spdif; 403 unsigned int spdif_default; 404 unsigned int spdif_stream; 405 406 #ifdef CHIP1370 407 struct snd_dma_buffer dma_bug; 408 #endif 409 410 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 411 struct gameport gameport; 412 struct semaphore joy_sem; // gameport configuration semaphore 410 struct { 411 int pclkdiv_lock; 412 struct snd_ak4531 *ak4531; 413 } es1370; 414 #endif 415 } u; 416 417 struct pci_dev *pci; 418 unsigned short subsystem_vendor_id; 419 unsigned short subsystem_device_id; 420 struct snd_card *card; 421 struct snd_pcm *pcm1; /* DAC1/ADC PCM */ 422 struct snd_pcm *pcm2; /* DAC2 PCM */ 423 struct snd_pcm_substream *playback1_substream; 424 struct snd_pcm_substream *playback2_substream; 425 struct snd_pcm_substream *capture_substream; 426 unsigned int p1_dma_size; 427 unsigned int p2_dma_size; 428 unsigned int c_dma_size; 429 unsigned int p1_period_size; 430 unsigned int p2_period_size; 431 unsigned int c_period_size; 432 struct snd_rawmidi *rmidi; 433 struct snd_rawmidi_substream *midi_input; 434 struct snd_rawmidi_substream *midi_output; 435 436 unsigned int spdif; 437 unsigned int spdif_default; 438 unsigned int spdif_stream; 439 440 #ifdef CHIP1370 441 struct snd_dma_buffer dma_bug; 442 #endif 443 444 #ifdef SUPPORT_JOYSTICK 445 struct gameport *gameport; 413 446 #endif 414 447 }; … … 418 451 static struct pci_device_id snd_audiopci_ids[] = { 419 452 #ifdef CHIP1370 420 453 { 0x1274, 0x5000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1370 */ 421 454 #endif 422 455 #ifdef CHIP1371 423 424 425 426 #endif 427 456 { 0x1274, 0x1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1371 */ 457 { 0x1274, 0x5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1373 - CT5880 */ 458 { 0x1102, 0x8938, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Ectiva EV1938 */ 459 #endif 460 { 0, } 428 461 }; 429 462 … … 438 471 #ifdef CHIP1370 439 472 static unsigned int snd_es1370_fixed_rates[] = 440 {5512, 11025, 22050, 44100}; 441 442 static snd_pcm_hw_constraint_list_t snd_es1370_hw_constraints_rates = { 443 4, 444 snd_es1370_fixed_rates, 445 0 473 {5512, 11025, 22050, 44100}; 474 static struct snd_pcm_hw_constraint_list snd_es1370_hw_constraints_rates = { 475 .count = 4, 476 .list = snd_es1370_fixed_rates, 477 .mask = 0, 446 478 }; 447 static ratnum_tes1370_clock = {448 449 29, 450 451 1 479 static struct snd_ratnum es1370_clock = { 480 .num = ES_1370_SRCLOCK, 481 .den_min = 29, 482 .den_max = 353, 483 .den_step = 1, 452 484 }; 453 static s nd_pcm_hw_constraint_ratnums_tsnd_es1370_hw_constraints_clock = {454 455 &es1370_clock 485 static struct snd_pcm_hw_constraint_ratnums snd_es1370_hw_constraints_clock = { 486 .nrats = 1, 487 .rats = &es1370_clock, 456 488 }; 457 489 #else 458 static ratden_tes1371_dac_clock = {459 3000 * 32768, /* num_min */ 460 48000 * 32768, /* num_max */ 461 3000, /* num_step */ 462 32768 /* den */ 490 static struct snd_ratden es1371_dac_clock = { 491 .num_min = 3000 * (1 << 15), 492 .num_max = 48000 * (1 << 15), 493 .num_step = 3000, 494 .den = 1 << 15, 463 495 }; 464 static s nd_pcm_hw_constraint_ratdens_tsnd_es1371_hw_constraints_dac_clock = {465 466 &es1371_dac_clock 496 static struct snd_pcm_hw_constraint_ratdens snd_es1371_hw_constraints_dac_clock = { 497 .nrats = 1, 498 .rats = &es1371_dac_clock, 467 499 }; 468 static ratnum_tes1371_adc_clock = {469 470 32768, 471 472 1 500 static struct snd_ratnum es1371_adc_clock = { 501 .num = 48000 << 15, 502 .den_min = 32768, 503 .den_max = 393216, 504 .den_step = 1, 473 505 }; 474 static s nd_pcm_hw_constraint_ratnums_tsnd_es1371_hw_constraints_adc_clock = {475 476 &es1371_adc_clock 506 static struct snd_pcm_hw_constraint_ratnums snd_es1371_hw_constraints_adc_clock = { 507 .nrats = 1, 508 .rats = &es1371_adc_clock, 477 509 }; 478 510 #endif 479 511 static const unsigned int snd_ensoniq_sample_shift[] = 480 {0, 1, 1, 2};512 {0, 1, 1, 2}; 481 513 482 514 /* … … 486 518 #ifdef CHIP1371 487 519 488 static unsigned int snd_es1371_wait_src_ready(ensoniq_t * ensoniq) 489 { 490 unsigned int t, r = 0; 491 492 for (t = 0; t < POLL_COUNT; t++) { 493 r = inl(ES_REG(ensoniq, 1371_SMPRATE)); 494 if ((r & ES_1371_SRC_RAM_BUSY) == 0) 495 return r; 496 cond_resched(); 497 } 498 snd_printk("wait source ready timeout 0x%lx [0x%x]\n", ES_REG(ensoniq, 1371_SMPRATE), r); 499 return 0; 500 } 501 502 static unsigned int snd_es1371_src_read(ensoniq_t * ensoniq, unsigned short reg) 503 { 504 unsigned int temp, i, orig, r; 505 506 /* wait for ready */ 507 temp = orig = snd_es1371_wait_src_ready(ensoniq); 508 509 /* expose the SRC state bits */ 510 r = temp & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 511 ES_1371_DIS_P2 | ES_1371_DIS_R1); 512 r |= ES_1371_SRC_RAM_ADDRO(reg) | 0x10000; 513 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 514 515 /* now, wait for busy and the correct time to read */ 516 temp = snd_es1371_wait_src_ready(ensoniq); 517 518 if ((temp & 0x00870000) != 0x00010000) { 519 /* wait for the right state */ 520 for (i = 0; i < POLL_COUNT; i++) { 521 temp = inl(ES_REG(ensoniq, 1371_SMPRATE)); 522 if ((temp & 0x00870000) == 0x00010000) 523 break; 524 } 525 } 526 527 /* hide the state bits */ 528 r = orig & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 529 ES_1371_DIS_P2 | ES_1371_DIS_R1); 530 r |= ES_1371_SRC_RAM_ADDRO(reg); 531 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 532 533 return temp; 534 } 535 536 static void snd_es1371_src_write(ensoniq_t * ensoniq, 537 unsigned short reg, unsigned short data) 538 { 539 unsigned int r; 540 541 r = snd_es1371_wait_src_ready(ensoniq) & 542 (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 543 ES_1371_DIS_P2 | ES_1371_DIS_R1); 544 r |= ES_1371_SRC_RAM_ADDRO(reg) | ES_1371_SRC_RAM_DATAO(data); 545 outl(r | ES_1371_SRC_RAM_WE, ES_REG(ensoniq, 1371_SMPRATE)); 520 static unsigned int snd_es1371_wait_src_ready(struct ensoniq * ensoniq) 521 { 522 unsigned int t, r = 0; 523 524 for (t = 0; t < POLL_COUNT; t++) { 525 r = inl(ES_REG(ensoniq, 1371_SMPRATE)); 526 if ((r & ES_1371_SRC_RAM_BUSY) == 0) 527 return r; 528 cond_resched(); 529 } 530 snd_printk(KERN_ERR "wait source ready timeout 0x%lx [0x%x]\n", 531 ES_REG(ensoniq, 1371_SMPRATE), r); 532 return 0; 533 } 534 535 static unsigned int snd_es1371_src_read(struct ensoniq * ensoniq, unsigned short reg) 536 { 537 unsigned int temp, i, orig, r; 538 539 /* wait for ready */ 540 temp = orig = snd_es1371_wait_src_ready(ensoniq); 541 542 /* expose the SRC state bits */ 543 r = temp & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 544 ES_1371_DIS_P2 | ES_1371_DIS_R1); 545 r |= ES_1371_SRC_RAM_ADDRO(reg) | 0x10000; 546 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 547 548 /* now, wait for busy and the correct time to read */ 549 temp = snd_es1371_wait_src_ready(ensoniq); 550 551 if ((temp & 0x00870000) != 0x00010000) { 552 /* wait for the right state */ 553 for (i = 0; i < POLL_COUNT; i++) { 554 temp = inl(ES_REG(ensoniq, 1371_SMPRATE)); 555 if ((temp & 0x00870000) == 0x00010000) 556 break; 557 } 558 } 559 560 /* hide the state bits */ 561 r = orig & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 562 ES_1371_DIS_P2 | ES_1371_DIS_R1); 563 r |= ES_1371_SRC_RAM_ADDRO(reg); 564 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 565 566 return temp; 567 } 568 569 static void snd_es1371_src_write(struct ensoniq * ensoniq, 570 unsigned short reg, unsigned short data) 571 { 572 unsigned int r; 573 574 r = snd_es1371_wait_src_ready(ensoniq) & 575 (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 576 ES_1371_DIS_P2 | ES_1371_DIS_R1); 577 r |= ES_1371_SRC_RAM_ADDRO(reg) | ES_1371_SRC_RAM_DATAO(data); 578 outl(r | ES_1371_SRC_RAM_WE, ES_REG(ensoniq, 1371_SMPRATE)); 546 579 } 547 580 … … 550 583 #ifdef CHIP1370 551 584 552 static void snd_es1370_codec_write( ak4531_t*ak4531,553 554 { 555 ensoniq_t*ensoniq = ak4531->private_data;556 585 static void snd_es1370_codec_write(struct snd_ak4531 *ak4531, 586 unsigned short reg, unsigned short val) 587 { 588 struct ensoniq *ensoniq = ak4531->private_data; 589 unsigned long end_time = jiffies + HZ / 10; 557 590 558 591 #if 0 559 printk("CODEC WRITE: reg = 0x%x, val = 0x%x (0x%x), creg = 0x%x\n", reg, val, ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC)); 560 #endif 561 do { 562 if (!(inl(ES_REG(ensoniq, STATUS)) & ES_1370_CSTAT)) { 563 outw(ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC)); 564 return; 565 } 566 set_current_state(TASK_UNINTERRUPTIBLE); 567 schedule_timeout(1); 568 } while (time_after(end_time, jiffies)); 569 snd_printk("codec write timeout, status = 0x%x\n", inl(ES_REG(ensoniq, STATUS))); 592 printk("CODEC WRITE: reg = 0x%x, val = 0x%x (0x%x), creg = 0x%x\n", 593 reg, val, ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC)); 594 #endif 595 do { 596 if (!(inl(ES_REG(ensoniq, STATUS)) & ES_1370_CSTAT)) { 597 outw(ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC)); 598 return; 599 } 600 schedule_timeout_uninterruptible(1); 601 } while (time_after(end_time, jiffies)); 602 snd_printk(KERN_ERR "codec write timeout, status = 0x%x\n", 603 inl(ES_REG(ensoniq, STATUS))); 570 604 } 571 605 … … 574 608 #ifdef CHIP1371 575 609 576 static void snd_es1371_codec_write(ac97_t *ac97, 577 unsigned short reg, unsigned short val) 578 { 579 ensoniq_t *ensoniq = ac97->private_data; 580 unsigned int t, x; 581 582 down(&ensoniq->src_mutex); 583 for (t = 0; t < POLL_COUNT; t++) { 584 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) { 585 /* save the current state for latter */ 586 x = snd_es1371_wait_src_ready(ensoniq); 587 outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 588 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 0x00010000, 589 ES_REG(ensoniq, 1371_SMPRATE)); 590 /* wait for not busy (state 0) first to avoid 591 transition states */ 592 for (t = 0; t < POLL_COUNT; t++) { 593 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00000000) 594 break; 595 } 596 /* wait for a SAFE time to write addr/data and then do it, dammit */ 597 for (t = 0; t < POLL_COUNT; t++) { 598 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00010000) 599 break; 600 } 601 outl(ES_1371_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1371_CODEC)); 602 /* restore SRC reg */ 603 snd_es1371_wait_src_ready(ensoniq); 604 outl(x, ES_REG(ensoniq, 1371_SMPRATE)); 605 up(&ensoniq->src_mutex); 606 return; 607 } 608 } 609 up(&ensoniq->src_mutex); 610 snd_printk("codec write timeout at 0x%lx [0x%x]\n", ES_REG(ensoniq, 1371_CODEC), inl(ES_REG(ensoniq, 1371_CODEC))); 611 } 612 613 static unsigned short snd_es1371_codec_read(ac97_t *ac97, 614 unsigned short reg) 615 { 616 ensoniq_t *ensoniq = ac97->private_data; 617 unsigned int t, x, fail = 0; 618 619 __again: 620 down(&ensoniq->src_mutex); 621 for (t = 0; t < POLL_COUNT; t++) { 622 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) { 623 /* save the current state for latter */ 624 x = snd_es1371_wait_src_ready(ensoniq); 625 outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 626 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 0x00010000, 627 ES_REG(ensoniq, 1371_SMPRATE)); 628 /* wait for not busy (state 0) first to avoid 629 transition states */ 630 for (t = 0; t < POLL_COUNT; t++) { 631 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00000000) 632 break; 633 } 634 /* wait for a SAFE time to write addr/data and then do it, dammit */ 635 for (t = 0; t < POLL_COUNT; t++) { 636 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00010000) 637 break; 638 } 639 outl(ES_1371_CODEC_READS(reg), ES_REG(ensoniq, 1371_CODEC)); 640 /* restore SRC reg */ 641 snd_es1371_wait_src_ready(ensoniq); 642 outl(x, ES_REG(ensoniq, 1371_SMPRATE)); 643 /* wait for WIP again */ 644 for (t = 0; t < POLL_COUNT; t++) { 645 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) 646 break; 647 } 648 /* now wait for the stinkin' data (RDY) */ 649 for (t = 0; t < POLL_COUNT; t++) { 650 if ((x = inl(ES_REG(ensoniq, 1371_CODEC))) & ES_1371_CODEC_RDY) { 651 up(&ensoniq->src_mutex); 652 return ES_1371_CODEC_READ(x); 653 } 654 } 655 up(&ensoniq->src_mutex); 656 if (++fail > 10) { 657 snd_printk("codec read timeout (final) at 0x%lx, reg = 0x%x [0x%x]\n", ES_REG(ensoniq, 1371_CODEC), reg, inl(ES_REG(ensoniq, 1371_CODEC))); 658 return 0; 659 } 660 goto __again; 661 } 662 } 663 up(&ensoniq->src_mutex); 664 snd_printk("es1371: codec read timeout at 0x%lx [0x%x]\n", ES_REG(ensoniq, 1371_CODEC), inl(ES_REG(ensoniq, 1371_CODEC))); 665 return 0; 666 } 667 668 static void snd_es1371_codec_wait(ac97_t *ac97) 669 { 670 msleep(750); 671 snd_es1371_codec_read(ac97, AC97_RESET); 672 snd_es1371_codec_read(ac97, AC97_VENDOR_ID1); 673 snd_es1371_codec_read(ac97, AC97_VENDOR_ID2); 674 msleep(50); 675 } 676 677 static void snd_es1371_adc_rate(ensoniq_t * ensoniq, unsigned int rate) 678 { 679 unsigned int n, truncm, freq, result; 680 681 down(&ensoniq->src_mutex); 682 n = rate / 3000; 683 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 684 n--; 685 truncm = (21 * n - 1) | 1; 686 freq = ((48000UL << 15) / rate) * n; 687 result = (48000UL << 15) / (freq / n); 688 if (rate >= 24000) { 689 if (truncm > 239) 690 truncm = 239; 691 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 692 (((239 - truncm) >> 1) << 9) | (n << 4)); 693 } else { 694 if (truncm > 119) 695 truncm = 119; 696 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 697 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 698 } 699 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 700 (snd_es1371_src_read(ensoniq, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 0x00ff) | 701 ((freq >> 5) & 0xfc00)); 702 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 703 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, n << 8); 704 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, n << 8); 705 up(&ensoniq->src_mutex); 706 } 707 708 static void snd_es1371_dac1_rate(ensoniq_t * ensoniq, unsigned int rate) 709 { 710 unsigned int freq, r; 711 712 down(&ensoniq->src_mutex); 713 freq = ((rate << 15) + 1500) / 3000; 714 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P2 | ES_1371_DIS_R1)) | ES_1371_DIS_P1; 715 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 716 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 717 (snd_es1371_src_read(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS) & 0x00ff) | 718 ((freq >> 5) & 0xfc00)); 719 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 720 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P2 | ES_1371_DIS_R1)); 721 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 722 up(&ensoniq->src_mutex); 723 } 724 725 static void snd_es1371_dac2_rate(ensoniq_t * ensoniq, unsigned int rate) 726 { 727 unsigned int freq, r; 728 729 down(&ensoniq->src_mutex); 730 freq = ((rate << 15) + 1500) / 3000; 731 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | ES_1371_DIS_R1)) | ES_1371_DIS_P2; 732 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 733 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 734 (snd_es1371_src_read(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS) & 0x00ff) | 735 ((freq >> 5) & 0xfc00)); 736 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 737 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | ES_1371_DIS_R1)); 738 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 739 up(&ensoniq->src_mutex); 610 static void snd_es1371_codec_write(struct snd_ac97 *ac97, 611 unsigned short reg, unsigned short val) 612 { 613 struct ensoniq *ensoniq = ac97->private_data; 614 unsigned int t, x; 615 616 down(&ensoniq->src_mutex); 617 for (t = 0; t < POLL_COUNT; t++) { 618 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) { 619 /* save the current state for latter */ 620 x = snd_es1371_wait_src_ready(ensoniq); 621 outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 622 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 0x00010000, 623 ES_REG(ensoniq, 1371_SMPRATE)); 624 /* wait for not busy (state 0) first to avoid 625 transition states */ 626 for (t = 0; t < POLL_COUNT; t++) { 627 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 628 0x00000000) 629 break; 630 } 631 /* wait for a SAFE time to write addr/data and then do it, dammit */ 632 for (t = 0; t < POLL_COUNT; t++) { 633 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 634 0x00010000) 635 break; 636 } 637 outl(ES_1371_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1371_CODEC)); 638 /* restore SRC reg */ 639 snd_es1371_wait_src_ready(ensoniq); 640 outl(x, ES_REG(ensoniq, 1371_SMPRATE)); 641 up(&ensoniq->src_mutex); 642 return; 643 } 644 } 645 up(&ensoniq->src_mutex); 646 snd_printk(KERN_ERR "codec write timeout at 0x%lx [0x%x]\n", 647 ES_REG(ensoniq, 1371_CODEC), inl(ES_REG(ensoniq, 1371_CODEC))); 648 } 649 650 static unsigned short snd_es1371_codec_read(struct snd_ac97 *ac97, 651 unsigned short reg) 652 { 653 struct ensoniq *ensoniq = ac97->private_data; 654 unsigned int t, x, fail = 0; 655 656 __again: 657 down(&ensoniq->src_mutex); 658 for (t = 0; t < POLL_COUNT; t++) { 659 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) { 660 /* save the current state for latter */ 661 x = snd_es1371_wait_src_ready(ensoniq); 662 outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | 663 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 0x00010000, 664 ES_REG(ensoniq, 1371_SMPRATE)); 665 /* wait for not busy (state 0) first to avoid 666 transition states */ 667 for (t = 0; t < POLL_COUNT; t++) { 668 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 669 0x00000000) 670 break; 671 } 672 /* wait for a SAFE time to write addr/data and then do it, dammit */ 673 for (t = 0; t < POLL_COUNT; t++) { 674 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 675 0x00010000) 676 break; 677 } 678 outl(ES_1371_CODEC_READS(reg), ES_REG(ensoniq, 1371_CODEC)); 679 /* restore SRC reg */ 680 snd_es1371_wait_src_ready(ensoniq); 681 outl(x, ES_REG(ensoniq, 1371_SMPRATE)); 682 /* wait for WIP again */ 683 for (t = 0; t < POLL_COUNT; t++) { 684 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) 685 break; 686 } 687 /* now wait for the stinkin' data (RDY) */ 688 for (t = 0; t < POLL_COUNT; t++) { 689 if ((x = inl(ES_REG(ensoniq, 1371_CODEC))) & ES_1371_CODEC_RDY) { 690 up(&ensoniq->src_mutex); 691 return ES_1371_CODEC_READ(x); 692 } 693 } 694 up(&ensoniq->src_mutex); 695 if (++fail > 10) { 696 snd_printk(KERN_ERR "codec read timeout (final) " 697 "at 0x%lx, reg = 0x%x [0x%x]\n", 698 ES_REG(ensoniq, 1371_CODEC), reg, 699 inl(ES_REG(ensoniq, 1371_CODEC))); 700 return 0; 701 } 702 goto __again; 703 } 704 } 705 up(&ensoniq->src_mutex); 706 snd_printk(KERN_ERR "es1371: codec read timeout at 0x%lx [0x%x]\n", 707 ES_REG(ensoniq, 1371_CODEC), inl(ES_REG(ensoniq, 1371_CODEC))); 708 return 0; 709 } 710 711 static void snd_es1371_codec_wait(struct snd_ac97 *ac97) 712 { 713 msleep(750); 714 snd_es1371_codec_read(ac97, AC97_RESET); 715 snd_es1371_codec_read(ac97, AC97_VENDOR_ID1); 716 snd_es1371_codec_read(ac97, AC97_VENDOR_ID2); 717 msleep(50); 718 } 719 720 static void snd_es1371_adc_rate(struct ensoniq * ensoniq, unsigned int rate) 721 { 722 unsigned int n, truncm, freq, result; 723 724 down(&ensoniq->src_mutex); 725 n = rate / 3000; 726 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 727 n--; 728 truncm = (21 * n - 1) | 1; 729 freq = ((48000UL << 15) / rate) * n; 730 result = (48000UL << 15) / (freq / n); 731 if (rate >= 24000) { 732 if (truncm > 239) 733 truncm = 239; 734 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 735 (((239 - truncm) >> 1) << 9) | (n << 4)); 736 } else { 737 if (truncm > 119) 738 truncm = 119; 739 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 740 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 741 } 742 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 743 (snd_es1371_src_read(ensoniq, ES_SMPREG_ADC + 744 ES_SMPREG_INT_REGS) & 0x00ff) | 745 ((freq >> 5) & 0xfc00)); 746 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 747 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, n << 8); 748 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, n << 8); 749 up(&ensoniq->src_mutex); 750 } 751 752 static void snd_es1371_dac1_rate(struct ensoniq * ensoniq, unsigned int rate) 753 { 754 unsigned int freq, r; 755 756 down(&ensoniq->src_mutex); 757 freq = ((rate << 15) + 1500) / 3000; 758 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | 759 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 760 ES_1371_DIS_P1; 761 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 762 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 763 (snd_es1371_src_read(ensoniq, ES_SMPREG_DAC1 + 764 ES_SMPREG_INT_REGS) & 0x00ff) | 765 ((freq >> 5) & 0xfc00)); 766 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 767 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | 768 ES_1371_DIS_P2 | ES_1371_DIS_R1)); 769 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 770 up(&ensoniq->src_mutex); 771 } 772 773 static void snd_es1371_dac2_rate(struct ensoniq * ensoniq, unsigned int rate) 774 { 775 unsigned int freq, r; 776 777 down(&ensoniq->src_mutex); 778 freq = ((rate << 15) + 1500) / 3000; 779 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | 780 ES_1371_DIS_P1 | ES_1371_DIS_R1)) | 781 ES_1371_DIS_P2; 782 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 783 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 784 (snd_es1371_src_read(ensoniq, ES_SMPREG_DAC2 + 785 ES_SMPREG_INT_REGS) & 0x00ff) | 786 ((freq >> 5) & 0xfc00)); 787 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_VFREQ_FRAC, 788 freq & 0x7fff); 789 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | 790 ES_1371_DIS_P1 | ES_1371_DIS_R1)); 791 outl(r, ES_REG(ensoniq, 1371_SMPRATE)); 792 up(&ensoniq->src_mutex); 740 793 } 741 794 742 795 #endif /* CHIP1371 */ 743 796 744 static int snd_ensoniq_trigger(s nd_pcm_substream_t*substream, int cmd)745 { 746 ensoniq_t*ensoniq = snd_pcm_substream_chip(substream);747 748 749 750 751 752 753 snd_pcm_substream_t*s;754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 snd_pcm_substream_t*s;780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 797 static int snd_ensoniq_trigger(struct snd_pcm_substream *substream, int cmd) 798 { 799 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 800 switch (cmd) { 801 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 802 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 803 { 804 unsigned int what = 0; 805 struct list_head *pos; 806 struct snd_pcm_substream *s; 807 snd_pcm_group_for_each(pos, substream) { 808 s = snd_pcm_group_substream_entry(pos); 809 if (s == ensoniq->playback1_substream) { 810 what |= ES_P1_PAUSE; 811 snd_pcm_trigger_done(s, substream); 812 } else if (s == ensoniq->playback2_substream) { 813 what |= ES_P2_PAUSE; 814 snd_pcm_trigger_done(s, substream); 815 } else if (s == ensoniq->capture_substream) 816 return -EINVAL; 817 } 818 spin_lock(&ensoniq->reg_lock); 819 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 820 ensoniq->sctrl |= what; 821 else 822 ensoniq->sctrl &= ~what; 823 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 824 spin_unlock(&ensoniq->reg_lock); 825 break; 826 } 827 case SNDRV_PCM_TRIGGER_START: 828 case SNDRV_PCM_TRIGGER_STOP: 829 { 830 unsigned int what = 0; 831 struct list_head *pos; 832 struct snd_pcm_substream *s; 833 snd_pcm_group_for_each(pos, substream) { 834 s = snd_pcm_group_substream_entry(pos); 835 if (s == ensoniq->playback1_substream) { 836 what |= ES_DAC1_EN; 837 snd_pcm_trigger_done(s, substream); 838 } else if (s == ensoniq->playback2_substream) { 839 what |= ES_DAC2_EN; 840 snd_pcm_trigger_done(s, substream); 841 } else if (s == ensoniq->capture_substream) { 842 what |= ES_ADC_EN; 843 snd_pcm_trigger_done(s, substream); 844 } 845 } 846 spin_lock(&ensoniq->reg_lock); 847 if (cmd == SNDRV_PCM_TRIGGER_START) 848 ensoniq->ctrl |= what; 849 else 850 ensoniq->ctrl &= ~what; 851 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 852 spin_unlock(&ensoniq->reg_lock); 853 break; 854 } 855 default: 856 return -EINVAL; 857 } 858 return 0; 806 859 } 807 860 … … 810 863 */ 811 864 812 static int snd_ensoniq_hw_params(snd_pcm_substream_t * substream, 813 snd_pcm_hw_params_t * hw_params) 814 { 815 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 816 } 817 818 static int snd_ensoniq_hw_free(snd_pcm_substream_t * substream) 819 { 820 return snd_pcm_lib_free_pages(substream); 821 } 822 823 static int snd_ensoniq_playback1_prepare(snd_pcm_substream_t * substream) 824 { 825 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 826 snd_pcm_runtime_t *runtime = substream->runtime; 827 unsigned int mode = 0; 828 829 #ifdef DEBUG 830 dprintf(("snd_ensoniq_playback1_prepare")); 831 #endif 832 833 ensoniq->p1_dma_size = snd_pcm_lib_buffer_bytes(substream); 834 ensoniq->p1_period_size = snd_pcm_lib_period_bytes(substream); 835 if (snd_pcm_format_width(runtime->format) == 16) 836 mode |= 0x02; 837 if (runtime->channels > 1) 838 mode |= 0x01; 839 spin_lock_irq(&ensoniq->reg_lock); 840 ensoniq->ctrl &= ~ES_DAC1_EN; 865 static int snd_ensoniq_hw_params(struct snd_pcm_substream *substream, 866 struct snd_pcm_hw_params *hw_params) 867 { 868 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 869 } 870 871 static int snd_ensoniq_hw_free(struct snd_pcm_substream *substream) 872 { 873 return snd_pcm_lib_free_pages(substream); 874 } 875 876 static int snd_ensoniq_playback1_prepare(struct snd_pcm_substream *substream) 877 { 878 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 879 struct snd_pcm_runtime *runtime = substream->runtime; 880 unsigned int mode = 0; 881 882 ensoniq->p1_dma_size = snd_pcm_lib_buffer_bytes(substream); 883 ensoniq->p1_period_size = snd_pcm_lib_period_bytes(substream); 884 if (snd_pcm_format_width(runtime->format) == 16) 885 mode |= 0x02; 886 if (runtime->channels > 1) 887 mode |= 0x01; 888 spin_lock_irq(&ensoniq->reg_lock); 889 ensoniq->ctrl &= ~ES_DAC1_EN; 841 890 #ifdef CHIP1371 842 /* 48k doesn't need SRC (it breaks AC3-passthru) */ 843 if (runtime->rate == 48000) 844 ensoniq->ctrl |= ES_1373_BYPASS_P1; 845 else 846 ensoniq->ctrl &= ~ES_1373_BYPASS_P1; 847 #endif 848 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 849 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 850 outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME)); 851 outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE)); 852 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM); 853 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode); 854 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 855 outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1, ES_REG(ensoniq, DAC1_COUNT)); 856 #ifdef CHIP1370 857 ensoniq->ctrl &= ~ES_1370_WTSRSELM; 858 switch (runtime->rate) { 859 case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break; 860 case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break; 861 case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break; 862 case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break; 863 default: snd_BUG(); 864 } 865 #endif 866 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 867 spin_unlock_irq(&ensoniq->reg_lock); 891 /* 48k doesn't need SRC (it breaks AC3-passthru) */ 892 if (runtime->rate == 48000) 893 ensoniq->ctrl |= ES_1373_BYPASS_P1; 894 else 895 ensoniq->ctrl &= ~ES_1373_BYPASS_P1; 896 #endif 897 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 898 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 899 outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME)); 900 outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE)); 901 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM); 902 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode); 903 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 904 outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 905 ES_REG(ensoniq, DAC1_COUNT)); 906 #ifdef CHIP1370 907 ensoniq->ctrl &= ~ES_1370_WTSRSELM; 908 switch (runtime->rate) { 909 case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break; 910 case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break; 911 case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break; 912 case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break; 913 default: snd_BUG(); 914 } 915 #endif 916 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 917 spin_unlock_irq(&ensoniq->reg_lock); 868 918 #ifndef CHIP1370 869 snd_es1371_dac1_rate(ensoniq, runtime->rate); 870 #endif 871 return 0; 872 } 873 874 static int snd_ensoniq_playback2_prepare(snd_pcm_substream_t * substream) 875 { 876 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 877 snd_pcm_runtime_t *runtime = substream->runtime; 878 unsigned int mode = 0; 879 880 #ifdef DEBUG 881 dprintf(("snd_ensoniq_playback2_prepare")); 882 #endif 883 ensoniq->p2_dma_size = snd_pcm_lib_buffer_bytes(substream); 884 ensoniq->p2_period_size = snd_pcm_lib_period_bytes(substream); 885 if (snd_pcm_format_width(runtime->format) == 16) 886 mode |= 0x02; 887 if (runtime->channels > 1) 888 mode |= 0x01; 889 spin_lock_irq(&ensoniq->reg_lock); 890 ensoniq->ctrl &= ~ES_DAC2_EN; 891 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 892 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 893 outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME)); 894 outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE)); 895 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN | 896 ES_P2_END_INCM | ES_P2_ST_INCM | ES_P2_MODEM); 897 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) | 898 ES_P2_END_INCO(mode & 2 ? 2 : 1) | ES_P2_ST_INCO(0); 899 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 900 outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1, ES_REG(ensoniq, DAC2_COUNT)); 901 #ifdef CHIP1370 902 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) { 903 ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 904 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 905 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2; 906 } 907 #endif 908 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 909 spin_unlock_irq(&ensoniq->reg_lock); 919 snd_es1371_dac1_rate(ensoniq, runtime->rate); 920 #endif 921 return 0; 922 } 923 924 static int snd_ensoniq_playback2_prepare(struct snd_pcm_substream *substream) 925 { 926 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 927 struct snd_pcm_runtime *runtime = substream->runtime; 928 unsigned int mode = 0; 929 930 ensoniq->p2_dma_size = snd_pcm_lib_buffer_bytes(substream); 931 ensoniq->p2_period_size = snd_pcm_lib_period_bytes(substream); 932 if (snd_pcm_format_width(runtime->format) == 16) 933 mode |= 0x02; 934 if (runtime->channels > 1) 935 mode |= 0x01; 936 spin_lock_irq(&ensoniq->reg_lock); 937 ensoniq->ctrl &= ~ES_DAC2_EN; 938 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 939 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 940 outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME)); 941 outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE)); 942 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN | 943 ES_P2_END_INCM | ES_P2_ST_INCM | ES_P2_MODEM); 944 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) | 945 ES_P2_END_INCO(mode & 2 ? 2 : 1) | ES_P2_ST_INCO(0); 946 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 947 outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 948 ES_REG(ensoniq, DAC2_COUNT)); 949 #ifdef CHIP1370 950 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) { 951 ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 952 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 953 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2; 954 } 955 #endif 956 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 957 spin_unlock_irq(&ensoniq->reg_lock); 910 958 #ifndef CHIP1370 911 snd_es1371_dac2_rate(ensoniq, runtime->rate); 912 #endif 913 return 0; 914 } 915 916 static int snd_ensoniq_capture_prepare(snd_pcm_substream_t * substream) 917 { 918 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 919 snd_pcm_runtime_t *runtime = substream->runtime; 920 unsigned int mode = 0; 921 922 ensoniq->c_dma_size = snd_pcm_lib_buffer_bytes(substream); 923 ensoniq->c_period_size = snd_pcm_lib_period_bytes(substream); 924 if (snd_pcm_format_width(runtime->format) == 16) 925 mode |= 0x02; 926 if (runtime->channels > 1) 927 mode |= 0x01; 928 spin_lock_irq(&ensoniq->reg_lock); 929 ensoniq->ctrl &= ~ES_ADC_EN; 930 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 931 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 932 outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME)); 933 outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE)); 934 ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM); 935 ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode); 936 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 937 outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1, ES_REG(ensoniq, ADC_COUNT)); 938 #ifdef CHIP1370 939 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) { 940 ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 941 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 942 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE; 943 } 944 #endif 945 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 946 spin_unlock_irq(&ensoniq->reg_lock); 959 snd_es1371_dac2_rate(ensoniq, runtime->rate); 960 #endif 961 return 0; 962 } 963 964 static int snd_ensoniq_capture_prepare(struct snd_pcm_substream *substream) 965 { 966 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 967 struct snd_pcm_runtime *runtime = substream->runtime; 968 unsigned int mode = 0; 969 970 ensoniq->c_dma_size = snd_pcm_lib_buffer_bytes(substream); 971 ensoniq->c_period_size = snd_pcm_lib_period_bytes(substream); 972 if (snd_pcm_format_width(runtime->format) == 16) 973 mode |= 0x02; 974 if (runtime->channels > 1) 975 mode |= 0x01; 976 spin_lock_irq(&ensoniq->reg_lock); 977 ensoniq->ctrl &= ~ES_ADC_EN; 978 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 979 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 980 outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME)); 981 outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE)); 982 ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM); 983 ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode); 984 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 985 outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 986 ES_REG(ensoniq, ADC_COUNT)); 987 #ifdef CHIP1370 988 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) { 989 ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 990 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 991 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE; 992 } 993 #endif 994 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 995 spin_unlock_irq(&ensoniq->reg_lock); 947 996 #ifndef CHIP1370 948 949 #endif 950 951 } 952 953 static snd_pcm_uframes_t snd_ensoniq_playback1_pointer(s nd_pcm_substream_t *substream)954 { 955 ensoniq_t*ensoniq = snd_pcm_substream_chip(substream);956 957 958 959 960 961 962 963 964 965 966 967 968 } 969 970 static snd_pcm_uframes_t snd_ensoniq_playback2_pointer(s nd_pcm_substream_t *substream)971 { 972 ensoniq_t*ensoniq = snd_pcm_substream_chip(substream);973 974 975 976 977 978 979 980 981 982 983 984 985 } 986 987 static snd_pcm_uframes_t snd_ensoniq_capture_pointer(s nd_pcm_substream_t *substream)988 { 989 ensoniq_t*ensoniq = snd_pcm_substream_chip(substream);990 991 992 993 994 995 996 997 998 999 1000 1001 1002 } 1003 1004 static s nd_pcm_hardware_tsnd_ensoniq_playback1 =1005 { 1006 /* info: */(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |1007 1008 1009 1010 /* formats: */SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,1011 /* rates: */ 997 snd_es1371_adc_rate(ensoniq, runtime->rate); 998 #endif 999 return 0; 1000 } 1001 1002 static snd_pcm_uframes_t snd_ensoniq_playback1_pointer(struct snd_pcm_substream *substream) 1003 { 1004 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1005 size_t ptr; 1006 1007 spin_lock(&ensoniq->reg_lock); 1008 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC1_EN) { 1009 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 1010 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, DAC1_SIZE))); 1011 ptr = bytes_to_frames(substream->runtime, ptr); 1012 } else { 1013 ptr = 0; 1014 } 1015 spin_unlock(&ensoniq->reg_lock); 1016 return ptr; 1017 } 1018 1019 static snd_pcm_uframes_t snd_ensoniq_playback2_pointer(struct snd_pcm_substream *substream) 1020 { 1021 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1022 size_t ptr; 1023 1024 spin_lock(&ensoniq->reg_lock); 1025 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC2_EN) { 1026 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 1027 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, DAC2_SIZE))); 1028 ptr = bytes_to_frames(substream->runtime, ptr); 1029 } else { 1030 ptr = 0; 1031 } 1032 spin_unlock(&ensoniq->reg_lock); 1033 return ptr; 1034 } 1035 1036 static snd_pcm_uframes_t snd_ensoniq_capture_pointer(struct snd_pcm_substream *substream) 1037 { 1038 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1039 size_t ptr; 1040 1041 spin_lock(&ensoniq->reg_lock); 1042 if (inl(ES_REG(ensoniq, CONTROL)) & ES_ADC_EN) { 1043 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 1044 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, ADC_SIZE))); 1045 ptr = bytes_to_frames(substream->runtime, ptr); 1046 } else { 1047 ptr = 0; 1048 } 1049 spin_unlock(&ensoniq->reg_lock); 1050 return ptr; 1051 } 1052 1053 static struct snd_pcm_hardware snd_ensoniq_playback1 = 1054 { 1055 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1056 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1057 SNDRV_PCM_INFO_MMAP_VALID | 1058 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1059 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 1060 .rates = 1012 1061 #ifndef CHIP1370 1013 1062 SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 1014 1063 #else 1015 1016 SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_22050 | 1017 1018 #endif 1019 /* rate_min: */4000,1020 /* rate_max: */48000,1021 /* channels_min: */1,1022 /* channels_max: */2,1023 /* buffer_bytes_max: */(128*1024),1024 /* period_bytes_min: */64,1025 /* period_bytes_max: */(128*1024),1026 /* periods_min: */1,1027 /* periods_max: */1024,1028 /* fifo_size: */ 0 1064 (SNDRV_PCM_RATE_KNOT | /* 5512Hz rate */ 1065 SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_22050 | 1066 SNDRV_PCM_RATE_44100), 1067 #endif 1068 .rate_min = 4000, 1069 .rate_max = 48000, 1070 .channels_min = 1, 1071 .channels_max = 2, 1072 .buffer_bytes_max = (128*1024), 1073 .period_bytes_min = 64, 1074 .period_bytes_max = (128*1024), 1075 .periods_min = 1, 1076 .periods_max = 1024, 1077 .fifo_size = 0, 1029 1078 }; 1030 1079 1031 static s nd_pcm_hardware_tsnd_ensoniq_playback2 =1032 { 1033 /* info: */(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |1034 1035 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE | 1036 1037 /* formats: */SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,1038 1039 /* rate_min: */4000,1040 /* rate_max: */48000,1041 /* channels_min: */1,1042 /* channels_max: */2,1043 /* buffer_bytes_max: */(128*1024),1044 /* period_bytes_min: */64,1045 /* period_bytes_max: */(128*1024),1046 /* periods_min: */1,1047 /* periods_max: */1024,1048 /* fifo_size: */ 0 1080 static struct snd_pcm_hardware snd_ensoniq_playback2 = 1081 { 1082 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1083 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1084 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE | 1085 SNDRV_PCM_INFO_SYNC_START), 1086 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 1087 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 1088 .rate_min = 4000, 1089 .rate_max = 48000, 1090 .channels_min = 1, 1091 .channels_max = 2, 1092 .buffer_bytes_max = (128*1024), 1093 .period_bytes_min = 64, 1094 .period_bytes_max = (128*1024), 1095 .periods_min = 1, 1096 .periods_max = 1024, 1097 .fifo_size = 0, 1049 1098 }; 1050 1099 1051 static s nd_pcm_hardware_tsnd_ensoniq_capture =1052 { 1053 /* info: */(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |1054 1055 1056 /* formats: */SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,1057 /* rates: */SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,1058 /* rate_min: */4000,1059 /* rate_max: */48000,1060 /* channels_min: */1,1061 /* channels_max: */2,1062 /* buffer_bytes_max: */(128*1024),1063 /* period_bytes_min: */64,1064 /* period_bytes_max: */(128*1024),1065 /* periods_min: */1,1066 /* periods_max: */1024,1067 /* fifo_size: */0,1100 static struct snd_pcm_hardware snd_ensoniq_capture = 1101 { 1102 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1103 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1104 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START), 1105 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 1106 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 1107 .rate_min = 4000, 1108 .rate_max = 48000, 1109 .channels_min = 1, 1110 .channels_max = 2, 1111 .buffer_bytes_max = (128*1024), 1112 .period_bytes_min = 64, 1113 .period_bytes_max = (128*1024), 1114 .periods_min = 1, 1115 .periods_max = 1024, 1116 .fifo_size = 0, 1068 1117 }; 1069 1118 1070 static int snd_ensoniq_playback1_open(snd_pcm_substream_t * substream) 1071 { 1072 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 1073 snd_pcm_runtime_t *runtime = substream->runtime; 1074 1075 #ifdef DEBUG 1076 dprintf(("snd_ensoniq_playback1_open")); 1077 #endif 1078 1079 ensoniq->mode |= ES_MODE_PLAY1; 1080 ensoniq->playback1_substream = substream; 1081 runtime->hw = snd_ensoniq_playback1; 1082 snd_pcm_set_sync(substream); 1083 spin_lock_irq(&ensoniq->reg_lock); 1084 if (ensoniq->spdif && ensoniq->playback2_substream == NULL) 1085 ensoniq->spdif_stream = ensoniq->spdif_default; 1086 spin_unlock_irq(&ensoniq->reg_lock); 1087 #ifdef CHIP1370 1088 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1089 &snd_es1370_hw_constraints_rates); 1119 static int snd_ensoniq_playback1_open(struct snd_pcm_substream *substream) 1120 { 1121 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1122 struct snd_pcm_runtime *runtime = substream->runtime; 1123 1124 ensoniq->mode |= ES_MODE_PLAY1; 1125 ensoniq->playback1_substream = substream; 1126 runtime->hw = snd_ensoniq_playback1; 1127 snd_pcm_set_sync(substream); 1128 spin_lock_irq(&ensoniq->reg_lock); 1129 if (ensoniq->spdif && ensoniq->playback2_substream == NULL) 1130 ensoniq->spdif_stream = ensoniq->spdif_default; 1131 spin_unlock_irq(&ensoniq->reg_lock); 1132 #ifdef CHIP1370 1133 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1134 &snd_es1370_hw_constraints_rates); 1090 1135 #else 1091 // snd_pcm_hw_constraint_ratdens(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1092 // &snd_es1371_hw_constraints_dac_clock); 1093 #endif 1094 return 0; 1095 } 1096 1097 static int snd_ensoniq_playback2_open(snd_pcm_substream_t * substream) 1098 { 1099 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 1100 snd_pcm_runtime_t *runtime = substream->runtime; 1101 1102 #ifdef DEBUG 1103 dprintf(("snd_ensoniq_playback2_open")); 1104 #endif 1105 ensoniq->mode |= ES_MODE_PLAY2; 1106 ensoniq->playback2_substream = substream; 1107 runtime->hw = snd_ensoniq_playback2; 1108 snd_pcm_set_sync(substream); 1109 spin_lock_irq(&ensoniq->reg_lock); 1110 if (ensoniq->spdif && ensoniq->playback1_substream == NULL) 1111 ensoniq->spdif_stream = ensoniq->spdif_default; 1112 spin_unlock_irq(&ensoniq->reg_lock); 1113 #ifdef CHIP1370 1114 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1115 &snd_es1370_hw_constraints_clock); 1136 snd_pcm_hw_constraint_ratdens(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1137 &snd_es1371_hw_constraints_dac_clock); 1138 #endif 1139 return 0; 1140 } 1141 1142 static int snd_ensoniq_playback2_open(struct snd_pcm_substream *substream) 1143 { 1144 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1145 struct snd_pcm_runtime *runtime = substream->runtime; 1146 1147 ensoniq->mode |= ES_MODE_PLAY2; 1148 ensoniq->playback2_substream = substream; 1149 runtime->hw = snd_ensoniq_playback2; 1150 snd_pcm_set_sync(substream); 1151 spin_lock_irq(&ensoniq->reg_lock); 1152 if (ensoniq->spdif && ensoniq->playback1_substream == NULL) 1153 ensoniq->spdif_stream = ensoniq->spdif_default; 1154 spin_unlock_irq(&ensoniq->reg_lock); 1155 #ifdef CHIP1370 1156 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1157 &snd_es1370_hw_constraints_clock); 1116 1158 #else 1117 //snd_pcm_hw_constraint_ratdens(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,1118 //&snd_es1371_hw_constraints_dac_clock);1119 #endif 1120 1121 } 1122 1123 static int snd_ensoniq_capture_open(s nd_pcm_substream_t *substream)1124 { 1125 ensoniq_t*ensoniq = snd_pcm_substream_chip(substream);1126 snd_pcm_runtime_t*runtime = substream->runtime;1127 1128 1129 1130 1131 1132 #ifdef CHIP1370 1133 1134 1159 snd_pcm_hw_constraint_ratdens(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1160 &snd_es1371_hw_constraints_dac_clock); 1161 #endif 1162 return 0; 1163 } 1164 1165 static int snd_ensoniq_capture_open(struct snd_pcm_substream *substream) 1166 { 1167 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1168 struct snd_pcm_runtime *runtime = substream->runtime; 1169 1170 ensoniq->mode |= ES_MODE_CAPTURE; 1171 ensoniq->capture_substream = substream; 1172 runtime->hw = snd_ensoniq_capture; 1173 snd_pcm_set_sync(substream); 1174 #ifdef CHIP1370 1175 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1176 &snd_es1370_hw_constraints_clock); 1135 1177 #else 1136 // snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1137 // &snd_es1371_hw_constraints_adc_clock); 1138 #endif 1139 return 0; 1140 } 1141 1142 static int snd_ensoniq_playback1_close(snd_pcm_substream_t * substream) 1143 { 1144 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 1145 1146 ensoniq->playback1_substream = NULL; 1147 ensoniq->mode &= ~ES_MODE_PLAY1; 1148 return 0; 1149 } 1150 1151 static int snd_ensoniq_playback2_close(snd_pcm_substream_t * substream) 1152 { 1153 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 1154 1155 ensoniq->playback2_substream = NULL; 1156 spin_lock_irq(&ensoniq->reg_lock); 1157 #ifdef CHIP1370 1158 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_PLAY2; 1159 #endif 1160 ensoniq->mode &= ~ES_MODE_PLAY2; 1161 spin_unlock_irq(&ensoniq->reg_lock); 1162 return 0; 1163 } 1164 1165 static int snd_ensoniq_capture_close(snd_pcm_substream_t * substream) 1166 { 1167 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream); 1168 1169 ensoniq->capture_substream = NULL; 1170 spin_lock_irq(&ensoniq->reg_lock); 1171 #ifdef CHIP1370 1172 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_CAPTURE; 1173 #endif 1174 ensoniq->mode &= ~ES_MODE_CAPTURE; 1175 spin_unlock_irq(&ensoniq->reg_lock); 1176 return 0; 1177 } 1178 1179 static snd_pcm_ops_t snd_ensoniq_playback1_ops = { 1180 /* open: */ snd_ensoniq_playback1_open, 1181 /* close: */ snd_ensoniq_playback1_close, 1182 /* ioctl: */ snd_pcm_lib_ioctl, 1183 /* hw_params:*/ snd_ensoniq_hw_params, 1184 /* hw_free: */ snd_ensoniq_hw_free, 1185 /* prepare: */ snd_ensoniq_playback1_prepare, 1186 /* trigger: */ snd_ensoniq_trigger, 1187 /* pointer: */ snd_ensoniq_playback1_pointer, 1188 0, 0 1178 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1179 &snd_es1371_hw_constraints_adc_clock); 1180 #endif 1181 return 0; 1182 } 1183 1184 static int snd_ensoniq_playback1_close(struct snd_pcm_substream *substream) 1185 { 1186 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1187 1188 ensoniq->playback1_substream = NULL; 1189 ensoniq->mode &= ~ES_MODE_PLAY1; 1190 return 0; 1191 } 1192 1193 static int snd_ensoniq_playback2_close(struct snd_pcm_substream *substream) 1194 { 1195 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1196 1197 ensoniq->playback2_substream = NULL; 1198 spin_lock_irq(&ensoniq->reg_lock); 1199 #ifdef CHIP1370 1200 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_PLAY2; 1201 #endif 1202 ensoniq->mode &= ~ES_MODE_PLAY2; 1203 spin_unlock_irq(&ensoniq->reg_lock); 1204 return 0; 1205 } 1206 1207 static int snd_ensoniq_capture_close(struct snd_pcm_substream *substream) 1208 { 1209 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1210 1211 ensoniq->capture_substream = NULL; 1212 spin_lock_irq(&ensoniq->reg_lock); 1213 #ifdef CHIP1370 1214 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_CAPTURE; 1215 #endif 1216 ensoniq->mode &= ~ES_MODE_CAPTURE; 1217 spin_unlock_irq(&ensoniq->reg_lock); 1218 return 0; 1219 } 1220 1221 static struct snd_pcm_ops snd_ensoniq_playback1_ops = { 1222 .open = snd_ensoniq_playback1_open, 1223 .close = snd_ensoniq_playback1_close, 1224 .ioctl = snd_pcm_lib_ioctl, 1225 .hw_params = snd_ensoniq_hw_params, 1226 .hw_free = snd_ensoniq_hw_free, 1227 .prepare = snd_ensoniq_playback1_prepare, 1228 .trigger = snd_ensoniq_trigger, 1229 .pointer = snd_ensoniq_playback1_pointer, 1189 1230 }; 1190 1231 1191 static snd_pcm_ops_t snd_ensoniq_playback2_ops = { 1192 /* open: */ snd_ensoniq_playback2_open, 1193 /* close: */ snd_ensoniq_playback2_close, 1194 /* ioctl: */ snd_pcm_lib_ioctl, 1195 /* hw_params:*/ snd_ensoniq_hw_params, 1196 /* hw_free: */ snd_ensoniq_hw_free, 1197 /* prepare: */ snd_ensoniq_playback2_prepare, 1198 /* trigger: */ snd_ensoniq_trigger, 1199 /* pointer: */ snd_ensoniq_playback2_pointer, 1200 0, 0 1232 static struct snd_pcm_ops snd_ensoniq_playback2_ops = { 1233 .open = snd_ensoniq_playback2_open, 1234 .close = snd_ensoniq_playback2_close, 1235 .ioctl = snd_pcm_lib_ioctl, 1236 .hw_params = snd_ensoniq_hw_params, 1237 .hw_free = snd_ensoniq_hw_free, 1238 .prepare = snd_ensoniq_playback2_prepare, 1239 .trigger = snd_ensoniq_trigger, 1240 .pointer = snd_ensoniq_playback2_pointer, 1201 1241 }; 1202 1242 1203 static snd_pcm_ops_t snd_ensoniq_capture_ops = { 1204 /* open: */ snd_ensoniq_capture_open, 1205 /* close: */ snd_ensoniq_capture_close, 1206 /* ioctl: */ snd_pcm_lib_ioctl, 1207 /* hw_params:*/ snd_ensoniq_hw_params, 1208 /* hw_free: */ snd_ensoniq_hw_free, 1209 /* prepare: */ snd_ensoniq_capture_prepare, 1210 /* trigger: */ snd_ensoniq_trigger, 1211 /* pointer: */ snd_ensoniq_capture_pointer, 1212 0, 0 1243 static struct snd_pcm_ops snd_ensoniq_capture_ops = { 1244 .open = snd_ensoniq_capture_open, 1245 .close = snd_ensoniq_capture_close, 1246 .ioctl = snd_pcm_lib_ioctl, 1247 .hw_params = snd_ensoniq_hw_params, 1248 .hw_free = snd_ensoniq_hw_free, 1249 .prepare = snd_ensoniq_capture_prepare, 1250 .trigger = snd_ensoniq_trigger, 1251 .pointer = snd_ensoniq_capture_pointer, 1213 1252 }; 1214 1253 1215 static void snd_ensoniq_pcm_free(snd_pcm_t *pcm) 1216 { 1217 ensoniq_t *ensoniq = pcm->private_data; 1218 ensoniq->pcm1 = NULL; 1219 snd_pcm_lib_preallocate_free_for_all(pcm); 1220 } 1221 1222 static int __devinit snd_ensoniq_pcm(ensoniq_t * ensoniq, int device, snd_pcm_t ** rpcm) 1223 { 1224 snd_pcm_t *pcm; 1225 int err; 1226 1227 if (rpcm) 1228 *rpcm = NULL; 1229 #ifdef DEBUG 1230 dprintf(("snd_ensoniq_pcm")); 1231 #endif 1232 1233 #ifdef CHIP1370 1234 err = snd_pcm_new(ensoniq->card, "ES1370/1", device, 1, 1, &pcm); 1254 static int __devinit snd_ensoniq_pcm(struct ensoniq * ensoniq, int device, 1255 struct snd_pcm ** rpcm) 1256 { 1257 struct snd_pcm *pcm; 1258 int err; 1259 1260 if (rpcm) 1261 *rpcm = NULL; 1262 #ifdef CHIP1370 1263 err = snd_pcm_new(ensoniq->card, "ES1370/1", device, 1, 1, &pcm); 1235 1264 #else 1236 err = snd_pcm_new(ensoniq->card, "ES1371/1", device, 1, 1, &pcm); 1237 #endif 1238 if (err < 0) 1239 { 1240 #ifdef DEBUG 1241 dprintf(("snd_ensoniq_pcm error")); 1242 #endif 1243 return err; 1244 } 1245 1246 #ifdef CHIP1370 1247 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops); 1265 err = snd_pcm_new(ensoniq->card, "ES1371/1", device, 1, 1, &pcm); 1266 #endif 1267 if (err < 0) 1268 return err; 1269 1270 #ifdef CHIP1370 1271 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops); 1248 1272 #else 1249 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops); 1250 #endif 1251 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ensoniq_capture_ops); 1252 1253 pcm->private_data = ensoniq; 1254 pcm->private_free = snd_ensoniq_pcm_free; 1255 pcm->info_flags = 0; 1256 #ifdef CHIP1370 1257 strcpy(pcm->name, "ES1370 DAC2/ADC"); 1273 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops); 1274 #endif 1275 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ensoniq_capture_ops); 1276 1277 pcm->private_data = ensoniq; 1278 pcm->info_flags = 0; 1279 #ifdef CHIP1370 1280 strcpy(pcm->name, "ES1370 DAC2/ADC"); 1258 1281 #else 1259 strcpy(pcm->name, "ES1371 DAC2/ADC"); 1260 #endif 1261 ensoniq->pcm1 = pcm; 1262 1263 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1264 snd_dma_pci_data(ensoniq->pci), 64*1024, 128*1024); 1265 1266 if (rpcm) 1267 *rpcm = pcm; 1268 return 0; 1269 } 1270 1271 static void snd_ensoniq_pcm_free2(snd_pcm_t *pcm) 1272 { 1273 ensoniq_t *ensoniq = pcm->private_data; 1274 ensoniq->pcm2 = NULL; 1275 snd_pcm_lib_preallocate_free_for_all(pcm); 1276 } 1277 1278 static int __devinit snd_ensoniq_pcm2(ensoniq_t * ensoniq, int device, snd_pcm_t ** rpcm) 1279 { 1280 snd_pcm_t *pcm; 1281 int err; 1282 1283 #ifdef DEBUG 1284 dprintf(("snd_ensoniq_pcm2")); 1285 #endif 1286 1287 if (rpcm) 1288 *rpcm = NULL; 1289 #ifdef CHIP1370 1290 err = snd_pcm_new(ensoniq->card, "ES1370/2", device, 1, 0, &pcm); 1282 strcpy(pcm->name, "ES1371 DAC2/ADC"); 1283 #endif 1284 ensoniq->pcm1 = pcm; 1285 1286 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1287 snd_dma_pci_data(ensoniq->pci), 64*1024, 128*1024); 1288 1289 if (rpcm) 1290 *rpcm = pcm; 1291 return 0; 1292 } 1293 1294 static int __devinit snd_ensoniq_pcm2(struct ensoniq * ensoniq, int device, 1295 struct snd_pcm ** rpcm) 1296 { 1297 struct snd_pcm *pcm; 1298 int err; 1299 1300 if (rpcm) 1301 *rpcm = NULL; 1302 #ifdef CHIP1370 1303 err = snd_pcm_new(ensoniq->card, "ES1370/2", device, 1, 0, &pcm); 1291 1304 #else 1292 1293 #endif 1294 1295 1296 1297 #ifdef CHIP1370 1298 1305 err = snd_pcm_new(ensoniq->card, "ES1371/2", device, 1, 0, &pcm); 1306 #endif 1307 if (err < 0) 1308 return err; 1309 1310 #ifdef CHIP1370 1311 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops); 1299 1312 #else 1300 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops); 1301 #endif 1302 pcm->private_data = ensoniq; 1303 pcm->private_free = snd_ensoniq_pcm_free2; 1304 pcm->info_flags = 0; 1305 #ifdef CHIP1370 1306 strcpy(pcm->name, "ES1370 DAC1"); 1313 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops); 1314 #endif 1315 pcm->private_data = ensoniq; 1316 pcm->info_flags = 0; 1317 #ifdef CHIP1370 1318 strcpy(pcm->name, "ES1370 DAC1"); 1307 1319 #else 1308 1309 #endif 1310 1311 1312 1313 1314 1315 1316 1317 1320 strcpy(pcm->name, "ES1371 DAC1"); 1321 #endif 1322 ensoniq->pcm2 = pcm; 1323 1324 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1325 snd_dma_pci_data(ensoniq->pci), 64*1024, 128*1024); 1326 1327 if (rpcm) 1328 *rpcm = pcm; 1329 return 0; 1318 1330 } 1319 1331 … … 1326 1338 */ 1327 1339 #ifdef CHIP1371 1328 static int snd_ens1373_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1329 { 1330 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1331 uinfo->count = 1; 1332 return 0; 1333 } 1334 1335 static int snd_ens1373_spdif_default_get(snd_kcontrol_t * kcontrol, 1336 snd_ctl_elem_value_t * ucontrol) 1337 { 1338 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1339 spin_lock_irq(&ensoniq->reg_lock); 1340 ucontrol->value.iec958.status[0] = (ensoniq->spdif_default >> 0) & 0xff; 1341 ucontrol->value.iec958.status[1] = (ensoniq->spdif_default >> 8) & 0xff; 1342 ucontrol->value.iec958.status[2] = (ensoniq->spdif_default >> 16) & 0xff; 1343 ucontrol->value.iec958.status[3] = (ensoniq->spdif_default >> 24) & 0xff; 1344 spin_unlock_irq(&ensoniq->reg_lock); 1345 return 0; 1346 } 1347 1348 static int snd_ens1373_spdif_default_put(snd_kcontrol_t * kcontrol, 1349 snd_ctl_elem_value_t * ucontrol) 1350 { 1351 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1352 unsigned int val; 1353 int change; 1354 1355 val = ((u32)ucontrol->value.iec958.status[0] << 0) | 1356 ((u32)ucontrol->value.iec958.status[1] << 8) | 1357 ((u32)ucontrol->value.iec958.status[2] << 16) | 1358 ((u32)ucontrol->value.iec958.status[3] << 24); 1359 spin_lock_irq(&ensoniq->reg_lock); 1360 change = ensoniq->spdif_default != val; 1361 ensoniq->spdif_default = val; 1362 if (change && ensoniq->playback1_substream == NULL && ensoniq->playback2_substream == NULL) 1363 outl(val, ES_REG(ensoniq, CHANNEL_STATUS)); 1364 spin_unlock_irq(&ensoniq->reg_lock); 1365 return change; 1366 } 1367 1368 static int snd_ens1373_spdif_mask_get(snd_kcontrol_t * kcontrol, 1369 snd_ctl_elem_value_t * ucontrol) 1370 { 1371 ucontrol->value.iec958.status[0] = 0xff; 1372 ucontrol->value.iec958.status[1] = 0xff; 1373 ucontrol->value.iec958.status[2] = 0xff; 1374 ucontrol->value.iec958.status[3] = 0xff; 1375 return 0; 1376 } 1377 1378 static int snd_ens1373_spdif_stream_get(snd_kcontrol_t * kcontrol, 1379 snd_ctl_elem_value_t * ucontrol) 1380 { 1381 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1382 spin_lock_irq(&ensoniq->reg_lock); 1383 ucontrol->value.iec958.status[0] = (ensoniq->spdif_stream >> 0) & 0xff; 1384 ucontrol->value.iec958.status[1] = (ensoniq->spdif_stream >> 8) & 0xff; 1385 ucontrol->value.iec958.status[2] = (ensoniq->spdif_stream >> 16) & 0xff; 1386 ucontrol->value.iec958.status[3] = (ensoniq->spdif_stream >> 24) & 0xff; 1387 spin_unlock_irq(&ensoniq->reg_lock); 1388 return 0; 1389 } 1390 1391 static int snd_ens1373_spdif_stream_put(snd_kcontrol_t * kcontrol, 1392 snd_ctl_elem_value_t * ucontrol) 1393 { 1394 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1395 unsigned int val; 1396 int change; 1397 1398 val = ((u32)ucontrol->value.iec958.status[0] << 0) | 1399 ((u32)ucontrol->value.iec958.status[1] << 8) | 1400 ((u32)ucontrol->value.iec958.status[2] << 16) | 1401 ((u32)ucontrol->value.iec958.status[3] << 24); 1402 spin_lock_irq(&ensoniq->reg_lock); 1403 change = ensoniq->spdif_stream != val; 1404 ensoniq->spdif_stream = val; 1405 if (change && (ensoniq->playback1_substream != NULL || ensoniq->playback2_substream != NULL)) 1406 outl(val, ES_REG(ensoniq, CHANNEL_STATUS)); 1407 spin_unlock_irq(&ensoniq->reg_lock); 1408 return change; 1409 } 1410 1411 static snd_kcontrol_new_t snd_ens1373_spdif_default __devinitdata = 1412 { 1413 SNDRV_CTL_ELEM_IFACE_PCM,0,0, 1414 SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1415 0,0,0, 1416 snd_ens1373_spdif_info, 1417 snd_ens1373_spdif_default_get, 1418 snd_ens1373_spdif_default_put,0 1419 }; 1420 1421 static snd_kcontrol_new_t snd_ens1373_spdif_mask __devinitdata = 1422 { 1423 SNDRV_CTL_ELEM_IFACE_PCM,0,0, 1424 SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), 1425 0, 1426 SNDRV_CTL_ELEM_ACCESS_READ,0, 1427 snd_ens1373_spdif_info, 1428 snd_ens1373_spdif_mask_get,0,0 1429 }; 1430 1431 static snd_kcontrol_new_t snd_ens1373_spdif_stream __devinitdata = 1432 { 1433 SNDRV_CTL_ELEM_IFACE_PCM,0,0, 1434 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1435 0,0,0, 1436 snd_ens1373_spdif_info, 1437 snd_ens1373_spdif_stream_get, 1438 snd_ens1373_spdif_stream_put,0 1439 }; 1340 static int snd_ens1373_spdif_info(struct snd_kcontrol *kcontrol, 1341 struct snd_ctl_elem_info *uinfo) 1342 { 1343 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1344 uinfo->count = 1; 1345 return 0; 1346 } 1347 1348 static int snd_ens1373_spdif_default_get(struct snd_kcontrol *kcontrol, 1349 struct snd_ctl_elem_value *ucontrol) 1350 { 1351 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1352 spin_lock_irq(&ensoniq->reg_lock); 1353 ucontrol->value.iec958.status[0] = (ensoniq->spdif_default >> 0) & 0xff; 1354 ucontrol->value.iec958.status[1] = (ensoniq->spdif_default >> 8) & 0xff; 1355 ucontrol->value.iec958.status[2] = (ensoniq->spdif_default >> 16) & 0xff; 1356 ucontrol->value.iec958.status[3] = (ensoniq->spdif_default >> 24) & 0xff; 1357 spin_unlock_irq(&ensoniq->reg_lock); 1358 return 0; 1359 } 1360 1361 static int snd_ens1373_spdif_default_put(struct snd_kcontrol *kcontrol, 1362 struct snd_ctl_elem_value *ucontrol) 1363 { 1364 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1365 unsigned int val; 1366 int change; 1367 1368 val = ((u32)ucontrol->value.iec958.status[0] << 0) | 1369 ((u32)ucontrol->value.iec958.status[1] << 8) | 1370 ((u32)ucontrol->value.iec958.status[2] << 16) | 1371 ((u32)ucontrol->value.iec958.status[3] << 24); 1372 spin_lock_irq(&ensoniq->reg_lock); 1373 change = ensoniq->spdif_default != val; 1374 ensoniq->spdif_default = val; 1375 if (change && ensoniq->playback1_substream == NULL && 1376 ensoniq->playback2_substream == NULL) 1377 outl(val, ES_REG(ensoniq, CHANNEL_STATUS)); 1378 spin_unlock_irq(&ensoniq->reg_lock); 1379 return change; 1380 } 1381 1382 static int snd_ens1373_spdif_mask_get(struct snd_kcontrol *kcontrol, 1383 struct snd_ctl_elem_value *ucontrol) 1384 { 1385 ucontrol->value.iec958.status[0] = 0xff; 1386 ucontrol->value.iec958.status[1] = 0xff; 1387 ucontrol->value.iec958.status[2] = 0xff; 1388 ucontrol->value.iec958.status[3] = 0xff; 1389 return 0; 1390 } 1391 1392 static int snd_ens1373_spdif_stream_get(struct snd_kcontrol *kcontrol, 1393 struct snd_ctl_elem_value *ucontrol) 1394 { 1395 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1396 spin_lock_irq(&ensoniq->reg_lock); 1397 ucontrol->value.iec958.status[0] = (ensoniq->spdif_stream >> 0) & 0xff; 1398 ucontrol->value.iec958.status[1] = (ensoniq->spdif_stream >> 8) & 0xff; 1399 ucontrol->value.iec958.status[2] = (ensoniq->spdif_stream >> 16) & 0xff; 1400 ucontrol->value.iec958.status[3] = (ensoniq->spdif_stream >> 24) & 0xff; 1401 spin_unlock_irq(&ensoniq->reg_lock); 1402 return 0; 1403 } 1404 1405 static int snd_ens1373_spdif_stream_put(struct snd_kcontrol *kcontrol, 1406 struct snd_ctl_elem_value *ucontrol) 1407 { 1408 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1409 unsigned int val; 1410 int change; 1411 1412 val = ((u32)ucontrol->value.iec958.status[0] << 0) | 1413 ((u32)ucontrol->value.iec958.status[1] << 8) | 1414 ((u32)ucontrol->value.iec958.status[2] << 16) | 1415 ((u32)ucontrol->value.iec958.status[3] << 24); 1416 spin_lock_irq(&ensoniq->reg_lock); 1417 change = ensoniq->spdif_stream != val; 1418 ensoniq->spdif_stream = val; 1419 if (change && (ensoniq->playback1_substream != NULL || 1420 ensoniq->playback2_substream != NULL)) 1421 outl(val, ES_REG(ensoniq, CHANNEL_STATUS)); 1422 spin_unlock_irq(&ensoniq->reg_lock); 1423 return change; 1424 } 1440 1425 1441 1426 #define ES1371_SPDIF(xname) \ 1442 { SNDRV_CTL_ELEM_IFACE_MIXER, 0, 0, xname, 0, 0, 0, snd_es1371_spdif_info, \ 1443 snd_es1371_spdif_get, snd_es1371_spdif_put, 0 } 1444 1445 static int snd_es1371_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1446 { 1447 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1448 uinfo->count = 1; 1449 uinfo->value.integer.min = 0; 1450 uinfo->value.integer.max = 1; 1451 return 0; 1452 } 1453 1454 static int snd_es1371_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1455 { 1456 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1457 1458 spin_lock_irq(&ensoniq->reg_lock); 1459 ucontrol->value.integer.value[0] = ensoniq->ctrl & ES_1373_SPDIF_THRU ? 1 : 0; 1460 spin_unlock_irq(&ensoniq->reg_lock); 1461 return 0; 1462 } 1463 1464 static int snd_es1371_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1465 { 1466 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1467 unsigned int nval1, nval2; 1468 int change; 1469 1470 nval1 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_THRU : 0; 1471 nval2 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_EN : 0; 1472 spin_lock_irq(&ensoniq->reg_lock); 1473 change = (ensoniq->ctrl & ES_1373_SPDIF_THRU) != nval1; 1474 ensoniq->ctrl &= ~ES_1373_SPDIF_THRU; 1475 ensoniq->ctrl |= nval1; 1476 ensoniq->cssr &= ~ES_1373_SPDIF_EN; 1477 ensoniq->cssr |= nval2; 1478 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1479 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 1480 spin_unlock_irq(&ensoniq->reg_lock); 1481 return change; 1482 } 1427 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_es1371_spdif_info, \ 1428 .get = snd_es1371_spdif_get, .put = snd_es1371_spdif_put } 1429 1430 static int snd_es1371_spdif_info(struct snd_kcontrol *kcontrol, 1431 struct snd_ctl_elem_info *uinfo) 1432 { 1433 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1434 uinfo->count = 1; 1435 uinfo->value.integer.min = 0; 1436 uinfo->value.integer.max = 1; 1437 return 0; 1438 } 1439 1440 static int snd_es1371_spdif_get(struct snd_kcontrol *kcontrol, 1441 struct snd_ctl_elem_value *ucontrol) 1442 { 1443 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1444 1445 spin_lock_irq(&ensoniq->reg_lock); 1446 ucontrol->value.integer.value[0] = ensoniq->ctrl & ES_1373_SPDIF_THRU ? 1 : 0; 1447 spin_unlock_irq(&ensoniq->reg_lock); 1448 return 0; 1449 } 1450 1451 static int snd_es1371_spdif_put(struct snd_kcontrol *kcontrol, 1452 struct snd_ctl_elem_value *ucontrol) 1453 { 1454 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1455 unsigned int nval1, nval2; 1456 int change; 1457 1458 nval1 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_THRU : 0; 1459 nval2 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_EN : 0; 1460 spin_lock_irq(&ensoniq->reg_lock); 1461 change = (ensoniq->ctrl & ES_1373_SPDIF_THRU) != nval1; 1462 ensoniq->ctrl &= ~ES_1373_SPDIF_THRU; 1463 ensoniq->ctrl |= nval1; 1464 ensoniq->cssr &= ~ES_1373_SPDIF_EN; 1465 ensoniq->cssr |= nval2; 1466 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1467 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 1468 spin_unlock_irq(&ensoniq->reg_lock); 1469 return change; 1470 } 1471 1483 1472 1484 1473 /* spdif controls */ 1485 static s nd_kcontrol_new_tsnd_es1371_mixer_spdif[] __devinitdata = {1474 static struct snd_kcontrol_new snd_es1371_mixer_spdif[] __devinitdata = { 1486 1475 ES1371_SPDIF(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH)), 1487 1476 { … … 1508 1497 }; 1509 1498 1510 static int snd_es1373_rear_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1511 { 1512 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1513 uinfo->count = 1; 1514 uinfo->value.integer.min = 0; 1515 uinfo->value.integer.max = 1; 1516 return 0; 1517 } 1518 1519 static int snd_es1373_rear_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1520 { 1521 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1522 int val = 0; 1523 1524 spin_lock_irq(&ensoniq->reg_lock); 1525 if ((ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24)) == ES_1373_REAR_BIT26) 1526 val = 1; 1527 ucontrol->value.integer.value[0] = val; 1528 spin_unlock_irq(&ensoniq->reg_lock); 1529 return 0; 1530 } 1531 1532 static int snd_es1373_rear_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1533 { 1534 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1535 unsigned int nval1; 1536 int change; 1537 1538 nval1 = ucontrol->value.integer.value[0] ? ES_1373_REAR_BIT26 : (ES_1373_REAR_BIT27|ES_1373_REAR_BIT24); 1539 spin_lock_irq(&ensoniq->reg_lock); 1540 change = (ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24)) != nval1; 1541 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24); 1542 ensoniq->cssr |= nval1; 1543 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 1544 spin_unlock_irq(&ensoniq->reg_lock); 1545 return change; 1546 } 1547 1548 static snd_kcontrol_new_t snd_ens1373_rear __devinitdata = 1549 { 1550 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, 1551 "AC97 2ch->4ch Copy Switch",0,0,0, 1552 snd_es1373_rear_info, 1553 snd_es1373_rear_get, 1554 snd_es1373_rear_put,0 1499 1500 static int snd_es1373_rear_info(struct snd_kcontrol *kcontrol, 1501 struct snd_ctl_elem_info *uinfo) 1502 { 1503 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1504 uinfo->count = 1; 1505 uinfo->value.integer.min = 0; 1506 uinfo->value.integer.max = 1; 1507 return 0; 1508 } 1509 1510 static int snd_es1373_rear_get(struct snd_kcontrol *kcontrol, 1511 struct snd_ctl_elem_value *ucontrol) 1512 { 1513 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1514 int val = 0; 1515 1516 spin_lock_irq(&ensoniq->reg_lock); 1517 if ((ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26| 1518 ES_1373_REAR_BIT24)) == ES_1373_REAR_BIT26) 1519 val = 1; 1520 ucontrol->value.integer.value[0] = val; 1521 spin_unlock_irq(&ensoniq->reg_lock); 1522 return 0; 1523 } 1524 1525 static int snd_es1373_rear_put(struct snd_kcontrol *kcontrol, 1526 struct snd_ctl_elem_value *ucontrol) 1527 { 1528 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1529 unsigned int nval1; 1530 int change; 1531 1532 nval1 = ucontrol->value.integer.value[0] ? 1533 ES_1373_REAR_BIT26 : (ES_1373_REAR_BIT27|ES_1373_REAR_BIT24); 1534 spin_lock_irq(&ensoniq->reg_lock); 1535 change = (ensoniq->cssr & (ES_1373_REAR_BIT27| 1536 ES_1373_REAR_BIT26|ES_1373_REAR_BIT24)) != nval1; 1537 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24); 1538 ensoniq->cssr |= nval1; 1539 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 1540 spin_unlock_irq(&ensoniq->reg_lock); 1541 return change; 1542 } 1543 1544 static struct snd_kcontrol_new snd_ens1373_rear __devinitdata = 1545 { 1546 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1547 .name = "AC97 2ch->4ch Copy Switch", 1548 .info = snd_es1373_rear_info, 1549 .get = snd_es1373_rear_get, 1550 .put = snd_es1373_rear_put, 1555 1551 }; 1556 1552 1557 static int snd_es1373_line_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1553 static int snd_es1373_line_info(struct snd_kcontrol *kcontrol, 1554 struct snd_ctl_elem_info *uinfo) 1558 1555 { 1559 1556 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; … … 1564 1561 } 1565 1562 1566 static int snd_es1373_line_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1567 { 1568 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1563 static int snd_es1373_line_get(struct snd_kcontrol *kcontrol, 1564 struct snd_ctl_elem_value *ucontrol) 1565 { 1566 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1569 1567 int val = 0; 1570 1568 1571 1569 spin_lock_irq(&ensoniq->reg_lock); 1572 1570 if ((ensoniq->ctrl & ES_1371_GPIO_OUTM) >= 4) … … 1577 1575 } 1578 1576 1579 static int snd_es1373_line_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1580 { 1581 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1577 static int snd_es1373_line_put(struct snd_kcontrol *kcontrol, 1578 struct snd_ctl_elem_value *ucontrol) 1579 { 1580 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1582 1581 int changed; 1583 1582 unsigned int ctrl; 1584 1583 1585 1584 spin_lock_irq(&ensoniq->reg_lock); 1586 1585 ctrl = ensoniq->ctrl; … … 1596 1595 } 1597 1596 1598 static s nd_kcontrol_new_tsnd_ens1373_line __devinitdata =1599 { 1600 SNDRV_CTL_ELEM_IFACE_MIXER, 0,0,1601 "Line In->Rear Out Switch",0,0,0,1602 snd_es1373_line_info,1603 snd_es1373_line_get,1604 snd_es1373_line_put,01597 static struct snd_kcontrol_new snd_ens1373_line __devinitdata = 1598 { 1599 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1600 .name = "Line In->Rear Out Switch", 1601 .info = snd_es1373_line_info, 1602 .get = snd_es1373_line_get, 1603 .put = snd_es1373_line_put, 1605 1604 }; 1606 1605 1607 static void snd_ensoniq_mixer_free_ac97( ac97_t*ac97)1608 { 1609 ensoniq_t*ensoniq = ac97->private_data;1610 1606 static void snd_ensoniq_mixer_free_ac97(struct snd_ac97 *ac97) 1607 { 1608 struct ensoniq *ensoniq = ac97->private_data; 1609 ensoniq->u.es1371.ac97 = NULL; 1611 1610 } 1612 1611 1613 1612 static struct { 1614 1615 1616 1613 unsigned short vid; /* vendor ID */ 1614 unsigned short did; /* device ID */ 1615 unsigned char rev; /* revision */ 1617 1616 } es1371_spdif_present[] __devinitdata = { 1618 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880,CT5880REV_CT5880_C },1619 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880,CT5880REV_CT5880_D },1620 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880,CT5880REV_CT5880_E },1621 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371,ES1371REV_CT5880_A },1622 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371,ES1371REV_ES1373_8 },1623 { PCI_ANY_ID,PCI_ANY_ID }1617 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_C }, 1618 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_D }, 1619 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_E }, 1620 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_CT5880_A }, 1621 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_ES1373_8 }, 1622 { .vid = PCI_ANY_ID, .did = PCI_ANY_ID } 1624 1623 }; 1625 1624 1626 static int snd_ensoniq_1371_mixer(ensoniq_t * ensoniq) 1627 { 1628 snd_card_t *card = ensoniq->card; 1629 ac97_bus_t *pbus; 1630 ac97_template_t ac97; 1631 int err, idx; 1632 1633 static struct snd_ac97_bus_ops ops = { 1634 .write = snd_es1371_codec_write, 1635 .read = snd_es1371_codec_read, 1636 .wait = snd_es1371_codec_wait, 1637 }; 1638 #ifdef DEBUG 1639 dprintf(("snd_ensoniq_1371_mixer")); 1640 #endif 1641 if ((err = snd_ac97_bus(card, 0, &ops, NULL, &pbus)) < 0) 1642 return err; 1643 1644 memset(&ac97, 0, sizeof(ac97)); 1645 ac97.private_data = ensoniq; 1646 ac97.private_free = snd_ensoniq_mixer_free_ac97; 1647 ac97.scaps = AC97_SCAP_AUDIO; 1648 if ((err = snd_ac97_mixer(pbus, &ac97, &ensoniq->u.es1371.ac97)) < 0) 1649 return err; 1650 for (idx = 0; es1371_spdif_present[idx].vid != (unsigned short)PCI_ANY_ID; idx++) 1651 if (ensoniq->pci->vendor == es1371_spdif_present[idx].vid && 1652 ensoniq->pci->device == es1371_spdif_present[idx].did && 1653 ensoniq->rev == es1371_spdif_present[idx].rev) { 1654 snd_kcontrol_t *kctl; 1655 int index = 0; 1656 1657 ensoniq->spdif_default = ensoniq->spdif_stream = SNDRV_PCM_DEFAULT_CON_SPDIF; 1658 outl(ensoniq->spdif_default, ES_REG(ensoniq, CHANNEL_STATUS)); 1659 1660 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SPDIF) 1661 index++; 1662 1663 kctl = snd_ctl_new1(&snd_es1371_mixer_spdif, ensoniq); 1664 kctl->id.index = index; 1665 snd_ctl_add(card, kctl); 1666 1667 kctl = snd_ctl_new1(&snd_ens1373_spdif_default, ensoniq); 1668 kctl->id.index = index; 1669 snd_ctl_add(card, kctl); 1670 1671 kctl = snd_ctl_new1(&snd_ens1373_spdif_mask, ensoniq); 1672 kctl->id.index = index; 1673 snd_ctl_add(card, kctl); 1674 1675 kctl = snd_ctl_new1(&snd_ens1373_spdif_stream, ensoniq); 1676 kctl->id.index = index; 1677 snd_ctl_add(card, kctl); 1678 break; 1679 } 1680 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SDAC) { 1681 /* mirror rear to front speakers */ 1682 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT24); 1683 ensoniq->cssr |= ES_1373_REAR_BIT26; 1684 snd_ctl_add(card, snd_ctl_new1(&snd_ens1373_rear, ensoniq)); 1685 } 1686 if (((ensoniq->subsystem_vendor_id == 0x1274) && 1687 (ensoniq->subsystem_device_id == 0x2000)) || /* GA-7DXR */ 1688 ((ensoniq->subsystem_vendor_id == 0x1458) && 1689 (ensoniq->subsystem_device_id == 0xa000))) { /* GA-8IEXP */ 1690 err = snd_ctl_add(card, snd_ctl_new1(&snd_ens1373_line, ensoniq)); 1691 if (err < 0) 1692 return err; 1693 } 1694 1695 return 0; 1625 static int snd_ensoniq_1371_mixer(struct ensoniq * ensoniq, int has_spdif, int has_line) 1626 { 1627 struct snd_card *card = ensoniq->card; 1628 struct snd_ac97_bus *pbus; 1629 struct snd_ac97_template ac97; 1630 int err, idx; 1631 static struct snd_ac97_bus_ops ops = { 1632 .write = snd_es1371_codec_write, 1633 .read = snd_es1371_codec_read, 1634 .wait = snd_es1371_codec_wait, 1635 }; 1636 1637 if ((err = snd_ac97_bus(card, 0, &ops, NULL, &pbus)) < 0) 1638 return err; 1639 1640 memset(&ac97, 0, sizeof(ac97)); 1641 ac97.private_data = ensoniq; 1642 ac97.private_free = snd_ensoniq_mixer_free_ac97; 1643 ac97.scaps = AC97_SCAP_AUDIO; 1644 if ((err = snd_ac97_mixer(pbus, &ac97, &ensoniq->u.es1371.ac97)) < 0) 1645 return err; 1646 for (idx = 0; es1371_spdif_present[idx].vid != (unsigned short)PCI_ANY_ID; idx++) 1647 if ((ensoniq->pci->vendor == es1371_spdif_present[idx].vid && 1648 ensoniq->pci->device == es1371_spdif_present[idx].did && 1649 ensoniq->rev == es1371_spdif_present[idx].rev) || has_spdif > 0) { 1650 struct snd_kcontrol *kctl; 1651 int i, index = 0; 1652 1653 if (has_spdif < 0) 1654 break; 1655 1656 ensoniq->spdif_default = ensoniq->spdif_stream = 1657 SNDRV_PCM_DEFAULT_CON_SPDIF; 1658 outl(ensoniq->spdif_default, ES_REG(ensoniq, CHANNEL_STATUS)); 1659 1660 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SPDIF) 1661 index++; 1662 1663 for (i = 0; i < (int)ARRAY_SIZE(snd_es1371_mixer_spdif); i++) { 1664 kctl = snd_ctl_new1(&snd_es1371_mixer_spdif[i], ensoniq); 1665 if (! kctl) 1666 return -ENOMEM; 1667 kctl->id.index = index; 1668 if ((err = snd_ctl_add(card, kctl)) < 0) 1669 return err; 1670 } 1671 break; 1672 } 1673 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SDAC) { 1674 /* mirror rear to front speakers */ 1675 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT24); 1676 ensoniq->cssr |= ES_1373_REAR_BIT26; 1677 err = snd_ctl_add(card, snd_ctl_new1(&snd_ens1373_rear, ensoniq)); 1678 if (err < 0) 1679 return err; 1680 } 1681 if (((ensoniq->subsystem_vendor_id == 0x1274) && 1682 (ensoniq->subsystem_device_id == 0x2000)) || /* GA-7DXR */ 1683 ((ensoniq->subsystem_vendor_id == 0x1458) && 1684 (ensoniq->subsystem_device_id == 0xa000)) || /* GA-8IEXP */ 1685 has_line > 0) { 1686 err = snd_ctl_add(card, snd_ctl_new1(&snd_ens1373_line, ensoniq)); 1687 if (err < 0) 1688 return err; 1689 } 1690 1691 return 0; 1696 1692 } 1697 1693 1698 1694 #endif /* CHIP1371 */ 1699 1695 1700 /* generic control callbacks for ens1370 and for joystick */ 1701 #if defined(CHIP1370) || defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 1702 1696 /* generic control callbacks for ens1370 */ 1697 #ifdef CHIP1370 1703 1698 #define ENSONIQ_CONTROL(xname, mask) \ 1704 { SNDRV_CTL_ELEM_IFACE_CARD, 0, 0, xname, 0, 0, 0, snd_ensoniq_control_info,\1705 snd_ensoniq_control_get,snd_ensoniq_control_put, \1706 1707 1708 static int snd_ensoniq_control_info(s nd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)1709 { 1710 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1711 uinfo->count = 1;1712 uinfo->value.integer.min = 0;1713 uinfo->value.integer.max = 1;1714 return 0;1715 } 1716 1717 static int snd_ensoniq_control_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1718 { 1719 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1720 int mask = kcontrol->private_value; 1721 1722 spin_lock_irq(&ensoniq->reg_lock);1723 ucontrol->value.integer.value[0] = ensoniq->ctrl & mask ? 1 : 0; 1724 spin_unlock_irq(&ensoniq->reg_lock);1725 return0;1726 } 1727 1728 #ifdef CHIP1370 1729 static int snd_ensoniq_control_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1730 { 1731 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1732 int mask = kcontrol->private_value; 1733 unsigned int nval;1734 int change;1735 1736 nval = ucontrol->value.integer.value[0] ? mask : 0;1737 spin_lock_irq(&ensoniq->reg_lock); 1738 change = (ensoniq->ctrl & mask) != nval;1739 ensoniq->ctrl &= ~mask;1740 ensoniq->ctrl |= nval;1741 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));1742 spin_unlock_irq(&ensoniq->reg_lock);1743 return change;1744 } 1745 #endif /* CHIP1370 */ 1746 #endif /* CHIP1370 || GAMEPORT */ 1699 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, .name = xname, .info = snd_ensoniq_control_info, \ 1700 .get = snd_ensoniq_control_get, .put = snd_ensoniq_control_put, \ 1701 .private_value = mask } 1702 1703 static int snd_ensoniq_control_info(struct snd_kcontrol *kcontrol, 1704 struct snd_ctl_elem_info *uinfo) 1705 { 1706 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1707 uinfo->count = 1; 1708 uinfo->value.integer.min = 0; 1709 uinfo->value.integer.max = 1; 1710 return 0; 1711 } 1712 1713 static int snd_ensoniq_control_get(struct snd_kcontrol *kcontrol, 1714 struct snd_ctl_elem_value *ucontrol) 1715 { 1716 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1717 int mask = kcontrol->private_value; 1718 1719 spin_lock_irq(&ensoniq->reg_lock); 1720 ucontrol->value.integer.value[0] = ensoniq->ctrl & mask ? 1 : 0; 1721 spin_unlock_irq(&ensoniq->reg_lock); 1722 return 0; 1723 } 1724 1725 static int snd_ensoniq_control_put(struct snd_kcontrol *kcontrol, 1726 struct snd_ctl_elem_value *ucontrol) 1727 { 1728 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1729 int mask = kcontrol->private_value; 1730 unsigned int nval; 1731 int change; 1732 1733 nval = ucontrol->value.integer.value[0] ? mask : 0; 1734 spin_lock_irq(&ensoniq->reg_lock); 1735 change = (ensoniq->ctrl & mask) != nval; 1736 ensoniq->ctrl &= ~mask; 1737 ensoniq->ctrl |= nval; 1738 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1739 spin_unlock_irq(&ensoniq->reg_lock); 1740 return change; 1741 } 1747 1742 1748 1743 /* 1749 1744 * ENS1370 mixer 1750 1745 */ 1751 #ifdef CHIP1370 1752 static s nd_kcontrol_new_tsnd_es1370_controls[2] __devinitdata = {1753 1754 1746 1747 static struct snd_kcontrol_new snd_es1370_controls[2] __devinitdata = { 1748 ENSONIQ_CONTROL("PCM 0 Output also on Line-In Jack", ES_1370_XCTL0), 1749 ENSONIQ_CONTROL("Mic +5V bias", ES_1370_XCTL1) 1755 1750 }; 1756 1751 1757 1752 #define ES1370_CONTROLS ARRAY_SIZE(snd_es1370_controls) 1758 1753 1759 static void snd_ensoniq_mixer_free_ak4531(ak4531_t *ak4531) 1760 { 1761 ensoniq_t *ensoniq = ak4531->private_data; 1762 ensoniq->u.es1370.ak4531 = NULL; 1763 } 1764 1765 static int __devinit snd_ensoniq_1370_mixer(ensoniq_t * ensoniq) 1766 { 1767 snd_card_t *card = ensoniq->card; 1768 ak4531_t ak4531; 1769 unsigned int idx; 1770 int err; 1771 1772 /* try reset AK4531 */ 1773 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x02), ES_REG(ensoniq, 1370_CODEC)); 1774 inw(ES_REG(ensoniq, 1370_CODEC)); 1775 udelay(100); 1776 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x03), ES_REG(ensoniq, 1370_CODEC)); 1777 inw(ES_REG(ensoniq, 1370_CODEC)); 1778 udelay(100); 1779 1780 memset(&ak4531, 0, sizeof(ak4531)); 1781 ak4531.write = snd_es1370_codec_write; 1782 ak4531.private_data = ensoniq; 1783 ak4531.private_free = snd_ensoniq_mixer_free_ak4531; 1784 if ((err = snd_ak4531_mixer(card, &ak4531, &ensoniq->u.es1370.ak4531)) < 0) 1785 return err; 1786 for (idx = 0; idx < ES1370_CONTROLS; idx++) 1787 snd_ctl_add(card, snd_ctl_new1(&snd_es1370_controls[idx], ensoniq)); 1788 return 0; 1754 static void snd_ensoniq_mixer_free_ak4531(struct snd_ak4531 *ak4531) 1755 { 1756 struct ensoniq *ensoniq = ak4531->private_data; 1757 ensoniq->u.es1370.ak4531 = NULL; 1758 } 1759 1760 static int __devinit snd_ensoniq_1370_mixer(struct ensoniq * ensoniq) 1761 { 1762 struct snd_card *card = ensoniq->card; 1763 struct snd_ak4531 ak4531; 1764 unsigned int idx; 1765 int err; 1766 1767 /* try reset AK4531 */ 1768 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x02), ES_REG(ensoniq, 1370_CODEC)); 1769 inw(ES_REG(ensoniq, 1370_CODEC)); 1770 udelay(100); 1771 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x03), ES_REG(ensoniq, 1370_CODEC)); 1772 inw(ES_REG(ensoniq, 1370_CODEC)); 1773 udelay(100); 1774 1775 memset(&ak4531, 0, sizeof(ak4531)); 1776 ak4531.write = snd_es1370_codec_write; 1777 ak4531.private_data = ensoniq; 1778 ak4531.private_free = snd_ensoniq_mixer_free_ak4531; 1779 if ((err = snd_ak4531_mixer(card, &ak4531, &ensoniq->u.es1370.ak4531)) < 0) 1780 return err; 1781 for (idx = 0; idx < ES1370_CONTROLS; idx++) { 1782 err = snd_ctl_add(card, snd_ctl_new1(&snd_es1370_controls[idx], ensoniq)); 1783 if (err < 0) 1784 return err; 1785 } 1786 return 0; 1789 1787 } 1790 1788 1791 1789 #endif /* CHIP1370 */ 1792 1790 1791 #ifdef SUPPORT_JOYSTICK 1792 1793 #ifdef CHIP1371 1794 static int __devinit snd_ensoniq_get_joystick_port(int dev) 1795 { 1796 switch (joystick_port[dev]) { 1797 case 0: /* disabled */ 1798 case 1: /* auto-detect */ 1799 case 0x200: 1800 case 0x208: 1801 case 0x210: 1802 case 0x218: 1803 return joystick_port[dev]; 1804 1805 default: 1806 printk(KERN_ERR "ens1371: invalid joystick port %#x", joystick_port[dev]); 1807 return 0; 1808 } 1809 } 1810 #else 1811 static inline int snd_ensoniq_get_joystick_port(int dev) 1812 { 1813 return joystick[dev] ? 0x200 : 0; 1814 } 1815 #endif 1816 1817 static int __devinit snd_ensoniq_create_gameport(struct ensoniq *ensoniq, int dev) 1818 { 1819 struct gameport *gp; 1820 int io_port; 1821 1822 io_port = snd_ensoniq_get_joystick_port(dev); 1823 1824 switch (io_port) { 1825 case 0: 1826 return -ENOSYS; 1827 1828 case 1: /* auto_detect */ 1829 for (io_port = 0x200; io_port <= 0x218; io_port += 8) 1830 if (request_region(io_port, 8, "ens137x: gameport")) 1831 break; 1832 if (io_port > 0x218) { 1833 printk(KERN_WARNING "ens137x: no gameport ports available\n"); 1834 return -EBUSY; 1835 } 1836 break; 1837 1838 default: 1839 if (!request_region(io_port, 8, "ens137x: gameport")) { 1840 printk(KERN_WARNING "ens137x: gameport io port 0x%#x in use\n", 1841 io_port); 1842 return -EBUSY; 1843 } 1844 break; 1845 } 1846 1847 ensoniq->gameport = gp = gameport_allocate_port(); 1848 if (!gp) { 1849 printk(KERN_ERR "ens137x: cannot allocate memory for gameport\n"); 1850 release_region(io_port, 8); 1851 return -ENOMEM; 1852 } 1853 1854 gameport_set_name(gp, "ES137x"); 1855 gameport_set_phys(gp, "pci%s/gameport0", pci_name(ensoniq->pci)); 1856 gameport_set_dev_parent(gp, &ensoniq->pci->dev); 1857 gp->io = io_port; 1858 1859 ensoniq->ctrl |= ES_JYSTK_EN; 1860 #ifdef CHIP1371 1861 ensoniq->ctrl &= ~ES_1371_JOY_ASELM; 1862 ensoniq->ctrl |= ES_1371_JOY_ASEL((io_port - 0x200) / 8); 1863 #endif 1864 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1865 1866 gameport_register_port(ensoniq->gameport); 1867 1868 return 0; 1869 } 1870 1871 static void snd_ensoniq_free_gameport(struct ensoniq *ensoniq) 1872 { 1873 if (ensoniq->gameport) { 1874 int port = ensoniq->gameport->io; 1875 1876 gameport_unregister_port(ensoniq->gameport); 1877 ensoniq->gameport = NULL; 1878 ensoniq->ctrl &= ~ES_JYSTK_EN; 1879 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1880 release_region(port, 8); 1881 } 1882 } 1883 #else 1884 static inline int snd_ensoniq_create_gameport(struct ensoniq *ensoniq, long port) { return -ENOSYS; } 1885 static inline void snd_ensoniq_free_gameport(struct ensoniq *ensoniq) { } 1886 #endif /* SUPPORT_JOYSTICK */ 1887 1793 1888 /* 1794 * General Switches... 1889 1795 1890 */ 1796 1891 1797 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 1798 /* MQ: gameport driver connectivity */ 1799 #define ENSONIQ_JOY_CONTROL(xname, mask) \ 1800 { SNDRV_CTL_ELEM_IFACE_CARD, xname, snd_ensoniq_control_info, \ 1801 snd_ensoniq_control_get, snd_ensoniq_joy_control_put, \ 1802 mask } 1803 1804 static int snd_ensoniq_joy_enable(ensoniq_t *ensoniq) 1805 { 1806 static unsigned long last_jiffies = 0; 1807 unsigned long flags; 1808 1809 if (!request_region(ensoniq->gameport.io, 8, "ens137x: gameport")) { 1810 #define ES___GAMEPORT_LOG_DELAY (30*HZ) 1811 // avoid log pollution: limit to 2 infos per minute 1812 if (time_after(jiffies, last_jiffies + ES___GAMEPORT_LOG_DELAY)) { 1813 last_jiffies = jiffies; 1814 snd_printk("gameport io port 0x%03x in use", ensoniq->gameport.io); 1815 } 1816 return 0; 1817 } 1818 spin_lock_irqsave(&ensoniq->reg_lock, flags); 1819 ensoniq->ctrl |= ES_JYSTK_EN; 1820 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1821 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 1822 gameport_register_port(&ensoniq->gameport); 1823 return 1; 1824 } 1825 1826 static int snd_ensoniq_joy_disable(ensoniq_t *ensoniq) 1827 { 1828 unsigned long flags; 1829 1830 gameport_unregister_port(&ensoniq->gameport); 1831 spin_lock_irqsave(&ensoniq->reg_lock, flags); 1832 ensoniq->ctrl &= ~ES_JYSTK_EN; 1833 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1834 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 1835 release_region(ensoniq->gameport.io, 8); 1836 return 1; 1837 } 1838 1839 static int snd_ensoniq_joy_control_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1840 { 1841 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1842 unsigned int nval; 1843 int change; 1844 1845 down(&ensoniq->joy_sem); 1846 nval = ucontrol->value.integer.value[0] ? ES_JYSTK_EN : 0; 1847 change = (ensoniq->ctrl & ES_JYSTK_EN) != nval; // spinlock shouldn't be needed because of joy_sem 1848 if (change) { 1849 if (nval) // enable 1850 change = snd_ensoniq_joy_enable(ensoniq); 1851 else change = snd_ensoniq_joy_disable(ensoniq); 1852 } 1853 up(&ensoniq->joy_sem); 1854 return change; 1855 } 1856 1857 static snd_kcontrol_new_t snd_ensoniq_control_joystick __devinitdata = 1858 ENSONIQ_JOY_CONTROL("Joystick Enable", ES_JYSTK_EN); 1859 1860 #ifdef CHIP1371 1861 1862 #define ES1371_JOYSTICK_ADDR(xname) \ 1863 { SNDRV_CTL_ELEM_IFACE_CARD, 0, 0, xname, 0, 0, 0,snd_es1371_joystick_addr_info, \ 1864 snd_es1371_joystick_addr_get, snd_es1371_joystick_addr_put, 0 } 1865 1866 static int snd_es1371_joystick_addr_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1867 { 1868 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1869 uinfo->count = 1; 1870 uinfo->value.enumerated.items = 4; 1871 if (uinfo->value.enumerated.item >= 4) 1872 uinfo->value.enumerated.item = 3; 1873 sprintf(uinfo->value.enumerated.name, "port 0x%x", (uinfo->value.enumerated.item * 8) + 0x200); 1874 return 0; 1875 } 1876 1877 static int snd_es1371_joystick_addr_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1878 { 1879 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1880 unsigned long flags; 1881 1882 spin_lock_irqsave(&ensoniq->reg_lock, flags); 1883 ucontrol->value.enumerated.item[0] = ES_1371_JOY_ASELI(ensoniq->ctrl); 1884 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 1885 return 0; 1886 } 1887 1888 static int snd_es1371_joystick_addr_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1889 { 1890 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol); 1891 unsigned long flags; 1892 unsigned int nval; 1893 int change; 1894 1895 down(&ensoniq->joy_sem); 1896 nval = ES_1371_JOY_ASEL(ucontrol->value.integer.value[0]); 1897 spin_lock_irqsave(&ensoniq->reg_lock, flags); 1898 if (!(change = !(ensoniq->ctrl & ES_JYSTK_EN))) 1899 goto no_change; // FIXME: now we allow change only when joystick is disabled 1900 change = (ensoniq->ctrl & ES_1371_JOY_ASELM) != nval; 1901 ensoniq->ctrl &= ~ES_1371_JOY_ASELM; 1902 ensoniq->ctrl |= nval; 1903 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1904 ensoniq->gameport.io = 0x200 + ES_1371_JOY_ASELI(nval) * 8; 1905 no_change: 1906 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 1907 up(&ensoniq->joy_sem); 1908 return change; 1909 } 1910 1911 static snd_kcontrol_new_t snd_es1371_joystick_addr __devinitdata = 1912 ES1371_JOYSTICK_ADDR("Joystick Address"); 1913 1914 #endif /* CHIP1371 */ 1915 #endif /* CONFIG_GAMEPORT */ 1892 static void snd_ensoniq_proc_read(struct snd_info_entry *entry, 1893 struct snd_info_buffer *buffer) 1894 { 1895 struct ensoniq *ensoniq = entry->private_data; 1896 1897 #ifdef CHIP1370 1898 snd_iprintf(buffer, "Ensoniq AudioPCI ES1370\n\n"); 1899 #else 1900 snd_iprintf(buffer, "Ensoniq AudioPCI ES1371\n\n"); 1901 #endif 1902 snd_iprintf(buffer, "Joystick enable : %s\n", 1903 ensoniq->ctrl & ES_JYSTK_EN ? "on" : "off"); 1904 #ifdef CHIP1370 1905 snd_iprintf(buffer, "MIC +5V bias : %s\n", 1906 ensoniq->ctrl & ES_1370_XCTL1 ? "on" : "off"); 1907 snd_iprintf(buffer, "Line In to AOUT : %s\n", 1908 ensoniq->ctrl & ES_1370_XCTL0 ? "on" : "off"); 1909 #else 1910 snd_iprintf(buffer, "Joystick port : 0x%x\n", 1911 (ES_1371_JOY_ASELI(ensoniq->ctrl) * 8) + 0x200); 1912 #endif 1913 } 1914 1915 static void __devinit snd_ensoniq_proc_init(struct ensoniq * ensoniq) 1916 { 1917 struct snd_info_entry *entry; 1918 1919 if (! snd_card_proc_new(ensoniq->card, "audiopci", &entry)) 1920 snd_info_set_text_ops(entry, ensoniq, 1024, snd_ensoniq_proc_read); 1921 } 1916 1922 1917 1923 /* 1918 1924 1919 */ 1920 1921 static void snd_ensoniq_proc_read(snd_info_entry_t *entry, 1922 snd_info_buffer_t * buffer) 1923 { 1924 ensoniq_t *ensoniq = entry->private_data; 1925 1926 #ifdef CHIP1370 1927 snd_iprintf(buffer, "Ensoniq AudioPCI ES1370\n\n"); 1925 */ 1926 1927 static int snd_ensoniq_free(struct ensoniq *ensoniq) 1928 { 1929 snd_ensoniq_free_gameport(ensoniq); 1930 if (ensoniq->irq < 0) 1931 goto __hw_end; 1932 #ifdef CHIP1370 1933 outl(ES_1370_SERR_DISABLE, ES_REG(ensoniq, CONTROL)); /* switch everything off */ 1934 outl(0, ES_REG(ensoniq, SERIAL)); /* clear serial interface */ 1928 1935 #else 1929 snd_iprintf(buffer, "Ensoniq AudioPCI ES1371\n\n"); 1930 #endif 1931 snd_iprintf(buffer, "Joystick enable : %s\n", ensoniq->ctrl & ES_JYSTK_EN ? "on" : "off"); 1932 #ifdef CHIP1370 1933 snd_iprintf(buffer, "MIC +5V bias : %s\n", ensoniq->ctrl & ES_1370_XCTL1 ? "on" : "off"); 1934 snd_iprintf(buffer, "Line In to AOUT : %s\n", ensoniq->ctrl & ES_1370_XCTL0 ? "on" : "off"); 1935 #else 1936 snd_iprintf(buffer, "Joystick port : 0x%x\n", (ES_1371_JOY_ASELI(ensoniq->ctrl) * 8) + 0x200); 1937 #endif 1938 } 1939 1940 static void __devinit snd_ensoniq_proc_init(ensoniq_t * ensoniq) 1941 { 1942 snd_info_entry_t *entry; 1943 1944 if (! snd_card_proc_new(ensoniq->card, "audiopci", &entry)) 1945 snd_info_set_text_ops(entry, ensoniq, 1024, snd_ensoniq_proc_read); 1946 } 1947 1948 /* 1949 1950 */ 1951 1952 static int snd_ensoniq_free(ensoniq_t *ensoniq) 1953 { 1954 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 1955 if (ensoniq->ctrl & ES_JYSTK_EN) 1956 snd_ensoniq_joy_disable(ensoniq); 1957 #endif 1958 if (ensoniq->irq < 0) 1959 goto __hw_end; 1960 #ifdef CHIP1370 1961 outl(ES_1370_SERR_DISABLE, ES_REG(ensoniq, CONTROL)); /* switch everything off */ 1962 outl(0, ES_REG(ensoniq, SERIAL)); /* clear serial interface */ 1963 #else 1964 outl(0, ES_REG(ensoniq, CONTROL)); /* switch everything off */ 1965 outl(0, ES_REG(ensoniq, SERIAL)); /* clear serial interface */ 1966 #endif 1967 synchronize_irq(ensoniq->irq); 1968 pci_set_power_state(ensoniq->pci, 3); 1969 __hw_end: 1970 #ifdef CHIP1370 1971 if (ensoniq->dma_bug.area) 1972 snd_dma_free_pages(&ensoniq->dma_bug); 1973 #endif 1974 if (ensoniq->irq >= 0) 1975 free_irq(ensoniq->irq, (void *)ensoniq); 1976 pci_release_regions(ensoniq->pci); 1977 kfree(ensoniq); 1978 return 0; 1979 } 1980 1981 static int snd_ensoniq_dev_free(snd_device_t *device) 1982 { 1983 ensoniq_t *ensoniq = device->device_data; 1984 return snd_ensoniq_free(ensoniq); 1936 outl(0, ES_REG(ensoniq, CONTROL)); /* switch everything off */ 1937 outl(0, ES_REG(ensoniq, SERIAL)); /* clear serial interface */ 1938 #endif 1939 synchronize_irq(ensoniq->irq); 1940 pci_set_power_state(ensoniq->pci, 3); 1941 __hw_end: 1942 #ifdef CHIP1370 1943 if (ensoniq->dma_bug.area) 1944 snd_dma_free_pages(&ensoniq->dma_bug); 1945 #endif 1946 if (ensoniq->irq >= 0) 1947 free_irq(ensoniq->irq, ensoniq); 1948 pci_release_regions(ensoniq->pci); 1949 pci_disable_device(ensoniq->pci); 1950 kfree(ensoniq); 1951 return 0; 1952 } 1953 1954 static int snd_ensoniq_dev_free(struct snd_device *device) 1955 { 1956 struct ensoniq *ensoniq = device->device_data; 1957 return snd_ensoniq_free(ensoniq); 1985 1958 } 1986 1959 1987 1960 #ifdef CHIP1371 1988 1961 static struct { 1989 1990 1962 unsigned short svid; /* subsystem vendor ID */ 1963 unsigned short sdid; /* subsystem device ID */ 1991 1964 } es1371_amplifier_hack[] = { 1992 { 0x107b,0x2150 }, /* Gateway Solo 2150 */1993 { 0x13bd,0x100c }, /* EV1938 on Mebius PC-MJ100V */1994 { 0x1102,0x5938 }, /* Targa Xtender300 */1995 { 0x1102, 0x8938 },/* IPC Topnote G notebook */1996 { PCI_ANY_ID,PCI_ANY_ID }1965 { .svid = 0x107b, .sdid = 0x2150 }, /* Gateway Solo 2150 */ 1966 { .svid = 0x13bd, .sdid = 0x100c }, /* EV1938 on Mebius PC-MJ100V */ 1967 { .svid = 0x1102, .sdid = 0x5938 }, /* Targa Xtender300 */ 1968 { .svid = 0x1102, .sdid = 0x8938 }, /* IPC Topnote G notebook */ 1969 { .svid = PCI_ANY_ID, .sdid = PCI_ANY_ID } 1997 1970 }; 1998 1971 static struct { 1999 2000 2001 1972 unsigned short vid; /* vendor ID */ 1973 unsigned short did; /* device ID */ 1974 unsigned char rev; /* revision */ 2002 1975 } es1371_ac97_reset_hack[] = { 2003 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880,CT5880REV_CT5880_C },2004 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880,CT5880REV_CT5880_D },2005 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880,CT5880REV_CT5880_E },2006 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371,ES1371REV_CT5880_A },2007 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371,ES1371REV_ES1373_8 },2008 { PCI_ANY_ID, PCI_ANY_ID, 0}1976 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_C }, 1977 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_D }, 1978 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_E }, 1979 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_CT5880_A }, 1980 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_ES1373_8 }, 1981 { .vid = PCI_ANY_ID, .did = PCI_ANY_ID } 2009 1982 }; 2010 1983 #endif 2011 1984 2012 static int __devinit snd_ensoniq_create(snd_card_t * card, 2013 struct pci_dev *pci, 2014 ensoniq_t ** rensoniq) 2015 { 2016 ensoniq_t *ensoniq; 2017 unsigned short cmdw; 2018 unsigned char cmdb; 1985 static void snd_ensoniq_chip_init(struct ensoniq *ensoniq) 1986 { 2019 1987 #ifdef CHIP1371 2020 int idx; 2021 #endif 2022 int err; 2023 static snd_device_ops_t ops = { 2024 snd_ensoniq_dev_free,0,0,0 2025 }; 2026 2027 *rensoniq = NULL; 2028 if ((err = pci_enable_device(pci)) < 0) 2029 return err; 2030 ensoniq = kcalloc(1, sizeof(*ensoniq), GFP_KERNEL); 2031 if (ensoniq == NULL) 2032 return -ENOMEM; 2033 spin_lock_init(&ensoniq->reg_lock); 2034 init_MUTEX(&ensoniq->src_mutex); 2035 ensoniq->card = card; 2036 ensoniq->pci = pci; 2037 ensoniq->irq = -1; 2038 if ((err = pci_request_regions(pci, "Ensoniq AudioPCI")) < 0) { 2039 kfree(ensoniq); 2040 return err; 2041 } 2042 ensoniq->port = pci_resource_start(pci, 0); 2043 if (request_irq(pci->irq, snd_audiopci_interrupt, SA_INTERRUPT|SA_SHIRQ, "Ensoniq AudioPCI", (void *)ensoniq)) { 2044 snd_printk("unable to grab IRQ %d\n", pci->irq); 2045 snd_ensoniq_free(ensoniq); 2046 return -EBUSY; 2047 } 2048 ensoniq->irq = pci->irq; 2049 #ifdef CHIP1370 2050 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 2051 16, &ensoniq->dma_bug) < 0) { 2052 snd_printk("unable to allocate space for phantom area - dma_bug\n"); 2053 snd_ensoniq_free(ensoniq); 2054 return -EBUSY; 2055 } 2056 #endif 2057 pci_set_master(pci); 2058 pci_read_config_byte(pci, PCI_REVISION_ID, &cmdb); 2059 ensoniq->rev = cmdb; 2060 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &cmdw); 2061 ensoniq->subsystem_vendor_id = cmdw; 2062 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &cmdw); 2063 ensoniq->subsystem_device_id = cmdw; 2064 snd_ensoniq_proc_init(ensoniq); 1988 int idx; 1989 struct pci_dev *pci = ensoniq->pci; 1990 #endif 1991 /* this code was part of snd_ensoniq_create before intruduction 1992 * of suspend/resume 1993 */ 1994 #ifdef CHIP1370 1995 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1996 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 1997 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 1998 outl(ensoniq->dma_bug.addr, ES_REG(ensoniq, PHANTOM_FRAME)); 1999 outl(0, ES_REG(ensoniq, PHANTOM_COUNT)); 2000 #else 2001 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 2002 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2003 outl(0, ES_REG(ensoniq, 1371_LEGACY)); 2004 for (idx = 0; es1371_ac97_reset_hack[idx].vid != (unsigned short)PCI_ANY_ID; idx++) 2005 if (pci->vendor == es1371_ac97_reset_hack[idx].vid && 2006 pci->device == es1371_ac97_reset_hack[idx].did && 2007 ensoniq->rev == es1371_ac97_reset_hack[idx].rev) { 2008 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 2009 /* need to delay around 20ms(bleech) to give 2010 some CODECs enough time to wakeup */ 2011 msleep(20); 2012 break; 2013 } 2014 /* AC'97 warm reset to start the bitclk */ 2015 outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL)); 2016 inl(ES_REG(ensoniq, CONTROL)); 2017 udelay(20); 2018 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 2019 /* Init the sample rate converter */ 2020 snd_es1371_wait_src_ready(ensoniq); 2021 outl(ES_1371_SRC_DISABLE, ES_REG(ensoniq, 1371_SMPRATE)); 2022 for (idx = 0; idx < 0x80; idx++) 2023 snd_es1371_src_write(ensoniq, idx, 0); 2024 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 2025 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 2026 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 2027 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 2028 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, 1 << 12); 2029 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, 1 << 12); 2030 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1, 1 << 12); 2031 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 2032 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2, 1 << 12); 2033 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 2034 snd_es1371_adc_rate(ensoniq, 22050); 2035 snd_es1371_dac1_rate(ensoniq, 22050); 2036 snd_es1371_dac2_rate(ensoniq, 22050); 2037 /* WARNING: 2038 * enabling the sample rate converter without properly programming 2039 * its parameters causes the chip to lock up (the SRC busy bit will 2040 * be stuck high, and I've found no way to rectify this other than 2041 * power cycle) - Thomas Sailer 2042 */ 2043 snd_es1371_wait_src_ready(ensoniq); 2044 outl(0, ES_REG(ensoniq, 1371_SMPRATE)); 2045 /* try reset codec directly */ 2046 outl(ES_1371_CODEC_WRITE(0, 0), ES_REG(ensoniq, 1371_CODEC)); 2047 #endif 2048 outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL)); 2049 outb(0x00, ES_REG(ensoniq, UART_RES)); 2050 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 2051 synchronize_irq(ensoniq->irq); 2052 } 2053 2054 #ifdef CONFIG_PM 2055 static int snd_ensoniq_suspend(struct pci_dev *pci, pm_message_t state) 2056 { 2057 struct snd_card *card = pci_get_drvdata(pci); 2058 struct ensoniq *ensoniq = card->private_data; 2059 2060 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2061 2062 snd_pcm_suspend_all(ensoniq->pcm1); 2063 snd_pcm_suspend_all(ensoniq->pcm2); 2064 2065 #ifdef CHIP1371 2066 snd_ac97_suspend(ensoniq->u.es1371.ac97); 2067 #else 2068 /* try to reset AK4531 */ 2069 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x02), ES_REG(ensoniq, 1370_CODEC)); 2070 inw(ES_REG(ensoniq, 1370_CODEC)); 2071 udelay(100); 2072 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x03), ES_REG(ensoniq, 1370_CODEC)); 2073 inw(ES_REG(ensoniq, 1370_CODEC)); 2074 udelay(100); 2075 snd_ak4531_suspend(ensoniq->u.es1370.ak4531); 2076 #endif 2077 pci_set_power_state(pci, PCI_D3hot); 2078 pci_disable_device(pci); 2079 pci_save_state(pci); 2080 return 0; 2081 } 2082 2083 static int snd_ensoniq_resume(struct pci_dev *pci) 2084 { 2085 struct snd_card *card = pci_get_drvdata(pci); 2086 struct ensoniq *ensoniq = card->private_data; 2087 2088 pci_restore_state(pci); 2089 pci_enable_device(pci); 2090 pci_set_power_state(pci, PCI_D0); 2091 pci_set_master(pci); 2092 2093 snd_ensoniq_chip_init(ensoniq); 2094 2095 #ifdef CHIP1371 2096 snd_ac97_resume(ensoniq->u.es1371.ac97); 2097 #else 2098 snd_ak4531_resume(ensoniq->u.es1370.ak4531); 2099 #endif 2100 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2101 return 0; 2102 } 2103 #endif /* CONFIG_PM */ 2104 2105 2106 static int __devinit snd_ensoniq_create(struct snd_card *card, 2107 struct pci_dev *pci, 2108 struct ensoniq ** rensoniq) 2109 { 2110 struct ensoniq *ensoniq; 2111 unsigned short cmdw; 2112 unsigned char cmdb; 2113 #ifdef CHIP1371 2114 int idx; 2115 #endif 2116 int err; 2117 static struct snd_device_ops ops = { 2118 .dev_free = snd_ensoniq_dev_free, 2119 }; 2120 2121 *rensoniq = NULL; 2122 if ((err = pci_enable_device(pci)) < 0) 2123 return err; 2124 ensoniq = kzalloc(sizeof(*ensoniq), GFP_KERNEL); 2125 if (ensoniq == NULL) { 2126 pci_disable_device(pci); 2127 return -ENOMEM; 2128 } 2129 spin_lock_init(&ensoniq->reg_lock); 2130 init_MUTEX(&ensoniq->src_mutex); 2131 ensoniq->card = card; 2132 ensoniq->pci = pci; 2133 ensoniq->irq = -1; 2134 if ((err = pci_request_regions(pci, "Ensoniq AudioPCI")) < 0) { 2135 kfree(ensoniq); 2136 pci_disable_device(pci); 2137 return err; 2138 } 2139 ensoniq->port = pci_resource_start(pci, 0); 2140 if (request_irq(pci->irq, snd_audiopci_interrupt, SA_INTERRUPT|SA_SHIRQ, 2141 "Ensoniq AudioPCI", ensoniq)) { 2142 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2143 snd_ensoniq_free(ensoniq); 2144 return -EBUSY; 2145 } 2146 ensoniq->irq = pci->irq; 2147 #ifdef CHIP1370 2148 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 2149 16, &ensoniq->dma_bug) < 0) { 2150 snd_printk(KERN_ERR "unable to allocate space for phantom area - dma_bug\n"); 2151 snd_ensoniq_free(ensoniq); 2152 return -EBUSY; 2153 } 2154 #endif 2155 pci_set_master(pci); 2156 pci_read_config_byte(pci, PCI_REVISION_ID, &cmdb); 2157 ensoniq->rev = cmdb; 2158 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &cmdw); 2159 ensoniq->subsystem_vendor_id = cmdw; 2160 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &cmdw); 2161 ensoniq->subsystem_device_id = cmdw; 2065 2162 #ifdef CHIP1370 2066 2163 #if 0 2067 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_SERR_DISABLE | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000)); 2164 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_SERR_DISABLE | 2165 ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000)); 2068 2166 #else /* get microphone working */ 2069 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000)); 2070 #endif 2071 ensoniq->sctrl = 0; 2072 /* initialize the chips */ 2073 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 2074 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2075 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 2076 outl(ensoniq->dma_bug.addr, ES_REG(ensoniq, PHANTOM_FRAME)); 2077 outl(0, ES_REG(ensoniq, PHANTOM_COUNT)); 2167 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000)); 2168 #endif 2169 ensoniq->sctrl = 0; 2078 2170 #else 2079 ensoniq->ctrl = 0; 2080 ensoniq->sctrl = 0; 2081 ensoniq->cssr = 0; 2082 for (idx = 0; es1371_amplifier_hack[idx].svid != (unsigned short)PCI_ANY_ID; idx++) 2083 if (ensoniq->subsystem_vendor_id == es1371_amplifier_hack[idx].svid && 2084 ensoniq->subsystem_device_id == es1371_amplifier_hack[idx].sdid) { 2085 ensoniq->ctrl |= ES_1371_GPIO_OUT(1); /* turn amplifier on */ 2086 break; 2087 } 2088 /* initialize the chips */ 2089 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 2090 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2091 outl(0, ES_REG(ensoniq, 1371_LEGACY)); 2092 for (idx = 0; es1371_ac97_reset_hack[idx].vid != (unsigned short)PCI_ANY_ID; idx++) 2093 if (pci->vendor == es1371_ac97_reset_hack[idx].vid && 2094 pci->device == es1371_ac97_reset_hack[idx].did && 2095 ensoniq->rev == es1371_ac97_reset_hack[idx].rev) { 2096 2097 ensoniq->cssr |= ES_1371_ST_AC97_RST; 2098 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 2099 /* need to delay around 20ms(bleech) to give 2100 some CODECs enough time to wakeup */ 2101 msleep(20); 2102 break; 2103 } 2104 /* AC'97 warm reset to start the bitclk */ 2105 outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL)); 2106 inl(ES_REG(ensoniq, CONTROL)); 2107 udelay(20); 2108 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 2109 /* Init the sample rate converter */ 2110 snd_es1371_wait_src_ready(ensoniq); 2111 outl(ES_1371_SRC_DISABLE, ES_REG(ensoniq, 1371_SMPRATE)); 2112 for (idx = 0; idx < 0x80; idx++) 2113 snd_es1371_src_write(ensoniq, idx, 0); 2114 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 2115 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 2116 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 2117 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 2118 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, 1 << 12); 2119 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, 1 << 12); 2120 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1, 1 << 12); 2121 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 2122 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2, 1 << 12); 2123 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 2124 snd_es1371_adc_rate(ensoniq, 22050); 2125 snd_es1371_dac1_rate(ensoniq, 22050); 2126 snd_es1371_dac2_rate(ensoniq, 22050); 2127 /* WARNING: 2128 * enabling the sample rate converter without properly programming 2129 * its parameters causes the chip to lock up (the SRC busy bit will 2130 * be stuck high, and I've found no way to rectify this other than 2131 * power cycle) - Thomas Sailer 2132 */ 2133 snd_es1371_wait_src_ready(ensoniq); 2134 outl(0, ES_REG(ensoniq, 1371_SMPRATE)); 2135 /* try reset codec directly */ 2136 outl(ES_1371_CODEC_WRITE(0, 0), ES_REG(ensoniq, 1371_CODEC)); 2137 #endif 2138 outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL)); 2139 outb(0x00, ES_REG(ensoniq, UART_RES)); 2140 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 2141 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 2142 init_MUTEX(&ensoniq->joy_sem); 2143 #ifdef CHIP1371 2144 snd_ctl_add(card, snd_ctl_new1(&snd_es1371_joystick_addr, ensoniq)); 2145 #endif 2146 snd_ctl_add(card, snd_ctl_new1(&snd_ensoniq_control_joystick, ensoniq)); 2147 ensoniq->gameport.io = 0x200; // FIXME: is ES1371 configured like this above ? 2148 #endif 2149 synchronize_irq(ensoniq->irq); 2150 2151 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ensoniq, &ops)) < 0) { 2152 snd_ensoniq_free(ensoniq); 2153 return err; 2154 } 2155 2156 *rensoniq = ensoniq; 2157 snd_card_set_dev(card, &pci->dev); 2158 return 0; 2171 ensoniq->ctrl = 0; 2172 ensoniq->sctrl = 0; 2173 ensoniq->cssr = 0; 2174 for (idx = 0; es1371_amplifier_hack[idx].svid != (unsigned short)PCI_ANY_ID; idx++) 2175 if (ensoniq->subsystem_vendor_id == es1371_amplifier_hack[idx].svid && 2176 ensoniq->subsystem_device_id == es1371_amplifier_hack[idx].sdid) { 2177 ensoniq->ctrl |= ES_1371_GPIO_OUT(1); /* turn amplifier on */ 2178 break; 2179 } 2180 for (idx = 0; es1371_ac97_reset_hack[idx].vid != (unsigned short)PCI_ANY_ID; idx++) 2181 if (pci->vendor == es1371_ac97_reset_hack[idx].vid && 2182 pci->device == es1371_ac97_reset_hack[idx].did && 2183 ensoniq->rev == es1371_ac97_reset_hack[idx].rev) { 2184 ensoniq->cssr |= ES_1371_ST_AC97_RST; 2185 break; 2186 } 2187 #endif 2188 2189 snd_ensoniq_chip_init(ensoniq); 2190 2191 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ensoniq, &ops)) < 0) { 2192 snd_ensoniq_free(ensoniq); 2193 return err; 2194 } 2195 2196 snd_ensoniq_proc_init(ensoniq); 2197 2198 snd_card_set_dev(card, &pci->dev); 2199 2200 *rensoniq = ensoniq; 2201 return 0; 2159 2202 } 2160 2203 … … 2163 2206 */ 2164 2207 2165 static void snd_ensoniq_midi_interrupt(ensoniq_t * ensoniq) 2166 { 2167 snd_rawmidi_t * rmidi = ensoniq->rmidi; 2168 unsigned char status, mask, byte; 2169 2170 if (rmidi == NULL) 2171 return; 2172 /* do Rx at first */ 2173 spin_lock(&ensoniq->reg_lock); 2174 mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0; 2175 while (mask) { 2176 status = inb(ES_REG(ensoniq, UART_STATUS)); 2177 if ((status & mask) == 0) 2178 break; 2179 byte = inb(ES_REG(ensoniq, UART_DATA)); 2180 spin_unlock(&ensoniq->reg_lock); 2181 snd_rawmidi_receive(ensoniq->midi_input, &byte, 1); 2182 spin_lock(&ensoniq->reg_lock); 2183 } 2184 spin_unlock(&ensoniq->reg_lock); 2185 2186 /* do Tx at second */ 2187 spin_lock(&ensoniq->reg_lock); 2188 mask = ensoniq->uartm & ES_MODE_OUTPUT ? ES_TXRDY : 0; 2189 while (mask) { 2190 status = inb(ES_REG(ensoniq, UART_STATUS)); 2191 if ((status & mask) == 0) 2192 break; 2193 if (snd_rawmidi_transmit(ensoniq->midi_output, &byte, 1) != 1) { 2194 ensoniq->uartc &= ~ES_TXINTENM; 2195 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2196 mask &= ~ES_TXRDY; 2197 } else { 2198 outb(byte, ES_REG(ensoniq, UART_DATA)); 2199 } 2200 } 2201 spin_unlock(&ensoniq->reg_lock); 2202 } 2203 2204 static int snd_ensoniq_midi_input_open(snd_rawmidi_substream_t * substream) 2205 { 2206 ensoniq_t *ensoniq = substream->rmidi->private_data; 2207 2208 // printk("Opening Ensoniq for MIDI input\n"); 2209 spin_lock_irq(&ensoniq->reg_lock); 2210 ensoniq->uartm |= ES_MODE_INPUT; 2211 ensoniq->midi_input = substream; 2212 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) { 2213 outb(ES_CNTRL(3), ES_REG(ensoniq, UART_CONTROL)); 2214 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2215 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2216 } 2217 spin_unlock_irq(&ensoniq->reg_lock); 2218 return 0; 2219 } 2220 2221 static int snd_ensoniq_midi_input_close(snd_rawmidi_substream_t * substream) 2222 { 2223 ensoniq_t *ensoniq = substream->rmidi->private_data; 2224 2225 // printk("Closing Ensoniq for MIDI input\n"); 2226 spin_lock_irq(&ensoniq->reg_lock); 2227 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) { 2228 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2229 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2230 } else { 2231 outb(ensoniq->uartc &= ~ES_RXINTEN, ES_REG(ensoniq, UART_CONTROL)); 2232 } 2233 ensoniq->midi_input = NULL; 2234 ensoniq->uartm &= ~ES_MODE_INPUT; 2235 spin_unlock_irq(&ensoniq->reg_lock); 2236 return 0; 2237 } 2238 2239 static int snd_ensoniq_midi_output_open(snd_rawmidi_substream_t * substream) 2240 { 2241 ensoniq_t *ensoniq = substream->rmidi->private_data; 2242 2243 // printk("Opening Ensoniq for MIDI output\n"); 2244 2245 spin_lock_irq(&ensoniq->reg_lock); 2246 ensoniq->uartm |= ES_MODE_OUTPUT; 2247 ensoniq->midi_output = substream; 2248 if (!(ensoniq->uartm & ES_MODE_INPUT)) { 2249 outb(ES_CNTRL(3), ES_REG(ensoniq, UART_CONTROL)); 2250 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2251 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2252 } 2253 spin_unlock_irq(&ensoniq->reg_lock); 2254 return 0; 2255 } 2256 2257 static int snd_ensoniq_midi_output_close(snd_rawmidi_substream_t * substream) 2258 { 2259 ensoniq_t *ensoniq = substream->rmidi->private_data; 2260 2261 // printk("Closing Ensoniq for MIDI output\n"); 2262 2263 spin_lock_irq(&ensoniq->reg_lock); 2264 if (!(ensoniq->uartm & ES_MODE_INPUT)) { 2265 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2266 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2267 } else { 2268 outb(ensoniq->uartc &= ~ES_TXINTENM, ES_REG(ensoniq, UART_CONTROL)); 2269 } 2270 ensoniq->midi_output = NULL; 2271 ensoniq->uartm &= ~ES_MODE_OUTPUT; 2272 spin_unlock_irq(&ensoniq->reg_lock); 2273 return 0; 2274 } 2275 2276 static void snd_ensoniq_midi_input_trigger(snd_rawmidi_substream_t * substream, int up) 2277 { 2278 unsigned long flags; 2279 ensoniq_t *ensoniq = substream->rmidi->private_data; 2280 int idx; 2281 2282 // printk("Ensoniq MIDI input trigger\n"); 2283 2284 spin_lock_irqsave(&ensoniq->reg_lock, flags); 2285 if (up) { 2286 if ((ensoniq->uartc & ES_RXINTEN) == 0) { 2287 /* empty input FIFO */ 2288 for (idx = 0; idx < 32; idx++) 2289 inb(ES_REG(ensoniq, UART_DATA)); 2290 ensoniq->uartc |= ES_RXINTEN; 2291 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2292 } 2293 } else { 2294 if (ensoniq->uartc & ES_RXINTEN) { 2295 ensoniq->uartc &= ~ES_RXINTEN; 2296 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2297 } 2298 } 2299 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 2300 } 2301 2302 static void snd_ensoniq_midi_output_trigger(snd_rawmidi_substream_t * substream, int up) 2303 { 2304 unsigned long flags; 2305 ensoniq_t *ensoniq = substream->rmidi->private_data; 2306 unsigned char byte; 2307 2308 // printk("Ensoniq MIDI output trigger\n"); 2309 2310 spin_lock_irqsave(&ensoniq->reg_lock, flags); 2311 if (up) { 2312 if (ES_TXINTENI(ensoniq->uartc) == 0) { 2313 ensoniq->uartc |= ES_TXINTENO(1); 2314 /* fill UART FIFO buffer at first, and turn Tx interrupts only if necessary */ 2315 while (ES_TXINTENI(ensoniq->uartc) == 1 && 2316 (inb(ES_REG(ensoniq, UART_STATUS)) & ES_TXRDY)) { 2317 if (snd_rawmidi_transmit(substream, &byte, 1) != 1) { 2318 ensoniq->uartc &= ~ES_TXINTENM; 2319 } else { 2320 outb(byte, ES_REG(ensoniq, UART_DATA)); 2321 } 2322 } 2323 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2324 } 2325 } else { 2326 if (ES_TXINTENI(ensoniq->uartc) == 1) { 2327 ensoniq->uartc &= ~ES_TXINTENM; 2328 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2329 } 2330 } 2331 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 2332 } 2333 2334 static snd_rawmidi_ops_t snd_ensoniq_midi_output = 2335 { 2336 snd_ensoniq_midi_output_open, 2337 snd_ensoniq_midi_output_close, 2338 snd_ensoniq_midi_output_trigger, 2339 0 2208 static void snd_ensoniq_midi_interrupt(struct ensoniq * ensoniq) 2209 { 2210 struct snd_rawmidi *rmidi = ensoniq->rmidi; 2211 unsigned char status, mask, byte; 2212 2213 if (rmidi == NULL) 2214 return; 2215 /* do Rx at first */ 2216 spin_lock(&ensoniq->reg_lock); 2217 mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0; 2218 while (mask) { 2219 status = inb(ES_REG(ensoniq, UART_STATUS)); 2220 if ((status & mask) == 0) 2221 break; 2222 byte = inb(ES_REG(ensoniq, UART_DATA)); 2223 snd_rawmidi_receive(ensoniq->midi_input, &byte, 1); 2224 } 2225 spin_unlock(&ensoniq->reg_lock); 2226 2227 /* do Tx at second */ 2228 spin_lock(&ensoniq->reg_lock); 2229 mask = ensoniq->uartm & ES_MODE_OUTPUT ? ES_TXRDY : 0; 2230 while (mask) { 2231 status = inb(ES_REG(ensoniq, UART_STATUS)); 2232 if ((status & mask) == 0) 2233 break; 2234 if (snd_rawmidi_transmit(ensoniq->midi_output, &byte, 1) != 1) { 2235 ensoniq->uartc &= ~ES_TXINTENM; 2236 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2237 mask &= ~ES_TXRDY; 2238 } else { 2239 outb(byte, ES_REG(ensoniq, UART_DATA)); 2240 } 2241 } 2242 spin_unlock(&ensoniq->reg_lock); 2243 } 2244 2245 static int snd_ensoniq_midi_input_open(struct snd_rawmidi_substream *substream) 2246 { 2247 struct ensoniq *ensoniq = substream->rmidi->private_data; 2248 2249 spin_lock_irq(&ensoniq->reg_lock); 2250 ensoniq->uartm |= ES_MODE_INPUT; 2251 ensoniq->midi_input = substream; 2252 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) { 2253 outb(ES_CNTRL(3), ES_REG(ensoniq, UART_CONTROL)); 2254 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2255 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2256 } 2257 spin_unlock_irq(&ensoniq->reg_lock); 2258 return 0; 2259 } 2260 2261 static int snd_ensoniq_midi_input_close(struct snd_rawmidi_substream *substream) 2262 { 2263 struct ensoniq *ensoniq = substream->rmidi->private_data; 2264 2265 spin_lock_irq(&ensoniq->reg_lock); 2266 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) { 2267 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2268 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2269 } else { 2270 outb(ensoniq->uartc &= ~ES_RXINTEN, ES_REG(ensoniq, UART_CONTROL)); 2271 } 2272 ensoniq->midi_input = NULL; 2273 ensoniq->uartm &= ~ES_MODE_INPUT; 2274 spin_unlock_irq(&ensoniq->reg_lock); 2275 return 0; 2276 } 2277 2278 static int snd_ensoniq_midi_output_open(struct snd_rawmidi_substream *substream) 2279 { 2280 struct ensoniq *ensoniq = substream->rmidi->private_data; 2281 2282 spin_lock_irq(&ensoniq->reg_lock); 2283 ensoniq->uartm |= ES_MODE_OUTPUT; 2284 ensoniq->midi_output = substream; 2285 if (!(ensoniq->uartm & ES_MODE_INPUT)) { 2286 outb(ES_CNTRL(3), ES_REG(ensoniq, UART_CONTROL)); 2287 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2288 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2289 } 2290 spin_unlock_irq(&ensoniq->reg_lock); 2291 return 0; 2292 } 2293 2294 static int snd_ensoniq_midi_output_close(struct snd_rawmidi_substream *substream) 2295 { 2296 struct ensoniq *ensoniq = substream->rmidi->private_data; 2297 2298 spin_lock_irq(&ensoniq->reg_lock); 2299 if (!(ensoniq->uartm & ES_MODE_INPUT)) { 2300 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2301 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2302 } else { 2303 outb(ensoniq->uartc &= ~ES_TXINTENM, ES_REG(ensoniq, UART_CONTROL)); 2304 } 2305 ensoniq->midi_output = NULL; 2306 ensoniq->uartm &= ~ES_MODE_OUTPUT; 2307 spin_unlock_irq(&ensoniq->reg_lock); 2308 return 0; 2309 } 2310 2311 static void snd_ensoniq_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) 2312 { 2313 unsigned long flags; 2314 struct ensoniq *ensoniq = substream->rmidi->private_data; 2315 int idx; 2316 2317 spin_lock_irqsave(&ensoniq->reg_lock, flags); 2318 if (up) { 2319 if ((ensoniq->uartc & ES_RXINTEN) == 0) { 2320 /* empty input FIFO */ 2321 for (idx = 0; idx < 32; idx++) 2322 inb(ES_REG(ensoniq, UART_DATA)); 2323 ensoniq->uartc |= ES_RXINTEN; 2324 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2325 } 2326 } else { 2327 if (ensoniq->uartc & ES_RXINTEN) { 2328 ensoniq->uartc &= ~ES_RXINTEN; 2329 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2330 } 2331 } 2332 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 2333 } 2334 2335 static void snd_ensoniq_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) 2336 { 2337 unsigned long flags; 2338 struct ensoniq *ensoniq = substream->rmidi->private_data; 2339 unsigned char byte; 2340 2341 spin_lock_irqsave(&ensoniq->reg_lock, flags); 2342 if (up) { 2343 if (ES_TXINTENI(ensoniq->uartc) == 0) { 2344 ensoniq->uartc |= ES_TXINTENO(1); 2345 /* fill UART FIFO buffer at first, and turn Tx interrupts only if necessary */ 2346 while (ES_TXINTENI(ensoniq->uartc) == 1 && 2347 (inb(ES_REG(ensoniq, UART_STATUS)) & ES_TXRDY)) { 2348 if (snd_rawmidi_transmit(substream, &byte, 1) != 1) { 2349 ensoniq->uartc &= ~ES_TXINTENM; 2350 } else { 2351 outb(byte, ES_REG(ensoniq, UART_DATA)); 2352 } 2353 } 2354 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2355 } 2356 } else { 2357 if (ES_TXINTENI(ensoniq->uartc) == 1) { 2358 ensoniq->uartc &= ~ES_TXINTENM; 2359 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2360 } 2361 } 2362 spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 2363 } 2364 2365 static struct snd_rawmidi_ops snd_ensoniq_midi_output = 2366 { 2367 .open = snd_ensoniq_midi_output_open, 2368 .close = snd_ensoniq_midi_output_close, 2369 .trigger = snd_ensoniq_midi_output_trigger, 2340 2370 }; 2341 2371 2342 static snd_rawmidi_ops_t snd_ensoniq_midi_input = 2343 { 2344 snd_ensoniq_midi_input_open, 2345 snd_ensoniq_midi_input_close, 2346 snd_ensoniq_midi_input_trigger, 2347 0 2372 static struct snd_rawmidi_ops snd_ensoniq_midi_input = 2373 { 2374 .open = snd_ensoniq_midi_input_open, 2375 .close = snd_ensoniq_midi_input_close, 2376 .trigger = snd_ensoniq_midi_input_trigger, 2348 2377 }; 2349 2378 2350 static int __devinit snd_ensoniq_midi(ensoniq_t * ensoniq, int device, snd_rawmidi_t **rrawmidi) 2351 { 2352 snd_rawmidi_t *rmidi; 2353 int err; 2354 2355 if (rrawmidi) 2356 *rrawmidi = NULL; 2357 if ((err = snd_rawmidi_new(ensoniq->card, "ES1370/1", device, 1, 1, &rmidi)) < 0) 2358 return err; 2359 #ifdef CHIP1370 2360 strcpy(rmidi->name, "ES1370"); 2379 static int __devinit snd_ensoniq_midi(struct ensoniq * ensoniq, int device, 2380 struct snd_rawmidi **rrawmidi) 2381 { 2382 struct snd_rawmidi *rmidi; 2383 int err; 2384 2385 if (rrawmidi) 2386 *rrawmidi = NULL; 2387 if ((err = snd_rawmidi_new(ensoniq->card, "ES1370/1", device, 1, 1, &rmidi)) < 0) 2388 return err; 2389 #ifdef CHIP1370 2390 strcpy(rmidi->name, "ES1370"); 2361 2391 #else 2362 strcpy(rmidi->name, "ES1371"); 2363 #endif 2364 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_ensoniq_midi_output); 2365 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_ensoniq_midi_input); 2366 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUPLEX; 2367 rmidi->private_data = ensoniq; 2368 ensoniq->rmidi = rmidi; 2369 if (rrawmidi) 2370 *rrawmidi = rmidi; 2371 return 0; 2392 strcpy(rmidi->name, "ES1371"); 2393 #endif 2394 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_ensoniq_midi_output); 2395 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_ensoniq_midi_input); 2396 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | 2397 SNDRV_RAWMIDI_INFO_DUPLEX; 2398 rmidi->private_data = ensoniq; 2399 ensoniq->rmidi = rmidi; 2400 if (rrawmidi) 2401 *rrawmidi = rmidi; 2402 return 0; 2372 2403 } 2373 2404 … … 2378 2409 static irqreturn_t snd_audiopci_interrupt(int irq, void *dev_id, struct pt_regs *regs) 2379 2410 { 2380 #ifdef TARGET_OS2 2381 int fOurIrq = FALSE; 2382 #endif 2383 2384 ensoniq_t *ensoniq = dev_id; 2385 unsigned int status, sctrl; 2386 2387 if (ensoniq == NULL) 2388 return IRQ_NONE; 2389 2390 status = inl(ES_REG(ensoniq, STATUS)); 2391 if (!(status & ES_INTR)) 2392 return IRQ_NONE; 2393 #ifdef TARGET_OS2 2394 if (status & (ES_INTR|ES_UART|ES_DAC1|ES_DAC2|ES_ADC)) 2395 { 2396 fOurIrq = TRUE; 2397 } 2398 #endif 2399 2400 spin_lock(&ensoniq->reg_lock); 2401 sctrl = ensoniq->sctrl; 2402 if (status & ES_DAC1) 2403 sctrl &= ~ES_P1_INT_EN; 2404 if (status & ES_DAC2) 2405 sctrl &= ~ES_P2_INT_EN; 2406 if (status & ES_ADC) 2407 sctrl &= ~ES_R1_INT_EN; 2408 outl(sctrl, ES_REG(ensoniq, SERIAL)); 2409 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2410 spin_unlock(&ensoniq->reg_lock); 2411 2412 if (status & ES_UART) 2413 { 2414 // printk("MIDI int\n"); 2415 snd_ensoniq_midi_interrupt(ensoniq); 2416 } 2417 if ((status & ES_DAC2) && ensoniq->playback2_substream) 2418 snd_pcm_period_elapsed(ensoniq->playback2_substream); 2419 if ((status & ES_ADC) && ensoniq->capture_substream) 2420 snd_pcm_period_elapsed(ensoniq->capture_substream); 2421 if ((status & ES_DAC1) && ensoniq->playback1_substream) 2422 snd_pcm_period_elapsed(ensoniq->playback1_substream); 2423 2424 #ifdef TARGET_OS2 2425 if (fOurIrq) { 2426 eoi_irq(irq); 2427 } 2428 #endif //TARGET_OS2 2429 return IRQ_HANDLED; 2411 struct ensoniq *ensoniq = dev_id; 2412 unsigned int status, sctrl; 2413 2414 if (ensoniq == NULL) 2415 return IRQ_NONE; 2416 2417 status = inl(ES_REG(ensoniq, STATUS)); 2418 if (!(status & ES_INTR)) 2419 return IRQ_NONE; 2420 2421 spin_lock(&ensoniq->reg_lock); 2422 sctrl = ensoniq->sctrl; 2423 if (status & ES_DAC1) 2424 sctrl &= ~ES_P1_INT_EN; 2425 if (status & ES_DAC2) 2426 sctrl &= ~ES_P2_INT_EN; 2427 if (status & ES_ADC) 2428 sctrl &= ~ES_R1_INT_EN; 2429 outl(sctrl, ES_REG(ensoniq, SERIAL)); 2430 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2431 spin_unlock(&ensoniq->reg_lock); 2432 2433 if (status & ES_UART) 2434 snd_ensoniq_midi_interrupt(ensoniq); 2435 if ((status & ES_DAC2) && ensoniq->playback2_substream) 2436 snd_pcm_period_elapsed(ensoniq->playback2_substream); 2437 if ((status & ES_ADC) && ensoniq->capture_substream) 2438 snd_pcm_period_elapsed(ensoniq->capture_substream); 2439 if ((status & ES_DAC1) && ensoniq->playback1_substream) 2440 snd_pcm_period_elapsed(ensoniq->playback1_substream); 2441 return IRQ_HANDLED; 2430 2442 } 2431 2443 2432 2444 static int __devinit snd_audiopci_probe(struct pci_dev *pci, 2433 const struct pci_device_id *pci_id) 2434 { 2435 static int dev; 2436 snd_card_t *card; 2437 ensoniq_t *ensoniq; 2438 int err, pcm_devs[2]; 2439 2440 if (dev >= SNDRV_CARDS) 2441 return -ENODEV; 2442 if (!enable[dev]) { 2443 dev++; 2444 return -ENOENT; 2445 } 2446 2447 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 2448 if (card == NULL) 2449 return -ENOMEM; 2450 2451 if ((err = snd_ensoniq_create(card, pci, &ensoniq)) < 0) { 2452 snd_card_free(card); 2453 return err; 2454 } 2455 2456 pcm_devs[0] = 0; pcm_devs[1] = 1; 2457 #ifdef CHIP1370 2458 if ((err = snd_ensoniq_1370_mixer(ensoniq)) < 0) { 2459 snd_card_free(card); 2460 return err; 2461 } 2445 const struct pci_device_id *pci_id) 2446 { 2447 static int dev; 2448 struct snd_card *card; 2449 struct ensoniq *ensoniq; 2450 int err, pcm_devs[2]; 2451 2452 if (dev >= SNDRV_CARDS) 2453 return -ENODEV; 2454 if (!enable[dev]) { 2455 dev++; 2456 return -ENOENT; 2457 } 2458 2459 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 2460 if (card == NULL) 2461 return -ENOMEM; 2462 2463 if ((err = snd_ensoniq_create(card, pci, &ensoniq)) < 0) { 2464 snd_card_free(card); 2465 return err; 2466 } 2467 card->private_data = ensoniq; 2468 2469 pcm_devs[0] = 0; pcm_devs[1] = 1; 2470 #ifdef CHIP1370 2471 if ((err = snd_ensoniq_1370_mixer(ensoniq)) < 0) { 2472 snd_card_free(card); 2473 return err; 2474 } 2462 2475 #endif 2463 2476 #ifdef CHIP1371 2464 if ((err = snd_ensoniq_1371_mixer(ensoniq)) < 0) { 2465 snd_card_free(card); 2466 return err; 2467 } 2468 #endif 2469 if ((err = snd_ensoniq_pcm(ensoniq, 0, NULL)) < 0) { 2470 snd_card_free(card); 2471 return err; 2472 } 2473 if ((err = snd_ensoniq_pcm2(ensoniq, 1, NULL)) < 0) { 2474 snd_card_free(card); 2475 return err; 2476 } 2477 if ((err = snd_ensoniq_midi(ensoniq, 0, NULL)) < 0) { 2478 snd_card_free(card); 2479 return err; 2480 } 2481 #ifdef CHIP1370 2482 strcpy(card->driver, "ENS1370"); 2483 #endif 2484 #ifdef CHIP1371 2485 strcpy(card->driver, "ENS1371"); 2486 #endif 2487 strcpy(card->shortname, "Ensoniq AudioPCI"); 2488 sprintf(card->longname, "%s %s at 0x%lx, irq %i", 2489 card->shortname, 2490 card->driver, 2491 ensoniq->port, 2492 ensoniq->irq); 2493 2494 if ((err = snd_card_register(card)) < 0) { 2495 snd_card_free(card); 2496 return err; 2497 } 2498 2499 pci_set_drvdata(pci, card); 2500 dev++; 2501 return 0; 2477 if ((err = snd_ensoniq_1371_mixer(ensoniq, spdif[dev], lineio[dev])) < 0) { 2478 snd_card_free(card); 2479 return err; 2480 } 2481 #endif 2482 if ((err = snd_ensoniq_pcm(ensoniq, 0, NULL)) < 0) { 2483 snd_card_free(card); 2484 return err; 2485 } 2486 if ((err = snd_ensoniq_pcm2(ensoniq, 1, NULL)) < 0) { 2487 snd_card_free(card); 2488 return err; 2489 } 2490 if ((err = snd_ensoniq_midi(ensoniq, 0, NULL)) < 0) { 2491 snd_card_free(card); 2492 return err; 2493 } 2494 2495 snd_ensoniq_create_gameport(ensoniq, dev); 2496 2497 strcpy(card->driver, DRIVER_NAME); 2498 2499 strcpy(card->shortname, "Ensoniq AudioPCI"); 2500 sprintf(card->longname, "%s %s at 0x%lx, irq %i", 2501 card->shortname, 2502 card->driver, 2503 ensoniq->port, 2504 ensoniq->irq); 2505 2506 if ((err = snd_card_register(card)) < 0) { 2507 snd_card_free(card); 2508 return err; 2509 } 2510 2511 pci_set_drvdata(pci, card); 2512 dev++; 2513 return 0; 2502 2514 } 2503 2515 2504 2516 static void __devexit snd_audiopci_remove(struct pci_dev *pci) 2505 2517 { 2506 2507 2518 snd_card_free(pci_get_drvdata(pci)); 2519 pci_set_drvdata(pci, NULL); 2508 2520 } 2509 2521 2510 2522 static struct pci_driver driver = { 2511 0, 0, 0, 2512 "Ensoniq AudioPCI", 2513 snd_audiopci_ids, 2514 snd_audiopci_probe, 2515 snd_audiopci_remove, 2516 0, 0 2523 .name = DRIVER_NAME, 2524 .id_table = snd_audiopci_ids, 2525 .probe = snd_audiopci_probe, 2526 .remove = snd_audiopci_remove, 2527 #ifdef CONFIG_PM 2528 .suspend = snd_ensoniq_suspend, 2529 .resume = snd_ensoniq_resume, 2530 #endif 2517 2531 }; 2518 2519 2532 2520 2533 static int __init alsa_card_ens137x_init(void) 2521 2534 { 2522 int err; 2523 2524 if ((err = pci_module_init(&driver)) < 0) { 2525 #ifdef MODULE 2526 // snd_printk("Ensoniq AudioPCI soundcard not found or device busy\n"); 2527 #endif 2528 return err; 2529 } 2530 return 0; 2535 return pci_register_driver(&driver); 2531 2536 } 2532 2537 2533 2538 static void __exit alsa_card_ens137x_exit(void) 2534 2539 { 2535 2540 pci_unregister_driver(&driver); 2536 2541 } 2537 2542 2538 2543 module_init(alsa_card_ens137x_init) 2539 2544 module_exit(alsa_card_ens137x_exit) 2540 2541 #ifndef MODULE2542 2543 /* format is: snd-card-ens1370=snd_enable,snd_index,snd_id */2544 2545 static int __init alsa_card_ens137x_setup(char *str)2546 {2547 static unsigned __initdata nr_dev = 0;2548 2549 if (nr_dev >= SNDRV_CARDS)2550 return 0;2551 (void)(get_option(&str,&enable[nr_dev]) == 2 &&2552 get_option(&str,&index[nr_dev]) == 2 &&2553 get_id(&str,&id[nr_dev]) == 2);2554 nr_dev++;2555 return 1;2556 }2557 2558 #if defined(CHIP1370)2559 __setup("snd-ens1370=", alsa_card_ens137x_setup);2560 #elif defined(CHIP1371)2561 __setup("snd-ens1371=", alsa_card_ens137x_setup);2562 #endif2563 2564 #endif /* ifndef MODULE */ -
GPL/trunk/alsa-kernel/pci/intel8x0.c
r64 r70 260 260 #define ICH_SAMPLE_16_20 0x00400000 /* ICH4: 16- and 20-bit samples */ 261 261 #define ICH_MULTICHAN_CAP 0x00300000 /* ICH4: multi-channel capability bits (RO) */ 262 #define ICH_SIS_TRI 0x00080000 /* SIS: tertiary resume irq */ 263 #define ICH_SIS_TCR 0x00040000 /* SIS: tertiary codec ready */ 262 264 #define ICH_MD3 0x00020000 /* modem power down semaphore */ 263 265 #define ICH_AD3 0x00010000 /* audio power down semaphore */ … … 457 459 ac97_t *ac97[3]; 458 460 unsigned int ac97_sdin[3]; 461 unsigned int max_codecs, ncodecs; 462 unsigned int *codec_bit; 463 unsigned int codec_isr_bits; 464 unsigned int codec_ready_bits; 459 465 460 466 snd_rawmidi_t *rmidi; … … 577 583 */ 578 584 579 /* return the GLOB_STA bit for the corresponding codec */580 static unsigned int get_ich_codec_bit(struct intel8x0 *chip, unsigned int codec)581 {582 static unsigned int codec_bit[3] = {583 ICH_PCR, ICH_SCR, ICH_TCR584 };585 snd_assert(codec < 3, return ICH_PCR);586 if (chip->device_type == DEVICE_INTEL_ICH4 ||587 chip->device_type == DEVICE_INTEL_ICH5)588 codec = chip->ac97_sdin[codec];589 return codec_bit[codec];590 }591 592 585 static int snd_intel8x0_codec_semaphore(struct intel8x0 *chip, unsigned int codec) 593 586 { … … 599 592 /* we don't know the ready bit assignment at the moment */ 600 593 /* so we check any */ 601 codec = ICH_PCR | ICH_SCR | ICH_TCR;594 codec = chip->codec_isr_bits; 602 595 } else { 603 codec = get_ich_codec_bit(chip, codec);596 codec = chip->codec_bit[chip->ac97_sdin[codec]]; 604 597 } 605 598 … … 654 647 if ((tmp = igetdword(chip, ICHREG(GLOB_STA))) & ICH_RCS) { 655 648 /* reset RCS and preserve other R/WC bits */ 656 iputdword(chip, ICHREG(GLOB_STA), tmp & ~( ICH_SRI|ICH_PRI|ICH_TRI|ICH_GSCI));649 iputdword(chip, ICHREG(GLOB_STA), tmp & ~(chip->codec_ready_bits | ICH_GSCI)); 657 650 if (! chip->in_ac97_init) 658 651 snd_printk("codec_read %d: read timeout for register 0x%x\n", ac97->num, reg); … … 663 656 } 664 657 665 static void snd_intel8x0_codec_read_test(struct intel8x0 *chip, unsigned int codec) 658 static void __devinit snd_intel8x0_codec_read_test(struct intel8x0 *chip, 659 unsigned int codec) 666 660 { 667 661 unsigned int tmp; … … 671 665 if ((tmp = igetdword(chip, ICHREG(GLOB_STA))) & ICH_RCS) { 672 666 /* reset RCS and preserve other R/WC bits */ 673 iputdword(chip, ICHREG(GLOB_STA), tmp & ~( ICH_SRI|ICH_PRI|ICH_TRI|ICH_GSCI));667 iputdword(chip, ICHREG(GLOB_STA), tmp & ~(chip->codec_ready_bits | ICH_GSCI)); 674 668 } 675 669 } … … 1822 1816 }, 1823 1817 { 1824 .subvendor = 0x1028, 1818 .subvendor = 0x1028, 1819 .subdevice = 0x0151, 1820 .name = "Dell Optiplex GX270", /* AD1981B */ 1821 .type = AC97_TUNE_HP_ONLY 1822 }, 1823 { 1824 .subvendor = 0x1028, 1825 1825 .subdevice = 0x0163, 1826 1826 .name = "Dell Unknown", /* STAC9750/51 */ … … 1862 1862 .name = "HP nx8220", 1863 1863 .type = AC97_TUNE_MUTE_LED 1864 },1865 {1866 .subvendor = 0x103c,1867 .subdevice = 0x099c,1868 .name = "HP nx6110", /* AD1981B */1869 .type = AC97_TUNE_HP_ONLY1870 1864 }, 1871 1865 { … … 1890 1884 .subvendor = 0x103c, 1891 1885 .subdevice = 0x0944, 1892 .name = "HP n c6220",1886 .name = "HP nx6110/nc6120", 1893 1887 .type = AC97_TUNE_HP_MUTE_LED 1894 1888 }, … … 2092 2086 glob_sta = igetdword(chip, ICHREG(GLOB_STA)); 2093 2087 ops = &standard_bus_ops; 2094 if (chip->device_type == DEVICE_INTEL_ICH4 || 2095 chip->device_type == DEVICE_INTEL_ICH5) { 2096 codecs = 0; 2097 if (glob_sta & ICH_PCR) 2098 codecs++; 2099 if (glob_sta & ICH_SCR) 2100 codecs++; 2101 if (glob_sta & ICH_TCR) 2102 codecs++; 2088 chip->in_sdin_init = 1; 2089 codecs = 0; 2090 for (i = 0; i < chip->max_codecs; i++) { 2091 if (! (glob_sta & chip->codec_bit[i])) 2092 continue; 2093 if (chip->device_type == DEVICE_INTEL_ICH4 || 2094 chip->device_type == DEVICE_INTEL_ICH5) { 2095 snd_intel8x0_codec_read_test(chip, codecs); 2096 chip->ac97_sdin[codecs] = 2097 igetbyte(chip, ICHREG(SDM)) & ICH_LDI_MASK; 2098 snd_assert(chip->ac97_sdin[codecs] < 3, 2099 chip->ac97_sdin[codecs] = 0); 2100 } else 2101 chip->ac97_sdin[codecs] = i; 2102 codecs++; 2103 2103 chip->in_sdin_init = 1; 2104 #if 1 //vladest 06.10.2003 15:55 - bull shit!!! it doesnt works here 2105 for (i = 0; i < codecs; i++) { 2106 printk("codec %i read test begins...", i); 2107 snd_intel8x0_codec_read_test(chip, i); 2108 chip->ac97_sdin[i] = igetbyte(chip, ICHREG(SDM)) & ICH_LDI_MASK; 2109 printk("finished\n"); 2110 } 2111 #endif 2112 chip->in_sdin_init = 0; 2113 } else { 2114 codecs = glob_sta & ICH_SCR ? 2 : 1; 2115 } 2104 } 2105 chip->in_sdin_init = 0; 2106 if (! codecs) 2107 codecs = 1; 2116 2108 } else { 2117 2109 ops = &ali_bus_ops; … … 2131 2123 goto __err; 2132 2124 pbus->private_free = snd_intel8x0_mixer_free_ac97_bus; 2133 pbus->shared_type = AC97_SHARED_TYPE_ICH; /* shared with modem driver */2134 2125 if (ac97_clock >= 8000 && ac97_clock <= 48000) 2135 2126 pbus->clock = ac97_clock; … … 2140 2131 pbus->dra = 1; 2141 2132 chip->ac97_bus = pbus; 2133 chip->ncodecs = codecs; 2142 2134 2143 2135 ac97.pci = chip->pci; … … 2320 2312 i = 0; 2321 2313 do { 2322 status = igetdword(chip, ICHREG(GLOB_STA)) & (ICH_PCR | ICH_SCR | ICH_TCR);2314 status = igetdword(chip, ICHREG(GLOB_STA)) & chip->codec_isr_bits;; 2323 2315 if (status) 2324 2316 break; … … 2338 2330 // mdelay(50); 2339 2331 2340 if (chip->device_type == DEVICE_INTEL_ICH4 ||2341 chip->device_type == DEVICE_INTEL_ICH5)2342 /* ICH4 can have three codecs */2343 nstatus = ICH_PCR | ICH_SCR | ICH_TCR;2344 else2345 /* others up to two codecs */2346 nstatus = ICH_PCR | ICH_SCR;2347 2332 /* wait for other codecs ready status. */ 2348 2333 end_time = jiffies + HZ / 4; 2349 while (status != nstatus && time_after_eq(end_time, jiffies)) { 2334 while (status != chip->codec_isr_bits && 2335 time_after_eq(end_time, jiffies)) { 2350 2336 do_delay(chip); 2351 status |= igetdword(chip, ICHREG(GLOB_STA)) & nstatus; 2337 status |= igetdword(chip, ICHREG(GLOB_STA)) & 2338 chip->codec_isr_bits; 2352 2339 } 2353 2340 } else { … … 2355 2342 int i; 2356 2343 status = 0; 2357 for (i = 0; i < 3; i++)2344 for (i = 0; i < chip->ncodecs; i++) 2358 2345 if (chip->ac97[i]) 2359 status |= get_ich_codec_bit(chip, i);2346 status |= chip->codec_bit[chip->ac97_sdin[i]]; 2360 2347 /* wait until all the probed codecs are ready */ 2361 2348 end_time = jiffies + HZ; 2362 2349 do { 2363 nstatus = igetdword(chip, ICHREG(GLOB_STA)) & (ICH_PCR | ICH_SCR | ICH_TCR);2350 nstatus = igetdword(chip, ICHREG(GLOB_STA)) & chip->codec_isr_bits;; 2364 2351 if (status == nstatus) 2365 2352 break; … … 2497 2484 snd_pcm_suspend_all(chip->pcm[i]); 2498 2485 2499 for (i = 0; i < 3; i++)2486 for (i = 0; i < chip->ncodecs; i++) 2500 2487 if (chip->ac97[i]) //Rudi: check, if codec present !!! 2501 2488 snd_ac97_suspend(chip->ac97[i]); … … 2536 2523 } 2537 2524 2538 for (i = 0; i < 3; i++)2525 for (i = 0; i < chip->ncodecs; i++) 2539 2526 if (chip->ac97[i]) //Rudi: check, if codec present !!! 2540 2527 snd_ac97_resume(chip->ac97[i]); … … 2655 2642 chip->device_type == DEVICE_INTEL_ICH5) 2656 2643 snd_iprintf(buffer, "SDM : 0x%08x\n", igetdword(chip, ICHREG(SDM))); 2657 snd_iprintf(buffer, "AC'97 codecs ready :%s%s%s%s\n", 2658 tmp & ICH_PCR ? " primary" : "", 2659 tmp & ICH_SCR ? " secondary" : "", 2660 tmp & ICH_TCR ? " tertiary" : "", 2661 (tmp & (ICH_PCR | ICH_SCR | ICH_TCR)) == 0 ? " none" : ""); 2644 snd_iprintf(buffer, "AC'97 codecs ready :"); 2645 if (tmp & chip->codec_isr_bits) { 2646 int i; 2647 static const char *codecs[3] = { 2648 "primary", "secondary", "tertiary" 2649 }; 2650 for (i = 0; i < chip->max_codecs; i++) 2651 if (tmp & chip->codec_bit[i]) 2652 snd_iprintf(buffer, " %s", codecs[i]); 2653 } else 2654 snd_iprintf(buffer, " none"); 2655 snd_iprintf(buffer, "\n"); 2662 2656 if (chip->device_type == DEVICE_INTEL_ICH4 || 2663 chip->device_type == DEVICE_INTEL_ICH5)2657 chip->device_type == DEVICE_SIS) 2664 2658 snd_iprintf(buffer, "AC'97 codecs SDIN : %i %i %i\n", 2665 2659 chip->ac97_sdin[0], … … 2690 2684 }; 2691 2685 2686 static unsigned int ich_codec_bits[3] = { 2687 ICH_PCR, ICH_SCR, ICH_TCR 2688 }; 2689 static unsigned int sis_codec_bits[3] = { 2690 ICH_PCR, ICH_SCR, ICH_SIS_TCR 2691 }; 2692 2692 2693 2693 static int __devinit snd_intel8x0_create(snd_card_t * card, … … 2929 2929 synchronize_irq(chip->irq); 2930 2930 2931 switch(chip->device_type) { 2932 case DEVICE_INTEL_ICH4: 2933 case DEVICE_INTEL_ICH5: 2934 /* ICH4/5 can have three codecs */ 2935 chip->max_codecs = 3; 2936 chip->codec_bit = ich_codec_bits; 2937 chip->codec_ready_bits = ICH_PRI | ICH_SRI | ICH_TRI; 2938 break; 2939 case DEVICE_SIS: 2940 /* recent SIS7012 can have three codecs */ 2941 chip->max_codecs = 3; 2942 chip->codec_bit = sis_codec_bits; 2943 chip->codec_ready_bits = ICH_PRI | ICH_SRI | ICH_SIS_TRI; 2944 break; 2945 default: 2946 /* others up to two codecs */ 2947 chip->max_codecs = 2; 2948 chip->codec_bit = ich_codec_bits; 2949 chip->codec_ready_bits = ICH_PRI | ICH_SRI; 2950 break; 2951 } 2952 for (i = 0; i < chip->max_codecs; i++) 2953 chip->codec_isr_bits |= chip->codec_bit[i]; 2954 2931 2955 if ((err = snd_intel8x0_chip_init(chip, 1)) < 0) { 2932 2956 snd_intel8x0_free(chip); -
GPL/trunk/alsa-kernel/pci/maestro3.c
r32 r70 2610 2610 return 0; 2611 2611 2612 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2612 2613 snd_pcm_suspend_all(chip->pcm); 2613 2614 snd_ac97_suspend(chip->ac97); … … 2629 2630 snd_m3_outw(chip, 0xffff, 0x54); 2630 2631 snd_m3_outw(chip, 0xffff, 0x56); 2632 pci_disable_device(chip->pci); 2633 pci_save_state(chip->pci); 2631 2634 return 0; 2632 2635 } … … 2640 2643 return 0; 2641 2644 2645 pci_restore_state(chip->pci); 2646 pci_enable_device(chip->pci); 2642 2647 pci_set_master(chip->pci); 2643 2648 … … 2670 2675 snd_m3_amp_enable(chip, 1); 2671 2676 2677 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2672 2678 return 0; 2673 2679 } … … 2822 2828 if (chip->suspend_mem == NULL) 2823 2829 snd_printk("can't allocate apm buffer\n"); 2824 else2825 snd_card_set_pm_callback(card, m3_suspend, m3_resume, chip);2826 2830 #endif 2827 2831 … … 2933 2937 2934 2938 static struct pci_driver driver = { 2935 0,0,0, "Maestro3", 2936 snd_m3_ids, 2937 snd_m3_probe, 2938 snd_m3_remove, 2939 SND_PCI_PM_CALLBACKS 2939 .name = "Maestro3", 2940 .id_table = snd_m3_ids, 2941 .probe = snd_m3_probe, 2942 .remove = __devexit_p(snd_m3_remove), 2943 #ifdef CONFIG_PM 2944 .suspend = m3_suspend, 2945 .resume = m3_resume, 2946 #endif 2940 2947 }; 2941 2948 -
GPL/trunk/alsa-kernel/pci/via82xx.c
r34 r70 43 43 * routines for each chipset. 44 44 * 45 * Sep. 26, 2005 46 * - Optimize position calculation for the 823x chips.45 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de> 46 * - Optimize position calculation for the 823x chips. 47 47 */ 48 48 … … 54 54 #include <linux/pci.h> 55 55 #include <linux/slab.h> 56 //#include <linux/gameport.h> 57 #include <linux/moduleparam.h> 56 58 #include <sound/core.h> 57 59 #include <sound/pcm.h> 58 #include <sound/memalloc.h>59 60 #include <sound/pcm_params.h> 60 61 #include <sound/info.h> 61 62 #include <sound/ac97_codec.h> 62 63 #include <sound/mpu401.h> 63 #define SNDRV_GET_ID64 64 #include <sound/initval.h> 65 65 … … 71 71 MODULE_DESCRIPTION("VIA VT82xx audio"); 72 72 MODULE_LICENSE("GPL"); 73 MODULE_CLASSES("{sound}"); 74 MODULE_DEVICES("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}"); 73 MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}"); 74 75 #ifndef PCI_DEVICE_ID_VIA_8233_5 76 #define PCI_DEVICE_ID_VIA_8233_5 0x3059 77 #endif 75 78 76 79 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) … … 78 81 #endif 79 82 80 extern int midi_port; 81 82 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 83 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 84 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 85 static long mpu_port[SNDRV_CARDS] = {-1,-1,0,0,0,0,0,0}; 83 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ 84 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 85 static long mpu_port; 86 86 #ifdef SUPPORT_JOYSTICK 87 static int joystick [SNDRV_CARDS] = {1,0,0,0,0,0,0,0};87 static int joystick; 88 88 #endif 89 static int ac97_clock [SNDRV_CARDS] = {REPEAT_SNDRV(48000)};90 static char *ac97_quirk [SNDRV_CARDS];91 static int dxs_support [SNDRV_CARDS];92 93 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");89 static int ac97_clock = 48000; 90 static char *ac97_quirk; 91 static int dxs_support; 92 93 //module_param(index, int, 0444); 94 94 MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge."); 95 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC); 96 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s"); 95 //module_param(id, charp, 0444); 97 96 MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge."); 98 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC); 99 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 100 MODULE_PARM_DESC(enable, "Enable audio part of VIA 82xx bridge."); 101 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC); 102 MODULE_PARM(mpu_port, "1-" __MODULE_STRING(SNDRV_CARDS) "l"); 97 //module_param(mpu_port, long, 0444); 103 98 MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)"); 104 MODULE_PARM_SYNTAX(mpu_port, SNDRV_PORT_DESC);105 99 #ifdef SUPPORT_JOYSTICK 106 MODULE_PARM(joystick, "1-" __MODULE_STRING(SNDRV_CARDS) "i");100 //module_param(joystick, bool, 0444); 107 101 MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)"); 108 MODULE_PARM_SYNTAX(joystick, SNDRV_ENABLE_DESC "," SNDRV_BOOLEAN_FALSE_DESC);109 102 #endif 110 MODULE_PARM(ac97_clock, "1-" __MODULE_STRING(SNDRV_CARDS) "i");103 //module_param(ac97_clock, int, 0444); 111 104 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); 112 MODULE_PARM_SYNTAX(ac97_clock, SNDRV_ENABLED ",default:48000"); 113 MODULE_PARM(ac97_quirk, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 105 //module_param(ac97_quirk, charp, 0444); 114 106 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 115 MODULE_PARM_SYNTAX(ac97_quirk, SNDRV_ENABLED ",allows:{{-1,3}},dialog:list,default:-1"); 116 MODULE_PARM(dxs_support, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 107 //module_param(dxs_support, int, 0444); 117 108 MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)"); 118 MODULE_PARM_SYNTAX(dxs_support, SNDRV_ENABLED ",allows:{{0,4}},dialog:list"); 119 120 121 /* pci ids */ 122 #ifndef PCI_DEVICE_ID_VIA_82C686_5 123 #define PCI_DEVICE_ID_VIA_82C686_5 0x3058 124 #endif 125 #ifndef PCI_DEVICE_ID_VIA_8233_5 126 #define PCI_DEVICE_ID_VIA_8233_5 0x3059 127 #endif 109 110 /* just for backward compatibility */ 111 static int enable; 112 //module_param(enable, bool, 0444); 113 128 114 129 115 /* revision numbers for via686 */ … … 141 127 #define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */ 142 128 #define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */ 143 #define VIA_REV_8237 129 #define VIA_REV_8237 0x60 144 130 145 131 /* … … 153 139 #define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */ 154 140 #define VIA_REG_STAT_ACTIVE 0x80 /* RO */ 155 #define VIA8233_SHADOW_STAT_ACTIVE 0x08/* RO */141 #define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */ 156 142 #define VIA_REG_STAT_PAUSED 0x40 /* RO */ 157 143 #define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */ … … 164 150 #define VIA_REG_CTRL_AUTOSTART 0x20 165 151 #define VIA_REG_CTRL_PAUSE 0x08 /* RW */ 166 #define VIA_REG_CTRL_INT_STOP 0x04 152 #define VIA_REG_CTRL_INT_STOP 0x04 167 153 #define VIA_REG_CTRL_INT_EOL 0x02 168 154 #define VIA_REG_CTRL_INT_FLAG 0x01 … … 188 174 189 175 #define DEFINE_VIA_REGSET(name,val) \ 190 191 192 193 194 195 196 197 198 176 enum {\ 177 VIA_REG_##name##_STATUS = (val),\ 178 VIA_REG_##name##_CONTROL = (val) + 0x01,\ 179 VIA_REG_##name##_TYPE = (val) + 0x02,\ 180 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\ 181 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\ 182 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\ 183 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\ 184 } 199 185 200 186 /* playback block */ … … 287 273 #define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */ 288 274 #define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\ 289 290 291 275 VIA_ACLINK_CTRL_RESET|\ 276 VIA_ACLINK_CTRL_PCM|\ 277 VIA_ACLINK_CTRL_VRA) 292 278 #define VIA_FUNC_ENABLE 0x42 293 279 #define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */ … … 318 304 #define VIA_DXS_48K 3 319 305 #define VIA_DXS_NO_VRA 4 320 #define VIA_DXS_SRC 5 321 322 /* 323 */ 324 325 typedef struct _snd_via82xx via82xx_t; 326 typedef struct via_dev viadev_t; 306 #define VIA_DXS_SRC 5 307 327 308 328 309 /* … … 331 312 332 313 struct snd_via_sg_table { 333 334 314 unsigned int offset; 315 unsigned int size; 335 316 } ; 336 317 337 318 #define VIA_TABLE_SIZE 255 338 319 339 struct via _dev {340 341 342 343 snd_pcm_substream_t*substream;344 345 346 347 348 349 350 351 352 353 int hwptr_done;/* processed frame position in the buffer */354 355 320 struct viadev { 321 unsigned int reg_offset; 322 unsigned long port; 323 int direction; /* playback = 0, capture = 1 */ 324 struct snd_pcm_substream *substream; 325 int running; 326 unsigned int tbl_entries; /* # descriptors */ 327 struct snd_dma_buffer table; 328 struct snd_via_sg_table *idx_table; 329 /* for recovery from the unexpected pointer */ 330 unsigned int lastpos; 331 unsigned int fragsize; 332 unsigned int bufsize; 333 unsigned int bufsize2; 334 int hwptr_done; /* processed frame position in the buffer */ 335 int in_interrupt; 336 int shadow_shift; 356 337 }; 338 357 339 358 340 enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 }; 359 341 enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A }; 360 342 361 #define VIA_MAX_DEVS 7/* 4 playback, 1 multi, 2 capture */343 #define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */ 362 344 363 345 struct via_rate_lock { 364 365 366 346 spinlock_t lock; 347 int rate; 348 int used; 367 349 }; 368 350 369 struct _snd_via82xx { 370 int irq; 371 372 unsigned long port; 373 struct resource *res_port; 374 struct resource *mpu_res; 375 int chip_type; 376 unsigned char revision; 377 378 unsigned char old_legacy; 379 unsigned char old_legacy_cfg; 380 351 struct via82xx { 352 int irq; 353 354 unsigned long port; 355 struct resource *mpu_res; 356 int chip_type; 357 unsigned char revision; 358 359 unsigned char old_legacy; 360 unsigned char old_legacy_cfg; 381 361 #ifdef CONFIG_PM 382 383 384 385 386 362 unsigned char legacy_saved; 363 unsigned char legacy_cfg_saved; 364 unsigned char spdif_ctrl_saved; 365 unsigned char capture_src_saved[2]; 366 unsigned int mpu_port_saved; 387 367 #endif 388 unsigned char playback_volume[2]; /* for VIA8233/C/8235; default = 0 */ 389 390 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */ 391 392 struct pci_dev *pci; 393 snd_card_t *card; 394 395 unsigned int num_devs; 396 unsigned int playback_devno, multi_devno, capture_devno; 397 viadev_t devs[VIA_MAX_DEVS]; 398 struct via_rate_lock rates[2]; /* playback and capture */ 399 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */ 400 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */ 401 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */ 402 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */ 403 404 snd_pcm_t *pcms[2]; 405 snd_rawmidi_t *rmidi; 406 407 ac97_bus_t *ac97_bus; 408 ac97_t *ac97; 409 unsigned int ac97_clock; 410 unsigned int ac97_secondary; /* secondary AC'97 codec is present */ 411 412 spinlock_t reg_lock; 413 snd_info_entry_t *proc_entry; 368 369 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */ 370 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */ 371 372 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */ 373 374 struct pci_dev *pci; 375 struct snd_card *card; 376 377 unsigned int num_devs; 378 unsigned int playback_devno, multi_devno, capture_devno; 379 struct viadev devs[VIA_MAX_DEVS]; 380 struct via_rate_lock rates[2]; /* playback and capture */ 381 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */ 382 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */ 383 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */ 384 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */ 385 386 struct snd_pcm *pcms[2]; 387 struct snd_rawmidi *rmidi; 388 389 struct snd_ac97_bus *ac97_bus; 390 struct snd_ac97 *ac97; 391 unsigned int ac97_clock; 392 unsigned int ac97_secondary; /* secondary AC'97 codec is present */ 393 394 spinlock_t reg_lock; 395 struct snd_info_entry *proc_entry; 414 396 415 397 #ifdef SUPPORT_JOYSTICK 416 struct gameport gameport; 417 struct resource *res_joystick; 398 struct gameport *gameport; 418 399 #endif 419 400 }; 420 401 421 402 static struct pci_device_id snd_via82xx_ids[] = { 422 423 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA686, },/* 686A */424 425 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233_5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA8233, },/* VT8233 */426 403 /* 0x1106, 0x3058 */ 404 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA686, }, /* 686A */ 405 /* 0x1106, 0x3059 */ 406 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233_5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA8233, }, /* VT8233 */ 407 { 0, } 427 408 }; 428 409 … … 437 418 * fragsize = period size in bytes 438 419 */ 439 static int build_via_table(viadev_t *dev, snd_pcm_substream_t *substream, 440 struct pci_dev *pci, 441 unsigned int periods, unsigned int fragsize) 442 { 443 unsigned int i, idx, ofs, rest; 444 via82xx_t *chip = snd_pcm_substream_chip(substream); 445 struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream); 446 447 if (dev->table.area == NULL) { 448 /* the start of each lists must be aligned to 8 bytes, 449 * but the kernel pages are much bigger, so we don't care 450 */ 451 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 452 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8), 453 &dev->table) < 0) 454 return -ENOMEM; 455 } 456 if (! dev->idx_table) { 457 dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL); 458 if (! dev->idx_table) 459 return -ENOMEM; 460 } 461 462 /* fill the entries */ 463 idx = 0; 464 ofs = 0; 465 for (i = 0; i < periods; i++) { 466 rest = fragsize; 467 /* fill descriptors for a period. 468 * a period can be split to several descriptors if it's 469 * over page boundary. 470 */ 471 do { 472 unsigned int r; 473 unsigned int flag; 474 475 if (idx >= VIA_TABLE_SIZE) { 476 snd_printk(KERN_ERR "via82xx: too much table size!\n"); 477 return -EINVAL; 478 } 479 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, ofs)); 480 r = PAGE_SIZE - (ofs % PAGE_SIZE); 481 if (rest < r) 482 r = rest; 483 rest -= r; 484 if (! rest) { 485 if (i == periods - 1) 486 flag = VIA_TBL_BIT_EOL; /* buffer boundary */ 487 else 488 flag = VIA_TBL_BIT_FLAG; /* period boundary */ 489 } else 490 flag = 0; /* period continues to the next */ 491 // printk("via: tbl %d: at %d size %d (rest %d)\n", idx, ofs, r, rest); 492 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag); 493 dev->idx_table[idx].offset = ofs; 494 dev->idx_table[idx].size = r; 495 ofs += r; 496 idx++; 497 } while (rest > 0); 498 } 499 dev->tbl_entries = idx; 500 dev->bufsize = periods * fragsize; 501 dev->bufsize2 = dev->bufsize / 2; 502 dev->fragsize = fragsize; 503 return 0; 504 } 505 506 static int clean_via_table(viadev_t *dev, snd_pcm_substream_t *substream, 507 struct pci_dev *pci) 508 { 509 if (dev->table.area) { 510 snd_dma_free_pages(&dev->table); 511 dev->table.area = NULL; 512 } 513 if (dev->idx_table) { 514 kfree(dev->idx_table); 515 dev->idx_table = NULL; 516 } 517 return 0; 420 static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream, 421 struct pci_dev *pci, 422 unsigned int periods, unsigned int fragsize) 423 { 424 unsigned int i, idx, ofs, rest; 425 struct via82xx *chip = snd_pcm_substream_chip(substream); 426 struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream); 427 428 if (dev->table.area == NULL) { 429 /* the start of each lists must be aligned to 8 bytes, 430 * but the kernel pages are much bigger, so we don't care 431 */ 432 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 433 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8), 434 &dev->table) < 0) 435 return -ENOMEM; 436 } 437 if (! dev->idx_table) { 438 dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL); 439 if (! dev->idx_table) 440 return -ENOMEM; 441 } 442 443 /* fill the entries */ 444 idx = 0; 445 ofs = 0; 446 for (i = 0; i < periods; i++) { 447 rest = fragsize; 448 /* fill descriptors for a period. 449 * a period can be split to several descriptors if it's 450 * over page boundary. 451 */ 452 do { 453 unsigned int r; 454 unsigned int flag; 455 456 if (idx >= VIA_TABLE_SIZE) { 457 snd_printk(KERN_ERR "via82xx: too much table size!\n"); 458 return -EINVAL; 459 } 460 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, ofs)); 461 r = PAGE_SIZE - (ofs % PAGE_SIZE); 462 if (rest < r) 463 r = rest; 464 rest -= r; 465 if (! rest) { 466 if (i == periods - 1) 467 flag = VIA_TBL_BIT_EOL; /* buffer boundary */ 468 else 469 flag = VIA_TBL_BIT_FLAG; /* period boundary */ 470 } else 471 flag = 0; /* period continues to the next */ 472 // printk("via: tbl %d: at %d size %d (rest %d)\n", idx, ofs, r, rest); 473 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag); 474 dev->idx_table[idx].offset = ofs; 475 dev->idx_table[idx].size = r; 476 ofs += r; 477 idx++; 478 } while (rest > 0); 479 } 480 dev->tbl_entries = idx; 481 dev->bufsize = periods * fragsize; 482 dev->bufsize2 = dev->bufsize / 2; 483 dev->fragsize = fragsize; 484 return 0; 485 } 486 487 488 static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream, 489 struct pci_dev *pci) 490 { 491 if (dev->table.area) { 492 snd_dma_free_pages(&dev->table); 493 dev->table.area = NULL; 494 } 495 kfree(dev->idx_table); 496 dev->idx_table = NULL; 497 return 0; 518 498 } 519 499 … … 522 502 */ 523 503 524 static inline unsigned int snd_via82xx_codec_xread(via82xx_t *chip) 525 { 526 return inl(VIAREG(chip, AC97)); 527 } 528 529 static inline void snd_via82xx_codec_xwrite(via82xx_t *chip, unsigned int val) 530 { 531 outl(val, VIAREG(chip, AC97)); 532 } 533 534 static int snd_via82xx_codec_ready(via82xx_t *chip, int secondary) 535 { 536 unsigned int timeout = 1000; /* 1ms */ 537 unsigned int val; 538 539 while (timeout-- > 0) { 540 udelay(1); 541 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)) 542 return val & 0xffff; 543 } 544 snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_via82xx_codec_xread(chip)); 545 return -EIO; 546 } 547 548 static int snd_via82xx_codec_valid(via82xx_t *chip, int secondary) 549 { 550 unsigned int timeout = 1000; /* 1ms */ 551 unsigned int val, val1; 552 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID : 553 VIA_REG_AC97_SECONDARY_VALID; 554 555 while (timeout-- > 0) { 556 val = snd_via82xx_codec_xread(chip); 557 val1 = val & (VIA_REG_AC97_BUSY | stat); 558 if (val1 == stat) 559 return val & 0xffff; 560 udelay(1); 561 } 562 return -EIO; 563 } 564 565 static void snd_via82xx_codec_wait(ac97_t *ac97) 566 { 567 via82xx_t *chip = ac97->private_data; 568 int err; 569 err = snd_via82xx_codec_ready(chip, ac97->num); 570 /* here we need to wait fairly for long time.. */ 571 msleep(500); 572 } 573 574 static void snd_via82xx_codec_write(ac97_t *ac97, 575 unsigned short reg, 576 unsigned short val) 577 { 578 via82xx_t *chip = ac97->private_data; 579 unsigned int xval; 580 581 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY; 582 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT; 583 xval |= reg << VIA_REG_AC97_CMD_SHIFT; 584 xval |= val << VIA_REG_AC97_DATA_SHIFT; 585 snd_via82xx_codec_xwrite(chip, xval); 586 snd_via82xx_codec_ready(chip, ac97->num); 587 } 588 589 static unsigned short snd_via82xx_codec_read(ac97_t *ac97, unsigned short reg) 590 { 591 via82xx_t *chip = ac97->private_data; 592 unsigned int xval, val = 0xffff; 593 int again = 0; 594 595 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT; 596 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID; 597 xval |= VIA_REG_AC97_READ; 598 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT; 599 while (1) { 600 if (again++ > 3) { 601 snd_printk("codec_read: codec %i is not valid [0x%x]\n", ac97->num, snd_via82xx_codec_xread(chip)); 602 return 0xffff; 603 } 604 snd_via82xx_codec_xwrite(chip, xval); 605 udelay (20); 606 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) { 607 udelay(25); 608 val = snd_via82xx_codec_xread(chip); 609 break; 610 } 611 } 612 return val & 0xffff; 613 } 614 615 static void snd_via82xx_channel_reset(via82xx_t *chip, viadev_t *viadev) 616 { 617 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET, 618 VIADEV_REG(viadev, OFFSET_CONTROL)); 619 inb(VIADEV_REG(viadev, OFFSET_CONTROL)); 620 udelay(50); 621 /* disable interrupts */ 622 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL)); 623 /* clear interrupts */ 624 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS)); 625 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */ 626 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR)); 627 viadev->lastpos = 0; 628 viadev->hwptr_done = 0; 504 static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip) 505 { 506 return inl(VIAREG(chip, AC97)); 507 } 508 509 static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val) 510 { 511 outl(val, VIAREG(chip, AC97)); 512 } 513 514 static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary) 515 { 516 unsigned int timeout = 1000; /* 1ms */ 517 unsigned int val; 518 519 while (timeout-- > 0) { 520 udelay(1); 521 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)) 522 return val & 0xffff; 523 } 524 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", 525 secondary, snd_via82xx_codec_xread(chip)); 526 return -EIO; 527 } 528 529 static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary) 530 { 531 unsigned int timeout = 1000; /* 1ms */ 532 unsigned int val, val1; 533 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID : 534 VIA_REG_AC97_SECONDARY_VALID; 535 536 while (timeout-- > 0) { 537 val = snd_via82xx_codec_xread(chip); 538 val1 = val & (VIA_REG_AC97_BUSY | stat); 539 if (val1 == stat) 540 return val & 0xffff; 541 udelay(1); 542 } 543 return -EIO; 544 } 545 546 static void snd_via82xx_codec_wait(struct snd_ac97 *ac97) 547 { 548 struct via82xx *chip = ac97->private_data; 549 int err; 550 err = snd_via82xx_codec_ready(chip, ac97->num); 551 /* here we need to wait fairly for long time.. */ 552 msleep(500); 553 } 554 555 static void snd_via82xx_codec_write(struct snd_ac97 *ac97, 556 unsigned short reg, 557 unsigned short val) 558 { 559 struct via82xx *chip = ac97->private_data; 560 unsigned int xval; 561 562 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY; 563 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT; 564 xval |= reg << VIA_REG_AC97_CMD_SHIFT; 565 xval |= val << VIA_REG_AC97_DATA_SHIFT; 566 snd_via82xx_codec_xwrite(chip, xval); 567 snd_via82xx_codec_ready(chip, ac97->num); 568 } 569 570 static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg) 571 { 572 struct via82xx *chip = ac97->private_data; 573 unsigned int xval, val = 0xffff; 574 int again = 0; 575 576 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT; 577 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID; 578 xval |= VIA_REG_AC97_READ; 579 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT; 580 while (1) { 581 if (again++ > 3) { 582 snd_printk(KERN_ERR "codec_read: codec %i is not valid [0x%x]\n", 583 ac97->num, snd_via82xx_codec_xread(chip)); 584 return 0xffff; 585 } 586 snd_via82xx_codec_xwrite(chip, xval); 587 udelay (20); 588 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) { 589 udelay(25); 590 val = snd_via82xx_codec_xread(chip); 591 break; 592 } 593 } 594 return val & 0xffff; 595 } 596 597 static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev) 598 { 599 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET, 600 VIADEV_REG(viadev, OFFSET_CONTROL)); 601 inb(VIADEV_REG(viadev, OFFSET_CONTROL)); 602 udelay(50); 603 /* disable interrupts */ 604 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL)); 605 /* clear interrupts */ 606 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS)); 607 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */ 608 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR)); 609 viadev->lastpos = 0; 610 viadev->hwptr_done = 0; 629 611 } 630 612 … … 634 616 * Used for 686 and 8233A 635 617 */ 636 637 618 static irqreturn_t snd_via686_interrupt(int irq, void *dev_id, struct pt_regs *regs) 638 619 { 639 via82xx_t *chip = dev_id; 640 unsigned int status; 641 unsigned int i; 642 #ifdef TARGET_OS2 643 int fOurIrq = FALSE; 620 struct via82xx *chip = dev_id; 621 unsigned int status; 622 unsigned int i; 623 624 status = inl(VIAREG(chip, SGD_SHADOW)); 625 if (! (status & chip->intr_mask)) { 626 if (chip->rmidi) 627 /* check mpu401 interrupt */ 628 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); 629 return IRQ_NONE; 630 } 631 632 /* check status for each stream */ 633 spin_lock(&chip->reg_lock); 634 for (i = 0; i < chip->num_devs; i++) { 635 struct viadev *viadev = &chip->devs[i]; 636 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); 637 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED))) 638 continue; 639 if (viadev->substream && viadev->running) { 640 /* 641 * Update hwptr_done based on 'period elapsed' 642 * interrupts. We'll use it, when the chip returns 0 643 * for OFFSET_CURR_COUNT. 644 */ 645 if (c_status & VIA_REG_STAT_EOL) 646 viadev->hwptr_done = 0; 647 else 648 viadev->hwptr_done += viadev->fragsize; 649 viadev->in_interrupt = c_status; 650 spin_unlock(&chip->reg_lock); 651 snd_pcm_period_elapsed(viadev->substream); 652 spin_lock(&chip->reg_lock); 653 viadev->in_interrupt = 0; 654 } 655 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ 656 } 657 spin_unlock(&chip->reg_lock); 658 return IRQ_HANDLED; 659 } 660 661 /* 662 * Interrupt handler 663 */ 664 static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id, struct pt_regs *regs) 665 { 666 struct via82xx *chip = dev_id; 667 unsigned int status; 668 unsigned int i; 669 int irqreturn = 0; 670 671 /* check status for each stream */ 672 spin_lock(&chip->reg_lock); 673 status = inl(VIAREG(chip, SGD_SHADOW)); 674 675 for (i = 0; i < chip->num_devs; i++) { 676 struct viadev *viadev = &chip->devs[i]; 677 struct snd_pcm_substream *substream; 678 unsigned char c_status, shadow_status; 679 680 shadow_status = (status >> viadev->shadow_shift) & 681 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL| 682 VIA_REG_STAT_FLAG); 683 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG); 684 if (!c_status) 685 continue; 686 687 substream = viadev->substream; 688 if (substream && viadev->running) { 689 /* 690 * Update hwptr_done based on 'period elapsed' 691 * interrupts. We'll use it, when the chip returns 0 692 * for OFFSET_CURR_COUNT. 693 */ 694 if (c_status & VIA_REG_STAT_EOL) 695 viadev->hwptr_done = 0; 696 else 697 viadev->hwptr_done += viadev->fragsize; 698 viadev->in_interrupt = c_status; 699 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE) 700 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE; 701 spin_unlock(&chip->reg_lock); 702 703 snd_pcm_period_elapsed(substream); 704 705 spin_lock(&chip->reg_lock); 706 viadev->in_interrupt = 0; 707 } 708 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ 709 irqreturn = 1; 710 } 711 spin_unlock(&chip->reg_lock); 712 return IRQ_RETVAL(irqreturn); 713 } 714 715 /* 716 * PCM callbacks 717 */ 718 719 /* 720 * trigger callback 721 */ 722 static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 723 { 724 struct via82xx *chip = snd_pcm_substream_chip(substream); 725 struct viadev *viadev = substream->runtime->private_data; 726 unsigned char val; 727 728 if (chip->chip_type != TYPE_VIA686) 729 val = VIA_REG_CTRL_INT; 730 else 731 val = 0; 732 switch (cmd) { 733 case SNDRV_PCM_TRIGGER_START: 734 case SNDRV_PCM_TRIGGER_RESUME: 735 val |= VIA_REG_CTRL_START; 736 viadev->running = 1; 737 break; 738 case SNDRV_PCM_TRIGGER_STOP: 739 case SNDRV_PCM_TRIGGER_SUSPEND: 740 val = VIA_REG_CTRL_TERMINATE; 741 viadev->running = 0; 742 break; 743 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 744 val |= VIA_REG_CTRL_PAUSE; 745 viadev->running = 0; 746 break; 747 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 748 viadev->running = 1; 749 break; 750 default: 751 return -EINVAL; 752 } 753 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL)); 754 if (cmd == SNDRV_PCM_TRIGGER_STOP) 755 snd_via82xx_channel_reset(chip, viadev); 756 return 0; 757 } 758 759 760 /* 761 * pointer callbacks 762 */ 763 764 /* 765 * calculate the linear position at the given sg-buffer index and the rest count 766 */ 767 768 #define check_invalid_pos(viadev,pos) \ 769 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\ 770 viadev->lastpos < viadev->bufsize2)) 771 772 static inline unsigned int calc_linear_pos(struct viadev *viadev, unsigned int idx, 773 unsigned int count) 774 { 775 unsigned int size, base, res; 776 777 size = viadev->idx_table[idx].size; 778 base = viadev->idx_table[idx].offset; 779 res = base + size - count; 780 if (res >= viadev->bufsize) 781 res -= viadev->bufsize; 782 783 /* check the validity of the calculated position */ 784 if (size < count) { 785 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (size = %d, count = %d)\n", 786 (int)size, (int)count); 787 res = viadev->lastpos; 788 } else { 789 if (! count) { 790 /* Some mobos report count = 0 on the DMA boundary, 791 * i.e. count = size indeed. 792 * Let's check whether this step is above the expected size. 793 */ 794 int delta = res - viadev->lastpos; 795 if (delta < 0) 796 delta += viadev->bufsize; 797 if ((unsigned int)delta > viadev->fragsize) 798 res = base; 799 } 800 if (check_invalid_pos(viadev, res)) { 801 #ifdef POINTER_DEBUG 802 printk(KERN_DEBUG "fail: idx = %i/%i, lastpos = 0x%x, " 803 "bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, " 804 "count = 0x%x\n", idx, viadev->tbl_entries, 805 viadev->lastpos, viadev->bufsize2, 806 viadev->idx_table[idx].offset, 807 viadev->idx_table[idx].size, count); 644 808 #endif 645 646 #if 0 647 /* FIXME: does it work on via823x? */ 648 if (chip->chip_type != TYPE_VIA686) 649 goto _skip_sgd; 650 #endif 651 status = inl(VIAREG(chip, SGD_SHADOW)); 652 if (! (status & chip->intr_mask)) { 653 if (chip->rmidi) 654 /* check mpu401 interrupt */ 655 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); 656 return IRQ_NONE; 657 } 658 // _skip_sgd: 659 #ifdef TARGET_OS2 660 fOurIrq = TRUE; 661 #endif //TARGET_OS2 662 663 /* check status for each stream */ 664 spin_lock(&chip->reg_lock); 665 for (i = 0; i < chip->num_devs; i++) { 666 viadev_t *viadev = &chip->devs[i]; 667 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); 668 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED))) 669 continue; 670 if (viadev->substream && viadev->running) { 671 /* 672 * Update hwptr_done based on 'period elapsed' 673 * interrupts. We'll use it, when the chip returns 0 674 * for OFFSET_CURR_COUNT. 675 */ 676 if (c_status & VIA_REG_STAT_EOL) 677 viadev->hwptr_done = 0; 678 else 679 viadev->hwptr_done += viadev->fragsize; 680 viadev->in_interrupt = c_status; 681 spin_unlock(&chip->reg_lock); 682 snd_pcm_period_elapsed(viadev->substream); 683 spin_lock(&chip->reg_lock); 684 viadev->in_interrupt = 0; 685 } 686 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ 687 } 688 spin_unlock(&chip->reg_lock); 689 #ifdef TARGET_OS2 690 if (fOurIrq) { 691 eoi_irq(irq); 692 } 693 #endif //TARGET_OS2 694 return IRQ_HANDLED; 695 } 696 697 /* 698 * Interrupt handler 699 */ 700 static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id, struct pt_regs *regs) 701 { 702 via82xx_t *chip = dev_id; 703 unsigned int status; 704 unsigned int i; 705 int irqreturn = 0; 706 707 /* check status for each stream */ 708 spin_lock(&chip->reg_lock); 709 status = inl(VIAREG(chip, SGD_SHADOW)); 710 711 for (i = 0; i < chip->num_devs; i++) { 712 viadev_t *viadev = &chip->devs[i]; 713 snd_pcm_substream_t *substream; 714 unsigned char c_status, shadow_status; 715 716 shadow_status = (status >> viadev->shadow_shift) & 717 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL| 718 VIA_REG_STAT_FLAG); 719 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG); 720 if (!c_status) 721 continue; 722 723 substream = viadev->substream; 724 if (substream && viadev->running) { 725 /* 726 * Update hwptr_done based on 'period elapsed' 727 * interrupts. We'll use it, when the chip returns 0 728 * for OFFSET_CURR_COUNT. 729 */ 730 if (c_status & VIA_REG_STAT_EOL) 731 viadev->hwptr_done = 0; 732 else 733 viadev->hwptr_done += viadev->fragsize; 734 viadev->in_interrupt = c_status; 735 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE) 736 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE; 737 spin_unlock(&chip->reg_lock); 738 739 snd_pcm_period_elapsed(substream); 740 741 spin_lock(&chip->reg_lock); 742 viadev->in_interrupt = 0; 743 } 744 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ 745 irqreturn = 1; 746 } 747 spin_unlock(&chip->reg_lock); 748 #ifdef TARGET_OS2 749 eoi_irq(irq); 750 #endif //TARGET_OS2 751 return IRQ_HANDLED; 752 } 753 754 /* 755 * PCM callbacks 756 */ 757 758 /* 759 * trigger callback 760 */ 761 static int snd_via82xx_pcm_trigger(snd_pcm_substream_t * substream, int cmd) 762 { 763 via82xx_t *chip = snd_pcm_substream_chip(substream); 764 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 765 unsigned char val; 766 767 if (chip->chip_type != TYPE_VIA686) 768 val = VIA_REG_CTRL_INT; 769 else 770 val = 0; 771 switch (cmd) { 772 case SNDRV_PCM_TRIGGER_START: 773 case SNDRV_PCM_TRIGGER_RESUME: 774 val |= VIA_REG_CTRL_START; 775 viadev->running = 1; 776 break; 777 case SNDRV_PCM_TRIGGER_STOP: 778 case SNDRV_PCM_TRIGGER_SUSPEND: 779 val = VIA_REG_CTRL_TERMINATE; 780 viadev->running = 0; 781 break; 782 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 783 val |= VIA_REG_CTRL_PAUSE; 784 viadev->running = 0; 785 break; 786 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 787 viadev->running = 1; 788 break; 789 default: 790 return -EINVAL; 791 } 792 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL)); 793 if (cmd == SNDRV_PCM_TRIGGER_STOP) 794 snd_via82xx_channel_reset(chip, viadev); 795 return 0; 796 } 797 798 799 /* 800 * pointer callbacks 801 */ 802 803 /* 804 * calculate the linear position at the given sg-buffer index and the rest count 805 */ 806 807 #define check_invalid_pos(viadev,pos) \ 808 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 || viadev->lastpos < viadev->bufsize2)) 809 810 static inline unsigned int calc_linear_pos(viadev_t *viadev, unsigned int idx, unsigned int count) 811 { 812 unsigned int size, base, res; 813 814 size = viadev->idx_table[idx].size; 815 base = viadev->idx_table[idx].offset; 816 res = base + size - count; 817 if (res >= viadev->bufsize) 818 res -= viadev->bufsize; 819 820 /* check the validity of the calculated position */ 821 if (size < count) { 822 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (size = %d, count = %d)\n", (int)size, (int)count); 823 res = viadev->lastpos; 824 } else { 825 if (! count) { 826 /* Some mobos report count = 0 on the DMA boundary, 827 * i.e. count = size indeed. 828 * Let's check whether this step is above the expected size. 829 */ 830 int delta = res - viadev->lastpos; 831 if (delta < 0) 832 delta += viadev->bufsize; 833 if ((unsigned int)delta > viadev->fragsize) 834 res = base; 835 } 836 if (check_invalid_pos(viadev, res)) { 837 #ifdef POINTER_DEBUG 838 printk(KERN_DEBUG "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n", idx, viadev->tbl_entries, viadev->lastpos, viadev->bufsize2, viadev->idx_table[idx].offset, viadev->idx_table[idx].size, count); 839 #endif 840 /* count register returns full size when end of buffer is reached */ 841 res = base + size; 842 if (check_invalid_pos(viadev, res)) { 843 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (2), using last valid pointer\n"); 844 res = viadev->lastpos; 845 } 846 } 847 } 848 return res; 809 /* count register returns full size when end of buffer is reached */ 810 res = base + size; 811 if (check_invalid_pos(viadev, res)) { 812 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (2), " 813 "using last valid pointer\n"); 814 res = viadev->lastpos; 815 } 816 } 817 } 818 return res; 849 819 } 850 820 … … 852 822 * get the current pointer on via686 853 823 */ 854 static snd_pcm_uframes_t snd_via686_pcm_pointer(snd_pcm_substream_t *substream) 855 { 856 via82xx_t *chip = snd_pcm_substream_chip(substream); 857 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 858 unsigned int idx, ptr, count, res; 859 int timeout = 5000; 824 static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream) 825 { 826 struct via82xx *chip = snd_pcm_substream_chip(substream); 827 struct viadev *viadev = substream->runtime->private_data; 828 unsigned int idx, ptr, count, res; 860 829 861 830 snd_assert(viadev->tbl_entries, return 0); … … 863 832 return 0; 864 833 865 spin_lock(&chip->reg_lock); 866 do { 867 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff; 868 /* some mobos read 0 count */ 869 if ((count & 0xffffff) || ! viadev->running) 870 break; 871 } while (--timeout); 872 if (! timeout) 873 snd_printd(KERN_ERR "zero position is read\n"); 834 spin_lock(&chip->reg_lock); 835 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff; 874 836 /* The via686a does not have the current index register, 875 837 * so we need to calculate the index from CURR_PTR. … … 880 842 else /* CURR_PTR holds the address + 8 */ 881 843 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries; 882 883 844 res = calc_linear_pos(viadev, idx, count); 845 viadev->lastpos = res; /* remember the last position */ 884 846 spin_unlock(&chip->reg_lock); 885 847 … … 890 852 * get the current pointer on via823x 891 853 */ 892 static snd_pcm_uframes_t snd_via8233_pcm_pointer(s nd_pcm_substream_t*substream)893 { 894 via82xx_t*chip = snd_pcm_substream_chip(substream);895 viadev_t *viadev = (viadev_t *)substream->runtime->private_data;854 static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream) 855 { 856 struct via82xx *chip = snd_pcm_substream_chip(substream); 857 struct viadev *viadev = substream->runtime->private_data; 896 858 unsigned int idx, count, res; 897 898 859 int status; 860 899 861 snd_assert(viadev->tbl_entries, return 0); 862 900 863 spin_lock(&chip->reg_lock); 901 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)); 902 status = viadev->in_interrupt; 903 if (!status) 904 status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); 905 if (!(status & VIA_REG_STAT_ACTIVE)) { 906 res = 0; 907 goto unlock; 908 } 909 if (count & 0xffffff) { 910 idx = count >> 24; 911 if (idx >= viadev->tbl_entries) { 864 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)); 865 status = viadev->in_interrupt; 866 if (!status) 867 status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); 868 869 if (!(status & VIA_REG_STAT_ACTIVE)) { 870 res = 0; 871 goto unlock; 872 } 873 if (count & 0xffffff) { 874 idx = count >> 24; 875 if (idx >= viadev->tbl_entries) { 912 876 #ifdef POINTER_DEBUG 913 printk("fail: invalid idx = %i/%i\n", idx, viadev->tbl_entries); 877 printk(KERN_DEBUG "fail: invalid idx = %i/%i\n", idx, 878 viadev->tbl_entries); 914 879 #endif 915 res = viadev->lastpos; 880 res = viadev->lastpos; 881 } else { 882 count &= 0xffffff; 883 res = calc_linear_pos(viadev, idx, count); 884 } 916 885 } else { 917 count &= 0xffffff; 918 res = calc_linear_pos(viadev, idx, count); 919 } 920 } else { 921 res = viadev->hwptr_done; 922 if (!viadev->in_interrupt) { 923 if (status & VIA_REG_STAT_EOL) { 924 res = 0; 925 } else 926 if (status & VIA_REG_STAT_FLAG) { 927 res += viadev->fragsize; 928 } 929 } 930 } 931 unlock: 932 viadev->lastpos = res; 886 res = viadev->hwptr_done; 887 if (!viadev->in_interrupt) { 888 if (status & VIA_REG_STAT_EOL) { 889 res = 0; 890 } else 891 if (status & VIA_REG_STAT_FLAG) { 892 res += viadev->fragsize; 893 } 894 } 895 } 896 unlock: 897 viadev->lastpos = res; 933 898 spin_unlock(&chip->reg_lock); 934 899 … … 941 906 * allocate the buffer and build up the buffer description table 942 907 */ 943 static int snd_via82xx_hw_params(s nd_pcm_substream_t *substream,944 snd_pcm_hw_params_t *hw_params)945 { 946 via82xx_t*chip = snd_pcm_substream_chip(substream);947 viadev_t *viadev = (viadev_t *)substream->runtime->private_data;948 949 950 951 952 953 954 955 956 957 958 959 908 static int snd_via82xx_hw_params(struct snd_pcm_substream *substream, 909 struct snd_pcm_hw_params *hw_params) 910 { 911 struct via82xx *chip = snd_pcm_substream_chip(substream); 912 struct viadev *viadev = substream->runtime->private_data; 913 int err; 914 915 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 916 if (err < 0) 917 return err; 918 err = build_via_table(viadev, substream, chip->pci, 919 params_periods(hw_params), 920 params_period_bytes(hw_params)); 921 if (err < 0) 922 return err; 923 924 return 0; 960 925 } 961 926 … … 964 929 * clean up the buffer description table and release the buffer 965 930 */ 966 static int snd_via82xx_hw_free(snd_pcm_substream_t * substream) 967 { 968 via82xx_t *chip = snd_pcm_substream_chip(substream); 969 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 970 971 clean_via_table(viadev, substream, chip->pci); 972 snd_pcm_lib_free_pages(substream); 973 return 0; 974 } 931 static int snd_via82xx_hw_free(struct snd_pcm_substream *substream) 932 { 933 struct via82xx *chip = snd_pcm_substream_chip(substream); 934 struct viadev *viadev = substream->runtime->private_data; 935 936 clean_via_table(viadev, substream, chip->pci); 937 snd_pcm_lib_free_pages(substream); 938 return 0; 939 } 940 975 941 976 942 /* 977 943 * set up the table pointer 978 944 */ 979 static void snd_via82xx_set_table_ptr( via82xx_t *chip, viadev_t*viadev)945 static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev) 980 946 { 981 947 snd_via82xx_codec_ready(chip, 0); … … 984 950 snd_via82xx_codec_ready(chip, 0); 985 951 } 952 986 953 /* 987 954 * prepare callback for playback and capture on via686 988 955 */ 989 static void via686_setup_format(via82xx_t *chip, viadev_t *viadev, snd_pcm_runtime_t *runtime) 990 { 991 snd_via82xx_channel_reset(chip, viadev); 992 /* this must be set after channel_reset */ 993 snd_via82xx_set_table_ptr(chip, viadev); 994 outb(VIA_REG_TYPE_AUTOSTART | 995 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) | 996 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) | 997 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) | 998 VIA_REG_TYPE_INT_EOL | 999 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE)); 1000 } 1001 1002 static int snd_via686_playback_prepare(snd_pcm_substream_t *substream) 1003 { 1004 via82xx_t *chip = snd_pcm_substream_chip(substream); 1005 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 1006 snd_pcm_runtime_t *runtime = substream->runtime; 1007 1008 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); 1009 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); 1010 via686_setup_format(chip, viadev, runtime); 1011 return 0; 1012 } 1013 1014 static int snd_via686_capture_prepare(snd_pcm_substream_t *substream) 1015 { 1016 via82xx_t *chip = snd_pcm_substream_chip(substream); 1017 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 1018 snd_pcm_runtime_t *runtime = substream->runtime; 1019 1020 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 1021 via686_setup_format(chip, viadev, runtime); 1022 return 0; 956 static void via686_setup_format(struct via82xx *chip, struct viadev *viadev, 957 struct snd_pcm_runtime *runtime) 958 { 959 snd_via82xx_channel_reset(chip, viadev); 960 /* this must be set after channel_reset */ 961 snd_via82xx_set_table_ptr(chip, viadev); 962 outb(VIA_REG_TYPE_AUTOSTART | 963 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) | 964 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) | 965 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) | 966 VIA_REG_TYPE_INT_EOL | 967 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE)); 968 } 969 970 static int snd_via686_playback_prepare(struct snd_pcm_substream *substream) 971 { 972 struct via82xx *chip = snd_pcm_substream_chip(substream); 973 struct viadev *viadev = substream->runtime->private_data; 974 struct snd_pcm_runtime *runtime = substream->runtime; 975 976 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); 977 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); 978 via686_setup_format(chip, viadev, runtime); 979 return 0; 980 } 981 982 static int snd_via686_capture_prepare(struct snd_pcm_substream *substream) 983 { 984 struct via82xx *chip = snd_pcm_substream_chip(substream); 985 struct viadev *viadev = substream->runtime->private_data; 986 struct snd_pcm_runtime *runtime = substream->runtime; 987 988 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 989 via686_setup_format(chip, viadev, runtime); 990 return 0; 1023 991 } 1024 992 … … 1028 996 static int via_lock_rate(struct via_rate_lock *rec, int rate) 1029 997 { 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 998 int changed = 0; 999 1000 spin_lock_irq(&rec->lock); 1001 if (rec->rate != rate) { 1002 if (rec->rate && rec->used > 1) /* already set */ 1003 changed = -EINVAL; 1004 else { 1005 rec->rate = rate; 1006 changed = 1; 1007 } 1008 } 1009 spin_unlock_irq(&rec->lock); 1010 return changed; 1043 1011 } 1044 1012 … … 1046 1014 * prepare callback for DSX playback on via823x 1047 1015 */ 1048 static int snd_via8233_playback_prepare(snd_pcm_substream_t *substream) 1049 { 1050 via82xx_t *chip = snd_pcm_substream_chip(substream); 1051 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 1052 snd_pcm_runtime_t *runtime = substream->runtime; 1053 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate; 1054 int rate_changed; 1055 u32 rbits; 1056 1057 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0) 1058 return rate_changed; 1059 if (rate_changed) 1060 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, 1061 chip->no_vra ? 48000 : runtime->rate); 1062 if (chip->spdif_on && viadev->reg_offset == 0x30) 1063 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); 1064 if (runtime->rate == 48000) 1065 rbits = 0xfffff; 1066 else 1067 rbits = (0x100000 / 48000) * runtime->rate + ((0x100000 % 48000) * runtime->rate) / 48000; 1068 1069 snd_assert((rbits & ~0xfffff) == 0, return -EINVAL); 1070 snd_via82xx_channel_reset(chip, viadev); 1071 snd_via82xx_set_table_ptr(chip, viadev); 1072 outb(chip->playback_volume[0], VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L)); 1073 outb(chip->playback_volume[1], VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R)); 1074 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */ 1075 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */ 1076 rbits | /* rate */ 1077 0xff000000, /* STOP index is never reached */ 1078 VIADEV_REG(viadev, OFFSET_STOP_IDX)); 1079 udelay(20); 1080 snd_via82xx_codec_ready(chip, 0); 1081 return 0; 1016 static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream) 1017 { 1018 struct via82xx *chip = snd_pcm_substream_chip(substream); 1019 struct viadev *viadev = substream->runtime->private_data; 1020 struct snd_pcm_runtime *runtime = substream->runtime; 1021 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate; 1022 int rate_changed; 1023 u32 rbits; 1024 1025 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0) 1026 return rate_changed; 1027 if (rate_changed) 1028 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, 1029 chip->no_vra ? 48000 : runtime->rate); 1030 if (chip->spdif_on && viadev->reg_offset == 0x30) 1031 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); 1032 1033 if (runtime->rate == 48000) 1034 rbits = 0xfffff; 1035 else 1036 rbits = (0x100000 / 48000) * runtime->rate + 1037 ((0x100000 % 48000) * runtime->rate) / 48000; 1038 snd_assert((rbits & ~0xfffff) == 0, return -EINVAL); 1039 snd_via82xx_channel_reset(chip, viadev); 1040 snd_via82xx_set_table_ptr(chip, viadev); 1041 outb(chip->playback_volume[viadev->reg_offset / 0x10][0], 1042 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L)); 1043 outb(chip->playback_volume[viadev->reg_offset / 0x10][1], 1044 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R)); 1045 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */ 1046 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */ 1047 rbits | /* rate */ 1048 0xff000000, /* STOP index is never reached */ 1049 VIADEV_REG(viadev, OFFSET_STOP_IDX)); 1050 udelay(20); 1051 snd_via82xx_codec_ready(chip, 0); 1052 return 0; 1082 1053 } 1083 1054 … … 1085 1056 * prepare callback for multi-channel playback on via823x 1086 1057 */ 1087 static int snd_via8233_multi_prepare(snd_pcm_substream_t *substream) 1088 { 1089 via82xx_t *chip = snd_pcm_substream_chip(substream); 1090 viadev_t *viadev = (viadev_t *)substream->runtime->private_data; 1091 snd_pcm_runtime_t *runtime = substream->runtime; 1092 unsigned int slots; 1093 int fmt; 1094 1095 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0) 1096 return -EINVAL; 1097 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); 1098 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate); 1099 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate); 1100 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); 1101 snd_via82xx_channel_reset(chip, viadev); 1102 snd_via82xx_set_table_ptr(chip, viadev); 1103 1104 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT; 1105 fmt |= runtime->channels << 4; 1106 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT)); 1058 static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream) 1059 { 1060 struct via82xx *chip = snd_pcm_substream_chip(substream); 1061 struct viadev *viadev = substream->runtime->private_data; 1062 struct snd_pcm_runtime *runtime = substream->runtime; 1063 unsigned int slots; 1064 int fmt; 1065 1066 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0) 1067 return -EINVAL; 1068 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); 1069 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate); 1070 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate); 1071 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); 1072 snd_via82xx_channel_reset(chip, viadev); 1073 snd_via82xx_set_table_ptr(chip, viadev); 1074 1075 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? 1076 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT; 1077 fmt |= runtime->channels << 4; 1078 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT)); 1107 1079 #if 0 1108 1109 1110 1080 if (chip->revision == VIA_REV_8233A) 1081 slots = 0; 1082 else 1111 1083 #endif 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1084 { 1085 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */ 1086 /* corresponding to FL, FR, RL, RR, C, LFE ?? */ 1087 switch (runtime->channels) { 1088 case 1: slots = (1<<0) | (1<<4); break; 1089 case 2: slots = (1<<0) | (2<<4); break; 1090 case 3: slots = (1<<0) | (2<<4) | (5<<8); break; 1091 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break; 1092 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break; 1093 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break; 1094 default: slots = 0; break; 1095 } 1096 } 1097 /* STOP index is never reached */ 1098 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX)); 1099 udelay(20); 1100 snd_via82xx_codec_ready(chip, 0); 1101 return 0; 1130 1102 } 1131 1103 … … 1133 1105 * prepare callback for capture on via823x 1134 1106 */ 1135 static int snd_via8233_capture_prepare(s nd_pcm_substream_t*substream)1136 { 1137 via82xx_t*chip = snd_pcm_substream_chip(substream);1138 viadev_t *viadev = (viadev_t *)substream->runtime->private_data;1139 snd_pcm_runtime_t*runtime = substream->runtime;1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1107 static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream) 1108 { 1109 struct via82xx *chip = snd_pcm_substream_chip(substream); 1110 struct viadev *viadev = substream->runtime->private_data; 1111 struct snd_pcm_runtime *runtime = substream->runtime; 1112 1113 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0) 1114 return -EINVAL; 1115 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 1116 snd_via82xx_channel_reset(chip, viadev); 1117 snd_via82xx_set_table_ptr(chip, viadev); 1118 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO)); 1119 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | 1120 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | 1121 0xff000000, /* STOP index is never reached */ 1122 VIADEV_REG(viadev, OFFSET_STOP_IDX)); 1123 udelay(20); 1124 snd_via82xx_codec_ready(chip, 0); 1125 return 0; 1154 1126 } 1155 1127 … … 1158 1130 * pcm hardware definition, identical for both playback and capture 1159 1131 */ 1160 static s nd_pcm_hardware_tsnd_via82xx_hw =1161 { 1162 /* info: */(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |1163 1164 1165 /*SNDRV_PCM_INFO_RESUME |*/1166 1167 /* formats: */SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,1168 /* rates: */SNDRV_PCM_RATE_48000,1169 /* rate_min: */48000,1170 /* rate_max: */48000,1171 /* channels_min: */1,1172 /* channels_max: */2,1173 /* buffer_bytes_max: */128 * 1024,1174 /* period_bytes_min: */32,1175 /* period_bytes_max: */128 * 1024,1176 /* periods_min: */2,1177 /* periods_max: */VIA_TABLE_SIZE / 2,1178 /* fifo_size: */0,1132 static struct snd_pcm_hardware snd_via82xx_hw = 1133 { 1134 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1135 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1136 SNDRV_PCM_INFO_MMAP_VALID | 1137 /* SNDRV_PCM_INFO_RESUME | */ 1138 SNDRV_PCM_INFO_PAUSE), 1139 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 1140 .rates = SNDRV_PCM_RATE_48000, 1141 .rate_min = 48000, 1142 .rate_max = 48000, 1143 .channels_min = 1, 1144 .channels_max = 2, 1145 .buffer_bytes_max = 128 * 1024, 1146 .period_bytes_min = 32, 1147 .period_bytes_max = 128 * 1024, 1148 .periods_min = 2, 1149 .periods_max = VIA_TABLE_SIZE / 2, 1150 .fifo_size = 0, 1179 1151 }; 1180 1152 … … 1183 1155 * open callback skeleton 1184 1156 */ 1185 static int snd_via82xx_pcm_open(via82xx_t *chip, viadev_t *viadev, snd_pcm_substream_t * substream) 1186 { 1187 snd_pcm_runtime_t *runtime = substream->runtime; 1188 int err; 1189 struct via_rate_lock *ratep; 1190 1191 runtime->hw = snd_via82xx_hw; 1192 1193 /* set the hw rate condition */ 1194 ratep = &chip->rates[viadev->direction]; 1195 spin_lock_irq(&ratep->lock); 1196 ratep->used++; 1197 if (chip->spdif_on && viadev->reg_offset == 0x30) { 1198 /* DXS#3 and spdif is on */ 1199 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF]; 1200 snd_pcm_limit_hw_rates(runtime); 1201 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) { 1202 /* fixed DXS playback rate */ 1203 runtime->hw.rates = SNDRV_PCM_RATE_48000; 1204 runtime->hw.rate_min = runtime->hw.rate_max = 48000; 1205 } else if (chip->dxs_src && viadev->reg_offset < 0x40) { 1206 /* use full SRC capabilities of DXS */ 1207 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS | 1208 SNDRV_PCM_RATE_8000_48000); 1209 runtime->hw.rate_min = 8000; 1210 runtime->hw.rate_max = 48000; 1211 } else if (! ratep->rate) { 1212 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC; 1213 runtime->hw.rates = chip->ac97->rates[idx]; 1214 snd_pcm_limit_hw_rates(runtime); 1215 } else { 1216 /* a fixed rate */ 1217 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 1218 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate; 1219 } 1220 spin_unlock_irq(&ratep->lock); 1221 1222 /* we may remove following constaint when we modify table entries 1223 in interrupt */ 1224 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 1225 return err; 1226 1227 runtime->private_data = viadev; 1228 viadev->substream = substream; 1229 1230 return 0; 1231 } 1157 static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev, 1158 struct snd_pcm_substream *substream) 1159 { 1160 struct snd_pcm_runtime *runtime = substream->runtime; 1161 int err; 1162 struct via_rate_lock *ratep; 1163 1164 runtime->hw = snd_via82xx_hw; 1165 1166 /* set the hw rate condition */ 1167 ratep = &chip->rates[viadev->direction]; 1168 spin_lock_irq(&ratep->lock); 1169 ratep->used++; 1170 if (chip->spdif_on && viadev->reg_offset == 0x30) { 1171 /* DXS#3 and spdif is on */ 1172 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF]; 1173 snd_pcm_limit_hw_rates(runtime); 1174 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) { 1175 /* fixed DXS playback rate */ 1176 runtime->hw.rates = SNDRV_PCM_RATE_48000; 1177 runtime->hw.rate_min = runtime->hw.rate_max = 48000; 1178 } else if (chip->dxs_src && viadev->reg_offset < 0x40) { 1179 /* use full SRC capabilities of DXS */ 1180 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS | 1181 SNDRV_PCM_RATE_8000_48000); 1182 runtime->hw.rate_min = 8000; 1183 runtime->hw.rate_max = 48000; 1184 } else if (! ratep->rate) { 1185 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC; 1186 runtime->hw.rates = chip->ac97->rates[idx]; 1187 snd_pcm_limit_hw_rates(runtime); 1188 } else { 1189 /* a fixed rate */ 1190 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 1191 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate; 1192 } 1193 spin_unlock_irq(&ratep->lock); 1194 1195 /* we may remove following constaint when we modify table entries 1196 in interrupt */ 1197 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 1198 return err; 1199 1200 runtime->private_data = viadev; 1201 viadev->substream = substream; 1202 1203 return 0; 1204 } 1205 1232 1206 1233 1207 /* 1234 1208 * open callback for playback on via686 and via823x DSX 1235 1209 */ 1236 static int snd_via82xx_playback_open(snd_pcm_substream_t * substream) 1237 { 1238 via82xx_t *chip = snd_pcm_substream_chip(substream); 1239 viadev_t *viadev = &chip->devs[chip->playback_devno + substream->number]; 1240 int err; 1241 1242 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) 1243 return err; 1244 return 0; 1245 } 1246 1210 static int snd_via82xx_playback_open(struct snd_pcm_substream *substream) 1211 { 1212 struct via82xx *chip = snd_pcm_substream_chip(substream); 1213 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number]; 1214 int err; 1215 1216 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) 1217 return err; 1218 return 0; 1219 } 1247 1220 1248 1221 /* 1249 1222 * open callback for playback on via823x multi-channel 1250 1223 */ 1251 static int snd_via8233_multi_open(snd_pcm_substream_t * substream) 1252 { 1253 via82xx_t *chip = snd_pcm_substream_chip(substream); 1254 viadev_t *viadev = &chip->devs[chip->multi_devno]; 1255 int err; 1256 /* channels constraint for VIA8233A 1257 * 3 and 5 channels are not supported 1258 */ 1259 static unsigned int channels[] = { 1260 1, 2, 4, 6 1261 }; 1262 static snd_pcm_hw_constraint_list_t hw_constraints_channels = { 1263 /*.count = */ARRAY_SIZE(channels), 1264 /*.list = */channels, 1265 /*.mask = */0, 1266 }; 1267 1268 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) 1269 return err; 1270 substream->runtime->hw.channels_max = 6; 1271 if (chip->revision == VIA_REV_8233A) 1272 snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels); 1273 return 0; 1224 static int snd_via8233_multi_open(struct snd_pcm_substream *substream) 1225 { 1226 struct via82xx *chip = snd_pcm_substream_chip(substream); 1227 struct viadev *viadev = &chip->devs[chip->multi_devno]; 1228 int err; 1229 /* channels constraint for VIA8233A 1230 * 3 and 5 channels are not supported 1231 */ 1232 static unsigned int channels[] = { 1233 1, 2, 4, 6 1234 }; 1235 static struct snd_pcm_hw_constraint_list hw_constraints_channels = { 1236 .count = ARRAY_SIZE(channels), 1237 .list = channels, 1238 .mask = 0, 1239 }; 1240 1241 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) 1242 return err; 1243 substream->runtime->hw.channels_max = 6; 1244 if (chip->revision == VIA_REV_8233A) 1245 snd_pcm_hw_constraint_list(substream->runtime, 0, 1246 SNDRV_PCM_HW_PARAM_CHANNELS, 1247 &hw_constraints_channels); 1248 return 0; 1274 1249 } 1275 1250 … … 1277 1252 * open callback for capture on via686 and via823x 1278 1253 */ 1279 static int snd_via82xx_capture_open(s nd_pcm_substream_t *substream)1280 { 1281 via82xx_t*chip = snd_pcm_substream_chip(substream);1282 viadev_t*viadev = &chip->devs[chip->capture_devno + substream->pcm->device];1283 1284 1254 static int snd_via82xx_capture_open(struct snd_pcm_substream *substream) 1255 { 1256 struct via82xx *chip = snd_pcm_substream_chip(substream); 1257 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device]; 1258 1259 return snd_via82xx_pcm_open(chip, viadev, substream); 1285 1260 } 1286 1261 … … 1288 1263 * close callback 1289 1264 */ 1290 static int snd_via82xx_pcm_close(s nd_pcm_substream_t *substream)1291 { 1292 via82xx_t*chip = snd_pcm_substream_chip(substream);1293 viadev_t *viadev = (viadev_t *)substream->runtime->private_data;1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1265 static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream) 1266 { 1267 struct via82xx *chip = snd_pcm_substream_chip(substream); 1268 struct viadev *viadev = substream->runtime->private_data; 1269 struct via_rate_lock *ratep; 1270 1271 /* release the rate lock */ 1272 ratep = &chip->rates[viadev->direction]; 1273 spin_lock_irq(&ratep->lock); 1274 ratep->used--; 1275 if (! ratep->used) 1276 ratep->rate = 0; 1277 spin_unlock_irq(&ratep->lock); 1278 1279 viadev->substream = NULL; 1280 return 0; 1306 1281 } 1307 1282 1308 1283 1309 1284 /* via686 playback callbacks */ 1310 static s nd_pcm_ops_tsnd_via686_playback_ops = {1311 /* .open = */snd_via82xx_playback_open,1312 /* .close = */snd_via82xx_pcm_close,1313 /* .ioctl = */snd_pcm_lib_ioctl,1314 /* .hw_params = */snd_via82xx_hw_params,1315 /* .hw_free = */snd_via82xx_hw_free,1316 /* .prepare = */snd_via686_playback_prepare,1317 /* .trigger = */snd_via82xx_pcm_trigger,1318 /* .pointer = */ snd_via686_pcm_pointer,0,0,1319 /* .page = */ snd_pcm_sgbuf_ops_page,0 1285 static struct snd_pcm_ops snd_via686_playback_ops = { 1286 .open = snd_via82xx_playback_open, 1287 .close = snd_via82xx_pcm_close, 1288 .ioctl = snd_pcm_lib_ioctl, 1289 .hw_params = snd_via82xx_hw_params, 1290 .hw_free = snd_via82xx_hw_free, 1291 .prepare = snd_via686_playback_prepare, 1292 .trigger = snd_via82xx_pcm_trigger, 1293 .pointer = snd_via686_pcm_pointer, 1294 .page = snd_pcm_sgbuf_ops_page, 1320 1295 }; 1321 1296 1322 1297 /* via686 capture callbacks */ 1323 static s nd_pcm_ops_tsnd_via686_capture_ops = {1324 /* .open = */snd_via82xx_capture_open,1325 /* .close = */snd_via82xx_pcm_close,1326 /* .ioctl = */snd_pcm_lib_ioctl,1327 /* .hw_params = */snd_via82xx_hw_params,1328 /* .hw_free = */snd_via82xx_hw_free,1329 /* .prepare = */snd_via686_capture_prepare,1330 /* .trigger = */snd_via82xx_pcm_trigger,1331 /* .pointer = */ snd_via686_pcm_pointer,0,0,1332 /* .page = */ snd_pcm_sgbuf_ops_page,0 1298 static struct snd_pcm_ops snd_via686_capture_ops = { 1299 .open = snd_via82xx_capture_open, 1300 .close = snd_via82xx_pcm_close, 1301 .ioctl = snd_pcm_lib_ioctl, 1302 .hw_params = snd_via82xx_hw_params, 1303 .hw_free = snd_via82xx_hw_free, 1304 .prepare = snd_via686_capture_prepare, 1305 .trigger = snd_via82xx_pcm_trigger, 1306 .pointer = snd_via686_pcm_pointer, 1307 .page = snd_pcm_sgbuf_ops_page, 1333 1308 }; 1334 1309 1335 1310 /* via823x DSX playback callbacks */ 1336 static s nd_pcm_ops_tsnd_via8233_playback_ops = {1337 /* .open = */snd_via82xx_playback_open,1338 /* .close = */snd_via82xx_pcm_close,1339 /* .ioctl = */snd_pcm_lib_ioctl,1340 /* .hw_params = */snd_via82xx_hw_params,1341 /* .hw_free = */snd_via82xx_hw_free,1342 /* .prepare = */snd_via8233_playback_prepare,1343 /* .trigger = */snd_via82xx_pcm_trigger,1344 /* .pointer = */ snd_via8233_pcm_pointer,0,0,1345 /* .page = */ snd_pcm_sgbuf_ops_page,0 1311 static struct snd_pcm_ops snd_via8233_playback_ops = { 1312 .open = snd_via82xx_playback_open, 1313 .close = snd_via82xx_pcm_close, 1314 .ioctl = snd_pcm_lib_ioctl, 1315 .hw_params = snd_via82xx_hw_params, 1316 .hw_free = snd_via82xx_hw_free, 1317 .prepare = snd_via8233_playback_prepare, 1318 .trigger = snd_via82xx_pcm_trigger, 1319 .pointer = snd_via8233_pcm_pointer, 1320 .page = snd_pcm_sgbuf_ops_page, 1346 1321 }; 1347 1322 1348 1323 /* via823x multi-channel playback callbacks */ 1349 static s nd_pcm_ops_tsnd_via8233_multi_ops = {1350 /* .open = */snd_via8233_multi_open,1351 /* .close = */snd_via82xx_pcm_close,1352 /* .ioctl = */snd_pcm_lib_ioctl,1353 /* .hw_params = */snd_via82xx_hw_params,1354 /* .hw_free = */snd_via82xx_hw_free,1355 /* .prepare = */snd_via8233_multi_prepare,1356 /* .trigger = */snd_via82xx_pcm_trigger,1357 /* .pointer = */ snd_via8233_pcm_pointer,0,0,1358 /* .page = */ snd_pcm_sgbuf_ops_page,0 1324 static struct snd_pcm_ops snd_via8233_multi_ops = { 1325 .open = snd_via8233_multi_open, 1326 .close = snd_via82xx_pcm_close, 1327 .ioctl = snd_pcm_lib_ioctl, 1328 .hw_params = snd_via82xx_hw_params, 1329 .hw_free = snd_via82xx_hw_free, 1330 .prepare = snd_via8233_multi_prepare, 1331 .trigger = snd_via82xx_pcm_trigger, 1332 .pointer = snd_via8233_pcm_pointer, 1333 .page = snd_pcm_sgbuf_ops_page, 1359 1334 }; 1360 1335 1361 1336 /* via823x capture callbacks */ 1362 static s nd_pcm_ops_tsnd_via8233_capture_ops = {1363 /* .open = */snd_via82xx_capture_open,1364 /* .close = */snd_via82xx_pcm_close,1365 /* .ioctl = */snd_pcm_lib_ioctl,1366 /* .hw_params = */snd_via82xx_hw_params,1367 /* .hw_free = */snd_via82xx_hw_free,1368 /* .prepare = */snd_via8233_capture_prepare,1369 /* .trigger = */snd_via82xx_pcm_trigger,1370 /* .pointer = */ snd_via8233_pcm_pointer,0,0,1371 /* .page = */ snd_pcm_sgbuf_ops_page,0 1337 static struct snd_pcm_ops snd_via8233_capture_ops = { 1338 .open = snd_via82xx_capture_open, 1339 .close = snd_via82xx_pcm_close, 1340 .ioctl = snd_pcm_lib_ioctl, 1341 .hw_params = snd_via82xx_hw_params, 1342 .hw_free = snd_via82xx_hw_free, 1343 .prepare = snd_via8233_capture_prepare, 1344 .trigger = snd_via82xx_pcm_trigger, 1345 .pointer = snd_via8233_pcm_pointer, 1346 .page = snd_pcm_sgbuf_ops_page, 1372 1347 }; 1373 1348 1374 static void init_viadev(via82xx_t *chip, int idx, unsigned int reg_offset, int shadow_pos, int direction) 1375 { 1376 chip->devs[idx].reg_offset = reg_offset; 1377 chip->devs[idx].shadow_shift = shadow_pos * 4; 1378 chip->devs[idx].direction = direction; 1379 chip->devs[idx].port = chip->port + reg_offset; 1349 1350 static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset, 1351 int shadow_pos, int direction) 1352 { 1353 chip->devs[idx].reg_offset = reg_offset; 1354 chip->devs[idx].shadow_shift = shadow_pos * 4; 1355 chip->devs[idx].direction = direction; 1356 chip->devs[idx].port = chip->port + reg_offset; 1380 1357 } 1381 1358 … … 1383 1360 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A) 1384 1361 */ 1385 static int __devinit snd_via8233_pcm_new(via82xx_t *chip) 1386 { 1387 snd_pcm_t *pcm; 1388 int i, err; 1389 1390 chip->playback_devno = 0; /* x 4 */ 1391 chip->multi_devno = 4; /* x 1 */ 1392 chip->capture_devno = 5; /* x 2 */ 1393 chip->num_devs = 7; 1394 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */ 1395 1396 /* PCM #0: 4 DSX playbacks and 1 capture */ 1397 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm); 1398 if (err < 0) 1399 return err; 1400 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); 1401 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); 1402 pcm->private_data = chip; 1403 strcpy(pcm->name, chip->card->shortname); 1404 chip->pcms[0] = pcm; 1405 /* set up playbacks */ 1406 for (i = 0; i < 4; i++) 1407 init_viadev(chip, i, 0x10 * i, i, 0); 1408 /* capture */ 1409 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); 1410 1411 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1412 snd_dma_pci_data(chip->pci), 64*1024, 128*1024)) < 0) 1413 return err; 1414 1415 /* PCM #1: multi-channel playback and 2nd capture */ 1416 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm); 1417 if (err < 0) 1418 return err; 1419 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); 1420 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); 1421 pcm->private_data = chip; 1422 strcpy(pcm->name, chip->card->shortname); 1423 chip->pcms[1] = pcm; 1424 /* set up playback */ 1425 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); 1426 /* set up capture */ 1427 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1); 1428 1429 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1430 snd_dma_pci_data(chip->pci), 64*1024, 128*1024)) < 0) 1431 return err; 1432 1433 return 0; 1362 static int __devinit snd_via8233_pcm_new(struct via82xx *chip) 1363 { 1364 struct snd_pcm *pcm; 1365 int i, err; 1366 1367 chip->playback_devno = 0; /* x 4 */ 1368 chip->multi_devno = 4; /* x 1 */ 1369 chip->capture_devno = 5; /* x 2 */ 1370 chip->num_devs = 7; 1371 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */ 1372 1373 /* PCM #0: 4 DSX playbacks and 1 capture */ 1374 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm); 1375 if (err < 0) 1376 return err; 1377 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); 1378 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); 1379 pcm->private_data = chip; 1380 strcpy(pcm->name, chip->card->shortname); 1381 chip->pcms[0] = pcm; 1382 /* set up playbacks */ 1383 for (i = 0; i < 4; i++) 1384 init_viadev(chip, i, 0x10 * i, i, 0); 1385 /* capture */ 1386 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); 1387 1388 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1389 snd_dma_pci_data(chip->pci), 1390 64*1024, 128*1024)) < 0) 1391 return err; 1392 1393 /* PCM #1: multi-channel playback and 2nd capture */ 1394 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm); 1395 if (err < 0) 1396 return err; 1397 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); 1398 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); 1399 pcm->private_data = chip; 1400 strcpy(pcm->name, chip->card->shortname); 1401 chip->pcms[1] = pcm; 1402 /* set up playback */ 1403 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); 1404 /* set up capture */ 1405 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1); 1406 1407 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1408 snd_dma_pci_data(chip->pci), 1409 64*1024, 128*1024)) < 0) 1410 return err; 1411 1412 return 0; 1434 1413 } 1435 1414 … … 1437 1416 * create pcm instances for VIA8233A 1438 1417 */ 1439 static int __devinit snd_via8233a_pcm_new(via82xx_t *chip) 1440 { 1441 snd_pcm_t *pcm; 1442 int err; 1443 1444 chip->multi_devno = 0; 1445 chip->playback_devno = 1; 1446 chip->capture_devno = 2; 1447 chip->num_devs = 3; 1448 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */ 1449 1450 /* PCM #0: multi-channel playback and capture */ 1451 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); 1452 if (err < 0) 1453 return err; 1454 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); 1455 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); 1456 pcm->private_data = chip; 1457 strcpy(pcm->name, chip->card->shortname); 1458 chip->pcms[0] = pcm; 1459 /* set up playback */ 1460 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); 1461 /* capture */ 1462 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); 1463 1464 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1465 snd_dma_pci_data(chip->pci), 64*1024, 128*1024)) < 0) 1466 return err; 1467 1468 /* SPDIF supported? */ 1469 if (! ac97_can_spdif(chip->ac97)) 1470 return 0; 1471 1472 /* PCM #1: DXS3 playback (for spdif) */ 1473 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm); 1474 if (err < 0) 1475 return err; 1476 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); 1477 pcm->private_data = chip; 1478 strcpy(pcm->name, chip->card->shortname); 1479 chip->pcms[1] = pcm; 1480 /* set up playback */ 1481 init_viadev(chip, chip->playback_devno, 0x30, 3, 0); 1482 1483 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1484 snd_dma_pci_data(chip->pci), 64*1024, 128*1024)) < 0) 1485 return err; 1486 1487 return 0; 1418 static int __devinit snd_via8233a_pcm_new(struct via82xx *chip) 1419 { 1420 struct snd_pcm *pcm; 1421 int err; 1422 1423 chip->multi_devno = 0; 1424 chip->playback_devno = 1; 1425 chip->capture_devno = 2; 1426 chip->num_devs = 3; 1427 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */ 1428 1429 /* PCM #0: multi-channel playback and capture */ 1430 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); 1431 if (err < 0) 1432 return err; 1433 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); 1434 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); 1435 pcm->private_data = chip; 1436 strcpy(pcm->name, chip->card->shortname); 1437 chip->pcms[0] = pcm; 1438 /* set up playback */ 1439 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); 1440 /* capture */ 1441 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); 1442 1443 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1444 snd_dma_pci_data(chip->pci), 1445 64*1024, 128*1024)) < 0) 1446 return err; 1447 1448 /* SPDIF supported? */ 1449 if (! ac97_can_spdif(chip->ac97)) 1450 return 0; 1451 1452 /* PCM #1: DXS3 playback (for spdif) */ 1453 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm); 1454 if (err < 0) 1455 return err; 1456 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); 1457 pcm->private_data = chip; 1458 strcpy(pcm->name, chip->card->shortname); 1459 chip->pcms[1] = pcm; 1460 /* set up playback */ 1461 init_viadev(chip, chip->playback_devno, 0x30, 3, 0); 1462 1463 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1464 snd_dma_pci_data(chip->pci), 1465 64*1024, 128*1024)) < 0) 1466 return err; 1467 1468 return 0; 1488 1469 } 1489 1470 … … 1491 1472 * create a pcm instance for via686a/b 1492 1473 */ 1493 static int __devinit snd_via686_pcm_new(via82xx_t *chip) 1494 { 1495 snd_pcm_t *pcm; 1496 int err; 1497 1498 chip->playback_devno = 0; 1499 chip->capture_devno = 1; 1500 chip->num_devs = 2; 1501 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */ 1502 1503 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); 1504 if (err < 0) 1505 return err; 1506 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops); 1507 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops); 1508 pcm->private_data = chip; 1509 strcpy(pcm->name, chip->card->shortname); 1510 chip->pcms[0] = pcm; 1511 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0); 1512 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1); 1513 1514 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1515 snd_dma_pci_data(chip->pci), 64*1024, 128*1024)) < 0) 1516 return err; 1517 1518 return 0; 1474 static int __devinit snd_via686_pcm_new(struct via82xx *chip) 1475 { 1476 struct snd_pcm *pcm; 1477 int err; 1478 1479 chip->playback_devno = 0; 1480 chip->capture_devno = 1; 1481 chip->num_devs = 2; 1482 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */ 1483 1484 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); 1485 if (err < 0) 1486 return err; 1487 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops); 1488 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops); 1489 pcm->private_data = chip; 1490 strcpy(pcm->name, chip->card->shortname); 1491 chip->pcms[0] = pcm; 1492 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0); 1493 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1); 1494 1495 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, 1496 snd_dma_pci_data(chip->pci), 1497 64*1024, 128*1024)) < 0) 1498 return err; 1499 1500 return 0; 1519 1501 } 1520 1502 … … 1524 1506 */ 1525 1507 1526 static int snd_via8233_capture_source_info(s nd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)1527 { 1528 /* formerly they were "Line" and "Mic", but it looks like that they 1529 * have nothing to do with the actual physical connections... 1530 */ 1531 static char *texts[2] = { 1532 "Input1", "Input2" 1533 }; 1534 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;1535 uinfo->count = 1;1536 uinfo->value.enumerated.items = 2;1537 if (uinfo->value.enumerated.item >= 2) 1538 uinfo->value.enumerated.item = 1; 1539 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);1540 return 0;1541 } 1542 1543 static int snd_via8233_capture_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1544 { 1545 via82xx_t *chip = snd_kcontrol_chip(kcontrol); 1546 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); 1547 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;1548 return 0;1549 } 1550 1551 static int snd_via8233_capture_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1552 { 1553 via82xx_t *chip = snd_kcontrol_chip(kcontrol); 1554 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); 1555 u8 val, oval; 1556 1557 spin_lock_irq(&chip->reg_lock);1558 oval = inb(port);1559 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC; 1560 if (ucontrol->value.enumerated.item[0]) 1561 val |= VIA_REG_CAPTURE_CHANNEL_MIC;1562 if (val != oval) 1563 outb(val, port); 1564 spin_unlock_irq(&chip->reg_lock);1565 return val != oval; 1566 } 1567 1568 static snd_kcontrol_new_t snd_via8233_capture_source __devinitdata = { 1569 /* .iface = */ SNDRV_CTL_ELEM_IFACE_MIXER, 1570 0,0, 1571 /* .name = */ "Input Source Select", 1572 0,0,0,1573 /* .info = */ snd_via8233_capture_source_info,1574 /* .get = */ snd_via8233_capture_source_get,1575 /* .put = */ snd_via8233_capture_source_put,1576 0 1508 static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol, 1509 struct snd_ctl_elem_info *uinfo) 1510 { 1511 /* formerly they were "Line" and "Mic", but it looks like that they 1512 * have nothing to do with the actual physical connections... 1513 */ 1514 static char *texts[2] = { 1515 "Input1", "Input2" 1516 }; 1517 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1518 uinfo->count = 1; 1519 uinfo->value.enumerated.items = 2; 1520 if (uinfo->value.enumerated.item >= 2) 1521 uinfo->value.enumerated.item = 1; 1522 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1523 return 0; 1524 } 1525 1526 static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol, 1527 struct snd_ctl_elem_value *ucontrol) 1528 { 1529 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1530 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); 1531 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0; 1532 return 0; 1533 } 1534 1535 static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol, 1536 struct snd_ctl_elem_value *ucontrol) 1537 { 1538 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1539 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); 1540 u8 val, oval; 1541 1542 spin_lock_irq(&chip->reg_lock); 1543 oval = inb(port); 1544 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC; 1545 if (ucontrol->value.enumerated.item[0]) 1546 val |= VIA_REG_CAPTURE_CHANNEL_MIC; 1547 if (val != oval) 1548 outb(val, port); 1549 spin_unlock_irq(&chip->reg_lock); 1550 return val != oval; 1551 } 1552 1553 static struct snd_kcontrol_new snd_via8233_capture_source __devinitdata = { 1554 .name = "Input Source Select", 1555 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1556 .info = snd_via8233_capture_source_info, 1557 .get = snd_via8233_capture_source_get, 1558 .put = snd_via8233_capture_source_put, 1577 1559 }; 1578 1560 1579 static int snd_via8233_dxs3_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1580 { 1581 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1582 uinfo->count = 1; 1583 uinfo->value.integer.min = 0; 1584 uinfo->value.integer.max = 1; 1585 return 0; 1586 } 1587 1588 static int snd_via8233_dxs3_spdif_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1589 { 1590 via82xx_t *chip = snd_kcontrol_chip(kcontrol); 1591 u8 val; 1592 1593 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); 1594 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0; 1595 return 0; 1596 } 1597 1598 static int snd_via8233_dxs3_spdif_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1599 { 1600 via82xx_t *chip = snd_kcontrol_chip(kcontrol); 1601 u8 val, oval; 1602 1603 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval); 1604 val = oval & ~VIA8233_SPDIF_DX3; 1605 if (ucontrol->value.integer.value[0]) 1606 val |= VIA8233_SPDIF_DX3; 1607 if (val != oval) { 1608 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); 1609 return 1; 1610 } 1611 return 0; 1612 } 1613 1614 static snd_kcontrol_new_t snd_via8233_dxs3_spdif_control __devinitdata = { 1615 /*.iface = */SNDRV_CTL_ELEM_IFACE_MIXER,0,0, 1616 SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH), 1617 0,0,0, 1618 /*.info = */snd_via8233_dxs3_spdif_info, 1619 /*.get = */snd_via8233_dxs3_spdif_get, 1620 /*.put = */snd_via8233_dxs3_spdif_put,0 1561 static int snd_via8233_dxs3_spdif_info(struct snd_kcontrol *kcontrol, 1562 struct snd_ctl_elem_info *uinfo) 1563 { 1564 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1565 uinfo->count = 1; 1566 uinfo->value.integer.min = 0; 1567 uinfo->value.integer.max = 1; 1568 return 0; 1569 } 1570 1571 static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol, 1572 struct snd_ctl_elem_value *ucontrol) 1573 { 1574 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1575 u8 val; 1576 1577 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); 1578 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0; 1579 return 0; 1580 } 1581 1582 static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol, 1583 struct snd_ctl_elem_value *ucontrol) 1584 { 1585 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1586 u8 val, oval; 1587 1588 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval); 1589 val = oval & ~VIA8233_SPDIF_DX3; 1590 if (ucontrol->value.integer.value[0]) 1591 val |= VIA8233_SPDIF_DX3; 1592 /* save the spdif flag for rate filtering */ 1593 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0; 1594 if (val != oval) { 1595 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); 1596 return 1; 1597 } 1598 return 0; 1599 } 1600 1601 static struct snd_kcontrol_new snd_via8233_dxs3_spdif_control __devinitdata = { 1602 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH), 1603 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1604 .info = snd_via8233_dxs3_spdif_info, 1605 .get = snd_via8233_dxs3_spdif_get, 1606 .put = snd_via8233_dxs3_spdif_put, 1621 1607 }; 1622 1608 1623 static int snd_via8233_dxs_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1624 { 1625 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1626 uinfo->count = 2; 1627 uinfo->value.integer.min = 0; 1628 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME; 1629 return 0; 1630 } 1631 1632 static int snd_via8233_dxs_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1633 { 1634 via82xx_t *chip = snd_kcontrol_chip(kcontrol); 1635 unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id); 1636 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[0]; 1637 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[1]; 1638 return 0; 1639 } 1640 1641 static int snd_via8233_dxs_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1642 { 1643 via82xx_t *chip = snd_kcontrol_chip(kcontrol); 1644 unsigned int idx; 1645 unsigned char val; 1646 int i, change = 0; 1647 1648 for (i = 0; i < 2; i++) { 1649 val = ucontrol->value.integer.value[i]; 1650 if (val > VIA_DXS_MAX_VOLUME) 1651 val = VIA_DXS_MAX_VOLUME; 1652 val = VIA_DXS_MAX_VOLUME - val; 1653 if (val != chip->playback_volume[i]) { 1654 change = 1; 1655 chip->playback_volume[i] = val; 1656 for (idx = 0; idx < 4; idx++) { 1657 unsigned long port = chip->port + 0x10 * idx; 1658 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); 1659 } 1660 } 1661 } 1662 return change; 1663 } 1664 1665 static snd_kcontrol_new_t snd_via8233_dxs_volume_control __devinitdata = { 1666 /*.iface = */SNDRV_CTL_ELEM_IFACE_MIXER,0,0, 1667 /*.name = */"PCM Playback Volume",0,0, 1668 /*.count = */0, 1669 /*.info = */snd_via8233_dxs_volume_info, 1670 /*.get = */snd_via8233_dxs_volume_get, 1671 /*.put = */snd_via8233_dxs_volume_put,0 1609 static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol, 1610 struct snd_ctl_elem_info *uinfo) 1611 { 1612 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1613 uinfo->count = 2; 1614 uinfo->value.integer.min = 0; 1615 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME; 1616 return 0; 1617 } 1618 1619 static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol, 1620 struct snd_ctl_elem_value *ucontrol) 1621 { 1622 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1623 unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id); 1624 1625 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0]; 1626 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1]; 1627 return 0; 1628 } 1629 1630 static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol, 1631 struct snd_ctl_elem_value *ucontrol) 1632 { 1633 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1634 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0]; 1635 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1]; 1636 return 0; 1637 } 1638 1639 static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol, 1640 struct snd_ctl_elem_value *ucontrol) 1641 { 1642 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1643 unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id); 1644 unsigned long port = chip->port + 0x10 * idx; 1645 unsigned char val; 1646 int i, change = 0; 1647 1648 for (i = 0; i < 2; i++) { 1649 val = ucontrol->value.integer.value[i]; 1650 if (val > VIA_DXS_MAX_VOLUME) 1651 val = VIA_DXS_MAX_VOLUME; 1652 val = VIA_DXS_MAX_VOLUME - val; 1653 change |= val != chip->playback_volume[idx][i]; 1654 if (change) { 1655 chip->playback_volume[idx][i] = val; 1656 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); 1657 } 1658 } 1659 return change; 1660 } 1661 1662 static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol, 1663 struct snd_ctl_elem_value *ucontrol) 1664 { 1665 struct via82xx *chip = snd_kcontrol_chip(kcontrol); 1666 unsigned int idx; 1667 unsigned char val; 1668 int i, change = 0; 1669 1670 for (i = 0; i < 2; i++) { 1671 val = ucontrol->value.integer.value[i]; 1672 if (val > VIA_DXS_MAX_VOLUME) 1673 val = VIA_DXS_MAX_VOLUME; 1674 val = VIA_DXS_MAX_VOLUME - val; 1675 if (val != chip->playback_volume_c[i]) { 1676 change = 1; 1677 chip->playback_volume_c[i] = val; 1678 for (idx = 0; idx < 4; idx++) { 1679 unsigned long port = chip->port + 0x10 * idx; 1680 chip->playback_volume[idx][i] = val; 1681 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); 1682 } 1683 } 1684 } 1685 return change; 1686 } 1687 1688 static struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control __devinitdata = { 1689 .name = "PCM Playback Volume", 1690 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1691 .info = snd_via8233_dxs_volume_info, 1692 .get = snd_via8233_pcmdxs_volume_get, 1693 .put = snd_via8233_pcmdxs_volume_put, 1672 1694 }; 1673 1695 1674 /* 1675 */ 1676 1677 static void snd_via82xx_mixer_free_ac97_bus(ac97_bus_t *bus) 1678 { 1679 via82xx_t *chip = bus->private_data; 1680 chip->ac97_bus = NULL; 1681 } 1682 1683 static void snd_via82xx_mixer_free_ac97(ac97_t *ac97) 1684 { 1685 via82xx_t *chip = ac97->private_data; 1686 chip->ac97 = NULL; 1696 static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = { 1697 .name = "VIA DXS Playback Volume", 1698 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1699 .count = 4, 1700 .info = snd_via8233_dxs_volume_info, 1701 .get = snd_via8233_dxs_volume_get, 1702 .put = snd_via8233_dxs_volume_put, 1703 }; 1704 1705 /* 1706 */ 1707 1708 static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1709 { 1710 struct via82xx *chip = bus->private_data; 1711 chip->ac97_bus = NULL; 1712 } 1713 1714 static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97) 1715 { 1716 struct via82xx *chip = ac97->private_data; 1717 chip->ac97 = NULL; 1687 1718 } 1688 1719 1689 1720 static struct ac97_quirk ac97_quirks[] = { 1690 { 1691 0x1106, 1692 0x4161, 1693 0, 0x56494161, /* VT1612A */ 1694 "Soltek SL-75DRV5", 1695 AC97_TUNE_NONE 1696 }, 1697 { 1698 /*.vendor = */0x1106, 1699 /*.device = */0x4161, 0, 0, 1700 /*.name = */"ASRock K7VT2", 1701 /*.type = */AC97_TUNE_HP_ONLY 1702 }, 1703 { 1704 0x1019, 1705 0x0a81, 0, 0, 1706 "ECS K7VTA3", 1707 AC97_TUNE_HP_ONLY 1708 }, 1709 { 1710 /*.vendor =*/ 0x1019, 1711 /*.device =*/0x0a85,0,0, 1712 /*.name = */"ECS L7VMM2", 1713 /*.type = */AC97_TUNE_HP_ONLY 1714 }, 1715 { /*.vendor = */0x1849, 1716 /*.device = */0x3059, 0, 0, 1717 /*.name = */"ASRock K7VM2", 1718 /*.type = */AC97_TUNE_HP_ONLY /* VT1616 */ 1719 }, 1720 { 1721 0x14cd, 1722 0x7002, 0, 0, 1723 "Unknown", 1724 AC97_TUNE_ALC_JACK 1725 }, 1726 { 1727 0x1071, 1728 0x8590, 0, 0, 1729 "Mitac Mobo", 1730 AC97_TUNE_ALC_JACK 1731 }, 1732 { 1733 0x161f, 1734 0x202b, 0, 0, 1735 "Arima Notebook", 1736 AC97_TUNE_HP_ONLY, 1737 }, 1738 { 0 } /* terminator */ 1721 { 1722 .subvendor = 0x1106, 1723 .subdevice = 0x4161, 1724 .codec_id = 0x56494161, /* VT1612A */ 1725 .name = "Soltek SL-75DRV5", 1726 .type = AC97_TUNE_NONE 1727 }, 1728 { /* FIXME: which codec? */ 1729 .subvendor = 0x1106, 1730 .subdevice = 0x4161, 1731 .name = "ASRock K7VT2", 1732 .type = AC97_TUNE_HP_ONLY 1733 }, 1734 { 1735 .subvendor = 0x1019, 1736 .subdevice = 0x0a81, 1737 .name = "ECS K7VTA3", 1738 .type = AC97_TUNE_HP_ONLY 1739 }, 1740 { 1741 .subvendor = 0x1019, 1742 .subdevice = 0x0a85, 1743 .name = "ECS L7VMM2", 1744 .type = AC97_TUNE_HP_ONLY 1745 }, 1746 { 1747 .subvendor = 0x1849, 1748 .subdevice = 0x3059, 1749 .name = "ASRock K7VM2", 1750 .type = AC97_TUNE_HP_ONLY /* VT1616 */ 1751 }, 1752 { 1753 .subvendor = 0x14cd, 1754 .subdevice = 0x7002, 1755 .name = "Unknown", 1756 .type = AC97_TUNE_ALC_JACK 1757 }, 1758 { 1759 .subvendor = 0x1071, 1760 .subdevice = 0x8590, 1761 .name = "Mitac Mobo", 1762 .type = AC97_TUNE_ALC_JACK 1763 }, 1764 { 1765 .subvendor = 0x161f, 1766 .subdevice = 0x202b, 1767 .name = "Arima Notebook", 1768 .type = AC97_TUNE_HP_ONLY, 1769 }, 1770 { 1771 .subvendor = 0x161f, 1772 .subdevice = 0x2032, 1773 .name = "Targa Traveller 811", 1774 .type = AC97_TUNE_HP_ONLY, 1775 }, 1776 {0} /* terminator */ 1739 1777 }; 1740 1778 1741 static int __devinit snd_via82xx_mixer_new(via82xx_t *chip, const char* ac97_quirk) 1742 { 1743 ac97_template_t ac97; 1744 int err; 1745 static ac97_bus_ops_t ops = { 1746 0,snd_via82xx_codec_write, 1747 snd_via82xx_codec_read, 1748 snd_via82xx_codec_wait,0 1749 }; 1750 1751 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1752 return err; 1753 1754 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus; 1755 chip->ac97_bus->clock = chip->ac97_clock; 1756 chip->ac97_bus->shared_type = AC97_SHARED_TYPE_VIA; 1757 1758 memset(&ac97, 0, sizeof(ac97)); 1759 ac97.private_data = chip; 1760 ac97.private_free = snd_via82xx_mixer_free_ac97; 1761 ac97.pci = chip->pci; 1762 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1763 return err; 1764 1765 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, ac97_quirk); 1766 1767 if (chip->chip_type != TYPE_VIA686) { 1768 /* use slot 10/11 */ 1769 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4); 1770 } 1771 1772 return 0; 1773 } 1774 1775 /* 1776 * 1777 */ 1778 1779 static int snd_via8233_init_misc(via82xx_t *chip, int dev) 1780 { 1781 int i, err, caps; 1782 unsigned char val; 1783 1784 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2; 1785 for (i = 0; i < caps; i++) { 1786 snd_via8233_capture_source.index = i; 1787 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip)); 1788 if (err < 0) 1789 return err; 1790 } 1791 if (ac97_can_spdif(chip->ac97)) { 1792 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip)); 1793 if (err < 0) 1794 return err; 1795 } 1796 if (chip->chip_type != TYPE_VIA8233A) { 1797 /* when no h/w PCM volume control is found, use DXS volume control 1798 * as the PCM vol control 1799 */ 1800 snd_ctl_elem_id_t sid; 1801 memset(&sid, 0, sizeof(sid)); 1802 strcpy(sid.name, "PCM Playback Volume"); 1803 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1804 if (! snd_ctl_find_id(chip->card, &sid)) { 1805 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs_volume_control, chip)); 1806 if (err < 0) 1807 return err; 1808 } 1809 } 1810 1811 /* select spdif data slot 10/11 */ 1812 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); 1813 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011; 1814 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */ 1815 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); 1816 1817 return 0; 1818 } 1819 1820 static int snd_via686_init_misc(via82xx_t *chip, int dev) 1821 { 1822 unsigned char legacy, legacy_cfg; 1823 int rev_h = 0; 1824 1825 legacy = chip->old_legacy; 1826 legacy_cfg = chip->old_legacy_cfg; 1827 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */ 1828 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */ 1829 if (chip->revision >= VIA_REV_686_H) { 1830 rev_h = 1; 1831 if (mpu_port[dev] >= 0x200) { /* force MIDI */ 1832 mpu_port[dev] &= 0xfffc; 1833 pci_write_config_dword(chip->pci, 0x18, mpu_port[dev] | 0x01); 1834 #ifdef CONFIG_PM 1835 chip->mpu_port_saved = mpu_port[dev]; 1836 #endif 1837 } else { 1838 mpu_port[dev] = pci_resource_start(chip->pci, 2); 1839 } 1840 } else { 1841 switch (mpu_port[dev]) { /* force MIDI */ 1842 case 0x300: 1843 case 0x310: 1844 case 0x320: 1845 case 0x330: 1846 legacy_cfg &= ~(3 << 2); 1847 legacy_cfg |= (mpu_port[dev] & 0x0030) >> 2; 1848 break; 1849 default: /* no, use BIOS settings */ 1850 if (legacy & VIA_FUNC_ENABLE_MIDI) 1851 mpu_port[dev] = 0x300 + ((legacy_cfg & 0x000c) << 2); 1852 break; 1853 } 1854 } 1855 if (mpu_port[dev] >= 0x200 && 1856 (chip->mpu_res = request_region(mpu_port[dev], 2, "VIA82xx MPU401")) != NULL) { 1857 if (rev_h) 1858 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */ 1859 legacy |= VIA_FUNC_ENABLE_MIDI; 1860 } else { 1861 if (rev_h) 1862 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */ 1863 legacy &= ~VIA_FUNC_ENABLE_MIDI; 1864 mpu_port[dev] = 0; 1865 } 1866 1779 static int __devinit snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override) 1780 { 1781 struct snd_ac97_template ac97; 1782 int err; 1783 static struct snd_ac97_bus_ops ops = { 1784 .write = snd_via82xx_codec_write, 1785 .read = snd_via82xx_codec_read, 1786 .wait = snd_via82xx_codec_wait, 1787 }; 1788 1789 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1790 return err; 1791 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus; 1792 chip->ac97_bus->clock = chip->ac97_clock; 1793 1794 memset(&ac97, 0, sizeof(ac97)); 1795 ac97.private_data = chip; 1796 ac97.private_free = snd_via82xx_mixer_free_ac97; 1797 ac97.pci = chip->pci; 1798 ac97.scaps = AC97_SCAP_SKIP_MODEM; 1799 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1800 return err; 1801 1802 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 1803 1804 if (chip->chip_type != TYPE_VIA686) { 1805 /* use slot 10/11 */ 1806 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4); 1807 } 1808 1809 return 0; 1810 } 1867 1811 1868 1812 #ifdef SUPPORT_JOYSTICK 1869 1813 #define JOYSTICK_ADDR 0x200 1870 if (joystick[dev] && 1871 (chip->res_joystick = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport")) != NULL) { 1872 legacy |= VIA_FUNC_ENABLE_GAME; 1873 chip->gameport.io = JOYSTICK_ADDR; 1874 } 1814 static int __devinit snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy) 1815 { 1816 struct gameport *gp; 1817 struct resource *r; 1818 1819 if (!joystick) 1820 return -ENODEV; 1821 1822 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport"); 1823 if (!r) { 1824 printk(KERN_WARNING "via82xx: cannot reserve joystick port 0x%#x\n", 1825 JOYSTICK_ADDR); 1826 return -EBUSY; 1827 } 1828 1829 chip->gameport = gp = gameport_allocate_port(); 1830 if (!gp) { 1831 printk(KERN_ERR "via82xx: cannot allocate memory for gameport\n"); 1832 release_and_free_resource(r); 1833 return -ENOMEM; 1834 } 1835 1836 gameport_set_name(gp, "VIA686 Gameport"); 1837 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 1838 gameport_set_dev_parent(gp, &chip->pci->dev); 1839 gp->io = JOYSTICK_ADDR; 1840 gameport_set_port_data(gp, r); 1841 1842 /* Enable legacy joystick port */ 1843 *legacy |= VIA_FUNC_ENABLE_GAME; 1844 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy); 1845 1846 gameport_register_port(chip->gameport); 1847 1848 return 0; 1849 } 1850 1851 static void snd_via686_free_gameport(struct via82xx *chip) 1852 { 1853 if (chip->gameport) { 1854 struct resource *r = gameport_get_port_data(chip->gameport); 1855 1856 gameport_unregister_port(chip->gameport); 1857 chip->gameport = NULL; 1858 release_and_free_resource(r); 1859 } 1860 } 1861 #else 1862 static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy) 1863 { 1864 return -ENOSYS; 1865 } 1866 static inline void snd_via686_free_gameport(struct via82xx *chip) { } 1875 1867 #endif 1876 legacy |= VIA_FUNC_ENABLE_GAME; // by vladest 1877 1878 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); 1879 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg); 1880 #if 1 // disabled by vladest due trap in mpu uart 1881 if (chip->mpu_res) { 1882 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A, 1883 mpu_port[dev], 1, 1884 chip->irq, 0, &chip->rmidi) < 0) { 1885 printk(KERN_WARNING "unable to initialize MPU-401 at 0x%lx, skipping\n", mpu_port[dev]); 1886 legacy &= ~VIA_FUNC_ENABLE_MIDI; 1887 } else { 1888 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */ 1889 } 1890 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); 1891 } 1868 1869 1870 /* 1871 * 1872 */ 1873 1874 static int __devinit snd_via8233_init_misc(struct via82xx *chip) 1875 { 1876 int i, err, caps; 1877 unsigned char val; 1878 1879 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2; 1880 for (i = 0; i < caps; i++) { 1881 snd_via8233_capture_source.index = i; 1882 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip)); 1883 if (err < 0) 1884 return err; 1885 } 1886 if (ac97_can_spdif(chip->ac97)) { 1887 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip)); 1888 if (err < 0) 1889 return err; 1890 } 1891 if (chip->chip_type != TYPE_VIA8233A) { 1892 /* when no h/w PCM volume control is found, use DXS volume control 1893 * as the PCM vol control 1894 */ 1895 struct snd_ctl_elem_id sid; 1896 memset(&sid, 0, sizeof(sid)); 1897 strcpy(sid.name, "PCM Playback Volume"); 1898 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1899 if (! snd_ctl_find_id(chip->card, &sid)) { 1900 snd_printd(KERN_INFO "Using DXS as PCM Playback\n"); 1901 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip)); 1902 if (err < 0) 1903 return err; 1904 } 1905 else /* Using DXS when PCM emulation is enabled is really weird */ 1906 { 1907 /* Standalone DXS controls */ 1908 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs_volume_control, chip)); 1909 if (err < 0) 1910 return err; 1911 } 1912 } 1913 /* select spdif data slot 10/11 */ 1914 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); 1915 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011; 1916 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */ 1917 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); 1918 1919 return 0; 1920 } 1921 1922 static int __devinit snd_via686_init_misc(struct via82xx *chip) 1923 { 1924 unsigned char legacy, legacy_cfg; 1925 int rev_h = 0; 1926 1927 legacy = chip->old_legacy; 1928 legacy_cfg = chip->old_legacy_cfg; 1929 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */ 1930 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */ 1931 if (chip->revision >= VIA_REV_686_H) { 1932 rev_h = 1; 1933 if (mpu_port >= 0x200) { /* force MIDI */ 1934 mpu_port &= 0xfffc; 1935 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01); 1936 #ifdef CONFIG_PM 1937 chip->mpu_port_saved = mpu_port; 1892 1938 #endif 1893 #ifdef SUPPORT_JOYSTICK 1894 if (chip->res_joystick) 1895 gameport_register_port(&chip->gameport); 1939 } else { 1940 mpu_port = pci_resource_start(chip->pci, 2); 1941 } 1942 } else { 1943 switch (mpu_port) { /* force MIDI */ 1944 case 0x300: 1945 case 0x310: 1946 case 0x320: 1947 case 0x330: 1948 legacy_cfg &= ~(3 << 2); 1949 legacy_cfg |= (mpu_port & 0x0030) >> 2; 1950 break; 1951 default: /* no, use BIOS settings */ 1952 if (legacy & VIA_FUNC_ENABLE_MIDI) 1953 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2); 1954 break; 1955 } 1956 } 1957 if (mpu_port >= 0x200 && 1958 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401")) 1959 != NULL) { 1960 if (rev_h) 1961 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */ 1962 legacy |= VIA_FUNC_ENABLE_MIDI; 1963 } else { 1964 if (rev_h) 1965 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */ 1966 legacy &= ~VIA_FUNC_ENABLE_MIDI; 1967 mpu_port = 0; 1968 } 1969 1970 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); 1971 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg); 1972 if (chip->mpu_res) { 1973 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A, 1974 mpu_port, 1, 1975 chip->irq, 0, &chip->rmidi) < 0) { 1976 printk(KERN_WARNING "unable to initialize MPU-401" 1977 " at 0x%lx, skipping\n", mpu_port); 1978 legacy &= ~VIA_FUNC_ENABLE_MIDI; 1979 } else { 1980 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */ 1981 } 1982 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); 1983 } 1984 1985 snd_via686_create_gameport(chip, &legacy); 1986 1987 #ifdef CONFIG_PM 1988 chip->legacy_saved = legacy; 1989 chip->legacy_cfg_saved = legacy_cfg; 1896 1990 #endif 1897 1991 1992 return 0; 1993 } 1994 1995 1996 /* 1997 * proc interface 1998 */ 1999 static void snd_via82xx_proc_read(struct snd_info_entry *entry, 2000 struct snd_info_buffer *buffer) 2001 { 2002 struct via82xx *chip = entry->private_data; 2003 int i; 2004 2005 snd_iprintf(buffer, "%s\n\n", chip->card->longname); 2006 for (i = 0; i < 0xa0; i += 4) { 2007 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i)); 2008 } 2009 } 2010 2011 static void __devinit snd_via82xx_proc_init(struct via82xx *chip) 2012 { 2013 struct snd_info_entry *entry; 2014 2015 if (! snd_card_proc_new(chip->card, "via82xx", &entry)) 2016 snd_info_set_text_ops(entry, chip, 1024, snd_via82xx_proc_read); 2017 } 2018 2019 /* 2020 * 2021 */ 2022 2023 static int snd_via82xx_chip_init(struct via82xx *chip) 2024 { 2025 unsigned int val; 2026 unsigned long end_time; 2027 unsigned char pval; 2028 2029 #if 0 /* broken on K7M? */ 2030 if (chip->chip_type == TYPE_VIA686) 2031 /* disable all legacy ports */ 2032 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0); 2033 #endif 2034 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); 2035 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */ 2036 /* deassert ACLink reset, force SYNC */ 2037 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 2038 VIA_ACLINK_CTRL_ENABLE | 2039 VIA_ACLINK_CTRL_RESET | 2040 VIA_ACLINK_CTRL_SYNC); 2041 udelay(100); 2042 #if 1 /* FIXME: should we do full reset here for all chip models? */ 2043 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00); 2044 udelay(100); 2045 #else 2046 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */ 2047 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 2048 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC); 2049 udelay(2); 2050 #endif 2051 /* ACLink on, deassert ACLink reset, VSR, SGD data out */ 2052 /* note - FM data out has trouble with non VRA codecs !! */ 2053 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); 2054 udelay(100); 2055 } 2056 2057 /* Make sure VRA is enabled, in case we didn't do a 2058 * complete codec reset, above */ 2059 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval); 2060 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) { 2061 /* ACLink on, deassert ACLink reset, VSR, SGD data out */ 2062 /* note - FM data out has trouble with non VRA codecs !! */ 2063 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); 2064 udelay(100); 2065 } 2066 2067 /* wait until codec ready */ 2068 end_time = jiffies + msecs_to_jiffies(750); 2069 do { 2070 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); 2071 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ 2072 break; 2073 schedule_timeout_uninterruptible(1); 2074 } while (time_before(jiffies, end_time)); 2075 2076 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) 2077 snd_printk(KERN_ERR "AC'97 codec is not ready [0x%x]\n", val); 2078 2079 #if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */ 2080 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | 2081 VIA_REG_AC97_SECONDARY_VALID | 2082 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); 2083 end_time = jiffies + msecs_to_jiffies(750); 2084 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | 2085 VIA_REG_AC97_SECONDARY_VALID | 2086 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); 2087 do { 2088 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) { 2089 chip->ac97_secondary = 1; 2090 goto __ac97_ok2; 2091 } 2092 schedule_timeout_interruptible(1); 2093 } while (time_before(jiffies, end_time)); 2094 /* This is ok, the most of motherboards have only one codec */ 2095 2096 __ac97_ok2: 2097 #endif 2098 2099 if (chip->chip_type == TYPE_VIA686) { 2100 /* route FM trap to IRQ, disable FM trap */ 2101 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0); 2102 /* disable all GPI interrupts */ 2103 outl(0, VIAREG(chip, GPI_INTR)); 2104 } 2105 2106 if (chip->chip_type != TYPE_VIA686) { 2107 /* Workaround for Award BIOS bug: 2108 * DXS channels don't work properly with VRA if MC97 is disabled. 2109 */ 2110 struct pci_dev *pci; 2111 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */ 2112 if (pci) { 2113 unsigned char data; 2114 pci_read_config_byte(pci, 0x44, &data); 2115 pci_write_config_byte(pci, 0x44, data | 0x40); 2116 pci_dev_put(pci); 2117 } 2118 } 2119 2120 if (chip->chip_type != TYPE_VIA8233A) { 2121 int i, idx; 2122 for (idx = 0; idx < 4; idx++) { 2123 unsigned long port = chip->port + 0x10 * idx; 2124 for (i = 0; i < 2; i++) { 2125 chip->playback_volume[idx][i]=chip->playback_volume_c[i]; 2126 outb(chip->playback_volume_c[i], 2127 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); 2128 } 2129 } 2130 } 2131 2132 return 0; 2133 } 2134 1898 2135 #ifdef CONFIG_PM 1899 chip->legacy_saved = legacy; 1900 chip->legacy_cfg_saved = legacy_cfg; 2136 /* 2137 * power management 2138 */ 2139 static int snd_via82xx_suspend(struct pci_dev *pci, pm_message_t state) 2140 { 2141 struct snd_card *card = pci_get_drvdata(pci); 2142 struct via82xx *chip = card->private_data; 2143 int i; 2144 2145 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2146 for (i = 0; i < 2; i++) 2147 snd_pcm_suspend_all(chip->pcms[i]); 2148 for (i = 0; i < chip->num_devs; i++) 2149 snd_via82xx_channel_reset(chip, &chip->devs[i]); 2150 synchronize_irq(chip->irq); 2151 snd_ac97_suspend(chip->ac97); 2152 2153 /* save misc values */ 2154 if (chip->chip_type != TYPE_VIA686) { 2155 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved); 2156 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL); 2157 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10); 2158 } 2159 2160 pci_set_power_state(pci, PCI_D3hot); 2161 pci_disable_device(pci); 2162 pci_save_state(pci); 2163 return 0; 2164 } 2165 2166 static int snd_via82xx_resume(struct pci_dev *pci) 2167 { 2168 struct snd_card *card = pci_get_drvdata(pci); 2169 struct via82xx *chip = card->private_data; 2170 int i; 2171 2172 pci_restore_state(pci); 2173 pci_enable_device(pci); 2174 pci_set_power_state(pci, PCI_D0); 2175 2176 snd_via82xx_chip_init(chip); 2177 2178 if (chip->chip_type == TYPE_VIA686) { 2179 if (chip->mpu_port_saved) 2180 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01); 2181 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved); 2182 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved); 2183 } else { 2184 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved); 2185 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL); 2186 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10); 2187 } 2188 2189 snd_ac97_resume(chip->ac97); 2190 2191 for (i = 0; i < chip->num_devs; i++) 2192 snd_via82xx_channel_reset(chip, &chip->devs[i]); 2193 2194 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2195 return 0; 2196 } 2197 #endif /* CONFIG_PM */ 2198 2199 static int snd_via82xx_free(struct via82xx *chip) 2200 { 2201 unsigned int i; 2202 2203 if (chip->irq < 0) 2204 goto __end_hw; 2205 /* disable interrupts */ 2206 for (i = 0; i < chip->num_devs; i++) 2207 snd_via82xx_channel_reset(chip, &chip->devs[i]); 2208 synchronize_irq(chip->irq); 2209 __end_hw: 2210 if (chip->irq >= 0) 2211 free_irq(chip->irq, chip); 2212 release_and_free_resource(chip->mpu_res); 2213 pci_release_regions(chip->pci); 2214 2215 if (chip->chip_type == TYPE_VIA686) { 2216 snd_via686_free_gameport(chip); 2217 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy); 2218 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg); 2219 } 2220 pci_disable_device(chip->pci); 2221 kfree(chip); 2222 return 0; 2223 } 2224 2225 static int snd_via82xx_dev_free(struct snd_device *device) 2226 { 2227 struct via82xx *chip = device->device_data; 2228 return snd_via82xx_free(chip); 2229 } 2230 2231 static int __devinit snd_via82xx_create(struct snd_card *card, 2232 struct pci_dev *pci, 2233 int chip_type, 2234 int revision, 2235 unsigned int ac97_clock, 2236 struct via82xx ** r_via) 2237 { 2238 struct via82xx *chip; 2239 int err; 2240 static struct snd_device_ops ops = { 2241 .dev_free = snd_via82xx_dev_free, 2242 }; 2243 2244 if ((err = pci_enable_device(pci)) < 0) 2245 return err; 2246 2247 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { 2248 pci_disable_device(pci); 2249 return -ENOMEM; 2250 } 2251 2252 chip->chip_type = chip_type; 2253 chip->revision = revision; 2254 2255 spin_lock_init(&chip->reg_lock); 2256 spin_lock_init(&chip->rates[0].lock); 2257 spin_lock_init(&chip->rates[1].lock); 2258 chip->card = card; 2259 chip->pci = pci; 2260 chip->irq = -1; 2261 2262 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy); 2263 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg); 2264 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 2265 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM)); 2266 2267 if ((err = pci_request_regions(pci, card->driver)) < 0) { 2268 kfree(chip); 2269 pci_disable_device(pci); 2270 return err; 2271 } 2272 chip->port = pci_resource_start(pci, 0); 2273 if (request_irq(pci->irq, 2274 chip_type == TYPE_VIA8233 ? 2275 snd_via8233_interrupt : snd_via686_interrupt, 2276 SA_INTERRUPT|SA_SHIRQ, 2277 card->driver, chip)) { 2278 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2279 snd_via82xx_free(chip); 2280 return -EBUSY; 2281 } 2282 chip->irq = pci->irq; 2283 if (ac97_clock >= 8000 && ac97_clock <= 48000) 2284 chip->ac97_clock = ac97_clock; 2285 synchronize_irq(chip->irq); 2286 2287 if ((err = snd_via82xx_chip_init(chip)) < 0) { 2288 snd_via82xx_free(chip); 2289 return err; 2290 } 2291 2292 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2293 snd_via82xx_free(chip); 2294 return err; 2295 } 2296 2297 /* The 8233 ac97 controller does not implement the master bit 2298 * in the pci command register. IMHO this is a violation of the PCI spec. 2299 * We call pci_set_master here because it does not hurt. */ 2300 pci_set_master(pci); 2301 2302 snd_card_set_dev(card, &pci->dev); 2303 2304 *r_via = chip; 2305 return 0; 2306 } 2307 2308 struct via823x_info { 2309 int revision; 2310 char *name; 2311 int type; 2312 }; 2313 static struct via823x_info via823x_cards[] __devinitdata = { 2314 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 }, 2315 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 }, 2316 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 }, 2317 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A }, 2318 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 }, 2319 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 }, 2320 }; 2321 2322 /* 2323 * auto detection of DXS channel supports. 2324 */ 2325 struct dxs_whitelist { 2326 unsigned short subvendor; 2327 unsigned short subdevice; 2328 unsigned short mask; 2329 short action; /* new dxs_support value */ 2330 }; 2331 2332 static int __devinit check_dxs_list(struct pci_dev *pci) 2333 { 2334 static struct dxs_whitelist whitelist[] = { 2335 { .subvendor = 0x1005, .subdevice = 0x4710, .action = VIA_DXS_ENABLE }, /* Avance Logic Mobo */ 2336 { .subvendor = 0x1019, .subdevice = 0x0996, .action = VIA_DXS_48K }, 2337 { .subvendor = 0x1019, .subdevice = 0x0a81, .action = VIA_DXS_NO_VRA }, /* ECS K7VTA3 v8.0 */ 2338 { .subvendor = 0x1019, .subdevice = 0x0a85, .action = VIA_DXS_NO_VRA }, /* ECS L7VMM2 */ 2339 { .subvendor = 0x1019, .subdevice = 0xa101, .action = VIA_DXS_SRC }, 2340 { .subvendor = 0x1025, .subdevice = 0x0033, .action = VIA_DXS_NO_VRA }, /* Acer Inspire 1353LM */ 2341 { .subvendor = 0x1025, .subdevice = 0x0046, .action = VIA_DXS_SRC }, /* Acer Aspire 1524 WLMi */ 2342 { .subvendor = 0x1043, .subdevice = 0x8095, .action = VIA_DXS_NO_VRA }, /* ASUS A7V8X (FIXME: possibly VIA_DXS_ENABLE?)*/ 2343 { .subvendor = 0x1043, .subdevice = 0x80a1, .action = VIA_DXS_NO_VRA }, /* ASUS A7V8-X */ 2344 { .subvendor = 0x1043, .subdevice = 0x80b0, .action = VIA_DXS_NO_VRA }, /* ASUS A7V600 & K8V*/ 2345 { .subvendor = 0x1043, .subdevice = 0x810d, .action = VIA_DXS_SRC }, /* ASUS */ 2346 { .subvendor = 0x1043, .subdevice = 0x812a, .action = VIA_DXS_SRC }, /* ASUS A8V Deluxe */ 2347 { .subvendor = 0x1043, .subdevice = 0x8174, .action = VIA_DXS_SRC }, /* ASUS */ 2348 { .subvendor = 0x1071, .subdevice = 0x8375, .action = VIA_DXS_NO_VRA }, /* Vobis/Yakumo/Mitac notebook */ 2349 { .subvendor = 0x1071, .subdevice = 0x8399, .action = VIA_DXS_NO_VRA }, /* Umax AB 595T (VIA K8N800A - VT8237) */ 2350 { .subvendor = 0x10cf, .subdevice = 0x118e, .action = VIA_DXS_ENABLE }, /* FSC laptop */ 2351 { .subvendor = 0x1106, .subdevice = 0x4161, .action = VIA_DXS_NO_VRA }, /* ASRock K7VT2 */ 2352 { .subvendor = 0x1106, .subdevice = 0x4552, .action = VIA_DXS_NO_VRA }, /* QDI Kudoz 7X/600-6AL */ 2353 { .subvendor = 0x1106, .subdevice = 0xaa01, .action = VIA_DXS_NO_VRA }, /* EPIA MII */ 2354 { .subvendor = 0x1106, .subdevice = 0xc001, .action = VIA_DXS_SRC }, /* Insight P4-ITX */ 2355 { .subvendor = 0x1297, .subdevice = 0xa232, .action = VIA_DXS_ENABLE }, /* Shuttle ?? */ 2356 { .subvendor = 0x1297, .subdevice = 0xc160, .action = VIA_DXS_ENABLE }, /* Shuttle SK41G */ 2357 { .subvendor = 0x1458, .subdevice = 0xa002, .action = VIA_DXS_ENABLE }, /* Gigabyte GA-7VAXP */ 2358 { .subvendor = 0x1462, .subdevice = 0x0080, .action = VIA_DXS_SRC }, /* MSI K8T Neo-FIS2R */ 2359 { .subvendor = 0x1462, .subdevice = 0x0430, .action = VIA_DXS_SRC }, /* MSI 7142 (K8MM-V) */ 2360 { .subvendor = 0x1462, .subdevice = 0x0470, .action = VIA_DXS_SRC }, /* MSI KT880 Delta-FSR */ 2361 { .subvendor = 0x1462, .subdevice = 0x3800, .action = VIA_DXS_ENABLE }, /* MSI KT266 */ 2362 { .subvendor = 0x1462, .subdevice = 0x5901, .action = VIA_DXS_NO_VRA }, /* MSI KT6 Delta-SR */ 2363 { .subvendor = 0x1462, .subdevice = 0x7023, .action = VIA_DXS_NO_VRA }, /* MSI K8T Neo2-FI */ 2364 { .subvendor = 0x1462, .subdevice = 0x7120, .action = VIA_DXS_ENABLE }, /* MSI KT4V */ 2365 { .subvendor = 0x1462, .subdevice = 0x7142, .action = VIA_DXS_ENABLE }, /* MSI K8MM-V */ 2366 { .subvendor = 0x147b, .subdevice = 0x1401, .action = VIA_DXS_ENABLE }, /* ABIT KD7(-RAID) */ 2367 { .subvendor = 0x147b, .subdevice = 0x1411, .action = VIA_DXS_ENABLE }, /* ABIT VA-20 */ 2368 { .subvendor = 0x147b, .subdevice = 0x1413, .action = VIA_DXS_ENABLE }, /* ABIT KV8 Pro */ 2369 { .subvendor = 0x147b, .subdevice = 0x1415, .action = VIA_DXS_NO_VRA }, /* Abit AV8 */ 2370 { .subvendor = 0x14ff, .subdevice = 0x0403, .action = VIA_DXS_ENABLE }, /* Twinhead mobo */ 2371 { .subvendor = 0x14ff, .subdevice = 0x0408, .action = VIA_DXS_SRC }, /* Twinhead laptop */ 2372 { .subvendor = 0x1558, .subdevice = 0x4701, .action = VIA_DXS_SRC }, /* Clevo D470 */ 2373 { .subvendor = 0x1584, .subdevice = 0x8120, .action = VIA_DXS_ENABLE }, /* Gericom/Targa/Vobis/Uniwill laptop */ 2374 { .subvendor = 0x1584, .subdevice = 0x8123, .action = VIA_DXS_NO_VRA }, /* Uniwill (Targa Visionary XP-210) */ 2375 { .subvendor = 0x161f, .subdevice = 0x202b, .action = VIA_DXS_NO_VRA }, /* Amira Note book */ 2376 { .subvendor = 0x161f, .subdevice = 0x2032, .action = VIA_DXS_48K }, /* m680x machines */ 2377 { .subvendor = 0x1631, .subdevice = 0xe004, .action = VIA_DXS_ENABLE }, /* Easy Note 3174, Packard Bell */ 2378 { .subvendor = 0x1695, .subdevice = 0x3005, .action = VIA_DXS_ENABLE }, /* EPoX EP-8K9A */ 2379 { .subvendor = 0x16f3, .subdevice = 0x6405, .action = VIA_DXS_SRC }, /* Jetway K8M8MS */ 2380 { .subvendor = 0x1849, .subdevice = 0x3059, .action = VIA_DXS_NO_VRA }, /* ASRock K7VM2 */ 2381 { .subvendor = 0x1849, .subdevice = 0x9761, .action = VIA_DXS_SRC }, /* ASRock mobo(?) */ 2382 { .subvendor = 0x1919, .subdevice = 0x200a, .action = VIA_DXS_NO_VRA }, /* Soltek SL-K8Tpro-939 */ 2383 { .subvendor = 0x4005, .subdevice = 0x4710, .action = VIA_DXS_SRC }, /* MSI K7T266 Pro2 (MS-6380 V2.0) BIOS 3.7 */ 2384 {0} /* terminator */ 2385 }; 2386 struct dxs_whitelist *w; 2387 unsigned short subsystem_vendor; 2388 unsigned short subsystem_device; 2389 2390 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor); 2391 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device); 2392 2393 for (w = whitelist; w->subvendor; w++) { 2394 if (w->subvendor != subsystem_vendor) 2395 continue; 2396 if (w->mask) { 2397 if ((w->mask & subsystem_device) == w->subdevice) 2398 return w->action; 2399 } else { 2400 if (subsystem_device == w->subdevice) 2401 return w->action; 2402 } 2403 } 2404 2405 /* 2406 * not detected, try 48k rate only to be sure. 2407 */ 2408 printk(KERN_INFO "via82xx: Assuming DXS channels with 48k fixed sample rate.\n"); 2409 printk(KERN_INFO " Please try dxs_support=5 option\n"); 2410 printk(KERN_INFO " and report if it works on your machine.\n"); 2411 printk(KERN_INFO " For more details, read ALSA-Configuration.txt.\n"); 2412 return VIA_DXS_48K; 2413 }; 2414 2415 static int __devinit snd_via82xx_probe(struct pci_dev *pci, 2416 const struct pci_device_id *pci_id) 2417 { 2418 struct snd_card *card; 2419 struct via82xx *chip; 2420 unsigned char revision; 2421 int chip_type = 0, card_type; 2422 unsigned int i; 2423 int err; 2424 2425 card = snd_card_new(index, id, THIS_MODULE, 0); 2426 if (card == NULL) 2427 return -ENOMEM; 2428 2429 card_type = pci_id->driver_data; 2430 pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 2431 switch (card_type) { 2432 case TYPE_CARD_VIA686: 2433 strcpy(card->driver, "VIA686A"); 2434 sprintf(card->shortname, "VIA 82C686A/B rev%x", revision); 2435 chip_type = TYPE_VIA686; 2436 break; 2437 case TYPE_CARD_VIA8233: 2438 chip_type = TYPE_VIA8233; 2439 sprintf(card->shortname, "VIA 823x rev%x", revision); 2440 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) { 2441 if (revision == via823x_cards[i].revision) { 2442 chip_type = via823x_cards[i].type; 2443 strcpy(card->shortname, via823x_cards[i].name); 2444 break; 2445 } 2446 } 2447 if (chip_type != TYPE_VIA8233A) { 2448 if (dxs_support == VIA_DXS_AUTO) 2449 dxs_support = check_dxs_list(pci); 2450 /* force to use VIA8233 or 8233A model according to 2451 * dxs_support module option 2452 */ 2453 if (dxs_support == VIA_DXS_DISABLE) 2454 chip_type = TYPE_VIA8233A; 2455 else 2456 chip_type = TYPE_VIA8233; 2457 } 2458 if (chip_type == TYPE_VIA8233A) 2459 strcpy(card->driver, "VIA8233A"); 2460 else if (revision >= VIA_REV_8237) 2461 strcpy(card->driver, "VIA8237"); /* no slog assignment */ 2462 else 2463 strcpy(card->driver, "VIA8233"); 2464 break; 2465 default: 2466 snd_printk(KERN_ERR "invalid card type %d\n", card_type); 2467 err = -EINVAL; 2468 goto __error; 2469 } 2470 2471 if ((err = snd_via82xx_create(card, pci, chip_type, revision, 2472 ac97_clock, &chip)) < 0) 2473 goto __error; 2474 card->private_data = chip; 2475 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0) 2476 goto __error; 2477 2478 if (chip_type == TYPE_VIA686) { 2479 if ((err = snd_via686_pcm_new(chip)) < 0 || 2480 (err = snd_via686_init_misc(chip)) < 0) 2481 goto __error; 2482 } else { 2483 if (chip_type == TYPE_VIA8233A) { 2484 if ((err = snd_via8233a_pcm_new(chip)) < 0) 2485 goto __error; 2486 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */ 2487 } else { 2488 if ((err = snd_via8233_pcm_new(chip)) < 0) 2489 goto __error; 2490 if (dxs_support == VIA_DXS_48K) 2491 chip->dxs_fixed = 1; 2492 else if (dxs_support == VIA_DXS_NO_VRA) 2493 chip->no_vra = 1; 2494 else if (dxs_support == VIA_DXS_SRC) { 2495 chip->no_vra = 1; 2496 chip->dxs_src = 1; 2497 } 2498 } 2499 if ((err = snd_via8233_init_misc(chip)) < 0) 2500 goto __error; 2501 } 2502 2503 /* disable interrupts */ 2504 for (i = 0; i < chip->num_devs; i++) 2505 snd_via82xx_channel_reset(chip, &chip->devs[i]); 2506 2507 sprintf(card->longname, 2508 "%s with %s at %#lx, irq %d", card->shortname, 2509 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq); 2510 2511 snd_via82xx_proc_init(chip); 2512 2513 if ((err = snd_card_register(card)) < 0) { 2514 snd_card_free(card); 2515 return err; 2516 } 2517 pci_set_drvdata(pci, card); 2518 return 0; 2519 2520 __error: 2521 snd_card_free(card); 2522 return err; 2523 } 2524 2525 static void __devexit snd_via82xx_remove(struct pci_dev *pci) 2526 { 2527 snd_card_free(pci_get_drvdata(pci)); 2528 pci_set_drvdata(pci, NULL); 2529 } 2530 2531 static struct pci_driver driver = { 2532 .name = "VIA 82xx Audio", 2533 .id_table = snd_via82xx_ids, 2534 .probe = snd_via82xx_probe, 2535 .remove = __devexit_p(snd_via82xx_remove), 2536 #ifdef CONFIG_PM 2537 .suspend = snd_via82xx_suspend, 2538 .resume = snd_via82xx_resume, 1901 2539 #endif 1902 1903 return 0;1904 }1905 1906 1907 /*1908 * proc interface1909 */1910 static void snd_via82xx_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)1911 {1912 via82xx_t *chip = entry->private_data;1913 int i;1914 1915 snd_iprintf(buffer, "%s\n\n", chip->card->longname);1916 for (i = 0; i < 0xa0; i += 4) {1917 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));1918 }1919 }1920 1921 static void __devinit snd_via82xx_proc_init(via82xx_t *chip)1922 {1923 snd_info_entry_t *entry;1924 1925 if (! snd_card_proc_new(chip->card, "via82xx", &entry))1926 snd_info_set_text_ops(entry, chip, 1024, snd_via82xx_proc_read);1927 }1928 1929 /*1930 *1931 */1932 1933 static int __devinit snd_via82xx_chip_init(via82xx_t *chip)1934 {1935 unsigned int val;1936 unsigned long end_time;1937 unsigned char pval;1938 1939 #if 0 /* broken on K7M? */1940 if (chip->chip_type == TYPE_VIA686)1941 /* disable all legacy ports */1942 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);1943 #endif1944 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);1945 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */1946 /* deassert ACLink reset, force SYNC */1947 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,1948 VIA_ACLINK_CTRL_ENABLE |1949 VIA_ACLINK_CTRL_RESET |1950 VIA_ACLINK_CTRL_SYNC);1951 udelay(100);1952 #if 1 /* FIXME: should we do full reset here for all chip models? */1953 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);1954 udelay(100);1955 #else1956 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */1957 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,1958 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);1959 udelay(2);1960 #endif1961 /* ACLink on, deassert ACLink reset, VSR, SGD data out */1962 /* note - FM data out has trouble with non VRA codecs !! */1963 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);1964 udelay(100);1965 }1966 1967 /* Make sure VRA is enabled, in case we didn't do a1968 * complete codec reset, above */1969 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);1970 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {1971 /* ACLink on, deassert ACLink reset, VSR, SGD data out */1972 /* note - FM data out has trouble with non VRA codecs !! */1973 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);1974 udelay(100);1975 }1976 1977 /* wait until codec ready */1978 end_time = jiffies + msecs_to_jiffies(750);1979 do {1980 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);1981 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */1982 break;1983 set_current_state(TASK_UNINTERRUPTIBLE);1984 schedule_timeout(1);1985 } while (time_before(jiffies, end_time));1986 1987 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)1988 snd_printk("AC'97 codec is not ready [0x%x]\n", val);1989 1990 #if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */1991 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |1992 VIA_REG_AC97_SECONDARY_VALID |1993 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));1994 end_time = jiffies + msecs_to_jiffies(750);1995 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |1996 VIA_REG_AC97_SECONDARY_VALID |1997 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));1998 do {1999 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {2000 chip->ac97_secondary = 1;2001 goto __ac97_ok2;2002 }2003 set_current_state(TASK_INTERRUPTIBLE);2004 schedule_timeout(1);2005 } while (time_before(jiffies, end_time));2006 /* This is ok, the most of motherboards have only one codec */2007 2008 __ac97_ok2:2009 #endif2010 2011 if (chip->chip_type == TYPE_VIA686) {2012 /* route FM trap to IRQ, disable FM trap */2013 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);2014 /* disable all GPI interrupts */2015 outl(0, VIAREG(chip, GPI_INTR));2016 }2017 2018 if (chip->chip_type != TYPE_VIA686) {2019 /* Workaround for Award BIOS bug:2020 * DXS channels don't work properly with VRA if MC97 is disabled.2021 */2022 struct pci_dev *pci;2023 pci = pci_find_device(0x1106, 0x3068, NULL); /* MC97 */2024 if (pci) {2025 unsigned char data;2026 pci_read_config_byte(pci, 0x44, &data);2027 pci_write_config_byte(pci, 0x44, data | 0x40);2028 }2029 }2030 2031 if (chip->chip_type != TYPE_VIA8233A) {2032 int i, idx;2033 for (idx = 0; idx < 4; idx++) {2034 unsigned long port = chip->port + 0x10 * idx;2035 for (i = 0; i < 2; i++)2036 outb(chip->playback_volume[i], port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);2037 }2038 }2039 2040 return 0;2041 }2042 2043 #ifdef CONFIG_PM2044 /*2045 * power management2046 */2047 static int snd_via82xx_suspend(snd_card_t *card, unsigned int state)2048 {2049 via82xx_t *chip = card->pm_private_data;2050 int i;2051 2052 for (i = 0; i < 2; i++)2053 if (chip->pcms[i])2054 snd_pcm_suspend_all(chip->pcms[i]);2055 for (i = 0; i < chip->num_devs; i++)2056 snd_via82xx_channel_reset(chip, &chip->devs[i]);2057 synchronize_irq(chip->irq);2058 snd_ac97_suspend(chip->ac97);2059 2060 /* save misc values */2061 if (chip->chip_type != TYPE_VIA686) {2062 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);2063 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);2064 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);2065 }2066 2067 pci_set_power_state(chip->pci, 3);2068 pci_disable_device(chip->pci);2069 return 0;2070 }2071 2072 static int snd_via82xx_resume(snd_card_t *card, unsigned int state)2073 {2074 via82xx_t *chip = card->pm_private_data;2075 int i;2076 2077 pci_enable_device(chip->pci);2078 pci_set_power_state(chip->pci, 0);2079 2080 snd_via82xx_chip_init(chip);2081 2082 if (chip->chip_type == TYPE_VIA686) {2083 if (chip->mpu_port_saved)2084 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);2085 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);2086 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);2087 } else {2088 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);2089 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);2090 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);2091 }2092 2093 snd_ac97_resume(chip->ac97);2094 2095 for (i = 0; i < chip->num_devs; i++)2096 snd_via82xx_channel_reset(chip, &chip->devs[i]);2097 2098 return 0;2099 }2100 #endif /* CONFIG_PM */2101 2102 static int snd_via82xx_free(via82xx_t *chip)2103 {2104 unsigned int i;2105 2106 if (chip->irq < 0)2107 goto __end_hw;2108 /* disable interrupts */2109 for (i = 0; i < chip->num_devs; i++)2110 snd_via82xx_channel_reset(chip, &chip->devs[i]);2111 synchronize_irq(chip->irq);2112 __end_hw:2113 if (chip->irq >= 0)2114 free_irq(chip->irq, (void *)chip);2115 if (chip->mpu_res) {2116 release_resource(chip->mpu_res);2117 kfree_nocheck(chip->mpu_res);2118 }2119 pci_release_regions(chip->pci);2120 if (chip->chip_type == TYPE_VIA686) {2121 #ifdef SUPPORT_JOYSTICK2122 if (chip->res_joystick) {2123 gameport_unregister_port(&chip->gameport);2124 release_resource(chip->res_joystick);2125 kfree_nocheck(chip->res_joystick);2126 }2127 #endif2128 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);2129 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);2130 }2131 2132 kfree(chip);2133 return 0;2134 }2135 2136 static int snd_via82xx_dev_free(snd_device_t *device)2137 {2138 via82xx_t *chip = device->device_data;2139 return snd_via82xx_free(chip);2140 }2141 2142 static int __devinit snd_via82xx_create(snd_card_t * card,2143 struct pci_dev *pci,2144 int chip_type,2145 int revision,2146 unsigned int ac97_clock,2147 via82xx_t ** r_via)2148 {2149 via82xx_t *chip;2150 int err;2151 static snd_device_ops_t ops = {2152 snd_via82xx_dev_free,0,0,02153 };2154 2155 if ((err = pci_enable_device(pci)) < 0)2156 return err;2157 2158 if ((chip = (via82xx_t *)kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL)2159 return -ENOMEM;2160 2161 chip->chip_type = chip_type;2162 chip->revision = revision;2163 2164 spin_lock_init(&chip->reg_lock);2165 spin_lock_init(&chip->rates[0].lock);2166 spin_lock_init(&chip->rates[1].lock);2167 chip->card = card;2168 chip->pci = pci;2169 chip->irq = -1;2170 2171 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);2172 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);2173 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,2174 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));2175 2176 if ((err = pci_request_regions(pci, card->driver)) < 0) {2177 kfree(chip);2178 return err;2179 }2180 chip->port = pci_resource_start(pci, 0);2181 if (request_irq(pci->irq,2182 chip_type == TYPE_VIA8233 ?2183 snd_via8233_interrupt : snd_via686_interrupt,2184 SA_INTERRUPT|SA_SHIRQ,2185 card->driver, (void *)chip)) {2186 snd_printk("unable to grab IRQ %d\n", pci->irq);2187 snd_via82xx_free(chip);2188 return -EBUSY;2189 }2190 chip->irq = pci->irq;2191 if (ac97_clock >= 8000 && ac97_clock <= 48000)2192 chip->ac97_clock = ac97_clock;2193 synchronize_irq(chip->irq);2194 2195 if ((err = snd_via82xx_chip_init(chip)) < 0) {2196 snd_via82xx_free(chip);2197 return err;2198 }2199 2200 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {2201 snd_via82xx_free(chip);2202 return err;2203 }2204 2205 /* The 8233 ac97 controller does not implement the master bit2206 * in the pci command register. IMHO this is a violation of the PCI spec.2207 * We call pci_set_master here because it does not hurt. */2208 pci_set_master(pci);2209 2210 *r_via = chip;2211 return 0;2212 }2213 2214 typedef struct via823x_info {2215 int revision;2216 char *name;2217 int type;2218 2540 }; 2219 2541 2220 static struct via823x_info via823x_cards[] __devinitdata = {2221 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },2222 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },2223 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },2224 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },2225 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },2226 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },2227 };2228 2229 /*2230 * auto detection of DXS channel supports.2231 */2232 struct dxs_whitelist {2233 unsigned short subvendor;2234 unsigned short subdevice;2235 unsigned short mask;2236 short action; /* new dxs_support value */2237 };2238 2239 static int __devinit check_dxs_list(struct pci_dev *pci)2240 {2241 2242 static struct dxs_whitelist whitelist[] = {2243 { 0x1005, 0x4710, 0, VIA_DXS_ENABLE }, /* Avance Logic Mobo */2244 { 0x1019, 0x0996, 0, VIA_DXS_48K },2245 { 0x1019, 0x0a81, 0, VIA_DXS_NO_VRA }, /* ECS K7VTA3 v8.0 */2246 { 0x1019, 0x0a85, 0, VIA_DXS_NO_VRA }, /* ECS L7VMM2 */2247 { .subvendor = 0x1019, .subdevice = 0xa101, .action = VIA_DXS_SRC },2248 { 0x1025, 0x0033, 0, VIA_DXS_NO_VRA }, /* Acer Inspire 1353LM */2249 { .subvendor = 0x1025, .subdevice = 0x0046, .action = VIA_DXS_SRC }, /* Acer Aspire 1524 WLMi */2250 { 0x1043, 0x8095, 0, VIA_DXS_NO_VRA }, /* ASUS A7V8X (FIXME: possibly VIA_DXS_ENABLE?)*/2251 { 0x1043, 0x80a1, 0, VIA_DXS_NO_VRA }, /* ASUS A7V8-X */2252 { 0x1043, 0x80b0, 0, VIA_DXS_ENABLE }, /* ASUS A7V600 */2253 { 0x1043, 0x812a, 0, VIA_DXS_SRC }, /* ASUS A8V Deluxe */2254 { 0x1071, 0x8375, 0, VIA_DXS_NO_VRA }, /* Vobis/Yakumo/Mitac notebook */2255 { 0x1071, 0x8399, 0, VIA_DXS_NO_VRA }, /* Umax AB 595T (VIA K8N800A - VT8237) */2256 { 0x10cf, 0x118e, 0, VIA_DXS_ENABLE }, /* FSC laptop */2257 { 0x1106, 0x4161, 0, VIA_DXS_NO_VRA }, /* ASRock K7VT2 */2258 { 0x1106, 0x4552, 0, VIA_DXS_NO_VRA }, /* QDI Kudoz 7X/600-6AL */2259 { 0x1106, 0xaa01, 0, VIA_DXS_NO_VRA }, /* EPIA MII */2260 { 0x1106, 0xc001, 0, VIA_DXS_SRC }, /* Insight P4-ITX */2261 { 0x1297, 0xa232, 0, VIA_DXS_ENABLE }, /* Shuttle ?? */2262 { 0x1297, 0xc160, 0, VIA_DXS_ENABLE }, /* Shuttle SK41G */2263 { 0x1458, 0xa002, 0, VIA_DXS_ENABLE }, /* Gigabyte GA-7VAXP */2264 { 0x1462, 0x0080, 0, VIA_DXS_SRC }, /* MSI K8T Neo-FIS2R */2265 { .subvendor = 0x1462, .subdevice = 0x0430, .action = VIA_DXS_SRC }, /* MSI 7142 (K8MM-V) */2266 { 0x1462, 0x3800, 0, VIA_DXS_ENABLE }, /* MSI KT266 */2267 { 0x1462, 0x5901, 0, VIA_DXS_NO_VRA }, /* MSI KT6 Delta-SR */2268 { 0x1462, 0x7023, 0, VIA_DXS_NO_VRA }, /* MSI K8T Neo2-FI */2269 { 0x1462, 0x7120, 0, VIA_DXS_ENABLE }, /* MSI KT4V */2270 { .subvendor = 0x1462, .subdevice = 0x7142, .action = VIA_DXS_ENABLE }, /* MSI K8MM-V */2271 { 0x147b, 0x1401, 0, VIA_DXS_ENABLE }, /* ABIT KD7(-RAID) */2272 { 0x147b, 0x1411, 0, VIA_DXS_ENABLE }, /* ABIT VA-20 */2273 { 0x147b, 0x1413, 0, VIA_DXS_ENABLE }, /* ABIT KV8 Pro */2274 { 0x147b, 0x1415, 0, VIA_DXS_NO_VRA }, /* Abit AV8 */2275 { 0x14ff, 0x0403, 0, VIA_DXS_ENABLE }, /* Twinhead mobo */2276 { .subvendor = 0x14ff, .subdevice = 0x0408, .action = VIA_DXS_SRC }, /* Twinhead laptop */2277 { .subvendor = 0x1558, .subdevice = 0x4701, .action = VIA_DXS_SRC }, /* Clevo D470 */2278 { 0x1584, 0x8120, 0, VIA_DXS_ENABLE }, /* Gericom/Targa/Vobis/Uniwill laptop */2279 { 0x1584, 0x8123, 0, VIA_DXS_NO_VRA }, /* Uniwill (Targa Visionary XP-210) */2280 { 0x1631, 0xe004, 0, VIA_DXS_ENABLE }, /* Easy Note 3174, Packard Bell */2281 { 0x1695, 0x3005, 0, VIA_DXS_ENABLE }, /* EPoX EP-8K9A */2282 { 0x1695, 0x300C, 0, VIA_DXS_48K }, /* LewHoo */2283 { 0x161f, 0x202b, 0, VIA_DXS_NO_VRA }, /* Amira Note book */2284 { 0x161f, 0x2032, 0, VIA_DXS_48K }, /* m680x machines */2285 { 0x1849, 0x3059, 0, VIA_DXS_NO_VRA }, /* ASRock K7VM2 */2286 { 0x1919, 0x200a, 0, VIA_DXS_NO_VRA }, /* Soltek SL-K8Tpro-939 */2287 { 0x4005, 0x4710, 0, VIA_DXS_SRC }, /* MSI K7T266 Pro2 (MS-6380 V2.0) BIOS 3.7 */2288 { 0 } /* terminator */2289 };2290 struct dxs_whitelist *w;2291 unsigned short subsystem_vendor;2292 unsigned short subsystem_device;2293 2294 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);2295 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);2296 2297 for (w = whitelist; w->subvendor; w++) {2298 if (w->subvendor != subsystem_vendor)2299 continue;2300 if (w->mask) {2301 if ((w->mask & subsystem_device) == w->subdevice)2302 return w->action;2303 } else {2304 if (subsystem_device == w->subdevice)2305 return w->action;2306 }2307 }2308 2309 /*2310 * not detected, try 48k rate only to be sure.2311 */2312 printk(KERN_INFO "via82xx: Assuming DXS channels with 48k fixed sample rate.\n");2313 printk(KERN_INFO " Please try dxs_support=1 or dxs_support=4 option\n");2314 printk(KERN_INFO " and report if it works on your machine.\n");2315 return VIA_DXS_48K;2316 };2317 2318 static int __devinit snd_via82xx_probe(struct pci_dev *pci,2319 const struct pci_device_id *pci_id)2320 {2321 static int dev;2322 snd_card_t *card;2323 via82xx_t *chip;2324 unsigned char revision;2325 int chip_type = 0, card_type;2326 unsigned int i;2327 int err;2328 u16 val;2329 2330 if (dev >= SNDRV_CARDS)2331 return -ENODEV;2332 if (!enable[dev]) {2333 dev++;2334 return -ENOENT;2335 }2336 2337 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);2338 if (card == NULL)2339 return -ENOMEM;2340 2341 card_type = pci_id->driver_data;2342 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);2343 switch (card_type) {2344 case TYPE_CARD_VIA686:2345 strcpy(card->driver, "VIA686A");2346 sprintf(card->shortname, "VIA 82C686A/B rev%x", revision);2347 chip_type = TYPE_VIA686;2348 break;2349 case TYPE_CARD_VIA8233:2350 chip_type = TYPE_VIA8233;2351 sprintf(card->shortname, "VIA 823x rev%x", revision);2352 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {2353 if (revision == via823x_cards[i].revision) {2354 chip_type = via823x_cards[i].type;2355 strcpy(card->shortname, via823x_cards[i].name);2356 break;2357 }2358 }2359 if (chip_type != TYPE_VIA8233A) {2360 if (dxs_support[dev] == VIA_DXS_AUTO)2361 dxs_support[dev] = check_dxs_list(pci);2362 /* force to use VIA8233 or 8233A model according to2363 * dxs_support module option2364 */2365 if (dxs_support[dev] == VIA_DXS_DISABLE)2366 chip_type = TYPE_VIA8233A;2367 else2368 chip_type = TYPE_VIA8233;2369 }2370 if (chip_type == TYPE_VIA8233A)2371 strcpy(card->driver, "VIA8233A");2372 else if (revision >= VIA_REV_8237)2373 strcpy(card->driver, "VIA8237"); /* no slog assignment */2374 else2375 strcpy(card->driver, "VIA8233");2376 2377 break;2378 default:2379 snd_printk(KERN_ERR "invalid card type %d\n", card_type);2380 err = -EINVAL;2381 goto __error;2382 }2383 2384 if ((err = snd_via82xx_create(card, pci, chip_type, revision, ac97_clock[dev], &chip)) < 0)2385 goto __error;2386 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk[dev])) < 0)2387 goto __error;2388 2389 if (chip_type == TYPE_VIA686) {2390 if ((err = snd_via686_pcm_new(chip)) < 0 ||2391 (err = snd_via686_init_misc(chip, dev)) < 0)2392 goto __error;2393 } else {2394 if (chip_type == TYPE_VIA8233A) {2395 if ((err = snd_via8233a_pcm_new(chip)) < 0)2396 goto __error;2397 // chip->dxs_fixed = 1; /* use 48k for DXS #3 */2398 } else {2399 if ((err = snd_via8233_pcm_new(chip)) < 0)2400 goto __error;2401 if (dxs_support[dev] == VIA_DXS_48K)2402 chip->dxs_fixed = 1;2403 else if (dxs_support[dev] == VIA_DXS_NO_VRA)2404 chip->no_vra = 1;2405 else if (dxs_support[dev] == VIA_DXS_SRC) {2406 chip->no_vra = 1;2407 chip->dxs_src = 1;2408 }2409 }2410 if ((err = snd_via8233_init_misc(chip, dev)) < 0)2411 goto __error;2412 }2413 2414 snd_card_set_pm_callback(card, snd_via82xx_suspend, snd_via82xx_resume, chip);2415 2416 /* disable interrupts */2417 for (i = 0; i < chip->num_devs; i++)2418 snd_via82xx_channel_reset(chip, &chip->devs[i]);2419 2420 sprintf(card->longname, "%s at 0x%lx, irq %d",2421 card->shortname, chip->port, chip->irq);2422 2423 snd_via82xx_proc_init(chip);2424 2425 if ((err = snd_card_register(card)) < 0) {2426 snd_card_free(card);2427 return err;2428 }2429 pci_set_drvdata(pci, card);2430 dev++;2431 return 0;2432 2433 __error:2434 snd_card_free(card);2435 return err;2436 }2437 2438 static void __devexit snd_via82xx_remove(struct pci_dev *pci)2439 {2440 snd_card_free(pci_get_drvdata(pci));2441 pci_set_drvdata(pci, NULL);2442 }2443 2444 static struct pci_driver driver = {2445 0,0,0,"VIA 82xx Audio",2446 snd_via82xx_ids,2447 snd_via82xx_probe,2448 snd_via82xx_remove,2449 SND_PCI_PM_CALLBACKS2450 };2451 2452 2542 static int __init alsa_card_via82xx_init(void) 2453 2543 { 2454 int err; 2455 2456 #ifdef TARGET_OS2 2457 if (midi_port > 0) mpu_port[0] = midi_port; 2458 #endif 2459 if ((err = pci_module_init(&driver)) < 0) { 2460 #ifdef MODULE 2461 // printk(KERN_ERR "VIA 82xx soundcard not found or device busy\n"); 2462 #endif 2463 return err; 2464 } 2465 return 0; 2544 return pci_register_driver(&driver); 2466 2545 } 2467 2546 2468 2547 static void __exit alsa_card_via82xx_exit(void) 2469 2548 { 2470 2549 pci_unregister_driver(&driver); 2471 2550 } 2472 2551 2473 2552 module_init(alsa_card_via82xx_init) 2474 2553 module_exit(alsa_card_via82xx_exit) 2475 2476 #ifndef MODULE2477 2478 /* format is: snd-via82xx=enable,index,id,2479 mpu_port,joystick,ac97_clock,dxs_support */2480 2481 static int __init alsa_card_via82xx_setup(char *str)2482 {2483 static unsigned __initdata nr_dev = 0;2484 2485 if (nr_dev >= SNDRV_CARDS)2486 return 0;2487 (void)(get_option(&str,&enable[nr_dev]) == 2 &&2488 get_option(&str,&index[nr_dev]) == 2 &&2489 get_id(&str,&id[nr_dev]) == 2 &&2490 get_option_long(&str,&mpu_port[nr_dev]) == 2 &&2491 #ifdef SUPPORT_JOYSTICK2492 get_option(&str,&joystick[nr_dev]) == 2 &&2493 #endif2494 get_option(&str,&ac97_quirk[nr_dev]) == 2 &&2495 get_option(&str,&ac97_clock[nr_dev]) == 2 &&2496 get_option(&str,&dxs_support[nr_dev]) == 2);2497 nr_dev++;2498 return 1;2499 }2500 2501 __setup("snd-via82xx=", alsa_card_via82xx_setup);2502 2503 #endif /* ifndef MODULE */
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