Ignore:
Timestamp:
Mar 18, 2021, 8:57:36 PM (4 years ago)
Author:
David Azarewicz
Message:

Merge changes from Paul's uniaud32next branch.

Location:
GPL/trunk
Files:
1 deleted
54 edited
42 copied

Legend:

Unmodified
Added
Removed

  • GPL/trunk

  • GPL/trunk/include/linux/bitops.h

    r441 r679  
    22#define _I386_BITOPS_H
    33
     4#include <linux/types.h>
     5#include <asm/bitops.h>
     6
    47/*
    58 * Copyright 1992, Linus Torvalds.
    69 */
     10
    711
    812/*
    … …  
    1923#include <asm\bitops.h>
    2024#define smp_mb__after_clear_bit()       
     25unsigned int hweight32(unsigned int w);
     26/**
     27 * find_first_bit - find the first set bit in a memory region
     28 * @addr: The address to start the search at
     29 * @size: The maximum number of bits to search
     30 *
     31 * Returns the bit number of the first set bit.
     32 * If no bits are set, returns @size.
     33 */
     34extern unsigned long find_first_bit(const unsigned long *addr,
     35                                    unsigned long size);
     36
     37
     38/**
     39 * __ffs - find first bit in word.
     40 * @word: The word to search
     41 *
     42 * Undefined if no bit exists, so code should check against 0 first.
     43 */
     44static inline unsigned long __ffs(unsigned long word)
     45{
     46        int num = 0;
     47
     48#if BITS_PER_LONG == 64
     49        if ((word & 0xffffffff) == 0) {
     50                num += 32;
     51                word >>= 32;
     52        }
     53#endif
     54        if ((word & 0xffff) == 0) {
     55                num += 16;
     56                word >>= 16;
     57        }
     58        if ((word & 0xff) == 0) {
     59                num += 8;
     60                word >>= 8;
     61        }
     62        if ((word & 0xf) == 0) {
     63                num += 4;
     64                word >>= 4;
     65        }
     66        if ((word & 0x3) == 0) {
     67                num += 2;
     68                word >>= 2;
     69        }
     70        if ((word & 0x1) == 0)
     71                num += 1;
     72        return num;
     73}
     74
     75/**
     76 * __fls - find last (most-significant) set bit in a long word
     77 * @word: the word to search
     78 *
     79 * Undefined if no set bit exists, so code should check against 0 first.
     80 */
     81static inline unsigned long __fls(unsigned long word)
     82{
     83        int num = BITS_PER_LONG - 1;
     84
     85#if BITS_PER_LONG == 64
     86        if (!(word & (~0ul << 32))) {
     87                num -= 32;
     88                word <<= 32;
     89        }
     90#endif
     91        if (!(word & (~0ul << (BITS_PER_LONG-16)))) {
     92                num -= 16;
     93                word <<= 16;
     94        }
     95        if (!(word & (~0ul << (BITS_PER_LONG-8)))) {
     96                num -= 8;
     97                word <<= 8;
     98        }
     99        if (!(word & (~0ul << (BITS_PER_LONG-4)))) {
     100                num -= 4;
     101                word <<= 4;
     102        }
     103        if (!(word & (~0ul << (BITS_PER_LONG-2)))) {
     104                num -= 2;
     105                word <<= 2;
     106        }
     107        if (!(word & (~0ul << (BITS_PER_LONG-1))))
     108                num -= 1;
     109        return num;
     110}
     111
     112/* same as for_each_set_bit() but use bit as value to start with */
     113#define for_each_set_bit_from(bit, addr, size) \
     114        for ((bit) = find_next_bit((addr), (size), (bit));      \
     115             (bit) < (size);                                    \
     116             (bit) = find_next_bit((addr), (size), (bit) + 1))
     117
     118/**
     119 * fls - find last (most-significant) bit set
     120 * @x: the word to search
     121 *
     122 * This is defined the same way as ffs.
     123 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
     124 */
     125
     126static inline int fls(int x)
     127{
     128        int r = 32;
     129
     130        if (!x)
     131                return 0;
     132        if (!(x & 0xffff0000u)) {
     133                x <<= 16;
     134                r -= 16;
     135        }
     136        if (!(x & 0xff000000u)) {
     137                x <<= 8;
     138                r -= 8;
     139        }
     140        if (!(x & 0xf0000000u)) {
     141                x <<= 4;
     142                r -= 4;
     143        }
     144        if (!(x & 0xc0000000u)) {
     145                x <<= 2;
     146                r -= 2;
     147        }
     148        if (!(x & 0x80000000u)) {
     149                x <<= 1;
     150                r -= 1;
     151        }
     152        return r;
     153}
     154
     155#define BIT(nr)                 (1UL << (nr))
     156#define BIT_MASK(nr)            (1UL << ((nr) % BITS_PER_LONG))
     157#define BIT_WORD(nr)            ((nr) / BITS_PER_LONG)
     158#define BITS_PER_BYTE           8
     159#define BITS_TO_LONGS(nr)       DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
     160
     161/*
     162 * Create a contiguous bitmask starting at bit position @l and ending at
     163 * position @h. For example
     164 * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000.
     165 */
     166#define GENMASK(h, l) \
     167        (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
     168
     169#define GENMASK_ULL(h, l) \
     170        (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
     171
     172#define for_each_set_bit(bit, addr, size) \
     173        for ((bit) = find_first_bit((addr), (size)); \
     174             (bit) < (size); \
     175             (bit) = find_next_bit((addr), (size), (bit) + 1))
     176
     177static inline int get_bitmask_order(unsigned int count)
     178{
     179        int order;
     180
     181        order = fls(count);
     182        return order;   /* We could be slightly more clever with -1 here... */
     183}
     184
     185static inline int get_count_order(unsigned int count)
     186{
     187        int order;
     188
     189        order = fls(count) - 1;
     190        if (count & (count - 1))
     191                order++;
     192        return order;
     193}
     194
     195static inline unsigned fls_long(unsigned long l)
     196{
     197                return fls(l);
     198}
     199
    21200#endif /* _I386_BITOPS_H */

  • GPL/trunk/include/linux/byteorder/generic.h

    r32 r679  
    7878 *
    7979 */
    80 
    8180
    8281#if defined(__KERNEL__)

  • GPL/trunk/include/linux/compat.h

    r358 r679  
    11#ifndef __LINUX_COMPAT_H
    22#define __LINUX_COMPAT_H
     3#include <asm/siginfo.h>
    34#endif /* __LINUX_COMPAT_H */

  • GPL/trunk/include/linux/compiler.h

    r441 r679  
    114114#define noinline
    115115#endif
     116#define WARN(condition, format,...) { }
     117
     118#define __must_check
     119#define __maybe_unused
     120#define __acquires(x)
     121#define __releases(x)
     122#define BUG() do {} while (1)
     123#define READ_ONCE(x) x
     124#define WRITE_ONCE(x, val) x=(val)
     125#define __force
     126#define __always_unused
     127#define fallthrough                    do {} while (0)  /* fallthrough */
     128#define __builtin_return_address(a)     0
     129#define __builtin_expect(x, expected_value) (x)
    116130
    117131#endif /* __LINUX_COMPILER_H */

  • GPL/trunk/include/linux/ctype.h

    r121 r679  
    33
    44#include <ctype.h>
    5 
     5_WCRTLINK extern int    tolower(int);
    66#endif /* _LINUX_CTYPE_H */

  • GPL/trunk/include/linux/delay.h

    r32 r679  
    2828void mdelay(unsigned long);
    2929
     30#define usleep_range(_min, _max)        msleep((_max) / 1000)
     31
    3032#endif /* defined(_LINUX_DELAY_H) */

  • GPL/trunk/include/linux/device.h

    r463 r679  
    1 /* $Id: pm.h,v 1.1.1.1 2003/07/02 13:57:00 eleph Exp $ */
    2 
    31#ifndef _LINUX_DEVICE_H
    42#define _LINUX_DEVICE_H
     3
     4#include <linux/types.h>
     5#include <linux/kobject.h>
    56#include <linux/pm.h>
     7#include <linux/sysfs.h>
     8#include <linux/lockdep.h>
     9#include <linux/overflow.h>
     10
     11struct device;
     12struct device_private;
     13struct device_driver;
     14struct driver_private;
     15struct class;
     16struct subsys_private;
     17struct bus_type;
     18struct device_node;
     19
     20struct bus_attribute {
     21        struct attribute        attr;
     22        ssize_t (*show)(struct bus_type *bus, char *buf);
     23        ssize_t (*store)(struct bus_type *bus, const char *buf, size_t count);
     24};
     25
     26/*
     27 * The type of device, "struct device" is embedded in. A class
     28 * or bus can contain devices of different types
     29 * like "partitions" and "disks", "mouse" and "event".
     30 * This identifies the device type and carries type-specific
     31 * information, equivalent to the kobj_type of a kobject.
     32 * If "name" is specified, the uevent will contain it in
     33 * the DEVTYPE variable.
     34 */
     35struct device_type {
     36        const char *name;
     37        const struct attribute_group **groups;
     38        int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
     39/*      char *(*devnode)(struct device *dev, umode_t *mode,
     40                         kuid_t *uid, kgid_t *gid);*/
     41        void (*release)(struct device *dev);
     42
     43        const struct dev_pm_ops *pm;
     44};
     45
     46typedef struct device {
     47    struct pci_dev *pci;  /* for PCI and PCI-SG types */
     48  struct device   * parent;
     49  struct device_private *p;
     50  struct bus_type * bus;    /* type of bus device is on */
     51  struct kobject kobj;
     52  const char            *init_name; /* initial name of the device */
     53  const struct device_type *type;
    654#if 0
    7 struct device {
    8         void *private_data;
    9         void *platform_data;
    10 
    11         struct device_driver *driver;
    12         struct pm_dev *pm_dev;
    13         char    bus_id[20];
    14 };
     55  char  bus_id[BUS_ID_SIZE];  /* position on parent bus */
    1556#endif
     57  dev_t                 devt;   /* dev_t, creates the sysfs "dev" */
     58  void  (*release)(struct device * dev);
     59    unsigned int flags; /* GFP_XXX for continous and ISA types */
     60  struct semaphore              mutex;  /* mutex to synchronize calls to
     61                                         * its driver.
     62                                         */
     63#ifdef CONFIG_SBUS
     64    struct sbus_dev *sbus;  /* for SBUS type */
     65#endif
     66  void *private_data;
     67  void *platform_data;
     68  struct dev_pm_info    power;
     69  struct list_head      dma_pools;      /* dma pools (if dma'ble) */
     70  struct device_driver *driver;
     71  struct pm_dev *pm_dev;
     72  char  bus_id[20];
     73  struct class          *class;
     74  spinlock_t            devres_lock;
     75  struct list_head      devres_head;
     76  const struct attribute_group **groups;        /* optional groups */
     77        struct dma_map_ops *dma_ops;
     78        u64             *dma_mask;      /* dma mask (if dma'able device) */
     79        u64             coherent_dma_mask; /* Like dma_mask, but for
     80                                             alloc_coherent mappings as
     81                                             not all hardware supports
     82                                             64 bit addresses for consistent
     83                                             allocations such descriptors. */
     84  struct device_node    *of_node; /* associated device tree node */
     85} device;
     86
     87static inline struct device *kobj_to_dev(struct kobject *kobj)
     88{
     89        return container_of(kobj, struct device, kobj);
     90}
     91
     92static inline const char *dev_name(const struct device *dev)
     93{
     94        /* Use the init name until the kobject becomes available */
     95        if (dev->init_name)
     96                return dev->init_name;
     97
     98        return kobject_name(&dev->kobj);
     99}
    16100
    17101struct bus_type {
    18         int not_used;
    19 };
    20 
    21 struct device_driver {
    22         const char *name;
    23         struct bus_type *bus;
    24         struct module *owner;
     102        const char              *name;
     103        const char              *dev_name;
     104        int (*match)(struct device *dev, struct device_driver *drv);
     105        int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
    25106        int (*probe)(struct device *dev);
    26107        int (*remove)(struct device *dev);
    27         void (*shutdown)(struct device *dev);
     108        struct subsys_private *p;
     109        struct lock_class_key lock_key;
     110};
     111
     112struct device_driver {
     113        const char              *name;
     114        struct bus_type         *bus;
     115
     116        struct module           *owner;
     117        const char              *mod_name;      /* used for built-in modules */
     118
     119        bool suppress_bind_attrs;       /* disables bind/unbind via sysfs */
     120
     121        const struct of_device_id       *of_match_table;
     122
     123        int (*probe) (struct device *dev);
     124        int (*remove) (struct device *dev);
     125        void (*shutdown) (struct device *dev);
     126        int (*suspend) (struct device *dev, u32 state);
     127        int (*resume) (struct device *dev);
     128        const struct attribute_group **groups;
     129
     130        const struct dev_pm_ops *pm;
     131
     132        struct driver_private *p;
     133};
     134
     135struct device_attribute {
     136        struct attribute        attr;
     137        ssize_t (*show)(struct device *dev, struct device_attribute *attr,
     138                        char *buf);
     139        ssize_t (*store)(struct device *dev, struct device_attribute *attr,
     140                         const char *buf, size_t count);
     141};
     142
     143extern int __must_check driver_register(struct device_driver *drv);
     144extern void driver_unregister(struct device_driver *drv);
     145extern struct device_driver *driver_find(const char *name,
     146                                         struct bus_type *bus);
     147
     148#define dev_set_drvdata(dev,ptr)        ((dev)->private_data = (ptr))
     149#define dev_get_drvdata(dev)    (dev)->private_data
     150
     151#define MODULE_ALIAS_CHARDEV_MAJOR(x)
     152
     153#define dev_dbg_ratelimited dev_dbg
     154#define dev_emerg dev_dbg
     155#define dev_crit dev_dbg
     156#define dev_alert dev_dbg
     157#define dev_err dev_dbg
     158#define dev_warn dev_dbg
     159#define dev_notice dev_dbg
     160#define dev_info dev_dbg
     161
     162#define dev_err_ratelimited dev_err
     163
     164#define DEVICE_ATTR_RO(_name) \
     165        struct device_attribute dev_attr_##_name = __ATTR_RO(_name)
     166
     167int dev_dbg(const struct device *dev, const char *fmt, ...);
     168
     169
     170
     171/*
     172 * get_device - atomically increment the reference count for the device.
     173 *
     174 */
     175extern struct device *get_device(struct device *dev);
     176extern void put_device(struct device *dev);
     177
     178static inline int device_add(struct device *dev) { return 0; }
     179static inline void device_del(struct device *dev) { }
     180extern void device_initialize(struct device *dev);
     181extern int dev_set_name(struct device *dev, const char *name, ...);
     182
     183
     184static inline int device_is_registered(struct device *dev)
     185{
     186        return dev->kobj.state_in_sysfs;
     187}
     188
     189static inline void device_enable_async_suspend(struct device *dev)
     190{
     191        if (!dev->power.is_prepared)
     192                dev->power.async_suspend = 1;
     193}
     194
     195extern int __must_check bus_register(struct bus_type *bus);
     196
     197static inline void bus_unregister(struct bus_type *bus) {}
     198int bus_for_each_dev(struct bus_type *bus, struct device *start, void *data,
     199                     int (*fn)(struct device *dev, void *data));
     200
     201static inline void device_lock(struct device *dev)
     202{
     203        mutex_lock(&dev->mutex);
     204}
     205
     206static inline void device_unlock(struct device *dev)
     207{
     208        mutex_unlock(&dev->mutex);
     209}
     210
     211extern int  device_attach(struct device *dev);
     212//static inline int device_attach(struct device *dev) {return 0;}
     213extern void devres_add(struct device *dev, void *res);
     214extern int driver_attach(struct device_driver *drv);
     215
     216/* device resource management */
     217typedef void (*dr_release_t)(struct device *dev, void *res);
     218typedef int (*dr_match_t)(struct device *dev, void *res, void *match_data);
     219
     220extern void *devres_alloc_node(dr_release_t release, size_t size, gfp_t gfp,
     221                               int nid);
     222#define NUMA_NO_NODE    (-1)
     223static inline void *devres_alloc(dr_release_t release, size_t size, gfp_t gfp)
     224{
     225        return devres_alloc_node(release, size, gfp, NUMA_NO_NODE);
     226}
     227
     228/**
     229 * struct class - device classes
     230 * @name:       Name of the class.
     231 * @owner:      The module owner.
     232 * @class_attrs: Default attributes of this class.
     233 * @dev_attrs:  Default attributes of the devices belong to the class.
     234 * @dev_bin_attrs: Default binary attributes of the devices belong to the class.
     235 * @dev_kobj:   The kobject that represents this class and links it into the hierarchy.
     236 * @dev_uevent: Called when a device is added, removed from this class, or a
     237 *              few other things that generate uevents to add the environment
     238 *              variables.
     239 * @devnode:    Callback to provide the devtmpfs.
     240 * @class_release: Called to release this class.
     241 * @dev_release: Called to release the device.
     242 * @suspend:    Used to put the device to sleep mode, usually to a low power
     243 *              state.
     244 * @resume:     Used to bring the device from the sleep mode.
     245 * @ns_type:    Callbacks so sysfs can detemine namespaces.
     246 * @namespace:  Namespace of the device belongs to this class.
     247 * @pm:         The default device power management operations of this class.
     248 * @p:          The private data of the driver core, no one other than the
     249 *              driver core can touch this.
     250 *
     251 * A class is a higher-level view of a device that abstracts out low-level
     252 * implementation details. Drivers may see a SCSI disk or an ATA disk, but,
     253 * at the class level, they are all simply disks. Classes allow user space
     254 * to work with devices based on what they do, rather than how they are
     255 * connected or how they work.
     256 */
     257struct class {
     258        const char              *name;
     259        struct module           *owner;
     260
     261        struct class_attribute          *class_attrs;
     262        struct device_attribute         *dev_attrs;
     263        struct bin_attribute            *dev_bin_attrs;
     264        struct kobject                  *dev_kobj;
     265
     266        int (*dev_uevent)(struct device *dev, struct kobj_uevent_env *env);
     267        char *(*devnode)(struct device *dev, mode_t *mode);
     268
     269        void (*class_release)(struct class *class);
     270        void (*dev_release)(struct device *dev);
     271
    28272        int (*suspend)(struct device *dev, pm_message_t state);
    29273        int (*resume)(struct device *dev);
    30         struct list_head list;
    31         struct list_head device_list;
    32 };
    33 
    34 struct device_attribute {
    35         int not_used2;
    36 };
    37 
    38 int snd_compat_driver_register(struct device_driver *driver);
    39 void snd_compat_driver_unregister(struct device_driver *driver);
    40 
    41 #define driver_register         snd_compat_driver_register
    42 #define driver_unregister       snd_compat_driver_unregister
    43 #define dev_set_drvdata(dev,ptr)        ((dev)->private_data = (ptr))
    44 #define dev_get_drvdata(dev)    (dev)->private_data
    45 
    46 #define MODULE_ALIAS_CHARDEV_MAJOR(x)
     274
     275        const struct kobj_ns_type_operations *ns_type;
     276        const void *(*namespace)(struct device *dev);
     277
     278        const struct dev_pm_ops *pm;
     279
     280        struct subsys_private *p;
     281};
     282
     283extern int __must_check device_bind_driver(struct device *dev);
     284int bus_for_each_drv(struct bus_type *bus, struct device_driver *start,
     285                     void *data, int (*fn)(struct device_driver *, void *));
     286extern void devres_free(void *res);
     287extern void *devres_find(struct device *dev, dr_release_t release,
     288                         dr_match_t match, void *match_data);
     289
     290/* debugging and troubleshooting/diagnostic helpers. */
     291extern const char *dev_driver_string(const struct device *dev);
    47292
    48293#endif /* _LINUX_DEVICE_H */

  • GPL/trunk/include/linux/dma-mapping.h

    r441 r679  
    11#ifndef _ASM_LINUX_DMA_MAPPING_H
    22#define _ASM_LINUX_DMA_MAPPING_H
     3#include <linux/pci.h>
     4#include <linux/errno.h>
     5#include <linux/string.h>
     6#include <linux/err.h>
    37
    48/* These definitions mirror those in pci.h, so they can be used
    … …  
    1014        DMA_NONE = 3,
    1115};
     16
     17/*
     18 * A dma_addr_t can hold any valid DMA or bus address for the platform.
     19 * It can be given to a device to use as a DMA source or target.  A CPU cannot
     20 * reference a dma_addr_t directly because there may be translation between
     21 * its physical address space and the bus address space.
     22 */
     23struct dma_map_ops {
     24#if 0
     25        void* (*alloc)(struct device *dev, size_t size,
     26                                dma_addr_t *dma_handle, gfp_t gfp,
     27                                struct dma_attrs *attrs);
     28        void (*free)(struct device *dev, size_t size,
     29                              void *vaddr, dma_addr_t dma_handle,
     30                              struct dma_attrs *attrs);
     31        int (*mmap)(struct device *, struct vm_area_struct *,
     32                          void *, dma_addr_t, size_t, struct dma_attrs *attrs);
     33
     34        int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
     35                           dma_addr_t, size_t, struct dma_attrs *attrs);
     36
     37        dma_addr_t (*map_page)(struct device *dev, struct page *page,
     38                               unsigned long offset, size_t size,
     39                               enum dma_data_direction dir,
     40                               struct dma_attrs *attrs);
     41        void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
     42                           size_t size, enum dma_data_direction dir,
     43                           struct dma_attrs *attrs);
     44        /*
     45         * map_sg returns 0 on error and a value > 0 on success.
     46         * It should never return a value < 0.
     47         */
     48        int (*map_sg)(struct device *dev, struct scatterlist *sg,
     49                      int nents, enum dma_data_direction dir,
     50                      struct dma_attrs *attrs);
     51        void (*unmap_sg)(struct device *dev,
     52                         struct scatterlist *sg, int nents,
     53                         enum dma_data_direction dir,
     54                         struct dma_attrs *attrs);
     55        void (*sync_single_for_cpu)(struct device *dev,
     56                                    dma_addr_t dma_handle, size_t size,
     57                                    enum dma_data_direction dir);
     58        void (*sync_single_for_device)(struct device *dev,
     59                                       dma_addr_t dma_handle, size_t size,
     60                                       enum dma_data_direction dir);
     61        void (*sync_sg_for_cpu)(struct device *dev,
     62                                struct scatterlist *sg, int nents,
     63                                enum dma_data_direction dir);
     64        void (*sync_sg_for_device)(struct device *dev,
     65                                   struct scatterlist *sg, int nents,
     66                                   enum dma_data_direction dir);
     67        int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
     68#endif
     69        int (*dma_supported)(struct device *dev, u64 mask);
     70        int (*set_dma_mask)(struct device *dev, u64 mask);
     71#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
     72        u64 (*get_required_mask)(struct device *dev);
     73#endif
     74        int is_phys;
     75};
     76
     77
     78#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
     79
     80#define DMA_MASK_NONE   0x0ULL
    1281
    1382#define DMA_64BIT_MASK  0xffffffffffffffffULL
    … …  
    3099#endif
    31100#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
     101
     102extern struct dma_map_ops *dma_ops;
     103
     104static inline struct dma_map_ops *get_dma_ops(struct device *dev)
     105{
     106        if (dev->dma_ops)
     107                return dev->dma_ops;
     108        return NULL;
     109}
     110
     111static inline void set_dma_ops(struct device *dev,
     112                               struct dma_map_ops *dma_ops)
     113{
     114        dev->dma_ops = dma_ops;
     115}
     116
     117int dma_supported(struct device *dev, u64 mask);
     118int dma_set_mask(struct device *dev, u64 mask);
     119int dma_set_coherent_mask(struct device *dev, u64 mask);
     120
     121/*
     122 * Set both the DMA mask and the coherent DMA mask to the same thing.
     123 * Note that we don't check the return value from dma_set_coherent_mask()
     124 * as the DMA API guarantees that the coherent DMA mask can be set to
     125 * the same or smaller than the streaming DMA mask.
     126 */
     127static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
     128{
     129        int rc = dma_set_mask(dev, mask);
     130        if (rc == 0)
     131                dma_set_coherent_mask(dev, mask);
     132        return rc;
     133}
     134
     135#if 1
     136#define dma_alloc_coherent(dev,size,addr,flags) pci_alloc_consistent((struct pci_dev *)(dev),size,addr)
     137#else
     138extern void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
    32139#endif
    33 
    34 
     140#define dma_free_coherent(dev,size,ptr,addr) pci_free_consistent((struct pci_dev *)(dev),size,ptr,addr)
     141static inline bool dma_can_mmap(struct device *dev)
     142{
     143        return false;
     144}
     145#define pci_set_consistent_dma_mask(p,x) pci_set_dma_mask(p,x)
     146#endif

  • GPL/trunk/include/linux/err.h

    r305 r679  
    33#ifndef _LINUX_ERR_H
    44#define _LINUX_ERR_H
     5#include <linux/types.h>
     6
    57#define IS_ERR_VALUE(x) ((x) > (unsigned long)-1000L)
    68
    … …  
    2022}
    2123
     24static inline int PTR_RET(const void *ptr)
     25{
     26        if (IS_ERR(ptr))
     27                return PTR_ERR(ptr);
     28        else
     29                return 0;
     30}
     31
     32#define PTR_ERR_OR_ZERO(p) PTR_RET(p)
    2233#endif /* _LINUX_ERR_H */

  • GPL/trunk/include/linux/errno.h

    r32 r679  
    1313#define ERESTARTNOHAND  514     /* restart if no handler.. */
    1414#define ENOIOCTLCMD     515     /* No ioctl command */
     15#define ENOTSUPP        524     /* Operation is not supported */
    1516
    1617#endif
    17 
     18#define ENOENT          2               /* No such file or directory */
     19#define EIO              5      /* I/O error */
     20#define EEXIST          17              /* File exists */
     21#define EINVAL           22
    1822#endif

  • GPL/trunk/include/linux/export.h

    r614 r679  
    22#define _LINUX_EXPORT_H
    33
     4extern int this_module[64];
     5#define THIS_MODULE (void *)&this_module[0]
     6#define EXPORT_SYMBOL(a)
     7#define EXPORT_SYMBOL_GPL(a)
     8
    49#endif /* _LINUX_EXPORT_H */

  • GPL/trunk/include/linux/fcntl.h

    r32 r679  
    55
    66#include <asm/fcntl.h>
     7#include <linux/stat.h>
    78
    89#endif

  • GPL/trunk/include/linux/file.h

    r32 r679  
    55#ifndef __LINUX_FILE_H
    66#define __LINUX_FILE_H
     7
     8#include <linux/types.h>
     9
     10struct fd {
     11        struct file *file;
     12        int need_put;
     13};
    714
    815extern void _fput(struct file *);

  • GPL/trunk/include/linux/firmware.h

    r381 r679  
    33#include <linux/module.h>
    44#include <linux/types.h>
     5#include <linux/errno.h>
     6
    57#define FIRMWARE_NAME_MAX 30
    68struct firmware {
    … …  
    1113int request_firmware(const struct firmware **fw, const char *name,
    1214                     struct device *device);
    13 int request_firmware_nowait(
    14         struct module *module,
    15         const char *name, struct device *device, void *context,
    16         void (*cont)(const struct firmware *fw, void *context));
     15static inline int request_firmware_nowait(
     16        struct module *module, bool uevent,
     17        const char *name, struct device *device, gfp_t gfp, void *context,
     18        void (*cont)(const struct firmware *fw, void *context))
     19{
     20        return -EINVAL;
     21}
    1722
    1823void release_firmware(const struct firmware *fw);

  • GPL/trunk/include/linux/fs.h

    r598 r679  
    1212 */
    1313
     14#include <linux/init.h>
    1415#include <linux/types.h>
    1516#include <linux/fcntl.h>
    … …  
    2021#include <linux/dcache.h>
    2122#include <linux/vmalloc.h>
    22 #include <linux/tqueue.h>
     23#include <linux/pid.h>
     24#include <linux/err.h>
     25#include <linux/workqueue.h>
    2326
    2427#define FALSE   0
    … …  
    4346#define MAY_WRITE 2
    4447#define MAY_READ 4
    45 
    46 #define FMODE_READ 1
    47 #define FMODE_WRITE 2
    4848
    4949#define READ 0
    … …  
    167167         void * f_list;
    168168        struct dentry           *f_dentry;
    169         struct file_operations  *f_op;
     169        const struct file_operations    *f_op;
     170        struct inode            *f_inode;       /* cached value */
     171        spinlock_t              f_lock;
    170172        atomic_t                f_count;
    171173        unsigned int            f_flags;
    … …  
    184186
    185187struct inode {
    186 #ifdef TARGET_OS2
    187         kdev_t                  i_rdev;
    188         struct semaphore        i_sem;
    189         union {
    190                 void            *generic_ip;
    191         } u;
    192 
    193 #else
    194188         void * i_hash;
    195189         void * i_list;
    … …  
    227221                void                            *generic_ip;
    228222        } u;
    229 #endif
    230223};
    231224
    … …  
    237230        int (*read) (struct file *, char *, size_t, loff_t *);
    238231        int (*write) (struct file *, const char *, size_t, loff_t *);
     232        ssize_t (*read_iter) (struct kiocb *, struct iov_iter *);
     233        ssize_t (*write_iter) (struct kiocb *, struct iov_iter *);
    239234        int (*readdir) (struct file *, void *, filldir_t);
    240235        unsigned int (*poll) (struct file *, struct poll_table_struct *);
    241         int (*ioctl) (struct inode *, struct file *, unsigned int, unsigned long);
     236        long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
     237        long (*compat_ioctl) (struct file *, unsigned int, unsigned long);
    242238        int (*mmap) (struct file *, struct vm_area_struct *);
    243239        int (*open) (struct inode *, struct file *);
    … …  
    259255
    260256
    261 extern int register_chrdev(unsigned int, const char *, struct file_operations *);
     257extern int register_chrdev(unsigned int, const char *, const struct file_operations *);
    262258extern int unregister_chrdev(unsigned int, const char *);
    263259
    264260extern int fasync_helper(int, struct file *, int, struct fasync_struct **);
    265 extern void kill_fasync(struct fasync_struct *, int, int);
    266 
    267 #define fops_get(x) (x)
    268 #define fops_put(x) do { ; } while (0)
     261extern void kill_fasync(struct fasync_struct **, int, int);
     262
     263
     264/* Alas, no aliases. Too much hassle with bringing module.h everywhere */
     265#define fops_get(fops) \
     266        (((fops) && try_module_get((fops)->owner) ? (fops) : NULL))
     267#define fops_put(fops) \
     268        do { if (fops) module_put((fops)->owner); } while(0)
     269/*
     270 * This one is to be used *ONLY* from ->open() instances.
     271 * fops must be non-NULL, pinned down *and* module dependencies
     272 * should be sufficient to pin the caller down as well.
     273 */
     274#define replace_fops(f, fops) \
     275        do {    \
     276                struct file *__file = (f); \
     277                fops_put(__file->f_op); \
     278        } while(0)
    269279
    270280#define minor(a) MINOR(a)
    … …  
    276286#define nonseekable_open(i,f) 0
    277287
     288struct kiocb {
     289        struct file             *ki_filp;
     290        loff_t                  ki_pos;
     291        void (*ki_complete)(struct kiocb *iocb, long ret, long ret2);
     292        void                    *private;
     293        int                     ki_flags;
     294};
     295
     296extern int stream_open(struct inode * inode, struct file * filp);
     297
     298/*
     299 * flags in file.f_mode.  Note that FMODE_READ and FMODE_WRITE must correspond
     300 * to O_WRONLY and O_RDWR via the strange trick in do_dentry_open()
     301 */
     302
     303/* file is open for reading */
     304#define FMODE_READ              (( fmode_t)0x1)
     305/* file is open for writing */
     306#define FMODE_WRITE             (( fmode_t)0x2)
     307/* file is seekable */
     308#define FMODE_LSEEK             (( fmode_t)0x4)
     309/* file can be accessed using pread */
     310#define FMODE_PREAD             (( fmode_t)0x8)
     311/* file can be accessed using pwrite */
     312#define FMODE_PWRITE            (( fmode_t)0x10)
     313/* File is opened for execution with sys_execve / sys_uselib */
     314#define FMODE_EXEC              (( fmode_t)0x20)
     315/* File is opened with O_NDELAY (only set for block devices) */
     316#define FMODE_NDELAY            (( fmode_t)0x40)
     317/* File is opened with O_EXCL (only set for block devices) */
     318#define FMODE_EXCL              (( fmode_t)0x80)
     319/* File is opened using open(.., 3, ..) and is writeable only for ioctls
     320   (specialy hack for floppy.c) */
     321#define FMODE_WRITE_IOCTL       (( fmode_t)0x100)
     322/* 32bit hashes as llseek() offset (for directories) */
     323#define FMODE_32BITHASH         (( fmode_t)0x200)
     324/* 64bit hashes as llseek() offset (for directories) */
     325#define FMODE_64BITHASH         (( fmode_t)0x400)
     326
     327/* File needs atomic accesses to f_pos */
     328#define FMODE_ATOMIC_POS        (( fmode_t)0x8000)
     329
     330/* File is stream-like */
     331#define FMODE_STREAM            (( fmode_t)0x200000)
     332
     333static inline struct inode *file_inode(const struct file *f)
     334{
     335        return f->f_inode;
     336}
     337
    278338#endif /* _LINUX_FS_H */

  • GPL/trunk/include/linux/gameport.h

    r276 r679  
    1919 */
    2020
     21#include <asm/io.h>
     22#include <linux/types.h>
    2123
    2224#endif /* _GAMEPORT_H */

  • GPL/trunk/include/linux/gfp.h

    r440 r679  
    11#ifndef __LINUX_GFP_H
    22#define __LINUX_GFP_H
     3
     4#include <asm/page.h>
     5#include <linux/export.h>
     6#include <linux/mm.h>
     7#include <linux/types.h>
     8
     9/* Plain integer GFP bitmasks. Do not use this directly. */
     10#define ___GFP_DMA              0x01u
     11#define ___GFP_HIGHMEM          0x02u
     12#define ___GFP_DMA32            0x04u
     13#define ___GFP_MOVABLE          0x08u
     14#define ___GFP_RECLAIMABLE      0x10u
     15#define ___GFP_HIGH             0x20u
     16#define ___GFP_IO               0x40u
     17#define ___GFP_FS               0x80u
     18#define ___GFP_ZERO             0x100u
     19#define ___GFP_ATOMIC           0x200u
     20#define ___GFP_DIRECT_RECLAIM   0x400u
     21#define ___GFP_KSWAPD_RECLAIM   0x800u
     22#define ___GFP_WRITE            0x1000u
     23#define ___GFP_NOWARN           0x2000u
     24#define ___GFP_RETRY_MAYFAIL    0x4000u
     25#define ___GFP_NOFAIL           0x8000u
     26#define ___GFP_NORETRY          0x10000u
     27#define ___GFP_MEMALLOC         0x20000u
     28#define ___GFP_COMP             0x40000u
     29#define ___GFP_NOMEMALLOC       0x80000u
     30#define ___GFP_HARDWALL         0x100000u
     31#define ___GFP_THISNODE         0x200000u
     32#define ___GFP_ACCOUNT          0x400000u
     33#ifdef CONFIG_LOCKDEP
     34#define ___GFP_NOLOCKDEP        0x800000u
     35#else
     36#define ___GFP_NOLOCKDEP        0
     37#endif
     38/* If the above are modified, __GFP_BITS_SHIFT may need updating */
     39
     40#define __GFP_NORETRY   0
     41#define __GFP_NOWARN    ((__force gfp_t)___GFP_NOWARN)
     42#define __GFP_COMP      ((__force gfp_t)___GFP_COMP)
     43#define __GFP_ZERO      ((__force gfp_t)___GFP_ZERO)
     44#define __GFP_RETRY_MAYFAIL     ((__force gfp_t)___GFP_RETRY_MAYFAIL)
    345#define GFP_DMA32 0             /* driver must check for 32-bit address */
    4 #define __GFP_COMP      0
    5 #define __GFP_NOWARN    0
    6 #define __GFP_NORETRY   0
     46
     47/*
     48 * Physical address zone modifiers (see linux/mmzone.h - low four bits)
     49 *
     50 * Do not put any conditional on these. If necessary modify the definitions
     51 * without the underscores and use them consistently. The definitions here may
     52 * be used in bit comparisons.
     53 */
     54#define __GFP_DMA       ((__force gfp_t)___GFP_DMA)
     55#define __GFP_HIGHMEM   ((__force gfp_t)___GFP_HIGHMEM)
     56#define __GFP_DMA32     ((__force gfp_t)___GFP_DMA32)
     57#define __GFP_MOVABLE   ((__force gfp_t)___GFP_MOVABLE)  /* ZONE_MOVABLE allowed */
     58#define GFP_ZONEMASK    (__GFP_DMA|__GFP_HIGHMEM|__GFP_DMA32|__GFP_MOVABLE)
     59void *alloc_pages_exact(size_t size, gfp_t gfp_mask);
     60void free_pages_exact(void *virt, size_t size);
     61
    762#endif /* __LINUX_GFP_H */
    863

  • GPL/trunk/include/linux/init.h

    r598 r679  
    11#ifndef _LINUX_INIT_H
    22#define _LINUX_INIT_H
     3
     4#include <asm/errno.h>
     5
    36
    47/* These macros are used to mark some functions or
    … …  
    140143/* subsys_initcall() wrapper */
    141144#define subsys_initcall(x) module_init(x)
    142 
     145#define __init
    143146#endif /* _LINUX_INIT_H */

  • GPL/trunk/include/linux/interrupt.h

    r441 r679  
    44
    55#include <linux/kernel.h>
    6 //#include <asm/bitops.h>
     6#include <linux/bitops.h>
    77#include <asm/atomic.h>
     8#include <asm/hardirq.h>
     9#include <linux/workqueue.h>
    810
    911/*
    … …  
    151153                    unsigned long, const char *, void *);
    152154
     155static inline void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id) {}
    153156#endif

  • GPL/trunk/include/linux/io.h

    r614 r679  
    22#define _LINUX_IO_H
    33
     4#include <asm/io.h>
     5#include <linux/init.h>
     6#include <linux/types.h>
     7#include <linux/err.h>
     8
    49#endif /* _LINUX_IO_H */

  • GPL/trunk/include/linux/ioport.h

    r32 r679  
    1111#define _LINUX_IOPORT_H
    1212
     13#include <linux/types.h>
    1314/*
    1415 * Resources are tree-like, allowing

  • GPL/trunk/include/linux/kernel.h

    r598 r679  
    1111#include <stdarg.h>
    1212//#include <linux/linkage.h>
     13#include <linux/bitops.h>
     14#include <linux/gfp.h>
     15#include <linux/types.h>
     16#include <linux/log2.h>
    1317
    1418/* Optimization barrier */
    … …  
    5862
    5963
    60 #if DEBUG
    61 #define pr_debug(fmt,arg)
    62 #else
    63 #define pr_debug(fmt,arg)
    64 #endif
    65 
    66 #define pr_info(fmt,arg) \
    67         printk(KERN_INFO fmt,##arg)
    68 
    6964/*
    7065 *      Display an IP address in readable format.
    … …  
    10499int strict_strtoul(const char *, unsigned int, unsigned long *);
    105100
     101#define BUG_ON(condition)
     102#define WARN_ON(condition) (void)0
     103#define WARN_ON_ONCE(condition) (void)0
     104#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
     105#define SIZE_MAX        (~(size_t)0)
     106_WCRTLINK extern int     vsnprintf( char *__s, size_t __bufsize,
     107                                    const char *__format, __va_list __arg );
     108char *kasprintf(gfp_t gfp, const char *fmt, ...);
     109
     110char *kvasprintf(gfp_t gfp, const char *fmt, va_list args);
     111extern int hex_to_bin(char ch);
     112#define __ALIGN_MASK(x, mask)   __ALIGN_KERNEL_MASK((x), (mask))
     113#define __ALIGN_KERNEL_MASK(x, mask)    (((x) + (mask)) & ~(mask))
     114
     115/**
     116 * container_of - cast a member of a structure out to the containing structure
     117 * @ptr:        the pointer to the member.
     118 * @type:       the type of the container struct this is embedded in.
     119 * @member:     the name of the member within the struct.
     120 *
     121 */
     122#define container_of(ptr, type, member) \
     123( (type *)( (char *)ptr - offsetof(type,member) ) )
     124
     125_WCRTLINK extern int    sscanf( const char *__s, const char *__format, ... );
     126
    106127#endif

  • GPL/trunk/include/linux/list.h

    r441 r679  
    33#ifndef _LINUX_LIST_H
    44#define _LINUX_LIST_H
    5 
     5#include <linux/types.h>
    66#ifdef __KERNEL__
    77
    … …  
    2525        struct list_head name = LIST_HEAD_INIT(name)
    2626
    27 #define INIT_LIST_HEAD(ptr) do { \
    28         (ptr)->next = (ptr); (ptr)->prev = (ptr); \
    29 } while (0)
     27static inline void INIT_LIST_HEAD(struct list_head *list)
     28{
     29        list->next = list;
     30        list->prev = list;
     31}
    3032
    3133/*
    … …  
    104106}
    105107
     108_WCRTLINK extern int     snprintf( char *__buf, size_t __bufsize,
     109                                   const char *__fmt, ... );
     110
     111#define offsetof(__typ,__id) ((size_t)&(((__typ*)0)->__id))
     112
    106113#define list_entry(ptr, type, member) \
    107         ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
     114        container_of(ptr, type, member)
     115
     116/**
     117 * list_first_entry - get the first element from a list
     118 * @ptr:        the list head to take the element from.
     119 * @type:       the type of the struct this is embedded in.
     120 * @member:     the name of the list_struct within the struct.
     121 *
     122 * Note, that list is expected to be not empty.
     123 */
     124#define list_first_entry(ptr, type, member) \
     125        list_entry((ptr)->next, type, member)
     126
     127/**
     128 * list_last_entry - get the last element from a list
     129 * @ptr:        the list head to take the element from.
     130 * @type:       the type of the struct this is embedded in.
     131 * @member:     the name of the list_struct within the struct.
     132 *
     133 * Note, that list is expected to be not empty.
     134 */
     135#define list_last_entry(ptr, type, member) \
     136        list_entry((ptr)->prev, type, member)
     137
     138/**
     139 * list_next_entry - get the next element in list
     140 * @pos:        the type * to cursor
     141 * @member:     the name of the list_struct within the struct.
     142 */
     143#define list_next_entry(pos, member) \
     144        list_entry((pos)->member.next, typeof(*(pos)), member)
     145
     146/**
     147 * list_prev_entry - get the prev element in list
     148 * @pos:        the type * to cursor
     149 * @member:     the name of the list_struct within the struct.
     150 */
     151#define list_prev_entry(pos, member) \
     152        list_entry((pos)->member.prev, typeof(*(pos)), member)
    108153
    109154#define list_for_each(entry, listhead) \
    … …  
    112157#endif /* __KERNEL__ */
    113158
    114 #define container_of(ptr, type, member) \
    115 ( (type *)( (char *)ptr - offsetof(type,member) ) )
    116 _WCRTLINK extern int     snprintf( char *__buf, size_t __bufsize,
    117                                    const char *__fmt, ... );
    118 #define offsetof(__typ,__id) ((size_t)&(((__typ*)0)->__id))
     159/**
     160 * list_for_each_prev   -       iterate over a list backwards
     161 * @pos:        the &struct list_head to use as a loop cursor.
     162 * @head:       the head for your list.
     163 */
     164#define list_for_each_prev(pos, head) \
     165        for (pos = (head)->prev; pos != (head); pos = pos->prev)
     166
     167/**
     168 * list_for_each_entry  -       iterate over list of given type
     169 * @pos:        the type * to use as a loop cursor.
     170 * @head:       the head for your list.
     171 * @member:     the name of the list_struct within the struct.
     172        for (pos = list_first_entry(head, typeof(*pos), member);        \
     173             &pos->member != (head);                                    \
     174             pos = list_next_entry(pos, member))
     175 */
    119176#define list_for_each_entry(itemptr, headptr, struct_listmember_name, container_type) \
    120177    for (itemptr=(container_type *) \
    … …  
    123180         itemptr=(container_type *) \
    124181         (((char *)(itemptr->struct_listmember_name.next))-offsetof(container_type, struct_listmember_name)))
     182
     183/**
     184 * list_for_each_entry_reverse - iterate backwards over list of given type.
     185 * @pos:        the type * to use as a loop cursor.
     186 * @head:       the head for your list.
     187 * @member:     the name of the list_struct within the struct.
     188        for (pos = list_last_entry(head, typeof(*pos), member);         \
     189             &pos->member != (head);                                    \
     190             pos = list_prev_entry(pos, member))
     191
     192 */
     193
     194#define list_for_each_entry_reverse(itemptr, headptr, struct_listmember_name, container_type)                   \
     195    for (itemptr=(container_type *) \
     196         (((char *)((headptr)->prev))-offsetof(container_type, struct_listmember_name)); \
     197         &(itemptr->struct_listmember_name)!=(headptr); \
     198         itemptr=(container_type *) \
     199         (((char *)(itemptr->struct_listmember_name.prev))-offsetof(container_type, struct_listmember_name)))
     200
     201
    125202
    126203#define list_for_each_entry_safe(itemptr, n, headptr, struct_listmember_name, container_type) \
    … …  
    135212
    136213/**
     214 * list_for_each_entry_safe_reverse - iterate backwards over list safe against removal
     215 * @pos:        the type * to use as a loop cursor.
     216 * @n:          another type * to use as temporary storage
     217 * @head:       the head for your list.
     218 * @member:     the name of the list_struct within the struct.
     219 *
     220 * Iterate backwards over list of given type, safe against removal
     221 * of list entry.
     222 */
     223#define list_for_each_entry_safe_reverse(itemptr, n, headptr, struct_listmember_name, container_type) \
     224    for (itemptr=(container_type *) \
     225         (((char *)((headptr)->prev))-offsetof(container_type, struct_listmember_name)), \
     226         n=(container_type *) \
     227         (((char *)(itemptr->struct_listmember_name.prev))-offsetof(container_type, struct_listmember_name)); \
     228         &(itemptr->struct_listmember_name)!=(headptr); \
     229         itemptr=n, \
     230         n=(container_type *) \
     231         (((char *)(n->struct_listmember_name.prev))-offsetof(container_type, struct_listmember_name)))
     232
     233/**
    137234 * list_move_tail - delete from one list and add as another's tail
    138235 * @list: the entry to move
    … …  
    146243}
    147244
     245/**
     246 * list_for_each_safe   -       iterate over a list safe against removal of list entry
     247 * @pos:        the &struct list_head to use as a loop counter.
     248 * @n:          another &struct list_head to use as temporary storage
     249 * @head:       the head for your list.
     250 */
     251#define list_for_each_safe(pos, n, head) \
     252        for (pos = (head)->next, n = pos->next; pos != (head); \
     253                pos = n, n = pos->next)
     254
     255/**
     256 * list_del_init - deletes entry from list and reinitialize it.
     257 * @entry: the element to delete from the list.
     258 */
     259static __inline__ void list_del_init(struct list_head *entry)
     260{
     261        __list_del(entry->prev, entry->next);
     262        INIT_LIST_HEAD(entry);
     263}
     264
     265static inline void __list_del_entry(struct list_head *entry)
     266{
     267        __list_del(entry->prev, entry->next);
     268}
     269
     270/**
     271 * list_first_entry_or_null - get the first element from a list
     272 * @ptr:        the list head to take the element from.
     273 * @type:       the type of the struct this is embedded in.
     274 * @member:     the name of the list_head within the struct.
     275 *
     276 * Note that if the list is empty, it returns NULL.
     277 */
     278#define list_first_entry_or_null(ptr, type, member) \
     279        (!list_empty(ptr) ? list_first_entry(ptr, type, member) : NULL)
     280
     281/**
     282 * list_move - delete from one list and add as another's head
     283 * @list: the entry to move
     284 * @head: the head that will precede our entry
     285 */
     286static inline void list_move(struct list_head *list, struct list_head *head)
     287{
     288        __list_del_entry(list);
     289        list_add(list, head);
     290}
     291
     292/**
     293 * list_is_singular - tests whether a list has just one entry.
     294 * @head: the list to test.
     295 */
     296static inline int list_is_singular(struct list_head *head)
     297{
     298        return !list_empty(head) && (head->next == head->prev);
     299}
     300
    148301#endif

  • GPL/trunk/include/linux/lockdep.h

    r442 r679  
    11#ifndef __LINUX_LOCKDEP_H
    22#define __LINUX_LOCKDEP_H
     3
     4#include <linux/types.h>
     5
    36#define SINGLE_DEPTH_NESTING                    1
    47/*
    … …  
    1215#define spin_lock_nested(lock, x)               spin_lock(lock)
    1316#define spin_lock_irqsave_nested(lock, f, x)    spin_lock_irqsave(lock, f)
    14 
    15 
     17#define lockdep_set_novalidate_class(lock) do { } while (0)
     18# define lockdep_set_class_and_name(lock, key, name) \
     19                do { (void)(key); (void)(name); } while (0)
     20struct lock_class_key {int not_used; };
    1621#endif /* __LINUX_LOCKDEP_H */

  • GPL/trunk/include/linux/log2.h

    r598 r679  
    22#define _LINUX_LOG2_H
    33
     4#include <linux/bitops.h>
     5#include <linux/types.h>
     6
     7/*
     8 *  Determine whether some value is a power of two, where zero is
     9 * *not* considered a power of two.
     10 */
     11
     12static inline
     13bool is_power_of_2(unsigned long n)
     14{
     15        return (n != 0 && ((n & (n - 1)) == 0));
     16}
     17
     18/**
     19 * __roundup_pow_of_two() - round up to nearest power of two
     20 * @n: value to round up
     21 */
     22static inline /*__attribute__((const))*/
     23unsigned long __roundup_pow_of_two(unsigned long n)
     24{
     25        return 1UL << fls_long(n - 1);
     26}
     27
     28/**
     29 * __rounddown_pow_of_two() - round down to nearest power of two
     30 * @n: value to round down
     31 */
     32static inline /*__attribute__((const))*/
     33unsigned long __rounddown_pow_of_two(unsigned long n)
     34{
     35        return 1UL << (fls_long(n) - 1);
     36}
     37
     38/***********************************************/
     39/* Locate the position of the highest bit set. */
     40/* A binary search is used.  The result is an  */
     41/* approximation of log2(n) [the integer part] */
     42/***********************************************/
     43static inline int             ilog2(unsigned long n)
     44{
     45    int             i = (-1);
     46
     47    /* Is there a bit on in the high word? */
     48    /* Else, all the high bits are already zero. */
     49    if (n & 0xffff0000) {
     50        i += 16;                /* Update our search position */
     51        n >>= 16;               /* Shift out lower (irrelevant) bits */
     52    }
     53    /* Is there a bit on in the high byte of the current word? */
     54    /* Else, all the high bits are already zero. */
     55    if (n & 0xff00) {
     56        i += 8;                 /* Update our search position */
     57        n >>= 8;                /* Shift out lower (irrelevant) bits */
     58    }
     59    /* Is there a bit on in the current nybble? */
     60    /* Else, all the high bits are already zero. */
     61    if (n & 0xf0) {
     62        i += 4;                 /* Update our search position */
     63        n >>= 4;                /* Shift out lower (irrelevant) bits */
     64    }
     65    /* Is there a bit on in the high 2 bits of the current nybble? */
     66    /* 0xc is 1100 in binary... */
     67    /* Else, all the high bits are already zero. */
     68    if (n & 0xc) {
     69        i += 2;                 /* Update our search position */
     70        n >>= 2;                /* Shift out lower (irrelevant) bits */
     71    }
     72    /* Is the 2nd bit on? [ 0x2 is 0010 in binary...] */
     73    /* Else, all the 2nd bit is already zero. */
     74    if (n & 0x2) {
     75        i++;                    /* Update our search position */
     76        n >>= 1;                /* Shift out lower (irrelevant) bit */
     77    }
     78    /* Is the lowest bit set? */
     79    if (n)
     80        i++;                    /* Update our search position */
     81    return i;
     82}
     83
     84/**
     85 * roundup_pow_of_two - round the given value up to nearest power of two
     86 * @n: parameter
     87 *
     88 * round the given value up to the nearest power of two
     89 * - the result is undefined when n == 0
     90 * - this can be used to initialise global variables from constant data
     91 */
     92#define roundup_pow_of_two(n)                   \
     93(                                               \
     94        __roundup_pow_of_two(n)                 \
     95 )
     96
     97/**
     98 * rounddown_pow_of_two - round the given value down to nearest power of two
     99 * @n: parameter
     100 *
     101 * round the given value down to the nearest power of two
     102 * - the result is undefined when n == 0
     103 * - this can be used to initialise global variables from constant data
     104 */
     105#define rounddown_pow_of_two(n)                 \
     106(                                               \
     107        __rounddown_pow_of_two(n)               \
     108 )
     109
    4110#endif /* _LINUX_LOG2_H */

  • GPL/trunk/include/linux/major.h

    r32 r679  
    11#ifndef _LINUX_MAJOR_H
    22#define _LINUX_MAJOR_H
     3
     4#include <linux/types.h>
    35
    46/*

  • GPL/trunk/include/linux/math64.h

    r479 r679  
    55#ifndef MATH64_COMPAT_H
    66#define MATH64_COMPAT_H
     7
     8#include <linux/types.h>
    79
    810#if BITS_PER_LONG >= 64
    … …  
    1315        return n / div;
    1416}
     17
    1518
    1619static inline u64 div_u64(u64 n, u32 div)
    … …  
    5356        } else
    5457                return low / div;
     58}
     59
     60/**
     61 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
     62 */
     63static inline s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder)
     64{
     65        *remainder = dividend % divisor;
     66        return dividend / divisor;
    5567}
    5668
    … …  
    117129}
    118130
     131/**
     132 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
     133 */
     134static inline s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder)
     135{
     136        *remainder = dividend % divisor;
     137        return dividend / divisor;
     138}
     139
    119140#endif
    120141

  • GPL/trunk/include/linux/mm.h

    r598 r679  
    44#include <linux/sched.h>
    55#include <linux/errno.h>
     6#include <linux/gfp.h>
    67#include <asm/page.h>
    78#include <asm/atomic.h>
     9#include <linux/overflow.h>
     10#include <linux/err.h>
    811
     12#define NUMA_NO_NODE    (-1)
    913/*
    1014 * GFP bitmasks..
    … …  
    1620#define __GFP_IO        0x10
    1721#define __GFP_SWAP      0x20
    18 #ifdef CONFIG_HIGHMEM
    19 #define __GFP_HIGHMEM   0x40
    20 #else
    21 #define __GFP_HIGHMEM   0x0 /* noop */
    22 #endif
    23 
    24 #define __GFP_DMA       0x80
     22#define ___GFP_ZERO             0x100u
     23#define __GFP_ZERO      ((__force gfp_t)___GFP_ZERO)
    2524
    2625#ifdef TARGET_OS2
    … …  
    125124        unsigned long flags;    /* atomic flags, some possibly updated asynchronously */
    126125        unsigned long virtual; /* nonzero if kmapped */
     126        struct kmem_cache *slab_cache;  /* SL[AU]B: Pointer to slab */
     127        struct page *first_page;        /* Compound tail pages */
    127128} mem_map_t;
    128129
    … …  
    174175#define ClearPageReserved(a)            a
    175176struct page *vmalloc_to_page(void *addr);
     177
     178extern void *kvmalloc_node(size_t size, gfp_t flags, int node);
     179static inline void *kvmalloc(size_t size, gfp_t flags)
     180{
     181        return kvmalloc_node(size, flags, NUMA_NO_NODE);
     182}
     183static inline void *kvzalloc_node(size_t size, gfp_t flags, int node)
     184{
     185        return kvmalloc_node(size, flags | __GFP_ZERO, node);
     186}
     187static inline void *kvzalloc(size_t size, gfp_t flags)
     188{
     189        return kvmalloc(size, flags | __GFP_ZERO);
     190}
     191static inline void *kvmalloc_array(size_t n, size_t size, gfp_t flags)
     192{
     193        size_t bytes;
     194
     195        bytes = n * size;
     196
     197        return kvmalloc(bytes, flags);
     198}
    176199#endif

  • GPL/trunk/include/linux/module.h

    r598 r679  
    77#ifndef _LINUX_MODULE_H
    88#define _LINUX_MODULE_H
     9
     10#include <linux/list.h>
     11#include <linux/compiler.h>
     12#include <linux/kmod.h>
     13#include <linux/init.h>
     14#include <linux/string.h>
     15#include <linux/kobject.h>
     16#include <linux/moduleparam.h>
     17#include <linux/export.h>
    918
    1019/* Poke the use count of a module.  */
    … …  
    4655
    4756#ifdef TARGET_OS2
    48 #define MODULE_PARM(var,type)
    49 #define MODULE_PARM_DESC(var,desc)
    5057#define MODULE_LICENSE(a)
    51 #define EXPORT_SYMBOL_GPL(a)
    5258#else
    5359#define MODULE_PARM(var,type)                   \
    … …  
    7177#define MODULE_ALIAS(x)
    7278
    73 extern int this_module[64];
    74 #define THIS_MODULE (void *)&this_module[0]
    7579#define MODULE_GENERIC_TABLE(gtype,name)
    7680#define MODULE_DEVICE_TABLE(type,name)
    77 #define EXPORT_SYMBOL(a)
    7881#define MODULE_ALIAS_CHARDEV(x)
    7982#define module_param(name, type, perm)
     83
     84/**
     85 * module_driver() - Helper macro for drivers that don't do anything
     86 * special in module init/exit. This eliminates a lot of boilerplate.
     87 * Each module may only use this macro once, and calling it replaces
     88 * module_init() and module_exit().
     89 *
     90 * @__driver: driver name
     91 * @__register: register function for this driver type
     92 * @__unregister: unregister function for this driver type
     93 * @...: Additional arguments to be passed to __register and __unregister.
     94 *
     95 * Use this macro to construct bus specific macros for registering
     96 * drivers, and do not use it on its own.
     97 */
     98#define module_driver(__driver, __register, __unregister, ...) \
     99static int __init __driver##_init(void) \
     100{ \
     101        return __register(&__driver, ##__VA_ARGS__); \
     102} \
     103module_init(__driver##_init); \
     104static void __exit __driver##_exit(void) \
     105{ \
     106        __unregister(&__driver, ##__VA_ARGS__); \
     107} \
     108module_exit(__driver##_exit);
     109#define symbol_put_addr(p) do { } while (0)
     110#define postcore_initcall(fn)           module_init(fn)
     111
     112#define MODULE_NAME_LEN 255
     113
     114struct module {
     115        /* Unique handle for this module */
     116        char name[MODULE_NAME_LEN];
     117};
    80118#endif /* _LINUX_MODULE_H */

  • GPL/trunk/include/linux/moduleparam.h

    r305 r679  
    102102#define param_check_ushort(name, p) __param_check(name, p, unsigned short)
    103103
    104 extern int param_set_int(const char *val, struct kernel_param *kp);
    105 extern int param_get_int(char *buffer, struct kernel_param *kp);
     104static inline int param_set_int(const char *val, const struct kernel_param *kp) {return 0;};
     105static inline int param_get_int(char *buffer, const struct kernel_param *kp) {return 0;};
    106106#define param_check_int(name, p) __param_check(name, p, int)
    107107
    … …  
    138138                          &__param_arr_##name, perm)
    139139
    140 #ifndef TARGET_OS2
    141 #define module_param_array(name, type, nump, perm)              \
    142         module_param_array_named(name, name, type, nump, perm)
    143 #endif
     140#define module_param_array(name, type, nump, perm)
     141#define module_param(name, type, perm)
    144142extern int param_array_set(const char *val, struct kernel_param *kp);
    145143extern int param_array_get(char *buffer, struct kernel_param *kp);
    … …  
    165163extern void module_param_sysfs_remove(struct module *mod);
    166164
     165struct kernel_param_ops {
     166        /* Returns 0, or -errno.  arg is in kp->arg. */
     167        int (*set)(const char *val, const struct kernel_param *kp);
     168        /* Returns length written or -errno.  Buffer is 4k (ie. be short!) */
     169        int (*get)(char *buffer, const struct kernel_param *kp);
     170        /* Optional function to free kp->arg when module unloaded. */
     171        void (*free)(void *arg);
     172};
     173
     174#define module_param_hw_array(name, type, hwtype, nump, perm)
     175#define module_param_hw(name, type, hwtype, perm)               
     176#define MODULE_PARM(var,type)
     177#define MODULE_PARM_DESC(var,desc)
     178
    167179#endif /* _LINUX_MODULE_PARAMS_H */

  • GPL/trunk/include/linux/mutex.h

    r76 r679  
    33
    44#include <asm/semaphore.h>
     5#include <linux/list.h>
     6#include <linux/types.h>
     7
     8struct mutex {
     9        atomic_long_t           owner;
     10        spinlock_t              wait_lock;
     11#ifdef CONFIG_MUTEX_SPIN_ON_OWNER
     12        struct optimistic_spin_queue osq; /* Spinner MCS lock */
     13#endif
     14        struct list_head        wait_list;
     15#ifdef CONFIG_DEBUG_MUTEXES
     16        void                    *magic;
     17#endif
     18#ifdef CONFIG_DEBUG_LOCK_ALLOC
     19        struct lockdep_map      dep_map;
     20#endif
     21};
    522
    623#define mutex semaphore
    … …  
    1128#define mutex_lock_interruptible(x) down_interruptible(x)
    1229#define mutex_unlock(x)         up(x)
    13 
     30#define mutex_lock_nested(lock, subclass) mutex_lock(lock)
     31static inline int mutex_trylock(struct mutex *lock) {return -1; }
    1432#endif

  • GPL/trunk/include/linux/notifier.h

    r32 r679  
    1111#define _LINUX_NOTIFIER_H
    1212#include <linux/errno.h>
     13#include <linux/rwsem.h>
     14
     15typedef int (*notifier_fn_t)(struct notifier_block *nb,
     16                        unsigned long action, void *data);
    1317
    1418struct notifier_block
    … …  
    1822        int priority;
    1923};
     24
     25struct atomic_notifier_head {
     26        spinlock_t lock;
     27        struct notifier_block *head;
     28};
     29
     30struct blocking_notifier_head {
     31        struct semaphore rwsem;
     32        struct notifier_block *head;
     33};
     34
    2035
    2136
    … …  
    113128 
    114129#endif
     130#define BLOCKING_INIT_NOTIFIER_HEAD(name) do {  \
     131                init_rwsem(&(name)->rwsem);     \
     132                (name)->head = NULL;            \
     133        } while (0)
    115134#endif

  • GPL/trunk/include/linux/pagemap.h

    r32 r679  
    1212#include <linux/list.h>
    1313
     14#include <asm/hardirq.h>
    1415#include <asm/system.h>
    1516#include <asm/pgtable.h>
     17#include <linux/bitops.h>
    1618
    1719/*

  • GPL/trunk/include/linux/pci.h

    r604 r679  
    1616#define LINUX_PCI_H
    1717
     18#include <linux/mod_devicetable.h>
     19
    1820#include <linux/types.h>
    1921#include <linux/list.h>
     22#include <linux/kobject.h>
     23#include <linux/device.h>
     24#include <linux/pm.h>
     25#include <linux/io.h>
     26
    2027#pragma pack(1) //!!! by vladest
    2128/*
    … …  
    302309#define pci_choose_state(pci,state)     ((state) ? PCI_D3hot : PCI_D0)
    303310
    304 typedef struct device {
    305     struct pci_dev *pci;  /* for PCI and PCI-SG types */
    306   struct device   * parent;
    307   struct bus_type * bus;    /* type of bus device is on */
    308   char  bus_id[BUS_ID_SIZE];  /* position on parent bus */
    309   void  (*release)(struct device * dev);
    310     unsigned int flags; /* GFP_XXX for continous and ISA types */
    311 #ifdef CONFIG_SBUS
    312     struct sbus_dev *sbus;  /* for SBUS type */
    313 #endif
    314   void *private_data;
    315   void *platform_data;
    316 
    317   struct device_driver *driver;
    318   struct pm_dev *pm_dev;
    319   char  bus_id[20];
    320 } device;
     311struct dev_pm_info2 {
     312        unsigned int            async_suspend:1;
     313        bool                    is_prepared:1;  /* Owned by the PM core */
     314        u32                     power_state;
     315        u8                      * saved_state;
     316        atomic_t                pm_users;
     317        struct device           * pm_parent;
     318        struct list_head        entry;
     319};
    321320
    322321/*
    … …  
    334333  struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
    335334
    336         struct device   dev;
    337 
     335  struct device   dev;
     336        unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
     337  u8            revision;       /* PCI revision, low byte of class word */
    338338  unsigned int  devfn;    /* encoded device & function index */
    339339  unsigned short  vendor;
    … …  
    341341  unsigned short  subsystem_vendor;
    342342  unsigned short  subsystem_device;
    343   unsigned int  _class;   /* 3 bytes: (base,sub,prog-if) */
    344343  u8    hdr_type; /* PCI header type (`multi' flag masked out) */
    345344  u8    rom_base_reg; /* Which config register controls the ROM */
    … …  
    369368
    370369  void         *driver_data;
    371   unsigned long   dma_mask;
     370        u64             dma_mask;       /* Mask of the bits of bus address this
     371                                           device implements.  Normally this is
     372                                           0xffffffff.  You only need to change
     373                                           this if your device has broken DMA
     374                                           or supports 64-bit transfers.  */
     375  unsigned int  no_64bit_msi:1; /* device may only use 32-bit MSIs */
    372376
    373377  int (*prepare)(struct pci_dev *dev);
    … …  
    378382//DAZ unsigned int apicirq;
    379383  unsigned long hAdapter;
    380   unsigned long hDevice;
     384//AT  unsigned long hDevice;
    381385  void *pcidriver;
    382386#endif
    … …  
    579583        unsigned long driver_data;
    580584};
    581 #if 0
     585
    582586struct pci_driver {
    583         struct list_head node;
    584         char *name;
    585         const struct pci_device_id *id_table;
    586         int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);
    587         void (*remove)(struct pci_dev *dev);
    588         void (*suspend)(struct pci_dev *dev, u32 state);
    589         void (*resume)(struct pci_dev *dev);
     587        struct list_head node;
     588        struct pci_dev *dev;
     589        char *name;
     590        const struct pci_device_id *id_table; /* NULL if wants all devices */
     591        int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
     592        void (*remove)(struct pci_dev *dev);  /* Device removed (NULL if not a hot-plug capable driver) */
     593        int (*suspend)(struct pci_dev *dev, u32 stgate);  /* Device suspended */
     594        int (*resume)(struct pci_dev *dev); /* Device woken up */
     595        void (*shutdown) (struct pci_dev *dev);
     596        struct device_driver    driver;
    590597};
    591 #else
    592 struct pci_driver {
    593   struct list_head node;
    594   struct pci_dev *dev;
    595   char *name;
    596   const struct pci_device_id *id_table; /* NULL if wants all devices */
    597   int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
    598   void (*remove)(struct pci_dev *dev);  /* Device removed (NULL if not a hot-plug capable driver) */
    599   int (*suspend)(struct pci_dev *dev, u32 stgate);  /* Device suspended */
    600   int (*resume)(struct pci_dev *dev); /* Device woken up */
    601 };
    602 #endif
    603598
    604599/*
    … …  
    651646 *
    652647 */
    653 const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, struct pci_dev *dev);
     648const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
    654649unsigned long pci_get_size (struct pci_dev *dev, int n_base);
    655650
    … …  
    686681#define pci_get_device  pci_find_device
    687682#define pci_dev_put(x)
     683
     684#define to_pci_dev(n)   container_of(n, struct pci_dev, dev)
    688685
    689686#pragma pack() //!!! by vladest
    … …  
    728725  const struct pci_device_id _table[] __devinitdata
    729726
     727/**
     728 * module_pci_driver() - Helper macro for registering a PCI driver
     729 * @__pci_driver: pci_driver struct
     730 *
     731 * Helper macro for PCI drivers which do not do anything special in module
     732 * init/exit. This eliminates a lot of boilerplate. Each module may only
     733 * use this macro once, and calling it replaces module_init() and module_exit()
     734 */
     735#define module_pci_driver(__pci_driver) \
     736        module_driver(__pci_driver, pci_register_driver, \
     737                       pci_unregister_driver)
     738
     739static inline bool pci_dev_run_wake(struct pci_dev *dev) { return 0; }
     740
     741/* If you want to know what to call your pci_dev, ask this function.
     742 * Again, it's a wrapper around the generic device.
     743 */
     744static inline const char *pci_name(struct pci_dev *pdev)
     745{
     746        return dev_name(&pdev->dev);
     747}
     748
     749/**
     750 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
     751 * @vend: the 16 bit PCI Vendor ID
     752 * @dev: the 16 bit PCI Device ID
     753 * @subvend: the 16 bit PCI Subvendor ID
     754 * @subdev: the 16 bit PCI Subdevice ID
     755 *
     756 * This macro is used to create a struct pci_device_id that matches a
     757 * specific device with subsystem information.
     758 */
     759#define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
     760        .vendor = (vend), .device = (dev), \
     761        .subvendor = (subvend), .subdevice = (subdev)
     762
     763int pci_status_get_and_clear_errors(struct pci_dev *pdev);
     764#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY  | \
     765                               PCI_STATUS_SIG_SYSTEM_ERROR | \
     766                               PCI_STATUS_REC_MASTER_ABORT | \
     767                               PCI_STATUS_REC_TARGET_ABORT | \
     768                               PCI_STATUS_SIG_TARGET_ABORT | \
     769                               PCI_STATUS_PARITY)
     770
    730771#endif /* LINUX_PCI_H */

  • GPL/trunk/include/linux/pci_ids.h

    r463 r679  
     1/* SPDX-License-Identifier: GPL-2.0 */
    12/*
    23 *      PCI Class, Vendor and Device IDs
    34 *
    45 *      Please keep sorted.
     6 *
     7 *      Do not add new entries to this file unless the definitions
     8 *      are shared between multiple drivers.
    59 */
     10#ifndef _LINUX_PCI_IDS_H
     11#define _LINUX_PCI_IDS_H
    612
    713/* Device classes and subclasses */
    … …  
    1925#define PCI_CLASS_STORAGE_SATA_AHCI     0x010601
    2026#define PCI_CLASS_STORAGE_SAS           0x0107
     27#define PCI_CLASS_STORAGE_EXPRESS       0x010802
    2128#define PCI_CLASS_STORAGE_OTHER         0x0180
     29
    2230
    2331#define PCI_BASE_CLASS_NETWORK          0x02
    … …  
    3846#define PCI_CLASS_MULTIMEDIA_AUDIO      0x0401
    3947#define PCI_CLASS_MULTIMEDIA_PHONE      0x0402
     48#define PCI_CLASS_MULTIMEDIA_HD_AUDIO   0x0403
    4049#define PCI_CLASS_MULTIMEDIA_OTHER      0x0480
    4150
    … …  
    105114#define PCI_CLASS_SERIAL_USB_OHCI       0x0c0310
    106115#define PCI_CLASS_SERIAL_USB_EHCI       0x0c0320
     116#define PCI_CLASS_SERIAL_USB_XHCI       0x0c0330
     117#define PCI_CLASS_SERIAL_USB_DEVICE     0x0c03fe
    107118#define PCI_CLASS_SERIAL_FIBER          0x0c04
    108119#define PCI_CLASS_SERIAL_SMBUS          0x0c05
    … …  
    134145/* Vendors and devices.  Sort key: vendor first, device next. */
    135146
    136 #define PCI_VENDOR_ID_DFI               0x15bd
     147#define PCI_VENDOR_ID_TTTECH            0x0357
     148#define PCI_DEVICE_ID_TTTECH_MC322      0x000a
    137149
    138150#define PCI_VENDOR_ID_DYNALINK          0x0675
    … …  
    371383#define PCI_DEVICE_ID_ATI_IXP400_SATA2  0x437a
    372384#define PCI_DEVICE_ID_ATI_IXP600_SATA   0x4380
    373 #define PCI_DEVICE_ID_ATI_IXP600_SRAID  0x4381
     385#define PCI_DEVICE_ID_ATI_SBX00_SMBUS   0x4385
    374386#define PCI_DEVICE_ID_ATI_IXP600_IDE    0x438c
    375 #define PCI_DEVICE_ID_ATI_SBX00_SMBUS   0x4385
     387#define PCI_DEVICE_ID_ATI_IXP700_SATA   0x4390
     388#define PCI_DEVICE_ID_ATI_IXP700_IDE    0x439c
    376389
    377390#define PCI_VENDOR_ID_VLSI              0x1004
    … …  
    387400#define PCI_DEVICE_ID_VLSI_82C147       0x0105
    388401#define PCI_DEVICE_ID_VLSI_VAS96011     0x0702
     402
     403/* AMD RD890 Chipset */
     404#define PCI_DEVICE_ID_RD890_IOMMU       0x5a23
    389405
    390406#define PCI_VENDOR_ID_ADL               0x1005
    … …  
    474490#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX         0x021A
    475491#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM     0x0251
     492#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE 0x0361
    476493#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL  0x252
     494
     495#define PCI_SUBVENDOR_ID_IBM            0x1014
     496#define PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT     0x03d4
     497
     498#define PCI_VENDOR_ID_UNISYS            0x1018
     499#define PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR 0x001C
    477500
    478501#define PCI_VENDOR_ID_COMPEX2           0x101a /* pci.ids says "AT&T GIS (NCR)" */
    … …  
    489512#define PCI_VENDOR_ID_AMD               0x1022
    490513#define PCI_DEVICE_ID_AMD_K8_NB         0x1100
     514#define PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP 0x1101
     515#define PCI_DEVICE_ID_AMD_K8_NB_MEMCTL  0x1102
    491516#define PCI_DEVICE_ID_AMD_K8_NB_MISC    0x1103
     517#define PCI_DEVICE_ID_AMD_10H_NB_HT     0x1200
     518#define PCI_DEVICE_ID_AMD_10H_NB_MAP    0x1201
     519#define PCI_DEVICE_ID_AMD_10H_NB_DRAM   0x1202
     520#define PCI_DEVICE_ID_AMD_10H_NB_MISC   0x1203
     521#define PCI_DEVICE_ID_AMD_10H_NB_LINK   0x1204
     522#define PCI_DEVICE_ID_AMD_11H_NB_HT     0x1300
     523#define PCI_DEVICE_ID_AMD_11H_NB_MAP    0x1301
     524#define PCI_DEVICE_ID_AMD_11H_NB_DRAM   0x1302
     525#define PCI_DEVICE_ID_AMD_11H_NB_MISC   0x1303
     526#define PCI_DEVICE_ID_AMD_11H_NB_LINK   0x1304
     527#define PCI_DEVICE_ID_AMD_15H_M10H_F3   0x1403
     528#define PCI_DEVICE_ID_AMD_15H_M30H_NB_F3 0x141d
     529#define PCI_DEVICE_ID_AMD_15H_M30H_NB_F4 0x141e
     530#define PCI_DEVICE_ID_AMD_15H_M60H_NB_F3 0x1573
     531#define PCI_DEVICE_ID_AMD_15H_M60H_NB_F4 0x1574
     532#define PCI_DEVICE_ID_AMD_15H_NB_F0     0x1600
     533#define PCI_DEVICE_ID_AMD_15H_NB_F1     0x1601
     534#define PCI_DEVICE_ID_AMD_15H_NB_F2     0x1602
     535#define PCI_DEVICE_ID_AMD_15H_NB_F3     0x1603
     536#define PCI_DEVICE_ID_AMD_15H_NB_F4     0x1604
     537#define PCI_DEVICE_ID_AMD_15H_NB_F5     0x1605
     538#define PCI_DEVICE_ID_AMD_16H_NB_F3     0x1533
     539#define PCI_DEVICE_ID_AMD_16H_NB_F4     0x1534
     540#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583
     541#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584
     542#define PCI_DEVICE_ID_AMD_CNB17H_F3     0x1703
    492543#define PCI_DEVICE_ID_AMD_LANCE         0x2000
    493544#define PCI_DEVICE_ID_AMD_LANCE_HOME    0x2001
    … …  
    509560#define PCI_DEVICE_ID_AMD_VIPER_7443    0x7443
    510561#define PCI_DEVICE_ID_AMD_OPUS_7445     0x7445
     562#define PCI_DEVICE_ID_AMD_8111_PCI      0x7460
    511563#define PCI_DEVICE_ID_AMD_8111_LPC      0x7468
    512564#define PCI_DEVICE_ID_AMD_8111_IDE      0x7469
    … …  
    518570#define PCI_DEVICE_ID_AMD_8131_APIC     0x7451
    519571#define PCI_DEVICE_ID_AMD_8132_BRIDGE   0x7458
    520 #define PCI_DEVICE_ID_AMD_SB900_SMBUS   0x780b
     572#define PCI_DEVICE_ID_AMD_NL_USB        0x7912
     573#define PCI_DEVICE_ID_AMD_CS5535_IDE    0x208F
    521574#define PCI_DEVICE_ID_AMD_CS5536_ISA    0x2090
    522575#define PCI_DEVICE_ID_AMD_CS5536_FLASH  0x2091
    … …  
    526579#define PCI_DEVICE_ID_AMD_CS5536_UDC    0x2096
    527580#define PCI_DEVICE_ID_AMD_CS5536_UOC    0x2097
     581#define PCI_DEVICE_ID_AMD_CS5536_DEV_IDE    0x2092
    528582#define PCI_DEVICE_ID_AMD_CS5536_IDE    0x209A
    529 
    530583#define PCI_DEVICE_ID_AMD_LX_VIDEO  0x2081
    531584#define PCI_DEVICE_ID_AMD_LX_AES    0x2082
     585#define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE      0x7800
     586#define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS         0x780b
     587#define PCI_DEVICE_ID_AMD_HUDSON2_IDE           0x780c
     588#define PCI_DEVICE_ID_AMD_KERNCZ_SMBUS  0x790b
    532589
    533590#define PCI_VENDOR_ID_TRIDENT           0x1023
    … …  
    571628#define PCI_DEVICE_ID_MATROX_G200_AGP   0x0521
    572629#define PCI_DEVICE_ID_MATROX_G400       0x0525
     630#define PCI_DEVICE_ID_MATROX_G200EV_PCI 0x0530
    573631#define PCI_DEVICE_ID_MATROX_G550       0x2527
    574632#define PCI_DEVICE_ID_MATROX_VIA        0x4536
     633
     634#define PCI_VENDOR_ID_MOBILITY_ELECTRONICS      0x14f2
    575635
    576636#define PCI_VENDOR_ID_CT                0x102c
    … …  
    604664#define PCI_DEVICE_ID_NEC_NAPCCARD      0x003e
    605665#define PCI_DEVICE_ID_NEC_PCX2          0x0046 /* PowerVR */
    606 #define PCI_DEVICE_ID_NEC_NILE4         0x005a
    607666#define PCI_DEVICE_ID_NEC_VRC5476       0x009b
    608667#define PCI_DEVICE_ID_NEC_VRC4173       0x00a5
    … …  
    663722#define PCI_DEVICE_ID_SI_966            0x0966
    664723#define PCI_DEVICE_ID_SI_968            0x0968
     724#define PCI_DEVICE_ID_SI_1180           0x1180
    665725#define PCI_DEVICE_ID_SI_5511           0x5511
    666726#define PCI_DEVICE_ID_SI_5513           0x5513
    … …  
    681741
    682742#define PCI_VENDOR_ID_HP                0x103c
     743#define PCI_VENDOR_ID_HP_3PAR           0x1590
    683744#define PCI_DEVICE_ID_HP_VISUALIZE_EG   0x1005
    684745#define PCI_DEVICE_ID_HP_VISUALIZE_FX6  0x1006
    … …  
    710771#define PCI_DEVICE_ID_HP_CISSC          0x3230
    711772#define PCI_DEVICE_ID_HP_CISSD          0x3238
     773#define PCI_DEVICE_ID_HP_CISSE          0x323a
     774#define PCI_DEVICE_ID_HP_CISSF          0x323b
     775#define PCI_DEVICE_ID_HP_CISSH          0x323c
     776#define PCI_DEVICE_ID_HP_CISSI          0x3239
    712777#define PCI_DEVICE_ID_HP_ZX2_IOC        0x4031
    713778
    … …  
    733798#define PCI_DEVICE_ID_ELSA_QS3000       0x3000
    734799
     800#define PCI_VENDOR_ID_STMICRO           0x104A
     801#define PCI_DEVICE_ID_STMICRO_USB_HOST  0xCC00
     802#define PCI_DEVICE_ID_STMICRO_USB_OHCI  0xCC01
     803#define PCI_DEVICE_ID_STMICRO_USB_OTG   0xCC02
     804#define PCI_DEVICE_ID_STMICRO_UART_HWFC 0xCC03
     805#define PCI_DEVICE_ID_STMICRO_UART_NO_HWFC      0xCC04
     806#define PCI_DEVICE_ID_STMICRO_SOC_DMA   0xCC05
     807#define PCI_DEVICE_ID_STMICRO_SATA      0xCC06
     808#define PCI_DEVICE_ID_STMICRO_I2C       0xCC07
     809#define PCI_DEVICE_ID_STMICRO_SPI_HS    0xCC08
     810#define PCI_DEVICE_ID_STMICRO_MAC       0xCC09
     811#define PCI_DEVICE_ID_STMICRO_SDIO_EMMC 0xCC0A
     812#define PCI_DEVICE_ID_STMICRO_SDIO      0xCC0B
     813#define PCI_DEVICE_ID_STMICRO_GPIO      0xCC0C
     814#define PCI_DEVICE_ID_STMICRO_VIP       0xCC0D
     815#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_DMA  0xCC0E
     816#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_SRCS 0xCC0F
     817#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_MSPS 0xCC10
     818#define PCI_DEVICE_ID_STMICRO_CAN       0xCC11
     819#define PCI_DEVICE_ID_STMICRO_MLB       0xCC12
     820#define PCI_DEVICE_ID_STMICRO_DBP       0xCC13
     821#define PCI_DEVICE_ID_STMICRO_SATA_PHY  0xCC14
     822#define PCI_DEVICE_ID_STMICRO_ESRAM     0xCC15
     823#define PCI_DEVICE_ID_STMICRO_VIC       0xCC16
    735824
    736825#define PCI_VENDOR_ID_BUSLOGIC                0x104B
    … …  
    748837#define PCI_DEVICE_ID_TI_XX12           0x8039
    749838#define PCI_DEVICE_ID_TI_XX12_FM        0x803b
     839#define PCI_DEVICE_ID_TI_XIO2000A       0x8231
    750840#define PCI_DEVICE_ID_TI_1130           0xac12
    751841#define PCI_DEVICE_ID_TI_1031           0xac13
    … …  
    776866#define PCI_DEVICE_ID_TI_X420           0xac8e
    777867#define PCI_DEVICE_ID_TI_XX20_FM        0xac8f
     868#define PCI_DEVICE_ID_TI_DRA74x         0xb500
     869#define PCI_DEVICE_ID_TI_DRA72x         0xb501
    778870
    779871#define PCI_VENDOR_ID_SONY              0x104d
    780 
    781872
    782873/* Winbond have two vendor IDs! See 0x10ad as well */
    … …  
    787878#define PCI_VENDOR_ID_ANIGMA            0x1051
    788879#define PCI_DEVICE_ID_ANIGMA_MC145575   0x0100
    789  
     880
    790881#define PCI_VENDOR_ID_EFAR              0x1055
    791882#define PCI_DEVICE_ID_EFAR_SLC90E66_1   0x9130
    … …  
    817908#define PCI_DEVICE_ID_PROMISE_20277     0x7275
    818909
     910#define PCI_VENDOR_ID_FOXCONN           0x105b
    819911
    820912#define PCI_VENDOR_ID_UMC               0x1060
    … …  
    823915#define PCI_DEVICE_ID_UMC_UM8886A       0x886a
    824916
     917#define PCI_VENDOR_ID_PICOPOWER         0x1066
     918#define PCI_DEVICE_ID_PICOPOWER_PT86C523        0x0002
     919#define PCI_DEVICE_ID_PICOPOWER_PT86C523BBP     0x8002
    825920
    826921#define PCI_VENDOR_ID_MYLEX             0x1069
    … …  
    832927#define PCI_DEVICE_ID_MYLEX_DAC960_BA   0xBA56
    833928#define PCI_DEVICE_ID_MYLEX_DAC960_GEM  0xB166
    834 
    835929
    836930#define PCI_VENDOR_ID_APPLE             0x106b
    … …  
    855949#define PCI_DEVICE_ID_APPLE_U3L_AGP     0x0058
    856950#define PCI_DEVICE_ID_APPLE_U3H_AGP     0x0059
     951#define PCI_DEVICE_ID_APPLE_U4_PCIE     0x005b
    857952#define PCI_DEVICE_ID_APPLE_IPID2_AGP   0x0066
    858953#define PCI_DEVICE_ID_APPLE_IPID2_ATA   0x0069
    … …  
    868963#define PCI_DEVICE_ID_YAMAHA_744        0x0010
    869964#define PCI_DEVICE_ID_YAMAHA_754        0x0012
    870 
    871965
    872966#define PCI_VENDOR_ID_QLOGIC            0x1077
    … …  
    900994#define PCI_DEVICE_ID_CYRIX_5530_VIDEO  0x0104
    901995
    902 
    903 
    904996#define PCI_VENDOR_ID_CONTAQ            0x1080
    905997#define PCI_DEVICE_ID_CONTAQ_82C693     0xc693
    906 
    907998
    908999#define PCI_VENDOR_ID_OLICOM            0x108d
    … …  
    9271018#define PCI_DEVICE_ID_SUN_CASSINI       0xabba
    9281019
     1020#define PCI_VENDOR_ID_NI                0x1093
     1021#define PCI_DEVICE_ID_NI_PCI2322        0xd130
     1022#define PCI_DEVICE_ID_NI_PCI2324        0xd140
     1023#define PCI_DEVICE_ID_NI_PCI2328        0xd150
     1024#define PCI_DEVICE_ID_NI_PXI8422_2322   0xd190
     1025#define PCI_DEVICE_ID_NI_PXI8422_2324   0xd1a0
     1026#define PCI_DEVICE_ID_NI_PXI8420_2322   0xd1d0
     1027#define PCI_DEVICE_ID_NI_PXI8420_2324   0xd1e0
     1028#define PCI_DEVICE_ID_NI_PXI8420_2328   0xd1f0
     1029#define PCI_DEVICE_ID_NI_PXI8420_23216  0xd1f1
     1030#define PCI_DEVICE_ID_NI_PCI2322I       0xd250
     1031#define PCI_DEVICE_ID_NI_PCI2324I       0xd270
     1032#define PCI_DEVICE_ID_NI_PCI23216       0xd2b0
     1033#define PCI_DEVICE_ID_NI_PXI8430_2322   0x7080
     1034#define PCI_DEVICE_ID_NI_PCI8430_2322   0x70db
     1035#define PCI_DEVICE_ID_NI_PXI8430_2324   0x70dd
     1036#define PCI_DEVICE_ID_NI_PCI8430_2324   0x70df
     1037#define PCI_DEVICE_ID_NI_PXI8430_2328   0x70e2
     1038#define PCI_DEVICE_ID_NI_PCI8430_2328   0x70e4
     1039#define PCI_DEVICE_ID_NI_PXI8430_23216  0x70e6
     1040#define PCI_DEVICE_ID_NI_PCI8430_23216  0x70e7
     1041#define PCI_DEVICE_ID_NI_PXI8432_2322   0x70e8
     1042#define PCI_DEVICE_ID_NI_PCI8432_2322   0x70ea
     1043#define PCI_DEVICE_ID_NI_PXI8432_2324   0x70ec
     1044#define PCI_DEVICE_ID_NI_PCI8432_2324   0x70ee
     1045
    9291046#define PCI_VENDOR_ID_CMD               0x1095
    9301047#define PCI_DEVICE_ID_CMD_643           0x0643
    … …  
    9371054#define PCI_DEVICE_ID_SII_1210SA        0x0240
    9381055
    939 
    9401056#define PCI_VENDOR_ID_BROOKTREE         0x109e
    9411057#define PCI_DEVICE_ID_BROOKTREE_878     0x0878
    9421058#define PCI_DEVICE_ID_BROOKTREE_879     0x0879
    9431059
    944 
    9451060#define PCI_VENDOR_ID_SGI               0x10a9
    9461061#define PCI_DEVICE_ID_SGI_IOC3          0x0003
     1062#define PCI_DEVICE_ID_SGI_LITHIUM       0x1002
    9471063#define PCI_DEVICE_ID_SGI_IOC4          0x100a
    948 #define PCI_VENDOR_ID_SGI_LITHIUM       0x1002
    949 
    9501064
    9511065#define PCI_VENDOR_ID_WINBOND           0x10ad
    9521066#define PCI_DEVICE_ID_WINBOND_82C105    0x0105
    9531067#define PCI_DEVICE_ID_WINBOND_83C553    0x0565
    954 
    9551068
    9561069#define PCI_VENDOR_ID_PLX               0x10b5
    … …  
    9661079#define PCI_DEVICE_ID_PLX_9030          0x9030
    9671080#define PCI_DEVICE_ID_PLX_9050          0x9050
     1081#define PCI_DEVICE_ID_PLX_9056          0x9056
    9681082#define PCI_DEVICE_ID_PLX_9080          0x9080
    9691083#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2  0xa001
    … …  
    9861100#define PCI_DEVICE_ID_3COM_3CR990SVR97  0x9909
    9871101#define PCI_DEVICE_ID_3COM_3CR990SVR    0x990a
    988 
    9891102
    9901103#define PCI_VENDOR_ID_AL                0x10b9
    … …  
    10101123#define PCI_DEVICE_ID_AL_M7101          0x7101
    10111124
    1012 
    1013 
    10141125#define PCI_VENDOR_ID_NEOMAGIC          0x10c8
    10151126#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
    … …  
    10171128#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
    10181129
    1019 
    10201130#define PCI_VENDOR_ID_TCONRAD           0x10da
    10211131#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508
    1022 
    10231132
    10241133#define PCI_VENDOR_ID_NVIDIA                    0x10de
    … …  
    10321141#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE   0x0035
    10331142#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA  0x0036
    1034 #define PCI_DEVICE_ID_NVIDIA_NVENET_10          0x0037
    1035 #define PCI_DEVICE_ID_NVIDIA_NVENET_11          0x0038
    10361143#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2 0x003e
    10371144#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA 0x0040
    … …  
    10441151#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA  0x0054
    10451152#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2 0x0055
    1046 #define PCI_DEVICE_ID_NVIDIA_NVENET_8           0x0056
    1047 #define PCI_DEVICE_ID_NVIDIA_NVENET_9           0x0057
    10481153#define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO        0x0059
    10491154#define PCI_DEVICE_ID_NVIDIA_CK804_PCIE         0x005d
    10501155#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS      0x0064
    10511156#define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE        0x0065
    1052 #define PCI_DEVICE_ID_NVIDIA_NVENET_2           0x0066
    10531157#define PCI_DEVICE_ID_NVIDIA_MCP2_MODEM         0x0069
    10541158#define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO         0x006a
    10551159#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS     0x0084
    10561160#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE       0x0085
    1057 #define PCI_DEVICE_ID_NVIDIA_NVENET_4           0x0086
    10581161#define PCI_DEVICE_ID_NVIDIA_MCP2S_MODEM        0x0089
    10591162#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO          0x008a
    1060 #define PCI_DEVICE_ID_NVIDIA_NVENET_5           0x008c
    10611163#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA      0x008e
    10621164#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT   0x0090
    … …  
    10741176#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS      0x00d4
    10751177#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE        0x00d5
    1076 #define PCI_DEVICE_ID_NVIDIA_NVENET_3           0x00d6
    10771178#define PCI_DEVICE_ID_NVIDIA_MCP3_MODEM         0x00d9
    10781179#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO         0x00da
    1079 #define PCI_DEVICE_ID_NVIDIA_NVENET_7           0x00df
    10801180#define PCI_DEVICE_ID_NVIDIA_NFORCE3S           0x00e1
    10811181#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA      0x00e3
    10821182#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS     0x00e4
    10831183#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE       0x00e5
    1084 #define PCI_DEVICE_ID_NVIDIA_NVENET_6           0x00e6
    10851184#define PCI_DEVICE_ID_NVIDIA_CK8S_AUDIO         0x00ea
    10861185#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2     0x00ee
    … …  
    11421241#define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE         0x01bc
    11431242#define PCI_DEVICE_ID_NVIDIA_MCP1_MODEM         0x01c1
    1144 #define PCI_DEVICE_ID_NVIDIA_NVENET_1           0x01c3
    11451243#define PCI_DEVICE_ID_NVIDIA_NFORCE2            0x01e0
    11461244#define PCI_DEVICE_ID_NVIDIA_GEFORCE3           0x0200
    … …  
    11651263#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA  0x037E
    11661264#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F
    1167 #define PCI_DEVICE_ID_NVIDIA_NVENET_12          0x0268
    1168 #define PCI_DEVICE_ID_NVIDIA_NVENET_13          0x0269
    11691265#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800   0x0280
    11701266#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X    0x0281
    … …  
    12131309#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000       0x034C
    12141310#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100         0x034E
    1215 #define PCI_DEVICE_ID_NVIDIA_NVENET_14              0x0372
     1311#define PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V0        0x0360
     1312#define PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V4        0x0364
    12161313#define PCI_DEVICE_ID_NVIDIA_NVENET_15              0x0373
    1217 #define PCI_DEVICE_ID_NVIDIA_NVENET_16              0x03E5
    1218 #define PCI_DEVICE_ID_NVIDIA_NVENET_17              0x03E6
    12191314#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA      0x03E7
     1315#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS     0x03EB
    12201316#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE       0x03EC
    1221 #define PCI_DEVICE_ID_NVIDIA_NVENET_18              0x03EE
    1222 #define PCI_DEVICE_ID_NVIDIA_NVENET_19              0x03EF
    12231317#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2     0x03F6
    12241318#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3     0x03F7
     1319#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS     0x0446
    12251320#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE       0x0448
    1226 #define PCI_DEVICE_ID_NVIDIA_NVENET_20              0x0450
    1227 #define PCI_DEVICE_ID_NVIDIA_NVENET_21              0x0451
    1228 #define PCI_DEVICE_ID_NVIDIA_NVENET_22              0x0452
    1229 #define PCI_DEVICE_ID_NVIDIA_NVENET_23              0x0453
    1230 #define PCI_DEVICE_ID_NVIDIA_NVENET_24              0x054C
    1231 #define PCI_DEVICE_ID_NVIDIA_NVENET_25              0x054D
    1232 #define PCI_DEVICE_ID_NVIDIA_NVENET_26              0x054E
    1233 #define PCI_DEVICE_ID_NVIDIA_NVENET_27              0x054F
     1321#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS     0x0542
    12341322#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE       0x0560
     1323#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE       0x056C
     1324#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS    0x0752
     1325#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE       0x0759
     1326#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS     0x07D8
     1327#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS     0x0AA2
     1328#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA      0x0D85
    12351329
    12361330#define PCI_VENDOR_ID_IMS               0x10e0
    … …  
    12381332#define PCI_DEVICE_ID_IMS_TT3D          0x9135
    12391333
    1240 
    1241 
     1334#define PCI_VENDOR_ID_AMCC              0x10e8
     1335#define PCI_VENDOR_ID_AMPERE            0x1def
    12421336
    12431337#define PCI_VENDOR_ID_INTERG            0x10ea
    … …  
    12591353#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
    12601354
    1261 
    12621355#define PCI_VENDOR_ID_INIT              0x1101
    12631356
    12641357#define PCI_VENDOR_ID_CREATIVE          0x1102 /* duplicate: ECTIVA */
    12651358#define PCI_DEVICE_ID_CREATIVE_EMU10K1  0x0002
     1359#define PCI_DEVICE_ID_CREATIVE_20K1     0x0005
     1360#define PCI_DEVICE_ID_CREATIVE_20K2     0x000b
     1361#define PCI_SUBDEVICE_ID_CREATIVE_SB0760        0x0024
     1362#define PCI_SUBDEVICE_ID_CREATIVE_SB08801       0x0041
     1363#define PCI_SUBDEVICE_ID_CREATIVE_SB08802       0x0042
     1364#define PCI_SUBDEVICE_ID_CREATIVE_SB08803       0x0043
     1365#define PCI_SUBDEVICE_ID_CREATIVE_SB1270        0x0062
     1366#define PCI_SUBDEVICE_ID_CREATIVE_HENDRIX       0x6000
    12661367
    12671368#define PCI_VENDOR_ID_ECTIVA            0x1102 /* duplicate: CREATIVE */
    … …  
    12761377#define PCI_DEVICE_ID_TTI_HPT374        0x0008
    12771378#define PCI_DEVICE_ID_TTI_HPT372N       0x0009  /* apparently a 372N variant? */
     1379
     1380#define PCI_VENDOR_ID_SIGMA             0x1105
    12781381
    12791382#define PCI_VENDOR_ID_VIA               0x1106
    … …  
    12901393#define PCI_DEVICE_ID_VIA_P4M800CE      0x0314
    12911394#define PCI_DEVICE_ID_VIA_P4M890        0x0327
     1395#define PCI_DEVICE_ID_VIA_VT3324        0x0324
    12921396#define PCI_DEVICE_ID_VIA_VT3336        0x0336
     1397#define PCI_DEVICE_ID_VIA_VT3351        0x0351
     1398#define PCI_DEVICE_ID_VIA_VT3364        0x0364
    12931399#define PCI_DEVICE_ID_VIA_8371_0        0x0391
     1400#define PCI_DEVICE_ID_VIA_6415          0x0415
    12941401#define PCI_DEVICE_ID_VIA_8501_0        0x0501
    12951402#define PCI_DEVICE_ID_VIA_82C561        0x0561
    … …  
    13371444#define PCI_DEVICE_ID_VIA_8237          0x3227
    13381445#define PCI_DEVICE_ID_VIA_8251          0x3287
     1446#define PCI_DEVICE_ID_VIA_8261          0x3402
    13391447#define PCI_DEVICE_ID_VIA_8237A         0x3337
    13401448#define PCI_DEVICE_ID_VIA_8237S         0x3372
    … …  
    13441452#define PCI_DEVICE_ID_VIA_8365_1        0x8305
    13451453#define PCI_DEVICE_ID_VIA_CX700         0x8324
     1454#define PCI_DEVICE_ID_VIA_CX700_IDE     0x0581
     1455#define PCI_DEVICE_ID_VIA_VX800         0x8353
     1456#define PCI_DEVICE_ID_VIA_VX855         0x8409
     1457#define PCI_DEVICE_ID_VIA_VX900         0x8410
    13461458#define PCI_DEVICE_ID_VIA_8371_1        0x8391
    13471459#define PCI_DEVICE_ID_VIA_82C598_1      0x8598
    13481460#define PCI_DEVICE_ID_VIA_838X_1        0xB188
    13491461#define PCI_DEVICE_ID_VIA_83_87XX_1     0xB198
     1462#define PCI_DEVICE_ID_VIA_VX855_IDE     0xC409
     1463#define PCI_DEVICE_ID_VIA_ANON          0xFFFF
    13501464
    13511465#define PCI_VENDOR_ID_SIEMENS           0x110A
    13521466#define PCI_DEVICE_ID_SIEMENS_DSCC4     0x2102
    1353 
    13541467
    13551468#define PCI_VENDOR_ID_VORTEX            0x1119
    … …  
    13781491#define PCI_DEVICE_ID_EF_ATM_FPGA       0x0000
    13791492#define PCI_DEVICE_ID_EF_ATM_ASIC       0x0002
    1380 #define PCI_VENDOR_ID_EF_ATM_LANAI2     0x0003
    1381 #define PCI_VENDOR_ID_EF_ATM_LANAIHB    0x0005
     1493#define PCI_DEVICE_ID_EF_ATM_LANAI2     0x0003
     1494#define PCI_DEVICE_ID_EF_ATM_LANAIHB    0x0005
    13821495
    13831496#define PCI_VENDOR_ID_IDT               0x111d
    … …  
    13861499#define PCI_VENDOR_ID_FORE              0x1127
    13871500#define PCI_DEVICE_ID_FORE_PCA200E      0x0300
    1388 
    13891501
    13901502#define PCI_VENDOR_ID_PHILIPS           0x1131
    … …  
    14021514#define PCI_DEVICE_ID_EICON_MAESTRAP    0xe014
    14031515
     1516#define PCI_VENDOR_ID_CISCO             0x1137
     1517
    14041518#define PCI_VENDOR_ID_ZIATECH           0x1138
    14051519#define PCI_DEVICE_ID_ZIATECH_5550_HC   0x5550
    1406  
    14071520
    14081521
    … …  
    14141527#define PCI_DEVICE_ID_SYSKONNECT_9MXX   0x4500
    14151528
    1416 
    14171529#define PCI_VENDOR_ID_DIGI              0x114f
    14181530#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E  0x0070
    … …  
    14201532#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A  0x0072
    14211533#define PCI_DEVICE_ID_DIGI_DF_M_A       0x0073
     1534#define PCI_DEVICE_ID_DIGI_NEO_8        0x00B1
    14221535#define PCI_DEVICE_ID_NEO_2DB9          0x00C8
    14231536#define PCI_DEVICE_ID_NEO_2DB9PRI       0x00C9
    14241537#define PCI_DEVICE_ID_NEO_2RJ45         0x00CA
    14251538#define PCI_DEVICE_ID_NEO_2RJ45PRI      0x00CB
    1426 
     1539#define PCIE_DEVICE_ID_NEO_4_IBM        0x00F4
    14271540
    14281541#define PCI_VENDOR_ID_XIRCOM            0x115d
    14291542#define PCI_DEVICE_ID_XIRCOM_RBM56G     0x0101
    14301543#define PCI_DEVICE_ID_XIRCOM_X3201_MDM  0x0103
    1431 
    14321544
    14331545#define PCI_VENDOR_ID_SERVERWORKS         0x1166
    … …  
    14351547#define PCI_DEVICE_ID_SERVERWORKS_LE      0x0009
    14361548#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017
     1549#define PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB    0x0036
    14371550#define PCI_DEVICE_ID_SERVERWORKS_EPB     0x0103
    14381551#define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE   0x0132
    … …  
    14471560#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
    14481561#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227
     1562#define PCI_DEVICE_ID_SERVERWORKS_HT1100LD 0x0408
    14491563
    14501564#define PCI_VENDOR_ID_SBE               0x1176
    … …  
    14521566#define PCI_DEVICE_ID_SBE_WANXL200      0x0302
    14531567#define PCI_DEVICE_ID_SBE_WANXL400      0x0104
     1568#define PCI_SUBDEVICE_ID_SBE_T3E3       0x0009
     1569#define PCI_SUBDEVICE_ID_SBE_2T3E3_P0   0x0901
     1570#define PCI_SUBDEVICE_ID_SBE_2T3E3_P1   0x0902
    14541571
    14551572#define PCI_VENDOR_ID_TOSHIBA           0x1179
    1456 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO   0x0102
    1457 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103
    1458 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105
     1573#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0101
     1574#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0102
     1575#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_3 0x0103
     1576#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_5 0x0105
    14591577#define PCI_DEVICE_ID_TOSHIBA_TOPIC95   0x060a
    14601578#define PCI_DEVICE_ID_TOSHIBA_TOPIC97   0x060f
    … …  
    14631581#define PCI_VENDOR_ID_TOSHIBA_2         0x102f
    14641582#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030
     1583#define PCI_DEVICE_ID_TOSHIBA_TC35815_NWU       0x0031
     1584#define PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939    0x0032
    14651585#define PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE      0x0105
    14661586#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC     0x0108
    14671587#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3
     1588
     1589#define PCI_VENDOR_ID_ATTO              0x117c
    14681590
    14691591#define PCI_VENDOR_ID_RICOH             0x1180
    … …  
    14741596#define PCI_DEVICE_ID_RICOH_RL5C478     0x0478
    14751597#define PCI_DEVICE_ID_RICOH_R5C822      0x0822
     1598#define PCI_DEVICE_ID_RICOH_R5CE822     0xe822
     1599#define PCI_DEVICE_ID_RICOH_R5CE823     0xe823
     1600#define PCI_DEVICE_ID_RICOH_R5C832      0x0832
     1601#define PCI_DEVICE_ID_RICOH_R5C843      0x0843
    14761602
    14771603#define PCI_VENDOR_ID_DLINK             0x1186
    … …  
    14841610#define PCI_DEVICE_ID_ARTOP_ATP865      0x0008
    14851611#define PCI_DEVICE_ID_ARTOP_ATP865R     0x0009
     1612#define PCI_DEVICE_ID_ARTOP_ATP867A     0x000A
     1613#define PCI_DEVICE_ID_ARTOP_ATP867B     0x000B
    14861614#define PCI_DEVICE_ID_ARTOP_AEC7610     0x8002
    14871615#define PCI_DEVICE_ID_ARTOP_AEC7612UW   0x8010
    … …  
    14961624#define PCI_DEVICE_ID_ZEITNET_1225      0x0002
    14971625
    1498 
    14991626#define PCI_VENDOR_ID_FUJITSU_ME        0x119e
    15001627#define PCI_DEVICE_ID_FUJITSU_FS155     0x0001
    … …  
    15051632
    15061633#define PCI_VENDOR_ID_MARVELL           0x11ab
     1634#define PCI_VENDOR_ID_MARVELL_EXT       0x1b4b
    15071635#define PCI_DEVICE_ID_MARVELL_GT64111   0x4146
    15081636#define PCI_DEVICE_ID_MARVELL_GT64260   0x6430
    15091637#define PCI_DEVICE_ID_MARVELL_MV64360   0x6460
    15101638#define PCI_DEVICE_ID_MARVELL_MV64460   0x6480
     1639#define PCI_DEVICE_ID_MARVELL_88ALP01_NAND      0x4100
     1640#define PCI_DEVICE_ID_MARVELL_88ALP01_SD        0x4101
     1641#define PCI_DEVICE_ID_MARVELL_88ALP01_CCIC      0x4102
    15111642
    15121643#define PCI_VENDOR_ID_V3                0x11b0
    … …  
    15141645#define PCI_DEVICE_ID_V3_V351           0x0002
    15151646
    1516 
    15171647#define PCI_VENDOR_ID_ATT               0x11c1
    15181648#define PCI_DEVICE_ID_ATT_VENUS_MODEM   0x480
    15191649
    1520 
    15211650#define PCI_VENDOR_ID_SPECIALIX         0x11cb
    1522 #define PCI_DEVICE_ID_SPECIALIX_IO8     0x2000
    1523 #define PCI_DEVICE_ID_SPECIALIX_RIO     0x8000
    15241651#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
    1525 
    15261652
    15271653#define PCI_VENDOR_ID_ANALOG_DEVICES    0x11d4
    15281654#define PCI_DEVICE_ID_AD1889JS          0x1889
    1529 
    15301655
    15311656#define PCI_DEVICE_ID_SEGA_BBA          0x1234
    … …  
    15351660#define PCI_DEVICE_ID_ZORAN_36120       0x6120
    15361661
    1537 
    15381662#define PCI_VENDOR_ID_COMPEX            0x11f6
    15391663#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
     1664
     1665#define PCI_VENDOR_ID_PMC_Sierra        0x11f8
    15401666
    15411667#define PCI_VENDOR_ID_RP                0x11fe
    … …  
    15471673#define PCI_DEVICE_ID_RP8J              0x0006
    15481674#define PCI_DEVICE_ID_RP4J              0x0007
    1549 #define PCI_DEVICE_ID_RP8SNI            0x0008 
    1550 #define PCI_DEVICE_ID_RP16SNI           0x0009 
     1675#define PCI_DEVICE_ID_RP8SNI            0x0008
     1676#define PCI_DEVICE_ID_RP16SNI           0x0009
    15511677#define PCI_DEVICE_ID_RPP4              0x000A
    15521678#define PCI_DEVICE_ID_RPP8              0x000B
    … …  
    15581684#define PCI_DEVICE_ID_URP16INTF         0x0803
    15591685#define PCI_DEVICE_ID_URP8OCTA          0x0805
    1560 #define PCI_DEVICE_ID_UPCI_RM3_8PORT    0x080C       
     1686#define PCI_DEVICE_ID_UPCI_RM3_8PORT    0x080C
    15611687#define PCI_DEVICE_ID_UPCI_RM3_4PORT    0x080D
    1562 #define PCI_DEVICE_ID_CRP16INTF         0x0903       
     1688#define PCI_DEVICE_ID_CRP16INTF         0x0903
    15631689
    15641690#define PCI_VENDOR_ID_CYCLADES          0x120e
    … …  
    15861712#define PCI_DEVICE_ID_O2_6832           0x6832
    15871713#define PCI_DEVICE_ID_O2_6836           0x6836
     1714#define PCI_DEVICE_ID_O2_6812           0x6872
     1715#define PCI_DEVICE_ID_O2_6933           0x6933
     1716#define PCI_DEVICE_ID_O2_8120           0x8120
     1717#define PCI_DEVICE_ID_O2_8220           0x8220
     1718#define PCI_DEVICE_ID_O2_8221           0x8221
     1719#define PCI_DEVICE_ID_O2_8320           0x8320
     1720#define PCI_DEVICE_ID_O2_8321           0x8321
    15881721
    15891722#define PCI_VENDOR_ID_3DFX              0x121a
    … …  
    15931726#define PCI_DEVICE_ID_3DFX_VOODOO3      0x0005
    15941727#define PCI_DEVICE_ID_3DFX_VOODOO5      0x0009
    1595 
    1596 
    15971728
    15981729#define PCI_VENDOR_ID_AVM               0x1244
    … …  
    16031734#define PCI_DEVICE_ID_AVM_C2            0x1100
    16041735#define PCI_DEVICE_ID_AVM_T1            0x1200
    1605 
    16061736
    16071737#define PCI_VENDOR_ID_STALLION          0x124d
    … …  
    16271757#define PCI_DEVICE_ID_SATSAGEM_NICCY    0x1016
    16281758
    1629 
    16301759#define PCI_VENDOR_ID_ENSONIQ           0x1274
    16311760#define PCI_DEVICE_ID_ENSONIQ_CT5880    0x5880
    … …  
    16391768
    16401769#define PCI_VENDOR_ID_ITE               0x1283
     1770#define PCI_DEVICE_ID_ITE_8172          0x8172
    16411771#define PCI_DEVICE_ID_ITE_8211          0x8211
    16421772#define PCI_DEVICE_ID_ITE_8212          0x8212
    16431773#define PCI_DEVICE_ID_ITE_8213          0x8213
     1774#define PCI_DEVICE_ID_ITE_8152          0x8152
    16441775#define PCI_DEVICE_ID_ITE_8872          0x8872
    16451776#define PCI_DEVICE_ID_ITE_IT8330G_0     0xe886
    … …  
    16491780
    16501781#define PCI_VENDOR_ID_ALTEON            0x12ae
    1651 
    16521782
    16531783#define PCI_SUBVENDOR_ID_CONNECT_TECH                   0x12c4
    … …  
    16811811#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485    0x0332
    16821812
    1683 
    16841813#define PCI_VENDOR_ID_NVIDIA_SGS        0x12d2
    16851814#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
    … …  
    17041833#define PCI_VENDOR_ID_ESDGMBH           0x12fe
    17051834#define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
     1835
     1836#define PCI_VENDOR_ID_CB                0x1307  /* Measurement Computing */
    17061837
    17071838#define PCI_VENDOR_ID_SIIG              0x131f
    … …  
    17511882#define PCI_VENDOR_ID_RADISYS           0x1331
    17521883
     1884#define PCI_VENDOR_ID_MICRO_MEMORY              0x1332
     1885#define PCI_DEVICE_ID_MICRO_MEMORY_5415CN       0x5415
     1886#define PCI_DEVICE_ID_MICRO_MEMORY_5425CN       0x5425
     1887#define PCI_DEVICE_ID_MICRO_MEMORY_6155         0x6155
     1888
    17531889#define PCI_VENDOR_ID_DOMEX             0x134a
    17541890#define PCI_DEVICE_ID_DOMEX_DMX3191D    0x0001
    … …  
    17561892#define PCI_VENDOR_ID_INTASHIELD        0x135a
    17571893#define PCI_DEVICE_ID_INTASHIELD_IS200  0x0d80
     1894#define PCI_DEVICE_ID_INTASHIELD_IS400  0x0dc0
    17581895
    17591896#define PCI_VENDOR_ID_QUATECH           0x135C
    17601897#define PCI_DEVICE_ID_QUATECH_QSC100    0x0010
    17611898#define PCI_DEVICE_ID_QUATECH_DSC100    0x0020
     1899#define PCI_DEVICE_ID_QUATECH_DSC200    0x0030
     1900#define PCI_DEVICE_ID_QUATECH_QSC200    0x0040
    17621901#define PCI_DEVICE_ID_QUATECH_ESC100D   0x0050
    17631902#define PCI_DEVICE_ID_QUATECH_ESC100M   0x0060
     1903#define PCI_DEVICE_ID_QUATECH_QSCP100   0x0120
     1904#define PCI_DEVICE_ID_QUATECH_DSCP100   0x0130
     1905#define PCI_DEVICE_ID_QUATECH_QSCP200   0x0140
     1906#define PCI_DEVICE_ID_QUATECH_DSCP200   0x0150
     1907#define PCI_DEVICE_ID_QUATECH_QSCLP100  0x0170
     1908#define PCI_DEVICE_ID_QUATECH_DSCLP100  0x0180
     1909#define PCI_DEVICE_ID_QUATECH_DSC100E   0x0181
     1910#define PCI_DEVICE_ID_QUATECH_SSCLP100  0x0190
     1911#define PCI_DEVICE_ID_QUATECH_QSCLP200  0x01A0
     1912#define PCI_DEVICE_ID_QUATECH_DSCLP200  0x01B0
     1913#define PCI_DEVICE_ID_QUATECH_DSC200E   0x01B1
     1914#define PCI_DEVICE_ID_QUATECH_SSCLP200  0x01C0
     1915#define PCI_DEVICE_ID_QUATECH_ESCLP100  0x01E0
     1916#define PCI_DEVICE_ID_QUATECH_SPPXP_100 0x0278
    17641917
    17651918#define PCI_VENDOR_ID_SEALEVEL          0x135e
    … …  
    17701923#define PCI_DEVICE_ID_SEALEVEL_COMM4    0x7401
    17711924#define PCI_DEVICE_ID_SEALEVEL_COMM8    0x7801
     1925#define PCI_DEVICE_ID_SEALEVEL_7803     0x7803
    17721926#define PCI_DEVICE_ID_SEALEVEL_UCOMM8   0x7804
    17731927
    … …  
    17791933#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2       0x0108
    17801934
     1935#define PCI_VENDOR_ID_DIGIGRAM          0x1369
     1936#define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_SERIAL_SUBSYSTEM     0xc001
     1937#define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_CAE_SERIAL_SUBSYSTEM 0xc002
     1938
    17811939#define PCI_VENDOR_ID_KAWASAKI          0x136b
    17821940#define PCI_DEVICE_ID_MCHIP_KL5A72002   0xff01
    … …  
    17901948#define PCI_DEVICE_ID_LMC_SSI           0x0005
    17911949#define PCI_DEVICE_ID_LMC_T1            0x0006
    1792 
    17931950
    17941951#define PCI_VENDOR_ID_NETGEAR           0x1385
    … …  
    18241981
    18251982#define PCI_VENDOR_ID_CCD               0x1397
     1983#define PCI_DEVICE_ID_CCD_HFC4S         0x08B4
     1984#define PCI_SUBDEVICE_ID_CCD_PMX2S      0x1234
     1985#define PCI_DEVICE_ID_CCD_HFC8S         0x16B8
    18261986#define PCI_DEVICE_ID_CCD_2BD0          0x2bd0
     1987#define PCI_DEVICE_ID_CCD_HFCE1         0x30B1
     1988#define PCI_SUBDEVICE_ID_CCD_SPD4S      0x3136
     1989#define PCI_SUBDEVICE_ID_CCD_SPDE1      0x3137
    18271990#define PCI_DEVICE_ID_CCD_B000          0xb000
    18281991#define PCI_DEVICE_ID_CCD_B006          0xb006
    … …  
    18341997#define PCI_DEVICE_ID_CCD_B00C          0xb00c
    18351998#define PCI_DEVICE_ID_CCD_B100          0xb100
     1999#define PCI_SUBDEVICE_ID_CCD_IOB4ST     0xB520
     2000#define PCI_SUBDEVICE_ID_CCD_IOB8STR    0xB521
     2001#define PCI_SUBDEVICE_ID_CCD_IOB8ST     0xB522
     2002#define PCI_SUBDEVICE_ID_CCD_IOB1E1     0xB523
     2003#define PCI_SUBDEVICE_ID_CCD_SWYX4S     0xB540
     2004#define PCI_SUBDEVICE_ID_CCD_JH4S20     0xB550
     2005#define PCI_SUBDEVICE_ID_CCD_IOB8ST_1   0xB552
     2006#define PCI_SUBDEVICE_ID_CCD_JHSE1      0xB553
     2007#define PCI_SUBDEVICE_ID_CCD_JH8S       0xB55B
     2008#define PCI_SUBDEVICE_ID_CCD_BN4S       0xB560
     2009#define PCI_SUBDEVICE_ID_CCD_BN8S       0xB562
     2010#define PCI_SUBDEVICE_ID_CCD_BNE1       0xB563
     2011#define PCI_SUBDEVICE_ID_CCD_BNE1D      0xB564
     2012#define PCI_SUBDEVICE_ID_CCD_BNE1DP     0xB565
     2013#define PCI_SUBDEVICE_ID_CCD_BN2S       0xB566
     2014#define PCI_SUBDEVICE_ID_CCD_BN1SM      0xB567
     2015#define PCI_SUBDEVICE_ID_CCD_BN4SM      0xB568
     2016#define PCI_SUBDEVICE_ID_CCD_BN2SM      0xB569
     2017#define PCI_SUBDEVICE_ID_CCD_BNE1M      0xB56A
     2018#define PCI_SUBDEVICE_ID_CCD_BN8SP      0xB56B
     2019#define PCI_SUBDEVICE_ID_CCD_HFC4S      0xB620
     2020#define PCI_SUBDEVICE_ID_CCD_HFC8S      0xB622
    18362021#define PCI_DEVICE_ID_CCD_B700          0xb700
    18372022#define PCI_DEVICE_ID_CCD_B701          0xb701
     2023#define PCI_SUBDEVICE_ID_CCD_HFCE1      0xC523
     2024#define PCI_SUBDEVICE_ID_CCD_OV2S       0xE884
     2025#define PCI_SUBDEVICE_ID_CCD_OV4S       0xE888
     2026#define PCI_SUBDEVICE_ID_CCD_OV8S       0xE998
    18382027
    18392028#define PCI_VENDOR_ID_EXAR              0x13a8
    … …  
    18412030#define PCI_DEVICE_ID_EXAR_XR17C154     0x0154
    18422031#define PCI_DEVICE_ID_EXAR_XR17C158     0x0158
     2032#define PCI_DEVICE_ID_EXAR_XR17V352     0x0352
     2033#define PCI_DEVICE_ID_EXAR_XR17V354     0x0354
     2034#define PCI_DEVICE_ID_EXAR_XR17V358     0x0358
    18432035
    18442036#define PCI_VENDOR_ID_MICROGATE         0x13c0
    … …  
    18562048#define PCI_VENDOR_ID_ABOCOM            0x13D1
    18572049#define PCI_DEVICE_ID_ABOCOM_2BD1       0x2BD1
     2050
     2051#define PCI_VENDOR_ID_SUNDANCE          0x13f0
    18582052
    18592053#define PCI_VENDOR_ID_CMEDIA            0x13f6
    … …  
    18632057#define PCI_DEVICE_ID_CMEDIA_CM8738B    0x0112
    18642058
     2059#define PCI_VENDOR_ID_ADVANTECH         0x13fe
     2060
     2061#define PCI_VENDOR_ID_MEILHAUS          0x1402
     2062
    18652063#define PCI_VENDOR_ID_LAVA              0x1407
    18662064#define PCI_DEVICE_ID_LAVA_DSERIAL      0x0100 /* 2x 16550 */
    18672065#define PCI_DEVICE_ID_LAVA_QUATRO_A     0x0101 /* 2x 16550, half of 4 port */
    18682066#define PCI_DEVICE_ID_LAVA_QUATRO_B     0x0102 /* 2x 16550, half of 4 port */
     2067#define PCI_DEVICE_ID_LAVA_QUATTRO_A    0x0120 /* 2x 16550A, half of 4 port */
     2068#define PCI_DEVICE_ID_LAVA_QUATTRO_B    0x0121 /* 2x 16550A, half of 4 port */
    18692069#define PCI_DEVICE_ID_LAVA_OCTO_A       0x0180 /* 4x 16550A, half of 8 port */
    18702070#define PCI_DEVICE_ID_LAVA_OCTO_B       0x0181 /* 4x 16550A, half of 8 port */
    … …  
    18882088#define PCI_VENDOR_ID_OXSEMI            0x1415
    18892089#define PCI_DEVICE_ID_OXSEMI_12PCI840   0x8403
     2090#define PCI_DEVICE_ID_OXSEMI_PCIe840            0xC000
     2091#define PCI_DEVICE_ID_OXSEMI_PCIe840_G          0xC004
     2092#define PCI_DEVICE_ID_OXSEMI_PCIe952_0          0xC100
     2093#define PCI_DEVICE_ID_OXSEMI_PCIe952_0_G        0xC104
     2094#define PCI_DEVICE_ID_OXSEMI_PCIe952_1          0xC110
     2095#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_G        0xC114
     2096#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_U        0xC118
     2097#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU       0xC11C
    18902098#define PCI_DEVICE_ID_OXSEMI_16PCI954   0x9501
     2099#define PCI_DEVICE_ID_OXSEMI_C950       0x950B
    18912100#define PCI_DEVICE_ID_OXSEMI_16PCI95N   0x9511
    18922101#define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513
    18932102#define PCI_DEVICE_ID_OXSEMI_16PCI952   0x9521
    18942103#define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523
     2104#define PCI_SUBDEVICE_ID_OXSEMI_C950    0x0001
     2105
     2106#define PCI_VENDOR_ID_CHELSIO           0x1425
     2107
     2108#define PCI_VENDOR_ID_ADLINK            0x144a
    18952109
    18962110#define PCI_VENDOR_ID_SAMSUNG           0x144d
     2111
     2112#define PCI_VENDOR_ID_GIGABYTE          0x1458
     2113
     2114#define PCI_VENDOR_ID_AMBIT             0x1468
    18972115
    18982116#define PCI_VENDOR_ID_MYRICOM           0x14c1
    … …  
    19232141#define PCI_SUBDEVICE_ID_AFAVLAB_P061           0x2150
    19242142
     2143#define PCI_VENDOR_ID_AMPLICON          0x14dc
     2144
     2145#define PCI_VENDOR_ID_BCM_GVC          0x14a4
    19252146#define PCI_VENDOR_ID_BROADCOM          0x14e4
    19262147#define PCI_DEVICE_ID_TIGON3_5752       0x1600
    19272148#define PCI_DEVICE_ID_TIGON3_5752M      0x1601
    19282149#define PCI_DEVICE_ID_NX2_5709          0x1639
     2150#define PCI_DEVICE_ID_NX2_5709S         0x163a
    19292151#define PCI_DEVICE_ID_TIGON3_5700       0x1644
    19302152#define PCI_DEVICE_ID_TIGON3_5701       0x1645
    … …  
    19362158#define PCI_DEVICE_ID_NX2_5708          0x164c
    19372159#define PCI_DEVICE_ID_TIGON3_5702FE     0x164d
     2160#define PCI_DEVICE_ID_NX2_57710         0x164e
     2161#define PCI_DEVICE_ID_NX2_57711         0x164f
     2162#define PCI_DEVICE_ID_NX2_57711E        0x1650
    19382163#define PCI_DEVICE_ID_TIGON3_5705       0x1653
    19392164#define PCI_DEVICE_ID_TIGON3_5705_2     0x1654
    1940 #define PCI_DEVICE_ID_TIGON3_5720       0x1658
     2165#define PCI_DEVICE_ID_TIGON3_5719       0x1657
    19412166#define PCI_DEVICE_ID_TIGON3_5721       0x1659
    19422167#define PCI_DEVICE_ID_TIGON3_5722       0x165a
     2168#define PCI_DEVICE_ID_TIGON3_5723       0x165b
    19432169#define PCI_DEVICE_ID_TIGON3_5705M      0x165d
    19442170#define PCI_DEVICE_ID_TIGON3_5705M_2    0x165e
     2171#define PCI_DEVICE_ID_NX2_57712         0x1662
     2172#define PCI_DEVICE_ID_NX2_57712E        0x1663
     2173#define PCI_DEVICE_ID_NX2_57712_MF      0x1663
    19452174#define PCI_DEVICE_ID_TIGON3_5714       0x1668
    19462175#define PCI_DEVICE_ID_TIGON3_5714S      0x1669
    … …  
    19482177#define PCI_DEVICE_ID_TIGON3_5780S      0x166b
    19492178#define PCI_DEVICE_ID_TIGON3_5705F      0x166e
     2179#define PCI_DEVICE_ID_NX2_57712_VF      0x166f
    19502180#define PCI_DEVICE_ID_TIGON3_5754M      0x1672
    19512181#define PCI_DEVICE_ID_TIGON3_5755M      0x1673
    … …  
    19572187#define PCI_DEVICE_ID_TIGON3_5754       0x167a
    19582188#define PCI_DEVICE_ID_TIGON3_5755       0x167b
    1959 #define PCI_DEVICE_ID_TIGON3_5750M      0x167c
    19602189#define PCI_DEVICE_ID_TIGON3_5751M      0x167d
    19612190#define PCI_DEVICE_ID_TIGON3_5751F      0x167e
    19622191#define PCI_DEVICE_ID_TIGON3_5787F      0x167f
     2192#define PCI_DEVICE_ID_TIGON3_5761E      0x1680
     2193#define PCI_DEVICE_ID_TIGON3_5761       0x1681
     2194#define PCI_DEVICE_ID_TIGON3_5764       0x1684
     2195#define PCI_DEVICE_ID_NX2_57800         0x168a
     2196#define PCI_DEVICE_ID_NX2_57840         0x168d
     2197#define PCI_DEVICE_ID_NX2_57810         0x168e
    19632198#define PCI_DEVICE_ID_TIGON3_5787M      0x1693
    19642199#define PCI_DEVICE_ID_TIGON3_5782       0x1696
     2200#define PCI_DEVICE_ID_TIGON3_5784       0x1698
    19652201#define PCI_DEVICE_ID_TIGON3_5786       0x169a
    19662202#define PCI_DEVICE_ID_TIGON3_5787       0x169b
    19672203#define PCI_DEVICE_ID_TIGON3_5788       0x169c
    19682204#define PCI_DEVICE_ID_TIGON3_5789       0x169d
     2205#define PCI_DEVICE_ID_NX2_57840_4_10    0x16a1
     2206#define PCI_DEVICE_ID_NX2_57840_2_20    0x16a2
     2207#define PCI_DEVICE_ID_NX2_57840_MF      0x16a4
     2208#define PCI_DEVICE_ID_NX2_57800_MF      0x16a5
    19692209#define PCI_DEVICE_ID_TIGON3_5702X      0x16a6
    19702210#define PCI_DEVICE_ID_TIGON3_5703X      0x16a7
    19712211#define PCI_DEVICE_ID_TIGON3_5704S      0x16a8
     2212#define PCI_DEVICE_ID_NX2_57800_VF      0x16a9
    19722213#define PCI_DEVICE_ID_NX2_5706S         0x16aa
    19732214#define PCI_DEVICE_ID_NX2_5708S         0x16ac
     2215#define PCI_DEVICE_ID_NX2_57840_VF      0x16ad
     2216#define PCI_DEVICE_ID_NX2_57810_MF      0x16ae
     2217#define PCI_DEVICE_ID_NX2_57810_VF      0x16af
    19742218#define PCI_DEVICE_ID_TIGON3_5702A3     0x16c6
    19752219#define PCI_DEVICE_ID_TIGON3_5703A3     0x16c7
    … …  
    19892233#define PCI_DEVICE_ID_TOPIC_TP560       0x0000
    19902234
     2235#define PCI_VENDOR_ID_MAINPINE          0x1522
     2236#define PCI_DEVICE_ID_MAINPINE_PBRIDGE  0x0100
    19912237#define PCI_VENDOR_ID_ENE               0x1524
     2238#define PCI_DEVICE_ID_ENE_CB710_FLASH   0x0510
    19922239#define PCI_DEVICE_ID_ENE_CB712_SD      0x0550
     2240#define PCI_DEVICE_ID_ENE_CB712_SD_2    0x0551
     2241#define PCI_DEVICE_ID_ENE_CB714_SD      0x0750
     2242#define PCI_DEVICE_ID_ENE_CB714_SD_2    0x0751
    19932243#define PCI_DEVICE_ID_ENE_1211          0x1211
    19942244#define PCI_DEVICE_ID_ENE_1225          0x1225
    … …  
    20002250#define PCI_DEVICE_ID_ENE_722           0x1422
    20012251
    2002 #define PCI_VENDOR_ID_CHELSIO           0x1425
    2003 
    20042252#define PCI_SUBVENDOR_ID_PERLE          0x155f
    20052253#define PCI_SUBDEVICE_ID_PCI_RAS4       0xf001
    20062254#define PCI_SUBDEVICE_ID_PCI_RAS8       0xf010
    20072255
    2008 
    20092256#define PCI_VENDOR_ID_SYBA              0x1592
    20102257#define PCI_DEVICE_ID_SYBA_2P_EPP       0x0782
    … …  
    20142261#define PCI_DEVICE_ID_RASTEL_2PORT      0x2000
    20152262
     2263#define PCI_VENDOR_ID_VMWARE            0x15ad
     2264#define PCI_DEVICE_ID_VMWARE_VMXNET3    0x07b0
     2265
    20162266#define PCI_VENDOR_ID_ZOLTRIX           0x15b0
    2017 #define PCI_DEVICE_ID_ZOLTRIX_2BD0      0x2bd0 
     2267#define PCI_DEVICE_ID_ZOLTRIX_2BD0      0x2bd0
    20182268
    20192269#define PCI_VENDOR_ID_MELLANOX          0x15b3
    2020 #define PCI_DEVICE_ID_MELLANOX_TAVOR    0x5a44
     2270#define PCI_DEVICE_ID_MELLANOX_CONNECTX3        0x1003
     2271#define PCI_DEVICE_ID_MELLANOX_CONNECTX3_PRO    0x1007
     2272#define PCI_DEVICE_ID_MELLANOX_CONNECTIB        0x1011
     2273#define PCI_DEVICE_ID_MELLANOX_CONNECTX4        0x1013
     2274#define PCI_DEVICE_ID_MELLANOX_CONNECTX4_LX     0x1015
     2275#define PCI_DEVICE_ID_MELLANOX_TAVOR            0x5a44
    20212276#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE     0x5a46
    2022 #define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278
    2023 #define PCI_DEVICE_ID_MELLANOX_ARBEL    0x6282
    2024 #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
    2025 #define PCI_DEVICE_ID_MELLANOX_SINAI    0x6274
     2277#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD        0x5e8c
     2278#define PCI_DEVICE_ID_MELLANOX_SINAI            0x6274
     2279#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT     0x6278
     2280#define PCI_DEVICE_ID_MELLANOX_ARBEL            0x6282
     2281#define PCI_DEVICE_ID_MELLANOX_HERMON_SDR       0x6340
     2282#define PCI_DEVICE_ID_MELLANOX_HERMON_DDR       0x634a
     2283#define PCI_DEVICE_ID_MELLANOX_HERMON_QDR       0x6354
     2284#define PCI_DEVICE_ID_MELLANOX_HERMON_EN        0x6368
     2285#define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN      0x6372
     2286#define PCI_DEVICE_ID_MELLANOX_HERMON_DDR_GEN2  0x6732
     2287#define PCI_DEVICE_ID_MELLANOX_HERMON_QDR_GEN2  0x673c
     2288#define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_5_GEN2 0x6746
     2289#define PCI_DEVICE_ID_MELLANOX_HERMON_EN_GEN2   0x6750
     2290#define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_T_GEN2 0x675a
     2291#define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_GEN2 0x6764
     2292#define PCI_DEVICE_ID_MELLANOX_CONNECTX2        0x676e
     2293
     2294#define PCI_VENDOR_ID_DFI               0x15bd
     2295
     2296#define PCI_VENDOR_ID_QUICKNET          0x15e2
     2297#define PCI_DEVICE_ID_QUICKNET_XJ       0x0500
     2298
     2299/*
     2300 * ADDI-DATA GmbH communication cards <info@addi-data.com>
     2301 */
     2302#define PCI_VENDOR_ID_ADDIDATA                 0x15B8
     2303#define PCI_DEVICE_ID_ADDIDATA_APCI7500        0x7000
     2304#define PCI_DEVICE_ID_ADDIDATA_APCI7420        0x7001
     2305#define PCI_DEVICE_ID_ADDIDATA_APCI7300        0x7002
     2306#define PCI_DEVICE_ID_ADDIDATA_APCI7500_2      0x7009
     2307#define PCI_DEVICE_ID_ADDIDATA_APCI7420_2      0x700A
     2308#define PCI_DEVICE_ID_ADDIDATA_APCI7300_2      0x700B
     2309#define PCI_DEVICE_ID_ADDIDATA_APCI7500_3      0x700C
     2310#define PCI_DEVICE_ID_ADDIDATA_APCI7420_3      0x700D
     2311#define PCI_DEVICE_ID_ADDIDATA_APCI7300_3      0x700E
     2312#define PCI_DEVICE_ID_ADDIDATA_APCI7800_3      0x700F
     2313#define PCI_DEVICE_ID_ADDIDATA_APCIe7300       0x7010
     2314#define PCI_DEVICE_ID_ADDIDATA_APCIe7420       0x7011
     2315#define PCI_DEVICE_ID_ADDIDATA_APCIe7500       0x7012
     2316#define PCI_DEVICE_ID_ADDIDATA_APCIe7800       0x7013
    20262317
    20272318#define PCI_VENDOR_ID_PDC               0x15e9
    2028 
    20292319
    20302320#define PCI_VENDOR_ID_FARSITE           0x1619
    … …  
    20392329#define PCI_VENDOR_ID_ARIMA             0x161f
    20402330
     2331#define PCI_VENDOR_ID_BROCADE           0x1657
     2332#define PCI_DEVICE_ID_BROCADE_CT        0x0014
     2333#define PCI_DEVICE_ID_BROCADE_FC_8G1P   0x0017
     2334#define PCI_DEVICE_ID_BROCADE_CT_FC     0x0021
     2335
    20412336#define PCI_VENDOR_ID_SIBYTE            0x166d
    20422337#define PCI_DEVICE_ID_BCM1250_PCI       0x0001
    20432338#define PCI_DEVICE_ID_BCM1250_HT        0x0002
    20442339
     2340#define PCI_VENDOR_ID_ATHEROS           0x168c
     2341
    20452342#define PCI_VENDOR_ID_NETCELL           0x169c
    20462343#define PCI_DEVICE_ID_REVOLUTION        0x0044
     2344
     2345#define PCI_VENDOR_ID_CENATEK           0x16CA
     2346#define PCI_DEVICE_ID_CENATEK_IDE       0x0001
     2347
     2348#define PCI_VENDOR_ID_SYNOPSYS          0x16c3
    20472349
    20482350#define PCI_VENDOR_ID_VITESSE           0x1725
    … …  
    20572359#define PCI_DEVICE_ID_ALTIMA_AC9100     0x03ea
    20582360#define PCI_DEVICE_ID_ALTIMA_AC1003     0x03eb
     2361
     2362#define PCI_VENDOR_ID_CAVIUM            0x177d
     2363
     2364#define PCI_VENDOR_ID_TECHWELL          0x1797
     2365#define PCI_DEVICE_ID_TECHWELL_6800     0x6800
     2366#define PCI_DEVICE_ID_TECHWELL_6801     0x6801
     2367#define PCI_DEVICE_ID_TECHWELL_6804     0x6804
     2368#define PCI_DEVICE_ID_TECHWELL_6816_1   0x6810
     2369#define PCI_DEVICE_ID_TECHWELL_6816_2   0x6811
     2370#define PCI_DEVICE_ID_TECHWELL_6816_3   0x6812
     2371#define PCI_DEVICE_ID_TECHWELL_6816_4   0x6813
     2372
     2373#define PCI_VENDOR_ID_BELKIN            0x1799
     2374#define PCI_DEVICE_ID_BELKIN_F5D7010V7  0x701f
     2375
     2376#define PCI_VENDOR_ID_RDC               0x17f3
     2377#define PCI_DEVICE_ID_RDC_R6020         0x6020
     2378#define PCI_DEVICE_ID_RDC_R6030         0x6030
     2379#define PCI_DEVICE_ID_RDC_R6040         0x6040
     2380#define PCI_DEVICE_ID_RDC_R6060         0x6060
     2381#define PCI_DEVICE_ID_RDC_R6061         0x6061
     2382#define PCI_DEVICE_ID_RDC_D1010         0x1010
     2383
     2384#define PCI_VENDOR_ID_LENOVO            0x17aa
    20592385
    20602386#define PCI_VENDOR_ID_ARECA             0x17d3
    … …  
    20642390#define PCI_DEVICE_ID_ARECA_1160        0x1160
    20652391#define PCI_DEVICE_ID_ARECA_1170        0x1170
     2392#define PCI_DEVICE_ID_ARECA_1200        0x1200
     2393#define PCI_DEVICE_ID_ARECA_1201        0x1201
     2394#define PCI_DEVICE_ID_ARECA_1202        0x1202
    20662395#define PCI_DEVICE_ID_ARECA_1210        0x1210
    20672396#define PCI_DEVICE_ID_ARECA_1220        0x1220
    … …  
    20812410#define PCI_DEVICE_ID_HERC_UNI          0x5832
    20822411
    2083 
    20842412#define PCI_VENDOR_ID_SITECOM           0x182d
    20852413#define PCI_DEVICE_ID_SITECOM_DC105V2   0x3069
    … …  
    20872415#define PCI_VENDOR_ID_TOPSPIN           0x1867
    20882416
     2417#define PCI_VENDOR_ID_COMMTECH          0x18f7
     2418
     2419#define PCI_VENDOR_ID_SILAN             0x1904
     2420
     2421#define PCI_VENDOR_ID_RENESAS           0x1912
     2422#define PCI_DEVICE_ID_RENESAS_SH7781    0x0001
     2423#define PCI_DEVICE_ID_RENESAS_SH7780    0x0002
     2424#define PCI_DEVICE_ID_RENESAS_SH7763    0x0004
     2425#define PCI_DEVICE_ID_RENESAS_SH7785    0x0007
     2426#define PCI_DEVICE_ID_RENESAS_SH7786    0x0010
     2427
     2428#define PCI_VENDOR_ID_SOLARFLARE        0x1924
     2429#define PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0     0x0703
     2430#define PCI_DEVICE_ID_SOLARFLARE_SFC4000A_1     0x6703
     2431#define PCI_DEVICE_ID_SOLARFLARE_SFC4000B       0x0710
     2432
    20892433#define PCI_VENDOR_ID_TDI               0x192E
    20902434#define PCI_DEVICE_ID_TDI_EHCI          0x0101
    20912435
     2436#define PCI_VENDOR_ID_FREESCALE         0x1957
     2437#define PCI_DEVICE_ID_MPC8308           0xc006
     2438#define PCI_DEVICE_ID_MPC8315E          0x00b4
     2439#define PCI_DEVICE_ID_MPC8315           0x00b5
     2440#define PCI_DEVICE_ID_MPC8314E          0x00b6
     2441#define PCI_DEVICE_ID_MPC8314           0x00b7
     2442#define PCI_DEVICE_ID_MPC8378E          0x00c4
     2443#define PCI_DEVICE_ID_MPC8378           0x00c5
     2444#define PCI_DEVICE_ID_MPC8377E          0x00c6
     2445#define PCI_DEVICE_ID_MPC8377           0x00c7
     2446#define PCI_DEVICE_ID_MPC8548E          0x0012
     2447#define PCI_DEVICE_ID_MPC8548           0x0013
     2448#define PCI_DEVICE_ID_MPC8543E          0x0014
     2449#define PCI_DEVICE_ID_MPC8543           0x0015
     2450#define PCI_DEVICE_ID_MPC8547E          0x0018
     2451#define PCI_DEVICE_ID_MPC8545E          0x0019
     2452#define PCI_DEVICE_ID_MPC8545           0x001a
     2453#define PCI_DEVICE_ID_MPC8569E          0x0061
     2454#define PCI_DEVICE_ID_MPC8569           0x0060
     2455#define PCI_DEVICE_ID_MPC8568E          0x0020
     2456#define PCI_DEVICE_ID_MPC8568           0x0021
     2457#define PCI_DEVICE_ID_MPC8567E          0x0022
     2458#define PCI_DEVICE_ID_MPC8567           0x0023
     2459#define PCI_DEVICE_ID_MPC8533E          0x0030
     2460#define PCI_DEVICE_ID_MPC8533           0x0031
     2461#define PCI_DEVICE_ID_MPC8544E          0x0032
     2462#define PCI_DEVICE_ID_MPC8544           0x0033
     2463#define PCI_DEVICE_ID_MPC8572E          0x0040
     2464#define PCI_DEVICE_ID_MPC8572           0x0041
     2465#define PCI_DEVICE_ID_MPC8536E          0x0050
     2466#define PCI_DEVICE_ID_MPC8536           0x0051
     2467#define PCI_DEVICE_ID_P2020E            0x0070
     2468#define PCI_DEVICE_ID_P2020             0x0071
     2469#define PCI_DEVICE_ID_P2010E            0x0078
     2470#define PCI_DEVICE_ID_P2010             0x0079
     2471#define PCI_DEVICE_ID_P1020E            0x0100
     2472#define PCI_DEVICE_ID_P1020             0x0101
     2473#define PCI_DEVICE_ID_P1021E            0x0102
     2474#define PCI_DEVICE_ID_P1021             0x0103
     2475#define PCI_DEVICE_ID_P1011E            0x0108
     2476#define PCI_DEVICE_ID_P1011             0x0109
     2477#define PCI_DEVICE_ID_P1022E            0x0110
     2478#define PCI_DEVICE_ID_P1022             0x0111
     2479#define PCI_DEVICE_ID_P1013E            0x0118
     2480#define PCI_DEVICE_ID_P1013             0x0119
     2481#define PCI_DEVICE_ID_P4080E            0x0400
     2482#define PCI_DEVICE_ID_P4080             0x0401
     2483#define PCI_DEVICE_ID_P4040E            0x0408
     2484#define PCI_DEVICE_ID_P4040             0x0409
     2485#define PCI_DEVICE_ID_P2040E            0x0410
     2486#define PCI_DEVICE_ID_P2040             0x0411
     2487#define PCI_DEVICE_ID_P3041E            0x041E
     2488#define PCI_DEVICE_ID_P3041             0x041F
     2489#define PCI_DEVICE_ID_P5020E            0x0420
     2490#define PCI_DEVICE_ID_P5020             0x0421
     2491#define PCI_DEVICE_ID_P5010E            0x0428
     2492#define PCI_DEVICE_ID_P5010             0x0429
     2493#define PCI_DEVICE_ID_MPC8641           0x7010
     2494#define PCI_DEVICE_ID_MPC8641D          0x7011
     2495#define PCI_DEVICE_ID_MPC8610           0x7018
     2496
    20922497#define PCI_VENDOR_ID_PASEMI            0x1959
    20932498
    20942499#define PCI_VENDOR_ID_ATTANSIC          0x1969
     2500#define PCI_DEVICE_ID_ATTANSIC_L1       0x1048
     2501#define PCI_DEVICE_ID_ATTANSIC_L2       0x2048
    20952502
    20962503#define PCI_VENDOR_ID_JMICRON           0x197B
    20972504#define PCI_DEVICE_ID_JMICRON_JMB360    0x2360
    20982505#define PCI_DEVICE_ID_JMICRON_JMB361    0x2361
     2506#define PCI_DEVICE_ID_JMICRON_JMB362    0x2362
    20992507#define PCI_DEVICE_ID_JMICRON_JMB363    0x2363
     2508#define PCI_DEVICE_ID_JMICRON_JMB364    0x2364
    21002509#define PCI_DEVICE_ID_JMICRON_JMB365    0x2365
    21012510#define PCI_DEVICE_ID_JMICRON_JMB366    0x2366
    21022511#define PCI_DEVICE_ID_JMICRON_JMB368    0x2368
     2512#define PCI_DEVICE_ID_JMICRON_JMB369    0x2369
     2513#define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381
     2514#define PCI_DEVICE_ID_JMICRON_JMB38X_MMC 0x2382
     2515#define PCI_DEVICE_ID_JMICRON_JMB38X_MS 0x2383
     2516#define PCI_DEVICE_ID_JMICRON_JMB385_MS 0x2388
     2517#define PCI_DEVICE_ID_JMICRON_JMB388_SD 0x2391
     2518#define PCI_DEVICE_ID_JMICRON_JMB388_ESD 0x2392
     2519#define PCI_DEVICE_ID_JMICRON_JMB390_MS 0x2393
    21032520
    21042521#define PCI_VENDOR_ID_KORENIX           0x1982
    21052522#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600
    21062523#define PCI_DEVICE_ID_KORENIX_JETCARDF1 0x16ff
     2524#define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700
     2525#define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff
     2526
     2527#define PCI_VENDOR_ID_HUAWEI            0x19e5
     2528
     2529#define PCI_VENDOR_ID_NETRONOME         0x19ee
     2530#define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200
     2531#define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240
     2532#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
     2533#define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000
     2534#define PCI_DEVICE_ID_NETRONOME_NFP6000_VF      0x6003
     2535
     2536#define PCI_VENDOR_ID_QMI               0x1a32
     2537
     2538#define PCI_VENDOR_ID_AZWAVE            0x1a3b
     2539
     2540#define PCI_VENDOR_ID_REDHAT_QUMRANET    0x1af4
     2541#define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4
     2542#define PCI_SUBDEVICE_ID_QEMU            0x1100
     2543
     2544#define PCI_VENDOR_ID_ASMEDIA           0x1b21
     2545
     2546#define PCI_VENDOR_ID_CIRCUITCO         0x1cc8
     2547#define PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD  0x0001
    21072548
    21082549#define PCI_VENDOR_ID_TEKRAM            0x1de1
    21092550#define PCI_DEVICE_ID_TEKRAM_DC290      0xdc29
     2551
     2552#define PCI_VENDOR_ID_TEHUTI            0x1fc9
     2553#define PCI_DEVICE_ID_TEHUTI_3009       0x3009
     2554#define PCI_DEVICE_ID_TEHUTI_3010       0x3010
     2555#define PCI_DEVICE_ID_TEHUTI_3014       0x3014
    21102556
    21112557#define PCI_VENDOR_ID_HINT             0x3388
    … …  
    21162562#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009
    21172563
     2564#define PCI_VENDOR_ID_NETXEN            0x4040
     2565#define PCI_DEVICE_ID_NX2031_10GXSR     0x0001
     2566#define PCI_DEVICE_ID_NX2031_10GCX4     0x0002
     2567#define PCI_DEVICE_ID_NX2031_4GCU       0x0003
     2568#define PCI_DEVICE_ID_NX2031_IMEZ       0x0004
     2569#define PCI_DEVICE_ID_NX2031_HMEZ       0x0005
     2570#define PCI_DEVICE_ID_NX2031_XG_MGMT    0x0024
     2571#define PCI_DEVICE_ID_NX2031_XG_MGMT2   0x0025
     2572#define PCI_DEVICE_ID_NX3031            0x0100
    21182573
    21192574#define PCI_VENDOR_ID_AKS               0x416c
    21202575#define PCI_DEVICE_ID_AKS_ALADDINCARD   0x0100
    21212576
    2122 
     2577#define PCI_VENDOR_ID_ACCESSIO          0x494f
     2578#define PCI_DEVICE_ID_ACCESSIO_WDG_CSM  0x22c0
    21232579
    21242580#define PCI_VENDOR_ID_S3                0x5333
    … …  
    21332589#define PCI_DEVICE_ID_DUNORD_I3000      0x0001
    21342590
    2135 
    21362591#define PCI_VENDOR_ID_DCI               0x6666
    21372592#define PCI_DEVICE_ID_DCI_PCCOM4        0x0001
    … …  
    21462601#define PCI_DEVICE_ID_INTEL_PXH_1       0x032A
    21472602#define PCI_DEVICE_ID_INTEL_PXHV        0x032C
     2603#define PCI_DEVICE_ID_INTEL_80332_0     0x0330
     2604#define PCI_DEVICE_ID_INTEL_80332_1     0x0332
     2605#define PCI_DEVICE_ID_INTEL_80333_0     0x0370
     2606#define PCI_DEVICE_ID_INTEL_80333_1     0x0372
    21482607#define PCI_DEVICE_ID_INTEL_82375       0x0482
    21492608#define PCI_DEVICE_ID_INTEL_82424       0x0483
    21502609#define PCI_DEVICE_ID_INTEL_82378       0x0484
     2610#define PCI_DEVICE_ID_INTEL_MRST_SD0    0x0807
     2611#define PCI_DEVICE_ID_INTEL_MRST_SD1    0x0808
     2612#define PCI_DEVICE_ID_INTEL_MFD_SD      0x0820
     2613#define PCI_DEVICE_ID_INTEL_MFD_SDIO1   0x0821
     2614#define PCI_DEVICE_ID_INTEL_MFD_SDIO2   0x0822
     2615#define PCI_DEVICE_ID_INTEL_MFD_EMMC0   0x0823
     2616#define PCI_DEVICE_ID_INTEL_MFD_EMMC1   0x0824
     2617#define PCI_DEVICE_ID_INTEL_MRST_SD2    0x084F
     2618#define PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB     0x095E
    21512619#define PCI_DEVICE_ID_INTEL_I960        0x0960
    21522620#define PCI_DEVICE_ID_INTEL_I960RM      0x0962
     2621#define PCI_DEVICE_ID_INTEL_CENTERTON_ILB       0x0c60
     2622#define PCI_DEVICE_ID_INTEL_8257X_SOL   0x1062
     2623#define PCI_DEVICE_ID_INTEL_82573E_SOL  0x1085
     2624#define PCI_DEVICE_ID_INTEL_82573L_SOL  0x108F
    21532625#define PCI_DEVICE_ID_INTEL_82815_MC    0x1130
    21542626#define PCI_DEVICE_ID_INTEL_82815_CGC   0x1132
    21552627#define PCI_DEVICE_ID_INTEL_82092AA_0   0x1221
    2156 #define PCI_DEVICE_ID_INTEL_7505_0      0x2550 
     2628#define PCI_DEVICE_ID_INTEL_7505_0      0x2550
    21572629#define PCI_DEVICE_ID_INTEL_7205_0      0x255d
    21582630#define PCI_DEVICE_ID_INTEL_82437       0x122d
    … …  
    21632635#define PCI_DEVICE_ID_INTEL_82380FB     0x124b
    21642636#define PCI_DEVICE_ID_INTEL_82439       0x1250
     2637#define PCI_DEVICE_ID_INTEL_LIGHT_RIDGE             0x1513 /* Tbt 1 Gen 1 */
     2638#define PCI_DEVICE_ID_INTEL_EAGLE_RIDGE             0x151a
     2639#define PCI_DEVICE_ID_INTEL_LIGHT_PEAK              0x151b
     2640#define PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C         0x1547 /* Tbt 1 Gen 2 */
     2641#define PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C         0x1548
     2642#define PCI_DEVICE_ID_INTEL_PORT_RIDGE              0x1549
     2643#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_NHI    0x1566 /* Tbt 1 Gen 3 */
     2644#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE 0x1567
     2645#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_NHI    0x1568
     2646#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE 0x1569
     2647#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI     0x156a /* Thunderbolt 2 */
     2648#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE  0x156b
     2649#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI     0x156c
     2650#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE  0x156d
     2651#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI     0x1575 /* Thunderbolt 3 */
     2652#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE  0x1576
     2653#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI     0x1577
     2654#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE  0x1578
    21652655#define PCI_DEVICE_ID_INTEL_80960_RP    0x1960
    21662656#define PCI_DEVICE_ID_INTEL_82840_HB    0x1a21
    21672657#define PCI_DEVICE_ID_INTEL_82845_HB    0x1a30
    21682658#define PCI_DEVICE_ID_INTEL_IOAT        0x1a38
     2659#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
     2660#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
     2661#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0      0x1d40
     2662#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1      0x1d41
     2663#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI   0x1e31
     2664#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN        0x1e40
     2665#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX        0x1e5f
     2666#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN    0x2310
     2667#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX    0x231f
    21692668#define PCI_DEVICE_ID_INTEL_82801AA_0   0x2410
    21702669#define PCI_DEVICE_ID_INTEL_82801AA_1   0x2411
    … …  
    21982697#define PCI_DEVICE_ID_INTEL_82801DB_0   0x24c0
    21992698#define PCI_DEVICE_ID_INTEL_82801DB_1   0x24c1
     2699#define PCI_DEVICE_ID_INTEL_82801DB_2   0x24c2
    22002700#define PCI_DEVICE_ID_INTEL_82801DB_3   0x24c3
    22012701#define PCI_DEVICE_ID_INTEL_82801DB_5   0x24c5
    … …  
    22112711#define PCI_DEVICE_ID_INTEL_82801EB_6   0x24d6
    22122712#define PCI_DEVICE_ID_INTEL_82801EB_11  0x24db
     2713#define PCI_DEVICE_ID_INTEL_82801EB_12  0x24dc
    22132714#define PCI_DEVICE_ID_INTEL_82801EB_13  0x24dd
    22142715#define PCI_DEVICE_ID_INTEL_ESB_1       0x25a1
    … …  
    22172718#define PCI_DEVICE_ID_INTEL_ESB_5       0x25a6
    22182719#define PCI_DEVICE_ID_INTEL_ESB_9       0x25ab
     2720#define PCI_DEVICE_ID_INTEL_ESB_10      0x25ac
    22192721#define PCI_DEVICE_ID_INTEL_82820_HB    0x2500
    22202722#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501
    … …  
    22312733#define PCI_DEVICE_ID_INTEL_82915GM_HB  0x2590
    22322734#define PCI_DEVICE_ID_INTEL_82915GM_IG  0x2592
     2735#define PCI_DEVICE_ID_INTEL_5000_ERR    0x25F0
     2736#define PCI_DEVICE_ID_INTEL_5000_FBD0   0x25F5
     2737#define PCI_DEVICE_ID_INTEL_5000_FBD1   0x25F6
    22332738#define PCI_DEVICE_ID_INTEL_82945G_HB   0x2770
    22342739#define PCI_DEVICE_ID_INTEL_82945G_IG   0x2772
     2740#define PCI_DEVICE_ID_INTEL_3000_HB     0x2778
    22352741#define PCI_DEVICE_ID_INTEL_82945GM_HB  0x27A0
    22362742#define PCI_DEVICE_ID_INTEL_82945GM_IG  0x27A2
    … …  
    22492755#define PCI_DEVICE_ID_INTEL_ICH7_1      0x27b9
    22502756#define PCI_DEVICE_ID_INTEL_ICH7_30     0x27b0
     2757#define PCI_DEVICE_ID_INTEL_TGP_LPC     0x27bc
    22512758#define PCI_DEVICE_ID_INTEL_ICH7_31     0x27bd
    22522759#define PCI_DEVICE_ID_INTEL_ICH7_17     0x27da
    … …  
    22622769#define PCI_DEVICE_ID_INTEL_ICH8_6      0x2850
    22632770#define PCI_DEVICE_ID_INTEL_ICH9_0      0x2910
    2264 #define PCI_DEVICE_ID_INTEL_ICH9_1      0x2911
     2771#define PCI_DEVICE_ID_INTEL_ICH9_1      0x2917
    22652772#define PCI_DEVICE_ID_INTEL_ICH9_2      0x2912
    22662773#define PCI_DEVICE_ID_INTEL_ICH9_3      0x2913
    22672774#define PCI_DEVICE_ID_INTEL_ICH9_4      0x2914
    2268 #define PCI_DEVICE_ID_INTEL_ICH9_5      0x2915
     2775#define PCI_DEVICE_ID_INTEL_ICH9_5      0x2919
    22692776#define PCI_DEVICE_ID_INTEL_ICH9_6      0x2930
     2777#define PCI_DEVICE_ID_INTEL_ICH9_7      0x2916
     2778#define PCI_DEVICE_ID_INTEL_ICH9_8      0x2918
     2779#define PCI_DEVICE_ID_INTEL_I7_MCR      0x2c18
     2780#define PCI_DEVICE_ID_INTEL_I7_MC_TAD   0x2c19
     2781#define PCI_DEVICE_ID_INTEL_I7_MC_RAS   0x2c1a
     2782#define PCI_DEVICE_ID_INTEL_I7_MC_TEST  0x2c1c
     2783#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_CTRL  0x2c20
     2784#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_ADDR  0x2c21
     2785#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_RANK  0x2c22
     2786#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_TC    0x2c23
     2787#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_CTRL  0x2c28
     2788#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_ADDR  0x2c29
     2789#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_RANK  0x2c2a
     2790#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_TC    0x2c2b
     2791#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_CTRL  0x2c30
     2792#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR  0x2c31
     2793#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK  0x2c32
     2794#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC    0x2c33
     2795#define PCI_DEVICE_ID_INTEL_I7_NONCORE  0x2c41
     2796#define PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT 0x2c40
     2797#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE     0x2c50
     2798#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT 0x2c51
     2799#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2 0x2c70
     2800#define PCI_DEVICE_ID_INTEL_LYNNFIELD_SAD         0x2c81
     2801#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0   0x2c90
     2802#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_PHY0    0x2c91
     2803#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR         0x2c98
     2804#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD      0x2c99
     2805#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST     0x2c9C
     2806#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL 0x2ca0
     2807#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR 0x2ca1
     2808#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK 0x2ca2
     2809#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC   0x2ca3
     2810#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL 0x2ca8
     2811#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR 0x2ca9
     2812#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK 0x2caa
     2813#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC   0x2cab
     2814#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2          0x2d98
     2815#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2       0x2d99
     2816#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2       0x2d9a
     2817#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2      0x2d9c
     2818#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2  0x2da0
     2819#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2  0x2da1
     2820#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2  0x2da2
     2821#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2    0x2da3
     2822#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2  0x2da8
     2823#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2  0x2da9
     2824#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2  0x2daa
     2825#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2    0x2dab
     2826#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2  0x2db0
     2827#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2  0x2db1
     2828#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2  0x2db2
     2829#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2    0x2db3
    22702830#define PCI_DEVICE_ID_INTEL_82855PM_HB  0x3340
     2831#define PCI_DEVICE_ID_INTEL_IOAT_TBG4   0x3429
     2832#define PCI_DEVICE_ID_INTEL_IOAT_TBG5   0x342a
     2833#define PCI_DEVICE_ID_INTEL_IOAT_TBG6   0x342b
     2834#define PCI_DEVICE_ID_INTEL_IOAT_TBG7   0x342c
     2835#define PCI_DEVICE_ID_INTEL_X58_HUB_MGMT 0x342e
     2836#define PCI_DEVICE_ID_INTEL_IOAT_TBG0   0x3430
     2837#define PCI_DEVICE_ID_INTEL_IOAT_TBG1   0x3431
     2838#define PCI_DEVICE_ID_INTEL_IOAT_TBG2   0x3432
     2839#define PCI_DEVICE_ID_INTEL_IOAT_TBG3   0x3433
    22712840#define PCI_DEVICE_ID_INTEL_82830_HB    0x3575
    22722841#define PCI_DEVICE_ID_INTEL_82830_CGC   0x3577
     2842#define PCI_DEVICE_ID_INTEL_82854_HB    0x358c
     2843#define PCI_DEVICE_ID_INTEL_82854_IG    0x358e
    22732844#define PCI_DEVICE_ID_INTEL_82855GM_HB  0x3580
    22742845#define PCI_DEVICE_ID_INTEL_82855GM_IG  0x3582
    … …  
    22822853#define PCI_DEVICE_ID_INTEL_MCH_PC1     0x359a
    22832854#define PCI_DEVICE_ID_INTEL_E7525_MCH   0x359e
     2855#define PCI_DEVICE_ID_INTEL_I7300_MCH_ERR 0x360c
     2856#define PCI_DEVICE_ID_INTEL_I7300_MCH_FB0 0x360f
     2857#define PCI_DEVICE_ID_INTEL_I7300_MCH_FB1 0x3610
     2858#define PCI_DEVICE_ID_INTEL_IOAT_CNB    0x360b
     2859#define PCI_DEVICE_ID_INTEL_FBD_CNB     0x360c
     2860#define PCI_DEVICE_ID_INTEL_IOAT_JSF0   0x3710
     2861#define PCI_DEVICE_ID_INTEL_IOAT_JSF1   0x3711
     2862#define PCI_DEVICE_ID_INTEL_IOAT_JSF2   0x3712
     2863#define PCI_DEVICE_ID_INTEL_IOAT_JSF3   0x3713
     2864#define PCI_DEVICE_ID_INTEL_IOAT_JSF4   0x3714
     2865#define PCI_DEVICE_ID_INTEL_IOAT_JSF5   0x3715
     2866#define PCI_DEVICE_ID_INTEL_IOAT_JSF6   0x3716
     2867#define PCI_DEVICE_ID_INTEL_IOAT_JSF7   0x3717
     2868#define PCI_DEVICE_ID_INTEL_IOAT_JSF8   0x3718
     2869#define PCI_DEVICE_ID_INTEL_IOAT_JSF9   0x3719
     2870#define PCI_DEVICE_ID_INTEL_ICH10_0     0x3a14
     2871#define PCI_DEVICE_ID_INTEL_ICH10_1     0x3a16
     2872#define PCI_DEVICE_ID_INTEL_ICH10_2     0x3a18
     2873#define PCI_DEVICE_ID_INTEL_ICH10_3     0x3a1a
     2874#define PCI_DEVICE_ID_INTEL_ICH10_4     0x3a30
     2875#define PCI_DEVICE_ID_INTEL_ICH10_5     0x3a60
     2876#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN       0x3b00
     2877#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX       0x3b1f
     2878#define PCI_DEVICE_ID_INTEL_IOAT_SNB0   0x3c20
     2879#define PCI_DEVICE_ID_INTEL_IOAT_SNB1   0x3c21
     2880#define PCI_DEVICE_ID_INTEL_IOAT_SNB2   0x3c22
     2881#define PCI_DEVICE_ID_INTEL_IOAT_SNB3   0x3c23
     2882#define PCI_DEVICE_ID_INTEL_IOAT_SNB4   0x3c24
     2883#define PCI_DEVICE_ID_INTEL_IOAT_SNB5   0x3c25
     2884#define PCI_DEVICE_ID_INTEL_IOAT_SNB6   0x3c26
     2885#define PCI_DEVICE_ID_INTEL_IOAT_SNB7   0x3c27
     2886#define PCI_DEVICE_ID_INTEL_IOAT_SNB8   0x3c2e
     2887#define PCI_DEVICE_ID_INTEL_IOAT_SNB9   0x3c2f
     2888#define PCI_DEVICE_ID_INTEL_UNC_HA      0x3c46
     2889#define PCI_DEVICE_ID_INTEL_UNC_IMC0    0x3cb0
     2890#define PCI_DEVICE_ID_INTEL_UNC_IMC1    0x3cb1
     2891#define PCI_DEVICE_ID_INTEL_UNC_IMC2    0x3cb4
     2892#define PCI_DEVICE_ID_INTEL_UNC_IMC3    0x3cb5
     2893#define PCI_DEVICE_ID_INTEL_UNC_QPI0    0x3c41
     2894#define PCI_DEVICE_ID_INTEL_UNC_QPI1    0x3c42
     2895#define PCI_DEVICE_ID_INTEL_UNC_R2PCIE  0x3c43
     2896#define PCI_DEVICE_ID_INTEL_UNC_R3QPI0  0x3c44
     2897#define PCI_DEVICE_ID_INTEL_UNC_R3QPI1  0x3c45
     2898#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS     0x3c71  /* 15.1 */
     2899#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0    0x3c72  /* 16.2 */
     2900#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1    0x3c73  /* 16.3 */
     2901#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2    0x3c76  /* 16.6 */
     2902#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3    0x3c77  /* 16.7 */
     2903#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0     0x3ca0  /* 14.0 */
     2904#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA      0x3ca8  /* 15.0 */
     2905#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0    0x3caa  /* 15.2 */
     2906#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1    0x3cab  /* 15.3 */
     2907#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2    0x3cac  /* 15.4 */
     2908#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3    0x3cad  /* 15.5 */
     2909#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO   0x3cb8  /* 17.0 */
     2910#define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX       0x3ce0
     2911#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0        0x3cf4  /* 12.6 */
     2912#define PCI_DEVICE_ID_INTEL_SBRIDGE_BR          0x3cf5  /* 13.6 */
     2913#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1        0x3cf6  /* 12.7 */
     2914#define PCI_DEVICE_ID_INTEL_IOAT_SNB    0x402f
     2915#define PCI_DEVICE_ID_INTEL_5100_16     0x65f0
     2916#define PCI_DEVICE_ID_INTEL_5100_19     0x65f3
     2917#define PCI_DEVICE_ID_INTEL_5100_21     0x65f5
     2918#define PCI_DEVICE_ID_INTEL_5100_22     0x65f6
     2919#define PCI_DEVICE_ID_INTEL_5400_ERR    0x4030
     2920#define PCI_DEVICE_ID_INTEL_5400_FBD0   0x4035
     2921#define PCI_DEVICE_ID_INTEL_5400_FBD1   0x4036
     2922#define PCI_DEVICE_ID_INTEL_IOAT_SCNB   0x65ff
     2923#define PCI_DEVICE_ID_INTEL_EP80579_0   0x5031
     2924#define PCI_DEVICE_ID_INTEL_EP80579_1   0x5032
    22842925#define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
    22852926#define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
    … …  
    23102951#define PCI_DEVICE_ID_INTEL_82443GX_2   0x71a2
    23112952#define PCI_DEVICE_ID_INTEL_82372FB_1   0x7601
     2953#define PCI_DEVICE_ID_INTEL_SCH_LPC     0x8119
     2954#define PCI_DEVICE_ID_INTEL_SCH_IDE     0x811a
     2955#define PCI_DEVICE_ID_INTEL_E6XX_CU     0x8183
     2956#define PCI_DEVICE_ID_INTEL_ITC_LPC     0x8186
    23122957#define PCI_DEVICE_ID_INTEL_82454GX     0x84c4
    23132958#define PCI_DEVICE_ID_INTEL_82450GX     0x84c5
    … …  
    23232968
    23242969#define PCI_VENDOR_ID_COMPUTONE         0x8e0e
    2325 #define PCI_DEVICE_ID_COMPUTONE_IP2EX   0x0291
    23262970#define PCI_DEVICE_ID_COMPUTONE_PG      0x0302
    23272971#define PCI_SUBVENDOR_ID_COMPUTONE      0x8e0e
    … …  
    23773021#define PCI_DEVICE_ID_ADAPTEC2_SCAMP    0x0503
    23783022
    2379 
    23803023#define PCI_VENDOR_ID_HOLTEK            0x9412
    23813024#define PCI_DEVICE_ID_HOLTEK_6565       0x6565
    … …  
    23923035#define PCI_DEVICE_ID_NETMOS_9845       0x9845
    23933036#define PCI_DEVICE_ID_NETMOS_9855       0x9855
     3037#define PCI_DEVICE_ID_NETMOS_9865       0x9865
     3038#define PCI_DEVICE_ID_NETMOS_9900       0x9900
     3039#define PCI_DEVICE_ID_NETMOS_9901       0x9901
     3040#define PCI_DEVICE_ID_NETMOS_9904       0x9904
     3041#define PCI_DEVICE_ID_NETMOS_9912       0x9912
     3042#define PCI_DEVICE_ID_NETMOS_9922       0x9922
     3043
     3044#define PCI_VENDOR_ID_3COM_2            0xa727
     3045
     3046#define PCI_VENDOR_ID_DIGIUM            0xd161
     3047#define PCI_DEVICE_ID_DIGIUM_HFC4S      0xb410
    23943048
    23953049#define PCI_SUBVENDOR_ID_EXSYS          0xd84d
    … …  
    24003054#define PCI_DEVICE_ID_TIGERJET_300      0x0001
    24013055#define PCI_DEVICE_ID_TIGERJET_100      0x0002
    2402 
    2403 #define PCI_VENDOR_ID_TTTECH            0x0357
    2404 #define PCI_DEVICE_ID_TTTECH_MC322      0x000A
    24053056
    24063057#define PCI_VENDOR_ID_XILINX_RME        0xea60
    … …  
    24093060#define PCI_DEVICE_ID_RME_DIGI32_8      0x9898
    24103061
    2411 #define PCI_VENDOR_ID_QUICKNET          0x15E2
    2412 #define PCI_DEVICE_ID_QUICKNET_XJ       0x0500
     3062#define PCI_VENDOR_ID_XEN               0x5853
     3063#define PCI_DEVICE_ID_XEN_PLATFORM      0x0001
     3064
     3065#define PCI_VENDOR_ID_OCZ               0x1b85
     3066
     3067#define PCI_VENDOR_ID_NCUBE             0x10ff
     3068
     3069#endif /* _LINUX_PCI_IDS_H */

  • GPL/trunk/include/linux/platform_device.h

    r305 r679  
    9494                drv->driver.remove = snd_platform_driver_remove;
    9595        if (drv->suspend)
    96                 drv->driver.suspend = snd_platform_driver_suspend;
     96                drv->driver.suspend = (int(*)(struct device *,unsigned int))snd_platform_driver_suspend;
    9797        if (drv->resume)
    9898                drv->driver.resume = snd_platform_driver_resume;

  • GPL/trunk/include/linux/pm.h

    r441 r679  
    2222#define _LINUX_PM_H
    2323
    24 #ifdef __KERNEL__
    25 
    26 #include <linux/config.h>
    2724#include <linux/list.h>
    2825#include <asm/atomic.h>
     26#include <linux/workqueue.h>
     27
     28enum rpm_status {
     29        RPM_ACTIVE = 0,
     30        RPM_RESUMING,
     31        RPM_SUSPENDED,
     32        RPM_SUSPENDING,
     33};
    2934
    3035/*
    … …  
    230235
    231236struct dev_pm_info {
    232 #ifdef  CONFIG_PM
     237        unsigned int            async_suspend:1;
     238        bool                    is_prepared:1;  /* Owned by the PM core */
    233239        u32                     power_state;
    234240        u8                      * saved_state;
    … …  
    236242        struct device           * pm_parent;
    237243        struct list_head        entry;
    238 #endif
    239244};
    240245
    … …  
    247252
    248253
    249 #endif /* __KERNEL__ */
    250 
    251 typedef u32 __bitwise pm_message_t;
     254typedef struct pm_message {
     255        int event;
     256} pm_message_t;
     257
    252258#define PMSG_FREEZE     3
    253259#define PMSG_SUSPEND    3
    254260#define PMSG_ON         0
     261#define PMSG_RESUME     0
     262#define PMSG_THAW       0
     263#define PMSG_RESTORE    0
     264
     265
     266struct dev_pm_ops {
     267        int (*prepare)(struct device *dev);
     268        void (*complete)(struct device *dev);
     269        int (*suspend)(struct device *dev);
     270        int (*resume)(struct device *dev);
     271        int (*freeze)(struct device *dev);
     272        int (*thaw)(struct device *dev);
     273        int (*poweroff)(struct device *dev);
     274        int (*restore)(struct device *dev);
     275        int (*suspend_late)(struct device *dev);
     276        int (*resume_early)(struct device *dev);
     277        int (*freeze_late)(struct device *dev);
     278        int (*thaw_early)(struct device *dev);
     279        int (*poweroff_late)(struct device *dev);
     280        int (*restore_early)(struct device *dev);
     281        int (*suspend_noirq)(struct device *dev);
     282        int (*resume_noirq)(struct device *dev);
     283        int (*freeze_noirq)(struct device *dev);
     284        int (*thaw_noirq)(struct device *dev);
     285        int (*poweroff_noirq)(struct device *dev);
     286        int (*restore_noirq)(struct device *dev);
     287        int (*runtime_suspend)(struct device *dev);
     288        int (*runtime_resume)(struct device *dev);
     289        int (*runtime_idle)(struct device *dev);
     290};
     291
     292#define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \
     293        .suspend = suspend_fn, \
     294        .resume = resume_fn, \
     295        .freeze = suspend_fn, \
     296        .thaw = resume_fn, \
     297        .poweroff = suspend_fn, \
     298        .restore = resume_fn,
     299
     300/*
     301 * Use this if you want to use the same suspend and resume callbacks for suspend
     302 * to RAM and hibernation.
     303 */
     304#define SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \
     305const struct dev_pm_ops name = { \
     306        SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \
     307}
     308
     309#define SET_RUNTIME_PM_OPS(suspend_fn, resume_fn, idle_fn) \
     310        .runtime_suspend = suspend_fn, \
     311        .runtime_resume = resume_fn, \
     312        .runtime_idle = idle_fn,
     313
     314
     315/*
     316 * Power domains provide callbacks that are executed during system suspend,
     317 * hibernation, system resume and during runtime PM transitions along with
     318 * subsystem-level and driver-level callbacks.
     319 */
     320struct dev_pm_domain {
     321        struct dev_pm_ops       ops;
     322};
     323
     324#define PM_EVENT_RESTORE        0x0040
    255325
    256326#endif /* _LINUX_PM_H */

  • GPL/trunk/include/linux/pm_qos.h

    r614 r679  
    1111
    1212#include <linux/version.h>
     13#include <linux/plist.h>
     14#include <linux/notifier.h>
     15#include <linux/device.h>
     16#include <linux/workqueue.h>
     17
     18enum dev_pm_qos_req_type {
     19        DEV_PM_QOS_RESUME_LATENCY = 1,
     20        DEV_PM_QOS_LATENCY_TOLERANCE,
     21        DEV_PM_QOS_FLAGS,
     22};
     23
     24struct pm_qos_flags_request {
     25        struct list_head node;
     26        s32 flags;      /* Do not change to 64 bit */
     27};
     28
     29struct dev_pm_qos_request {
     30        enum dev_pm_qos_req_type type;
     31        union {
     32                struct plist_node pnode;
     33                struct pm_qos_flags_request flr;
     34        } data;
     35        struct device *dev;
     36};
     37
     38struct pm_qos_request {
     39        struct plist_node node;
     40        int pm_qos_class;
     41        struct delayed_work work; /* for pm_qos_update_request_timeout */
     42};
     43
    1344#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
    1445#include <linux/latency.h>
    … …  
    3667}
    3768
     69static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req)
     70{
     71        return req->dev != NULL;
     72}
     73
     74static inline void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class,
     75                        s32 value) {}
     76static inline void pm_qos_update_request(struct pm_qos_request *req,
     77                           s32 new_value) {}
     78static inline void pm_qos_update_request_timeout(struct pm_qos_request *req,
     79                                   s32 new_value, unsigned long timeout_us) {}
     80static inline void pm_qos_remove_request(struct pm_qos_request *req) {}
     81
     82static inline int pm_qos_request_active(struct pm_qos_request *req)
     83{
     84        return 0;
     85}
    3886#endif /* >= 2.6.19 */
    3987
     88static inline s32 cpu_latency_qos_limit(void) { return INT_MAX; }
     89static inline bool cpu_latency_qos_request_active(struct pm_qos_request *req)
     90{
     91        return false;
     92}
     93static inline void cpu_latency_qos_add_request(struct pm_qos_request *req,
     94                                               s32 value) {}
     95static inline void cpu_latency_qos_update_request(struct pm_qos_request *req,
     96                                                  s32 new_value) {}
     97static inline void cpu_latency_qos_remove_request(struct pm_qos_request *req) {}
     98
    4099#endif /* _LINUX_PM_QOS_H */

  • GPL/trunk/include/linux/pm_qos_params.h

    r358 r679  
    22#define __LINUX_PM_QOS_PARAMS_H
    33
     4#if 0
     5// moved to pm_qos.h
    46#define PM_QOS_RESERVED 0
    57#define PM_QOS_CPU_DMA_LATENCY 1
    … …  
    911#define PM_QOS_NUM_CLASSES 4
    1012#define PM_QOS_DEFAULT_VALUE -1
     13#endif
    1114
    1215#include <linux/version.h>

  • GPL/trunk/include/linux/poll.h

    r32 r679  
    99#include <linux/wait.h>
    1010#include <linux/fs.h>
     11#include <linux/string.h>
    1112
    1213#ifdef __KERNEL__
    … …  
    8182#endif /* KERNEL */
    8283
     84/* Epoll event masks */
     85#define EPOLLIN         (__force __poll_t)0x00000001
     86#define EPOLLPRI        (__force __poll_t)0x00000002
     87#define EPOLLOUT        (__force __poll_t)0x00000004
     88#define EPOLLERR        (__force __poll_t)0x00000008
     89#define EPOLLHUP        (__force __poll_t)0x00000010
     90#define EPOLLNVAL       (__force __poll_t)0x00000020
     91#define EPOLLRDNORM     (__force __poll_t)0x00000040
     92#define EPOLLRDBAND     (__force __poll_t)0x00000080
     93#define EPOLLWRNORM     (__force __poll_t)0x00000100
     94#define EPOLLWRBAND     (__force __poll_t)0x00000200
     95#define EPOLLMSG        (__force __poll_t)0x00000400
     96#define EPOLLRDHUP      (__force __poll_t)0x00002000
     97
    8398#endif /* _LINUX_POLL_H */

  • GPL/trunk/include/linux/proc_fs.h

    r441 r679  
    88 * The proc filesystem constants/structures
    99 */
     10
     11struct proc_ops {
     12        int     (*proc_open)(struct inode *, struct file *);
     13        ssize_t (*proc_read)(struct file *, char __user *, size_t, loff_t *);
     14        ssize_t (*proc_write)(struct file *, const char __user *, size_t, loff_t *);
     15        loff_t  (*proc_lseek)(struct file *, loff_t, int);
     16        int     (*proc_release)(struct inode *, struct file *);
     17        __poll_t (*proc_poll)(struct file *, struct poll_table_struct *);
     18        long    (*proc_ioctl)(struct file *, unsigned int, unsigned long);
     19#ifdef CONFIG_COMPAT
     20        long    (*proc_compat_ioctl)(struct file *, unsigned int, unsigned long);
     21#endif
     22        int     (*proc_mmap)(struct file *, struct vm_area_struct *);
     23        unsigned long (*proc_get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long);
     24};
    1025
    1126/*
    … …  
    8499
    85100#ifdef CONFIG_PROC_FS
    86 
    87101extern struct proc_dir_entry proc_root;
    88102extern struct proc_dir_entry *proc_root_fs;
    … …  
    208222struct proc_dir_entry *proc_net_create(const char *name);
    209223void proc_net_remove(const char *name);
    210 
     224static inline void proc_remove(struct proc_dir_entry *de) {}
    211225#else
    212226
    … …  
    233247
    234248extern struct proc_dir_entry proc_root;
    235 
     249static inline void proc_remove(struct proc_dir_entry *de) {}
     250static inline void *PDE_DATA(const struct inode *inode) {return NULL;}
    236251#endif /* CONFIG_PROC_FS */
    237252
    … …  
    240255        return (struct proc_dir_entry *) inode->u.generic_ip;
    241256}
    242 
     257static inline void *PDE_DATA(const struct inode *inode) {return NULL;}
     258
     259extern struct proc_dir_entry *proc_symlink(const char *,
     260                struct proc_dir_entry *, const char *);
     261extern struct proc_dir_entry *proc_mkdir(const char *, struct proc_dir_entry *);
    243262#endif /* _LINUX_PROC_FS_H */

  • GPL/trunk/include/linux/rwsem.h

    r305 r679  
    44#define _LINUX_RWSEM_H
    55
     6#include <linux/err.h>
     7
     8/* rw_semaphore - replaced with mutex */
     9#define rw_semaphore semaphore
     10#define init_rwsem(x) init_MUTEX(x)
     11#define DECLARE_RWSEM(x) DECLARE_MUTEX(x)
     12#define down_read(x) down(x)
     13#define down_write(x) down(x)
     14#define up_read(x) up(x)
     15#define up_write(x) up(x)
     16
     17static inline int down_write_trylock(struct rw_semaphore *sem) {return 0;}
    618#endif /* _LINUX_RWSEM_H */

  • GPL/trunk/include/linux/sched.h

    r441 r679  
    66#include <asm/param.h>  /* for HZ */
    77#include <asm/atomic.h>
     8#include <linux/pid.h>
     9
     10#define MAX_SCHEDULE_TIMEOUT    INT_MAX
    811
    912#define TASK_RUNNING            0
    … …  
    3033#include <asm\current.h>
    3134#include <linux\wait.h>
    32 
    33 void add_wait_queue(wait_queue_head_t *q, wait_queue_t * wait);
    34 void add_wait_queue_exclusive(wait_queue_head_t *q);
    35 void remove_wait_queue(wait_queue_head_t *q, wait_queue_t * wait);
    3635
    3736extern void __wake_up(wait_queue_head_t *q, unsigned int mode);
    … …  
    8786        set_current_state(TASK_UNINTERRUPTIBLE); \
    8887        schedule_timeout(x);
     88#define TASK_NORMAL             (TASK_INTERRUPTIBLE | TASK_UNINTERRUPTIBLE)
    8989
    9090#endif /* _LINUX_SCHED_H */

  • GPL/trunk/include/linux/seq_file.h

    r305 r679  
    1 /* $Id: seq_file.h,v 1.1.1.1 2003/07/02 13:57:00 eleph Exp $ */
    2 
    31#ifndef _LINUX_SEQ_FILE_H
    42#define _LINUX_SEQ_FILE_H
    53
     4#include <linux/string.h>
     5
     6struct seq_file {
     7        char *buf;
     8        size_t size;
     9        size_t from;
     10        size_t count;
     11        size_t pad_until;
     12        loff_t index;
     13        loff_t read_pos;
     14        u64 version;
     15        struct semaphore lock;
     16        const struct seq_operations *op;
     17        int poll_event;
     18        const struct file *file;
     19        void *private;
     20};
     21
     22struct seq_operations {
     23        void * (*start) (struct seq_file *m, loff_t *pos);
     24        void (*stop) (struct seq_file *m, void *v);
     25        void * (*next) (struct seq_file *m, void *v, loff_t *pos);
     26        int (*show) (struct seq_file *m, void *v);
     27};
     28
     29/**
     30 * seq_has_overflowed - check if the buffer has overflowed
     31 * @m: the seq_file handle
     32 *
     33 * seq_files have a buffer which may overflow. When this happens a larger
     34 * buffer is reallocated and all the data will be printed again.
     35 * The overflow state is true when m->count == m->size.
     36 *
     37 * Returns true if the buffer received more than it can hold.
     38 */
     39static inline bool seq_has_overflowed(struct seq_file *m)
     40{
     41        return m->count == m->size;
     42}
     43
     44ssize_t seq_read(struct file *, char __user *, size_t, loff_t *);
     45loff_t seq_lseek(struct file *, loff_t, int);
     46
     47static inline void seq_printf(struct seq_file *m, const char *fmt, ...) {}
     48int single_open(struct file *, int (*)(struct seq_file *, void *), void *);
     49int single_open_size(struct file *, int (*)(struct seq_file *, void *), void *, size_t);
     50int single_release(struct inode *, struct file *);
     51
    652#endif /* _LINUX_SEQ_FILE_H */

  • GPL/trunk/include/linux/signal.h

    r128 r679  
    55
    66#include <asm/signal.h>
     7
     8#include <linux/bitops.h>
     9#include <linux/string.h>
    710
    811#ifdef __KERNEL__

  • GPL/trunk/include/linux/slab.h

    r442 r679  
    55 */
    66
     7#include <linux/gfp.h>
     8#include <linux/overflow.h>
    79#include <linux/types.h>
     10#include <linux/list.h>
     11#include <linux/workqueue.h>
    812
    913#if     !defined(_LINUX_SLAB_H)
    … …  
    4650#endif  /* __KERNEL__ */
    4751
     52/*
     53 * ZERO_SIZE_PTR will be returned for zero sized kmalloc requests.
     54 *
     55 * Dereferencing ZERO_SIZE_PTR will lead to a distinct access fault.
     56 *
     57 * ZERO_SIZE_PTR can be passed to kfree though in the same way that NULL can.
     58 * Both make kfree a no-op.
     59 */
     60#define ZERO_SIZE_PTR ((void *)16)
     61
    4862//NOTE: enabling this in the non-KEE driver causes problems (file name strings
    4963//      put in seperate private segments)
    … …  
    5266extern void  __kfree(const void near *, const char *filename, int lineno);
    5367
    54 #define kmalloc(a,b)            __kmalloc(a,b, __FILE__, __LINE__)
     68static inline void *kmalloc(size_t size, gfp_t flags)
     69{
     70        return __kmalloc(size, flags, __FILE__, __LINE__);
     71}
     72
     73
    5574#define kfree(a)                __kfree(a, __FILE__, __LINE__)
    5675#define kfree_s(a,b)            __kfree(a, __FILE__, __LINE__)
    … …  
    7089void *kzalloc(size_t n, gfp_t gfp_flags);
    7190void *kcalloc(size_t n, size_t size, unsigned int __nocast gfp_flags);
     91void *krealloc(const void *, size_t, gfp_t);
     92
     93#define SIZE_MAX        (~(size_t)0)
     94
     95/**
     96 * kmalloc_array - allocate memory for an array.
     97 * @n: number of elements.
     98 * @size: element size.
     99 * @flags: the type of memory to allocate (see kmalloc).
     100 */
     101static inline void *kmalloc_array(size_t n, size_t size, gfp_t flags)
     102{
     103        if (size != 0 && n > SIZE_MAX / size)
     104                return NULL;
     105        return __kmalloc(n * size, flags);
     106}
     107
     108#define kmalloc_node_track_caller(size, flags, node) \
     109        kmalloc_track_caller(size, flags)
     110#define         kmalloc_track_caller(size, flags)   __kmalloc(size, flags)
     111#define kvfree(arg)                     kfree(arg)
     112
     113struct kmem_cache {
     114        unsigned int object_size;/* The original size of the object */
     115        unsigned int size;      /* The aligned/padded/added on size  */
     116        unsigned int align;     /* Alignment as calculated */
     117        unsigned long flags;    /* Active flags on the slab */
     118        const char *name;       /* Slab name for sysfs */
     119        int refcount;           /* Use counter */
     120        void (*ctor)(void *);   /* Called on object slot creation */
     121        struct list_head list;  /* List of all slab caches on the system */
     122};
     123
     124#define kvzalloc kzalloc
     125size_t ksize(const void *);
     126
     127static inline void *__kmalloc_node(size_t size, gfp_t flags, int node)
     128{
     129        return __kmalloc(size, flags);
     130}
     131
     132static inline void *kmalloc_node(size_t size, gfp_t flags, int node)
     133{
     134        return __kmalloc_node(size, flags, node);
     135}
    72136
    73137#endif  /* _LINUX_SLAB_H */

  • GPL/trunk/include/linux/string.h

    r442 r679  
    11#ifndef _LINUX_STRING_H
    22#define _LINUX_STRING_H
     3
     4#include <linux/slab.h>
     5
    36#if 0
    47char *strstr1 (const char *string1, const char *string2);
    … …  
    1215
    1316char *kstrdup(const char *s, unsigned int gfp_flags);
     17_WCRTLINK extern size_t  strnlen_s( const char *__s, size_t __maxsize );
     18#define strnlen strnlen_s
     19extern void *memdup_user(const void __user *, size_t);
    1420
     21static inline void *kmemdup(const void *src, size_t len, gfp_t gfp)
     22{
     23        void *dst = kmalloc(len, gfp);
     24        if (!dst)
     25                return NULL;
     26        memcpy(dst, src, len);
     27        return dst;
     28}
     29ssize_t strscpy(char *, const char *, size_t);
     30#define vmemdup_user memdup_user
     31#define scnprintf snprintf
    1532#endif
    1633

  • GPL/trunk/include/linux/stringify.h

    r399 r679  
    11#ifndef __LINUX_STRINGIFY_H
    22#define __LINUX_STRINGIFY_H
     3/* Indirect stringification.  Doing two levels allows the parameter to be a
     4 * macro itself.  For example, compile with -DFOO=bar, __stringify(FOO)
     5 * converts to "bar".
     6 */
     7
     8#define __stringify_1(x,...)    #x
     9#define __stringify(x,...)      __stringify_1(x)
     10
    311#endif /* __LINUX_STRINGIFY_H */

  • GPL/trunk/include/linux/time.h

    r479 r679  
    44#include <asm/param.h>
    55#include <linux/types.h>
     6#include <linux/ktime.h>
     7#include <linux/time64.h>
     8#include <linux/math64.h>
     9
     10#define NSEC_PER_SEC    1000000000L
     11
    612
    713#ifndef _STRUCT_TIMESPEC
    … …  
    1218};
    1319#endif /* _STRUCT_TIMESPEC */
     20
     21static inline int timespec_equal(const struct timespec *a,
     22                                 const struct timespec *b)
     23{
     24        return (a->tv_sec == b->tv_sec) && (a->tv_nsec == b->tv_nsec);
     25}
    1426
    1527/*
    … …  
    130142void msleep(unsigned int msecs);
    131143
     144/**
     145 * ns_to_timespec - Convert nanoseconds to timespec
     146 * @nsec:       the nanoseconds value to be converted
     147 *
     148 * Returns the timespec representation of the nsec parameter.
     149 */
     150extern struct timespec ns_to_timespec(const s64 nsec);
     151#define getrawmonotonic(ts) do_posix_clock_monotonic_gettime(ts)
    132152#endif

  • GPL/trunk/include/linux/timer.h

    r32 r679  
    9090#define time_after_eq(a,b)      ((long)(a) - (long)(b) >= 0)
    9191#define time_before_eq(a,b)     time_after_eq(b,a)
     92# define del_timer_sync(t)              del_timer(t)
    9293
    9394#endif

  • GPL/trunk/include/linux/types.h

    r598 r679  
    44//#pragma off (unreferenced)
    55
     6#include <limits.h>
    67#include <linux/posix_types.h>
    78#include <linux/compiler.h>
    … …  
    113114#define __inline__ __inline
    114115
    115 #ifdef FLATSTACK
    116 #define kstrcpy strcpy
    117 #define kstrcat strcat
    118 #define kmemcpy memcpy
    119 #define kmemcmp memcmp
    120 #define kmemset memset
    121 #else
    122 #define kstrcpy _fstrcpy
    123 #define kstrcat _fstrcat
    124 #define kmemcpy _fmemcpy
    125 #define kmemcmp _fmemcmp
    126 #define kmemset _fmemset
    127 #define strcpy  _fstrcpy
    128 #define strcat  _fstrcat
    129 #define memcpy  _fmemcpy
    130 #define memcmp  _fmemcmp
    131 #define memset  _fmemset
    132 #endif
    133 
    134116typedef unsigned __nocast gfp_t;
    135117
    136118#include <string.h>
    137119typedef __u32 __le32;
     120typedef __u16 __le16;
    138121typedef unsigned int fmode_t;
    139122
    140 //typedef int _Bool;
    141 typedef _Bool bool;
     123typedef int bool;
     124#define false   0
     125#define true 1
     126typedef unsigned int            __uintptr_t;
     127typedef __uintptr_t             uintptr_t;
     128typedef __u16 __be16;
     129typedef __u32 __be32;
     130typedef unsigned __poll_t;
     131typedef u32 phys_addr_t;
     132typedef s64                     int64_t;
     133
     134#define DECLARE_BITMAP(name,bits) \
     135        unsigned long name[((bits)+BITS_PER_LONG-1)/BITS_PER_LONG]
    142136
    143137#endif /* _LINUX_TYPES_H */

  • GPL/trunk/include/linux/uio.h

    r441 r679  
    33#ifndef _LINUX_UIO_H
    44#define _LINUX_UIO_H
     5
     6enum {
     7        ITER_IOVEC = 0,
     8        ITER_KVEC = 2,
     9        ITER_BVEC = 4,
     10};
     11
    512struct iovec {
    613        char    *iov_base;      /* Base address. */
    … …  
    1219};
    1320
     21struct iov_iter {
     22        int type;
     23        size_t iov_offset;
     24        size_t count;
     25        union {
     26                const struct iovec *iov;
     27                const struct kvec *kvec;
     28                const struct bio_vec *bvec;
     29        };
     30        unsigned long nr_segs;
     31};
     32
     33static inline bool iter_is_iovec(const struct iov_iter *i)
     34{
     35        return !(i->type & (ITER_BVEC | ITER_KVEC));
     36}
     37
    1438#endif /* _LINUX_UIO_H */

  • GPL/trunk/include/linux/utsname.h

    r32 r679  
    33#ifndef _LINUX_UTSNAME_H
    44#define _LINUX_UTSNAME_H
     5
     6#include <linux/err.h>
    57
    68#define __OLD_UTS_LEN 8
    … …  
    3638
    3739extern struct semaphore uts_sem;
     40
    3841#endif

  • GPL/trunk/include/linux/vmalloc.h

    r598 r679  
    44//#include <linux/sched.h>
    55//#include <linux/mm.h>
     6#include <linux/overflow.h>
    67
    78#include <asm/page.h>
    … …  
    2324
    2425extern struct vm_struct * vmlist;
     26extern void *vzalloc(unsigned long size);
     27extern void *__vmalloc(unsigned long size, gfp_t gfp_mask);
     28void *__vmalloc_node(unsigned long size, unsigned long align, gfp_t gfp_mask,
     29                int node, const void *caller);
    2530#endif
    2631

  • GPL/trunk/include/linux/wait.h

    r32 r679  
    1212
    1313#include <linux/spinlock.h>
     14#include <linux/list.h>
     15#include <asm/page.h>
    1416
    15 #include <asm/page.h>
     17typedef struct wait_queue_entry wait_queue_entry_t;
     18
     19typedef int (*wait_queue_func_t)(struct wait_queue_entry *wq_entry, unsigned mode, int flags, void *key);
     20
     21/*
     22 * A single wait-queue entry structure:
     23 */
     24struct wait_queue_entry {
     25        unsigned int            flags;
     26        void                    *private;
     27        wait_queue_func_t       func;
     28        struct list_head        entry;
     29};
    1630
    1731/*
    … …  
    3044};
    3145typedef struct __wait_queue wait_queue_t;
     46
     47struct __wait_queue_head {
     48        spinlock_t              lock;
     49        struct list_head        task_list;
     50};
     51
     52struct wait_queue_head {
     53        spinlock_t              lock;
     54        struct list_head        head;
     55};
     56typedef struct wait_queue_head wait_queue_head_t;
    3257
    3358/*
    … …  
    6590#endif
    6691
    67 struct __wait_queue_head {
    68         void * lock;
    69         void * task_list;
    70 #if WAITQUEUE_DEBUG
    71         long __magic;
    72         long __creator;
    73 #endif
    74 };
    75 typedef struct __wait_queue_head wait_queue_head_t;
    76 
    7792#if WAITQUEUE_DEBUG
    7893# define __WAITQUEUE_DEBUG_INIT(name) \
    … …  
    91106
    92107#define __WAIT_QUEUE_HEAD_INITIALIZER(name) \
    93 { WAITQUEUE_RW_LOCK_UNLOCKED, { &(name).task_list, &(name).task_list } \
     108{ WAITQUEUE_RW_LOCK_UNLOCKED, { &(name).head, &(name).head } \
    94109                __WAITQUEUE_HEAD_DEBUG_INIT(name)}
    95110
    … …  
    99114void init_waitqueue_head(wait_queue_head_t *q);
    100115
    101 void init_waitqueue_entry(wait_queue_t *q, struct task_struct *p);
     116extern void init_waitqueue_entry(struct wait_queue_entry *wq_entry, struct task_struct *p);
     117extern void add_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry);
     118extern void add_wait_queue_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry);
     119extern void remove_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry);
    102120
    103121int waitqueue_active(wait_queue_head_t *q);
    … …  
    110128void __add_wait_queue_tail(wait_queue_head_t *head, wait_queue_t *new);
    111129void __remove_wait_queue(wait_queue_head_t *head, wait_queue_t *old);
    112 
     130void __wake_up_locked(wait_queue_head_t *q, unsigned int mode, int nr);
    113131#endif /* __KERNEL__ */
    114 
     132#define wait_event_lock_irq(wq_head, condition, lock)
     133#define wake_up_all(x)                 
    115134#endif

  • GPL/trunk/include/linux/workqueue.h

    r598 r679  
    33
    44#include <linux/timer.h>
    5 #include <sound/compat_22.h>
     5#include <linux/completion.h>
     6#include <linux/bitops.h>
     7
     8#define cancel_work_sync(w)     flush_scheduled_work()
    69/* we know this is used below exactly once for at most one waiter */
    710
    … …  
    6366#define create_singlethread_workqueue(name) create_workqueue(name)
    6467#define cancel_delayed_work_sync flush_delayed_work_sync
     68
     69/**
     70 * schedule_work - put work task in global workqueue
     71 * @work: job to be done
     72 *
     73 * Returns %false if @work was already on the kernel-global workqueue and
     74 * %true otherwise.
     75 *
     76 * This puts a job in the kernel-global workqueue if it was not already
     77 * queued and leaves it in the same position on the kernel-global
     78 * workqueue otherwise.
     79 */
     80int schedule_work(struct work_struct *works);
     81
     82bool flush_delayed_work_sync(struct delayed_work *dwork);
     83extern struct workqueue_struct *system_wq;
     84
     85/* I can't find a more suitable replacement... */
     86#define flush_work(work) cancel_work_sync(work)
     87
    6588#endif /* __LINUX_WORKQUEUE_H */
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