Changeset 209
- Timestamp:
- Mar 6, 2021, 7:44:15 PM (4 years ago)
- Location:
- trunk/src/os2ahci
- Files:
-
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/os2ahci/Makefile
r204 r209 6 6 # Copyright (c) 2013-2016 David Azarewicz 7 7 # 8 #define DBG_ALWAYS 0x0000 9 #define DBG_FUNCBEG 0x0001 10 #define DBG_FUNCEND 0x0002 11 #define DBG_ATTACH 0x0004 12 #define DBG_DETAILED 0x0008 13 #define DBG_INIT 0x0010 14 #define DBG_SPECIAL 0x0020 15 #define DBG_VERBOSE 0x0100 16 #define DBG_ERROR_ALL 0x800000ff 17 FDEBUG=0x0000 18 8 19 .ERASE 9 20 .SUFFIXES … … 84 95 85 96 !ifdef DEBUG 86 CDEFS=-DDEBUG 97 CDEFS=-DDEBUG=$(FDEBUG) 87 98 O=Debug 88 99 !else -
trunk/src/os2ahci/ReadMe.txt
r207 r209 67 67 Global Options 68 68 69 Option Description 70 ------------------------------------------------------------------------------ 71 /B:<baud> Initialize the COM port to the specified baud rate. Allowable 72 baud values are: 300, 600, 1200, 2400, 4800, 9600, 19200, 73 38400, 57600, and 115200. /B has no effect if /C is not also 74 specified. If /B is not specified, the COM port is not 75 initialized. For example, if you are using the kernel debugger, 76 the kernel debugger initializes the COM port so you should not 77 use this switch. 78 79 /COM:<n> Set debug COM port base address. Values for n can be: 80 1 = COM1 81 2 = COM2 82 a hex value (COM port base address) COM1=3f8, COM2=2f8 83 The default is 0. If set to 0 then no output goes to the COM port. 84 85 /D[:n] Debug output to COM port/debug buffer. Values for n can be: 86 1 = requests 87 2 = detailed 88 3 = verbose 89 If :n is not specified the debug level is incremented for 90 each /D specified. 91 92 /W Allows the debug buffer to wrap when full. 93 94 /V[:n] Display informational messages during boot. Values for n can be: 95 1 = Display sign on banner 96 2 = Display adapter information 97 If :n is not specified the verbosity level is incremented for 98 each /V specified. 99 100 /G:<vendor>:<device> Add generic PCI ID to list of supported AHCI adapters 101 (e.g. /G:8086:2829) 102 103 /T Perform thorough PCI ID scan; default = on, can be 104 turned off with /!T to perform only a PCI class scan 105 106 /F Force the use of the HW write cache when using NCQ 107 commands; see "Native Command Queuing" below for 108 further explanation (default = off) 109 110 /R Reset ports during initialization (default = on) 111 Can be turned off with /!R, however, when the 112 [Intel] AHCI controller was found to be 113 initialized by the BIOS in SATA mode, ports will 114 always be reset even when /!R is specified 115 116 /A:n Set adapter to n for adapter-specific options 117 (default = -1, all adapters) 118 119 /P:n Set port to n for port-specific options 120 (default = -1, all ports) 121 122 /I Ignore current adapter if no port has been specified. 123 Otherwise, ignore the current port on the current adapter. 124 125 /U Check for usable disks and ignore disks that are not 126 usable. To be usable a disk must be an MBR disk or wiped. 127 (default = on) Can be turned off with /!U. 69 Option Description 70 ----------------------------------------------------------------------------- 71 /A:n Set adapter to n for adapter-specific options 72 (default = -1, all adapters) 73 74 /F Force the use of the HW write cache when using NCQ 75 commands; see "Native Command Queuing" below for 76 further explanation (default = off) 77 78 /G:<vendor>:<device> Add generic PCI ID to list of supported AHCI adapters 79 (e.g. /G:8086:2829) 80 81 /I Ignore current adapter if no port has been specified. 82 Otherwise, ignore the current port on the current adapter. 83 84 /P:n Set port to n for port-specific options 85 (default = -1, all ports) 86 87 /R Reset ports during initialization (default = on) 88 Can be turned off with /!R, however, when the 89 [Intel] AHCI controller was found to be 90 initialized by the BIOS in SATA mode, ports will 91 always be reset even when /!R is specified 92 93 /T Perform thorough PCI ID scan; default = on, can be 94 turned off with /!T to perform only a PCI class scan 95 96 /U Check for usable disks and mark disks that are not 97 usable as unavailable for normal OS/2 operations. 98 To be usable a disk must be an MBR disk or wiped. 99 (default = on) Can be turned off with /!U. 100 101 /V Display informational messages during boot. 102 103 Debugging options (may only be available in debug builds) 104 105 Option Description 106 ----------------------------------------------------------------------------- 107 /B:<baud> Initialize the COM port to the specified baud rate. Allowable 108 baud values are: 300, 600, 1200, 2400, 4800, 9600, 19200, 109 38400, 57600, and 115200. /B has no effect if /C is not also 110 specified. If /B is not specified, the COM port is not 111 initialized. For example, if you are using the kernel debugger, 112 the kernel debugger initializes the COM port so you should not 113 use this switch. 114 115 /COM:<n> Set debug COM port base address. Values for n can be: 116 1 = COM1 117 2 = COM2 118 a hex value (COM port base address) COM1=3f8, COM2=2f8 119 The default is 0. If set to 0 then no output goes to the COM port. 120 121 /DEBUG:<n> Sets debug mask 122 123 /W Allows the debug buffer to wrap when full. 128 124 129 125 Port-specific Options 130 126 131 Option 132 ----------------------------------------------------------------------------- -133 /S 134 135 136 /N 137 138 139 /LS 140 141 142 143 144 145 /LP 146 147 148 149 150 151 /4 152 153 127 Option Description 128 ----------------------------------------------------------------------------- 129 /S Enable SCSI emulation for ATAPI units (default = on) 130 SCSI emulation is required for tools like cdrecord. 131 132 /N Enable NCQ (Native Command Queuing) for hard disks 133 (default = off) 134 135 /LS Set link speed (default = 0): 136 0 = maximum, 137 1 = limit to generation 1 138 2 = limit to generation 2 139 3 = limit to generation 3 140 141 /LP Set link power management (default = 0): 142 0 = full power management, 143 1 = transitions to "partial slumber state" disabled, 144 2 = transitions to "slumber state" disabled, 145 3 = transitions to both partial and slumber states disabled 146 147 /4 Force track size to be 56 sectors regardless of the 148 reported disk geometry to optimize partition boundaries 149 for hard disks with 4096 byte sectors. 154 150 155 151 Port-specific options depend on the currently active adapter -
trunk/src/os2ahci/ahci.c
r207 r209 202 202 if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ)) 203 203 { 204 DPRINTF( 1,"controller can't do NCQ, turning off CAP_NCQ\n");204 DPRINTF(DBG_INIT, DBG_PREFIX": controller can't do NCQ, turning off CAP_NCQ\n"); 205 205 ai->cap &= ~HOST_CAP_NCQ; 206 206 } … … 208 208 if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ)) 209 209 { 210 DPRINTF( 1,"controller can do NCQ, turning on CAP_NCQ\n");210 DPRINTF(DBG_INIT, DBG_PREFIX": controller can do NCQ, turning on CAP_NCQ\n"); 211 211 ai->cap |= HOST_CAP_NCQ; 212 212 } … … 214 214 if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP)) 215 215 { 216 DPRINTF( 1,"controller can't do PMP, turning off CAP_PMP\n");216 DPRINTF(DBG_INIT, DBG_PREFIX": controller can't do PMP, turning off CAP_PMP\n"); 217 217 ai->cap |= HOST_CAP_PMP; 218 218 } … … 220 220 if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF)) 221 221 { 222 DPRINTF( 1,"controller can't do SNTF, turning off CAP_SNTF\n");222 DPRINTF(DBG_INIT, DBG_PREFIX": controller can't do SNTF, turning off CAP_SNTF\n"); 223 223 ai->cap &= ~HOST_CAP_SNTF; 224 224 } … … 226 226 if (ai->pci_vendor == PCI_VENDOR_ID_JMICRON && ai->pci_device == 0x2361 && ai->port_map != 1) 227 227 { 228 DPRINTF( 1,"JMB361 has only one port, port_map 0x%x -> 0x%x\n", ai->port_map, 1);228 DPRINTF(DBG_INIT, DBG_PREFIX": JMB361 has only one port, port_map 0x%x -> 0x%x\n", ai->port_map, 1); 229 229 ai->port_map = 1; 230 230 ai->hw_ports = 1; … … 249 249 /* more ports in port_map than in HOST_CAP & 0x1f */ 250 250 ports = ai->hw_ports; 251 DPRINTF( 0,"implemented port map (0x%x) contains more ports than hw_ports (%d), using hw_ports\n", ai->port_map, ports);251 DPRINTF(DBG_INIT, DBG_PREFIX": implemented port map (0x%x) contains more ports than hw_ports (%d), using hw_ports\n", ai->port_map, ports); 252 252 ai->port_map = (1UL << ports) - 1UL; 253 253 } … … 274 274 } 275 275 276 DPRINTF( 3,__func__": BIOS AHCI mode is %d\n", ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN);276 DPRINTF(DBG_DETAILED, DBG_PREFIX": BIOS AHCI mode is %d\n", ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN); 277 277 278 278 if ((ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) == 0 && ai->pci_vendor == PCI_VENDOR_ID_INTEL) … … 284 284 } 285 285 286 DUMP_HOST_REGS( 6,ai,1);286 DUMP_HOST_REGS(DBG_DETAILED, ai, 1); 287 287 288 288 return(0); … … 296 296 int ahci_restore_bios_config(AD_INFO *ai) 297 297 { 298 DPRINTF( 3,__func__": restoring AHCI BIOS configuration on adapter %d\n", ad_no(ai));298 DPRINTF(DBG_DETAILED, DBG_PREFIX": restoring AHCI BIOS configuration on adapter %d\n", ad_no(ai)); 299 299 300 300 /* Restore saved BIOS configuration; please note that HOST_CTL is restored … … 354 354 int ahci_restore_initial_config(AD_INFO *ai) 355 355 { 356 DPRINTF( 3,__func__": restoring initial configuration on adapter %d\n", ad_no(ai));356 DPRINTF(DBG_DETAILED, DBG_PREFIX": restoring initial configuration on adapter %d\n", ad_no(ai)); 357 357 358 358 /* restore saved BIOS configuration */ … … 379 379 TIMER Timer; 380 380 381 DPRINTF( 2,"controller reset starting on adapter %d\n", ad_no(ai));381 DPRINTF(DBG_ATTACH, DBG_PREFIX": controller reset starting on adapter %d\n", ad_no(ai)); 382 382 383 383 /* we must be in AHCI mode, before using anything AHCI-specific, such as HOST_RESET. */ … … 414 414 u32 tmp16 = 0; 415 415 416 DPRINTF( 1,"ahci_reset_controller: intel detected\n");416 DPRINTF(DBG_ATTACH, DBG_PREFIX": ahci_reset_controller: intel detected\n"); 417 417 /* configure PCS */ 418 418 PciReadConfig(ai->bus, ai->dev_func, 0x92, sizeof(u16), &tmp16); 419 419 if ((tmp16 & ai->port_map) != ai->port_map) { 420 DPRINTF( 3,"ahci_reset_controller: updating PCS %x/%x\n", tmp16, ai->port_map);420 DPRINTF(DBG_ATTACH, DBG_PREFIX": ahci_reset_controller: updating PCS %x/%x\n", tmp16, ai->port_map); 421 421 tmp16 |= ai->port_map; 422 422 PciWriteConfig(ai->bus, ai->dev_func, 0x92, sizeof(u16), tmp16); … … 535 535 int i; 536 536 537 DPRINTF( 2,__func__": completing initialization of adapter #%d\n", ad_no(ai));537 DPRINTF(DBG_INIT, DBG_PREFIX": completing initialization of adapter #%d\n", ad_no(ai)); 538 538 539 539 if (!ai->int_set) … … 559 559 if (i >= MAX_IRQ_HANDLERS) return -1; /* no more handlers available */ 560 560 561 DPRINTF( 2,"registering interrupt %d pin=%d\n", ai->irq, ai->irq_pin);561 DPRINTF(DBG_INIT, DBG_PREFIX": registering interrupt %d pin=%d\n", ai->irq, ai->irq_pin); 562 562 563 563 rc = Dev32Help_SetIRQ(ahci_intr, ai->irq, p, ai->irq); … … 592 592 if (init_reset) 593 593 { 594 DPRINTF( 3,__func__": resetting port %d\n", p);594 DPRINTF(DBG_INIT, DBG_PREFIX": resetting port %d\n", p); 595 595 ahci_reset_port(ai, p, 1); 596 596 } 597 597 else 598 598 { 599 DPRINTF( 3,__func__": restarting port #%d\n", p);599 DPRINTF(DBG_INIT, DBG_PREFIX": restarting port #%d\n", p); 600 600 ahci_stop_port(ai, p); 601 601 ahci_start_port(ai, p, 1); … … 615 615 /* pci_enable_int(ai->bus, ai->dev_func); */ 616 616 617 DPRINTF( 2,__func__": done\n");617 DPRINTF(DBG_INIT|DBG_FUNCEND, DBG_PREFIX": END\n"); 618 618 return(0); 619 619 } … … 644 644 AP_END)) break; 645 645 646 DHEXDUMP( 5, pSector0, 512, "Sector0:\n");646 DHEXDUMP(DBG_DETAILED, pSector0, 512, "Sector0:\n"); 647 647 648 648 /* check for wiped disk */ … … 722 722 } 723 723 724 DPRINTF( 2,"found device %d.%d.%d: removable=%d dev_type=%d atapi=%d ncq_max=%d\n",724 DPRINTF(DBG_ATTACH, DBG_PREFIX": found device %d.%d.%d: removable=%d dev_type=%d atapi=%d ncq_max=%d\n", 725 725 ad_no(ai), p, d, 726 726 ai->ports[p].devs[d].removable, … … 804 804 805 805 /* perform port scan */ 806 DPRINTF( 1,__func__": scanning ports on adapter %d\n", ad_no(ai));806 DPRINTF(DBG_ATTACH, DBG_PREFIX": scanning ports on adapter %d\n", ad_no(ai)); 807 807 for (p = 0; p < AHCI_MAX_PORTS; p++) 808 808 { … … 812 812 // DAZ allocate port structure here 813 813 814 DPRINTF( 3,__func__": Wait till not busy on port %d\n", p);814 DPRINTF(DBG_ATTACH, DBG_PREFIX": Wait till not busy on port %d\n", p); 815 815 /* wait until all active commands have completed on this port */ 816 816 TimerInit(&Timer, 250); … … 832 832 else 833 833 { 834 DPRINTF( 3,__func__": (re)starting port %d\n", p);834 DPRINTF(DBG_ATTACH, DBG_PREFIX": (re)starting port %d\n", p); 835 835 ahci_stop_port(ai, p); 836 836 rc = ahci_start_port(ai, p, 0); … … 840 840 { 841 841 /* this port seems to have a device attached and ready for commands */ 842 DPRINTF( 2,__func__": port %d seems to be attached to a device; probing...\n", p);842 DPRINTF(DBG_ATTACH, DBG_PREFIX": port %d seems to be attached to a device; probing...\n", p); 843 843 844 844 #ifdef DAZ_NEW_CODE … … 871 871 { 872 872 /* we have a valid IDENTIFY or IDENTIFY_PACKET response */ 873 DHEXDUMP( 5,id_buf, ATA_ID_WORDS * sizeof(u16), "ATA_IDENTIFY%s results:\n", (is_ata) ? "" : "_PACKET");873 DHEXDUMP(DBG_DETAILED,id_buf, ATA_ID_WORDS * sizeof(u16), "ATA_IDENTIFY%s results:\n", (is_ata) ? "" : "_PACKET"); 874 874 ahci_setup_device(ai, p, 0, id_buf); 875 875 if (!IsUsableDisk(ai, p, 0)) ai->ports[p].devs[0].ignored = 1; … … 915 915 TIMER Timer; 916 916 917 DPRINTF( 3,__func__": resetting port %d.%d\n", ad_no(ai), p);918 DUMP_PORT_REGS( 3,ai,p);917 DPRINTF(DBG_ATTACH, DBG_PREFIX": resetting port %d.%d\n", ad_no(ai), p); 918 DUMP_PORT_REGS(DBG_DETAILED,ai,p); 919 919 920 920 /* stop port engines (we don't care whether there is an error doing so) */ … … 932 932 933 933 /* set link speed and power management options */ 934 DPRINTF( 3,__func__": setting link speed and power management options\n");934 DPRINTF(DBG_DETAILED, DBG_PREFIX": setting link speed and power management options\n"); 935 935 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x00000fffUL; 936 936 tmp |= (link_speed[ad_no(ai)][p] & 0x0f) << 4; … … 939 939 940 940 /* issue COMRESET on the port */ 941 DPRINTF( 3,__func__": issuing COMRESET on port %d\n", p);941 DPRINTF(DBG_DETAILED, DBG_PREFIX": issuing COMRESET on port %d\n", p); 942 942 writel(port_mmio + PORT_SCR_CTL, tmp | 1); 943 943 readl(port_mmio + PORT_SCR_CTL); /* flush */ … … 950 950 951 951 /* wait for communication to be re-established after port reset */ 952 DPRINTF( 3,"Wait for communication...\n");952 DPRINTF(DBG_DETAILED, DBG_PREFIX": Wait for communication...\n"); 953 953 TimerInit(&Timer, 500); 954 954 while (((tmp = readl(port_mmio + PORT_SCR_STAT)) & 3) != 3) … … 956 956 if (TimerCheckAndBlock(&Timer)) 957 957 { 958 DPRINTF( 2,"no device present after resetting port #%d (PORT_SCR_STAT = 0x%x)\n", p, tmp);958 DPRINTF(DBG_ATTACH, DBG_PREFIX": no device present after resetting port #%d (PORT_SCR_STAT = 0x%x)\n", p, tmp); 959 959 return(-1); 960 960 } … … 966 966 967 967 /* start port so we can receive the COMRESET FIS */ 968 DPRINTF( 3,__func__": starting port %d again\n", p);968 DPRINTF(DBG_DETAILED, DBG_PREFIX": starting port %d again\n", p); 969 969 ahci_start_port(ai, p, ei); 970 970 … … 975 975 if (TimerCheckAndBlock(&Timer)) 976 976 { 977 DPRINTF(0, "device not ready on port #%d (PORT_TFDATA = 0x%x)\n", p, tmp);977 DPRINTF(0, DBG_PREFIX": device not ready on port #%d (PORT_TFDATA = 0x%x)\n", p, tmp); 978 978 ahci_stop_port(ai, p); 979 979 return(-1); 980 980 } 981 981 } 982 DPRINTF( 3,__func__":PORT_TFDATA = 0x%x\n", readl(port_mmio + PORT_TFDATA));982 DPRINTF(DBG_ATTACH|DBG_FUNCEND, DBG_PREFIX": END PORT_TFDATA = 0x%x\n", readl(port_mmio + PORT_TFDATA)); 983 983 984 984 return(0); … … 993 993 u32 status; 994 994 995 DPRINTF( 3,__func__": %d.%d\n", ad_no(ai), p);995 DPRINTF(DBG_ATTACH, DBG_PREFIX": %d.%d\n", ad_no(ai), p); 996 996 /* check whether device presence is detected and link established */ 997 997 998 998 status = readl(port_mmio + PORT_SCR_STAT); 999 DPRINTF( 3,__func__": PORT_SCR_STAT = 0x%x\n", status);999 DPRINTF(DBG_DETAILED, DBG_PREFIX": PORT_SCR_STAT = 0x%x\n", status); 1000 1000 if ((status & 0xf) != 3) return(-1); 1001 1001 1002 1002 /* clear SError, if any */ 1003 1003 status = readl(port_mmio + PORT_SCR_ERR); 1004 DPRINTF( 3,__func__": PORT_SCR_ERR = 0x%x\n", status);1004 DPRINTF(DBG_DETAILED, DBG_PREFIX": PORT_SCR_ERR = 0x%x\n", status); 1005 1005 writel(port_mmio + PORT_SCR_ERR, status); 1006 1006 … … 1090 1090 int rc; 1091 1091 1092 DPRINTF( 3,__func__": %d.%d\n", ad_no(ai), p);1092 DPRINTF(DBG_ATTACH, DBG_PREFIX": %d.%d\n", ad_no(ai), p); 1093 1093 1094 1094 /* disable port interrupts */ … … 1233 1233 } 1234 1234 1235 DPRINTF( 7,"---------- "__func__":iorb=%x\n", vIorb);1235 DPRINTF(DBG_DETAILED, DBG_PREFIX": ---------- iorb=%x\n", vIorb); 1236 1236 1237 1237 /* Enable AHCI mode; apparently, the AHCI mode may end up becoming … … 1259 1259 cmd_max = ai->cmd_max; 1260 1260 } 1261 DPRINTF( 8,__func__": NCQ command; cmd_max = %d->%d\n", ai->cmd_max, cmd_max);1261 DPRINTF(DBG_DETAILED, DBG_PREFIX": NCQ command; cmd_max = %d->%d\n", ai->cmd_max, cmd_max); 1262 1262 } 1263 1263 … … 1312 1312 aws->cmd_slot = port->cmd_slot; 1313 1313 1314 DPRINTF( 7,__func__": Issuing command Slot=%d cmds=%x\n", port->cmd_slot, *cmds);1314 DPRINTF(DBG_DETAILED, DBG_PREFIX": Issuing command Slot=%d cmds=%x\n", port->cmd_slot, *cmds); 1315 1315 if (aws->is_ncq) 1316 1316 { … … 1405 1405 { 1406 1406 /* successfully prepared cmd; issue cmd and wait for completion */ 1407 DPRINTF( 3,"---------- "__func__"executing polled cmd on slot 0...");1407 DPRINTF(DBG_DETAILED, DBG_PREFIX": ---------- executing polled cmd on slot 0..."); 1408 1408 writel(port_mmio + PORT_CMD_ISSUE, 1); 1409 1409 TimerInit(&Timer, timeout); … … 1417 1417 if (rc) 1418 1418 { 1419 DPRINTF( 3," timeout for IORB %x port=%x", vIorb, p);1419 DPRINTF(DBG_DETAILED, " timeout for IORB %x port=%x", vIorb, p); 1420 1420 iorb_seterr(pIorb, IOERR_ADAPTER_TIMEOUT); 1421 1421 } 1422 1422 else if (readl(port_mmio + PORT_SCR_ERR) != 0 || readl(port_mmio + PORT_TFDATA) & 0x89) 1423 1423 { 1424 DPRINTF( 3," polled cmd error for IORB %x", vIorb);1424 DPRINTF(DBG_DETAILED, " polled cmd error for IORB %x", vIorb); 1425 1425 iorb_seterr(pIorb, IOERR_DEVICE_NONSPECIFIC); 1426 1426 ahci_reset_port(ai, iorb_unit_port(pIorb), 0); … … 1438 1438 } 1439 1439 } 1440 DPRINTF( 3,"\n");1440 DPRINTF(DBG_DETAILED, "\n"); 1441 1441 } 1442 1442 … … 1476 1476 if (readl(port_mmio + PORT_CMD_ISSUE) & 1) 1477 1477 { 1478 DPRINTF( 3,__func__": port %d slot 0 is not idle; not executing polled cmd\n", p);1478 DPRINTF(0, DBG_PREFIX": port %d slot 0 is not idle; not executing polled cmd\n", p); 1479 1479 return(-1); 1480 1480 } … … 1485 1485 1486 1486 /* start command execution for slot 0 */ 1487 DPRINTF( 3,"---------- "__func__"executing polled cmd...");1487 DPRINTF(DBG_DETAILED, DBG_PREFIX": ---------- executing polled cmd..."); 1488 1488 writel(port_mmio + PORT_CMD_ISSUE, 1); 1489 1489 … … 1496 1496 if (rc) 1497 1497 { 1498 DPRINTF( 2," Timeout");1498 DPRINTF(DBG_DETAILED, " Timeout"); 1499 1499 break; 1500 1500 } … … 1504 1504 if (tmp & PORT_ERR_FAIL_BITS) 1505 1505 { 1506 DPRINTF( 2," SERR = 0x%08lx", tmp);1506 DPRINTF(DBG_DETAILED, " SERR = 0x%08lx", tmp); 1507 1507 rc = 1; 1508 1508 } … … 1510 1510 if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) 1511 1511 { 1512 DPRINTF( 2," TFDATA = 0x%08lx", tmp);1512 DPRINTF(DBG_DETAILED, " TFDATA = 0x%08lx", tmp); 1513 1513 rc = 1; 1514 1514 } … … 1516 1516 if (rc) 1517 1517 { 1518 DPRINTF( 3,"failed\n");1518 DPRINTF(DBG_DETAILED, "failed\n"); 1519 1519 ahci_reset_port(ai, p, 0); 1520 1520 return(-1); 1521 1521 } 1522 DPRINTF( 3,"success\n");1522 DPRINTF(DBG_DETAILED, "success\n"); 1523 1523 return(0); 1524 1524 } … … 1537 1537 if (!ai->ports[p].devs[d].atapi) 1538 1538 { 1539 DPRINTF( 2,__func__": flushing cache on %d.%d.%d\n", ad_no(ai), p, d);1539 DPRINTF(DBG_INIT, DBG_PREFIX": flushing cache on %d.%d.%d\n", ad_no(ai), p, d); 1540 1540 return(ahci_exec_polled_cmd(ai, p, d, 30000, 1541 1541 ai->ports[p].devs[d].lba48 ? ATA_CMD_FLUSH_EXT : ATA_CMD_FLUSH, AP_END)); … … 1554 1554 int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle) 1555 1555 { 1556 DPRINTF( 3,__func__": sending IDLE=%d command to port %d\n", idle, p);1556 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": sending IDLE=%d command to port %d\n", idle, p); 1557 1557 return ahci_exec_polled_cmd(ai, p, d, 500, ATA_CMD_IDLE, AP_COUNT, idle ? 1 : 0, AP_END); 1558 1558 } … … 1612 1612 if ((u32)&irq_stat < 0xf000) 1613 1613 { 1614 DPRINTF( 0,__func__": IRQ stack running low; arming engine context hook\n");1614 DPRINTF(DBG_DETAILED, DBG_PREFIX": IRQ stack running low; arming engine context hook\n"); 1615 1615 /* Rousseau: 1616 1616 * A context hook cannot be re-armed before it has completed. … … 1689 1689 active_cmds = readl(port_mmio + PORT_SCR_ACT); 1690 1690 done_mask = ai->ports[p].ncq_cmds ^ active_cmds; 1691 DPRINTF( 7,"[ncq_cmds]: active_cmds=0x%08x done_mask=0x%08x\n", active_cmds, done_mask);1691 DPRINTF(DBG_DETAILED, DBG_PREFIX": [ncq_cmds]: active_cmds=0x%08x done_mask=0x%08x\n", active_cmds, done_mask); 1692 1692 } 1693 1693 else … … 1695 1695 active_cmds = readl(port_mmio + PORT_CMD_ISSUE); 1696 1696 done_mask = ai->ports[p].reg_cmds ^ active_cmds; 1697 DPRINTF( 7,"[reg_cmds]: active_cmds=0x%08x done_mask=0x%08x\n", active_cmds, done_mask);1697 DPRINTF(DBG_DETAILED, DBG_PREFIX": [reg_cmds]: active_cmds=0x%08x done_mask=0x%08x\n", active_cmds, done_mask); 1698 1698 } 1699 1699 … … 1775 1775 #ifdef DEBUG 1776 1776 u32 *unk = (u32 *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK); 1777 DPRINTF(0,"warning: unknown FIS %08lx %08lx %08lx %08lx\n", unk[0], unk[1], unk[2], unk[3]);1777 dprintf(0,"warning: unknown FIS %08lx %08lx %08lx %08lx\n", unk[0], unk[1], unk[2], unk[3]); 1778 1778 #endif 1779 1779 reset_port = 1; … … 1803 1803 dprintf(0,"port #%d interrupt error status: 0x%08x; restarting port\n", p, irq_stat); 1804 1804 #else 1805 if (!ai->ports[p].devs[0].atapi || D32g_DbgLevel)1805 if (!ai->ports[p].devs[0].atapi) 1806 1806 { 1807 1807 dprintf(0,"port #%d interrupt error status: 0x%08x; restarting port\n", p, irq_stat); … … 1823 1823 void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1824 1824 { 1825 DPRINTF( 7,"ahci_get_geometry(%d.%d.%d)\n", iorb_unit_adapter(pIorb),1825 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": ahci_get_geometry(%d.%d.%d)\n", iorb_unit_adapter(pIorb), 1826 1826 iorb_unit_port(pIorb), iorb_unit_device(pIorb)); 1827 1827 … … 1834 1834 void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1835 1835 { 1836 DPRINTF( 7,"ahci_unit_ready(%d.%d.%d)\n", iorb_unit_adapter(pIorb),1836 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": ahci_unit_ready(%d.%d.%d)\n", iorb_unit_adapter(pIorb), 1837 1837 iorb_unit_port(pIorb), iorb_unit_device(pIorb)); 1838 1838 … … 1845 1845 void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1846 1846 { 1847 DPRINTF( 7,"ahci_read(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(vIorb),1847 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": ahci_read(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(vIorb), 1848 1848 iorb_unit_port(pIorb), iorb_unit_device(pIorb), 1849 1849 ((IORB_EXECUTEIO *) pIorb)->RBA, … … 1858 1858 void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1859 1859 { 1860 DPRINTF( 7,"ahci_verify(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb),1860 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": ahci_verify(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb), 1861 1861 iorb_unit_port(pIorb), iorb_unit_device(pIorb), 1862 1862 ((IORB_EXECUTEIO *)pIorb)->RBA, … … 1871 1871 void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1872 1872 { 1873 DPRINTF( 7,"ahci_write(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb),1873 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": ahci_write(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb), 1874 1874 iorb_unit_port(pIorb), iorb_unit_device(pIorb), 1875 1875 ((IORB_EXECUTEIO *)pIorb)->RBA, … … 1888 1888 int d = iorb_unit_device(pIorb); 1889 1889 1890 DHEXDUMP( 5,Far16ToFlat(((IORB_ADAPTER_PASSTHRU *)pIorb)->f16ControllerCmd),1890 DHEXDUMP(DBG_DETAILED ,Far16ToFlat(((IORB_ADAPTER_PASSTHRU *)pIorb)->f16ControllerCmd), 1891 1891 ((IORB_ADAPTER_PASSTHRU *)pIorb)->ControllerCmdLen, 1892 1892 "ahci_execute_cdb(%d.%d.%d): ", a, p, d); … … 1914 1914 int d = iorb_unit_device(pIorb); 1915 1915 1916 DHEXDUMP( 5,Far16ToFlat(((IORB_ADAPTER_PASSTHRU *)pIorb)->f16ControllerCmd),1916 DHEXDUMP(DBG_DETAILED, Far16ToFlat(((IORB_ADAPTER_PASSTHRU *)pIorb)->f16ControllerCmd), 1917 1917 ((IORB_ADAPTER_PASSTHRU *)pIorb)->ControllerCmdLen, 1918 1918 "ahci_execute_ata(%d.%d.%d): ", a, p, d); -
trunk/src/os2ahci/apm.c
r206 r209 45 45 /* connect to APM driver */ 46 46 if ((rc = APMAttach()) != 0) { 47 DPRINTF( 2,"couldn't connect to APM driver (rc = %d)\n", rc);47 DPRINTF(0, DBG_PREFIX": couldn't connect to APM driver (rc = %d)\n", rc); 48 48 return; 49 49 } … … 53 53 APM_NOTIFYNORMRESUME | 54 54 APM_NOTIFYCRITRESUME, 0)) != 0) { 55 DPRINTF( 2,"couldn't register for power event notificatins (rc = %d)\n", rc);55 DPRINTF(0, DBG_PREFIX": couldn't register for power event notificatins (rc = %d)\n", rc); 56 56 return; 57 57 } … … 65 65 USHORT msg = (USHORT) evt->ulParm1; 66 66 67 DPRINTF( 2,"received APM event: 0x%x/0x%x\n");67 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": received APM event: 0x%x/0x%x\n"); 68 68 69 69 switch (msg) { … … 83 83 84 84 default: 85 DPRINTF( 2,"unknown APM event; ignoring...\n");85 DPRINTF(0, DBG_PREFIX": unknown APM event; ignoring...\n"); 86 86 break; 87 87 } … … 103 103 104 104 if (suspended) return; 105 DPRINTF( 2,"suspend()\n");105 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": suspend()\n"); 106 106 107 107 /* restart all ports with interrupts disabled */ … … 144 144 145 145 suspended = 1; 146 DPRINTF( 2,"suspend() finished\n");146 DPRINTF(DBG_FUNCEND, DBG_PREFIX": suspend() finished\n"); 147 147 } 148 148 … … 156 156 157 157 if (!suspended) return; 158 DPRINTF( 2,"resume()\n");158 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": resume()\n"); 159 159 160 160 for (a = 0; a < ad_info_cnt; a++) { … … 192 192 KernArmHook(engine_ctxhook_h, 0, 0); 193 193 194 DPRINTF( 2,"resume() finished\n");194 DPRINTF(DBG_FUNCEND, DBG_PREFIX": resume() finished\n"); 195 195 } 196 196 … … 209 209 //int d; 210 210 211 DPRINTF( 1,"shutdown_driver() enter\n");211 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": shutdown_driver() enter\n"); 212 212 213 213 for (a = 0; a < ad_info_cnt; a++) … … 255 255 } 256 256 257 DPRINTF( 1,"shutdown_driver() finished\n");258 } 259 257 DPRINTF(DBG_FUNCEND, DBG_PREFIX": shutdown_driver() finished\n"); 258 } 259 -
trunk/src/os2ahci/ata.c
r208 r209 263 263 if ((sg_addr & 1) || (chunk & 1)) 264 264 { 265 DPRINTF(0, "warning: ata_cmd() called with unaligned S/G element(s)\n");265 DPRINTF(0, DBG_PREFIX": warning: ata_cmd() called with unaligned S/G element(s)\n"); 266 266 return(ATA_CMD_UNALIGNED_ADDR); 267 267 } … … 277 277 cmd_hdr->options |= n << 16; 278 278 279 #ifdef DEBUG 280 if ((D32g_DbgLevel >= 5) /*|| (atapi_cmd != NULL)*/) 281 { 282 DPRINTF(0,"ATA command for %d.%d.%d, slot %d:\n", ad_no(ai), p, d, slot); 283 dHexDump(0,cmd_hdr, offsetof(AHCI_CMD_HDR, reserved), "cmd_hdr: "); 284 dHexDump(0,&ata_cmd, sizeof(ata_cmd), "ata_cmd: "); 285 if (atapi_cmd != NULL) 286 { 287 dHexDump(0,atapi_cmd, atapi_cmd_len, "atapi_cmd: "); 288 } 289 if (n > 0) 290 { 291 dHexDump(0,cmd_tbl->sg_list, sizeof(*cmd_tbl->sg_list) * n, "sg_list: "); 292 } 279 #if DEBUG & DBG_DETAILED 280 dprintf(0,"ATA command for %d.%d.%d, slot %d:\n", ad_no(ai), p, d, slot); 281 dHexDump(0,cmd_hdr, offsetof(AHCI_CMD_HDR, reserved), "cmd_hdr: "); 282 dHexDump(0,&ata_cmd, sizeof(ata_cmd), "ata_cmd: "); 283 if (atapi_cmd != NULL) 284 { 285 dHexDump(0,atapi_cmd, atapi_cmd_len, "atapi_cmd: "); 286 } 287 if (n > 0) 288 { 289 dHexDump(0,cmd_tbl->sg_list, sizeof(*cmd_tbl->sg_list) * n, "sg_list: "); 293 290 } 294 291 #endif … … 447 444 if (rc) return 0; 448 445 449 DHEXDUMP( 5,pDLA, sizeof(DLA_Table_Sector), "DLA sector %d:\n", sector-1);446 DHEXDUMP(DBG_DETAILED, pDLA, sizeof(DLA_Table_Sector), "DLA sector %d:\n", sector-1); 450 447 451 448 if ((pDLA->DLA_Signature1 == DLA_TABLE_SIGNATURE1) && (pDLA->DLA_Signature2 == DLA_TABLE_SIGNATURE2)) 452 449 { 453 DPRINTF( 3,__func__": DLA found at sector %d\n", sector-1);450 DPRINTF(DBG_ATTACH, DBG_PREFIX": DLA found at sector %d\n", sector-1); 454 451 geometry->TotalCylinders = pDLA->Cylinders; 455 452 geometry->NumHeads = pDLA->Heads_Per_Cylinder; … … 482 479 int p = iorb_unit_port(pIorb); 483 480 int d = iorb_unit_device(pIorb); 484 DPRINTF(3,__func__"(%d.%d.%d)\n", ad_no(ai), p, d);481 dprintf(DBG_DETAILED, DBG_PREFIX": (%d.%d.%d)\n", ad_no(ai), p, d); 485 482 #endif 486 483 … … 607 604 } 608 605 609 DPRINTF( 2,"Physical geometry: %d cylinders, %d heads, %d sectors per track (%dMB) (%s)\n",606 DPRINTF(DBG_ATTACH, DBG_PREFIX": Physical geometry: %d cylinders, %d heads, %d sectors per track (%dMB) (%s)\n", 610 607 geometry->TotalCylinders, geometry->NumHeads, geometry->SectorsPerTrack, 611 608 (ULONG)(ullTotalSectors / 2048), Method); … … 616 613 else ullTotalSectors = geometry->TotalSectors; 617 614 618 ad_infos[a].ports[p].devs[0].dev_info. Cylinders = geometry->TotalCylinders;619 ad_infos[a].ports[p].devs[0].dev_info. HeadsPerCylinder = geometry->NumHeads;620 ad_infos[a].ports[p].devs[0].dev_info. SectorsPerTrack = geometry->SectorsPerTrack;621 ad_infos[a].ports[p].devs[0].dev_info. TotalSectors = ullTotalSectors;622 ad_infos[a].ports[p].devs[0].dev_info. Method = Method;615 ad_infos[a].ports[p].devs[0].dev_info.ulCylinders = geometry->TotalCylinders; 616 ad_infos[a].ports[p].devs[0].dev_info.usHeadsPerCylinder = geometry->NumHeads; 617 ad_infos[a].ports[p].devs[0].dev_info.usSectorsPerTrack = geometry->SectorsPerTrack; 618 ad_infos[a].ports[p].devs[0].dev_info.ullTotalSectors = ullTotalSectors; 619 ad_infos[a].ports[p].devs[0].dev_info.pMethod = Method; 623 620 624 621 //DAZ DPRINTF(2,"Reported geometry: %d cylinders, %d heads, %d sectors per track (%dMB) (%s)\n", 625 DPRINTF( 0,"Reported geometry: %d cylinders, %d heads, %d sectors per track (%dMB) (%s)\n",622 DPRINTF(DBG_ATTACH, DBG_PREFIX": Reported geometry: %d cylinders, %d heads, %d sectors per track (%dMB) (%s)\n", 626 623 geometry->TotalCylinders, geometry->NumHeads, geometry->SectorsPerTrack, 627 624 (ULONG)(ullTotalSectors / 2048), Method); … … 799 796 } 800 797 801 DPRINTF( 7,"ata_read_unaligned(%d.%d.%d, %lld)\n", ad_no(ai), p, d, ullLba);798 DPRINTF(DBG_DETAILED, DBG_PREFIX": ata_read_unaligned(%d.%d.%d, %lld)\n", ad_no(ai), p, d, ullLba); 802 799 ai->ports[p].unaligned_read_count++; 803 800 … … 848 845 849 846 io->BlocksXferred += add_workspace(pIorb)->blocks; 850 DPRINTF( 7,__func__": blocks transferred = %d\n", io->BlocksXferred);847 DPRINTF(DBG_DETAILED, DBG_PREFIX": blocks transferred = %d\n", io->BlocksXferred); 851 848 852 849 if (io->BlocksXferred >= io->BlockCount) … … 1059 1056 } 1060 1057 1061 DPRINTF( 7,"ata_write_unaligned(%d.%d.%d, %lld)\n", ad_no(ai), p, d, ullLba);1058 DPRINTF(DBG_DETAILED, DBG_PREFIX": ata_write_unaligned(%d.%d.%d, %lld)\n", ad_no(ai), p, d, ullLba); 1062 1059 1063 1060 /* allocate transfer buffer */ … … 1106 1103 1107 1104 io->BlocksXferred += add_workspace(pIorb)->blocks; 1108 DPRINTF( 7,"ata_write_pp(): blocks transferred = %d\n", io->BlocksXferred);1105 DPRINTF(DBG_DETAILED, DBG_PREFIX": ata_write_pp(): blocks transferred = %d\n", io->BlocksXferred); 1109 1106 1110 1107 if (io->BlocksXferred >= io->BlockCount) … … 1176 1173 { 1177 1174 /* this is not a D2H FIS - give up silently */ 1178 DPRINTF( 3,"ata_execute_ata_pp(): D2H FIS type incorrect: %d\n", fis[0]);1175 DPRINTF(DBG_DETAILED, DBG_PREFIX": ata_execute_ata_pp(): D2H FIS type incorrect: %d\n", fis[0]); 1179 1176 add_workspace(pIorb)->complete = 1; 1180 1177 return; … … 1197 1194 | ((u16) fis[13] << 8); 1198 1195 1199 DHEXDUMP( 5,cmd, sizeof(*cmd), "ahci_execute_ata_pp(): cmd after completion:\n");1196 DHEXDUMP(DBG_DETAILED, cmd, sizeof(*cmd), "ahci_execute_ata_pp(): cmd after completion:\n"); 1200 1197 1201 1198 /* signal completion to interrupt handler */ -
trunk/src/os2ahci/atapi.c
r207 r209 41 41 int atapi_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot) 42 42 { 43 DPRINTF( 4,"atapi_get_geometry called\n");43 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": atapi_get_geometry called\n"); 44 44 iorb_seterr(pIorb, IOERR_CMD_NOT_SUPPORTED); 45 45 return(-1); … … 51 51 int atapi_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot) 52 52 { 53 DPRINTF( 4,"atapi_unit_ready called\n");53 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": atapi_unit_ready called\n"); 54 54 iorb_seterr(pIorb, IOERR_CMD_NOT_SUPPORTED); 55 55 return(-1); … … 92 92 SET_CDB_32(cdb.lba, io->RBA + io->BlocksXferred); 93 93 94 DPRINTF( 4, "atapi_read\n");94 DPRINTF(DBG_DETAILED, DBG_PREFIX": atapi_read\n"); 95 95 96 96 do { … … 166 166 167 167 ai->ports[p].unaligned_read_count++; 168 DPRINTF( 4, "atapi_read_unaligned\n");168 DPRINTF(DBG_DETAILED, DBG_PREFIX": atapi_read_unaligned\n"); 169 169 170 170 /* allocate transfer buffer */ … … 207 207 int atapi_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot) 208 208 { 209 DPRINTF( 4,"atapi_verify called\n");209 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": atapi_verify called\n"); 210 210 iorb_seterr(pIorb, IOERR_CMD_NOT_SUPPORTED); 211 211 return(-1); … … 217 217 int atapi_write(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot) 218 218 { 219 DPRINTF( 4,"atapi_write called\n");219 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": atapi_write called\n"); 220 220 iorb_seterr(pIorb, IOERR_CMD_NOT_SUPPORTED); 221 221 return(-1); … … 287 287 size_t sense_buf_len = ATAPI_SENSE_LEN; 288 288 289 DPRINTF( 4,"atapi_req_sense\n");289 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": atapi_req_sense\n"); 290 290 291 291 if ((pIorb->RequestControl & IORB_REQ_STATUSBLOCK) && … … 363 363 ATAPI_SENSE_DATA *psd = (ATAPI_SENSE_DATA *) aws->buf; 364 364 365 DHEXDUMP( 5,psd, sizeof(*psd), "sense buffer:\n");365 DHEXDUMP(DBG_DETAILED, psd, sizeof(*psd), "sense buffer:\n"); 366 366 367 367 if ((pIorb->RequestControl & IORB_REQ_STATUSBLOCK) && -
trunk/src/os2ahci/ctxhook.c
r205 r209 97 97 rearm_ctx_hook = 0; 98 98 99 DPRINTF( 8,"restart_ctxhook() started\n");99 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": restart_ctxhook() started\n"); 100 100 memset(&done_queue, 0x00, sizeof(done_queue)); 101 101 … … 124 124 need_reset = 0; 125 125 126 DPRINTF( 8,"port %d, TF_DATA: 0x%x\n", p, readl(port_mmio + PORT_TFDATA));126 DPRINTF(DBG_DETAILED, DBG_PREFIX": port %d, TF_DATA: 0x%x\n", p, readl(port_mmio + PORT_TFDATA)); 127 127 128 128 /* get "current command slot"; only valid if there are no NCQ cmds */ 129 129 ccs = (int) ((readl(port_mmio + PORT_CMD) >> 8) & 0x1f); 130 DPRINTF( 8,"PORT_CMD = 0x%x\n", ccs);130 DPRINTF(DBG_DETAILED, DBG_PREFIX": PORT_CMD = 0x%x\n", ccs); 131 131 132 132 for (vIorb = ai->ports[p].iorb_queue.vRoot; vIorb != FAR16NULL; vIorb = vNext) … … 152 152 { 153 153 /* this is the non-NCQ command that failed */ 154 DPRINTF(0, "failing IORB: %x\n", vIorb);154 DPRINTF(0, DBG_PREFIX": failing IORB: %x\n", vIorb); 155 155 vProblemIorb = vIorb; 156 156 } … … 179 179 if (ai->ports[p].ncq_cmds != 0 || ai->ports[p].reg_cmds != 0) 180 180 { 181 DPRINTF(0, "warning: commands issued not 0 (%08lx/%08lx); resetting...\n",181 DPRINTF(0, DBG_PREFIX": warning: commands issued not 0 (%08lx/%08lx); resetting...\n", 182 182 ai->ports[p].ncq_cmds, ai->ports[p].reg_cmds); 183 183 need_reset = 1; … … 278 278 spin_unlock(drv_lock); 279 279 280 DPRINTF( 8,"restart_ctxhook() completed\n");280 DPRINTF(DBG_FUNCEND, DBG_PREFIX": restart_ctxhook() completed\n"); 281 281 282 282 /* Check whether we have to rearm ourselves because some adapters were busy … … 332 332 rearm_ctx_hook = 0; 333 333 334 DPRINTF( 8,"reset_ctxhook() started\n");334 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": reset_ctxhook() started\n"); 335 335 memset(&done_queue, 0x00, sizeof(done_queue)); 336 336 … … 457 457 spin_unlock(drv_lock); 458 458 459 DPRINTF( 8,"reset_ctxhook() completed\n");459 DPRINTF(DBG_FUNCEND, DBG_PREFIX": reset_ctxhook() completed\n"); 460 460 461 461 /* Check whether we have to rearm ourselves because some adapters were busy … … 489 489 D32ThunkStackTo32(); 490 490 491 DPRINTF( 8,"engine_ctxhook() started\n");491 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": engine_ctxhook() started\n"); 492 492 if (resume_sleep_flag) 493 493 { … … 503 503 spin_unlock(drv_lock); 504 504 505 DPRINTF( 8,"engine_ctxhook() completed\n");505 DPRINTF(DBG_FUNCEND, DBG_PREFIX": engine_ctxhook() completed\n"); 506 506 507 507 if (iorbs_sent != 0) -
trunk/src/os2ahci/os2ahci.c
r207 r209 59 59 int init_reset = 1; /* if != 0, reset ports during init */ 60 60 int force_write_cache; /* if != 0, force write cache */ 61 int verbosity= 0; /* default is quiet. 1=show sign on banner, >1=show adapter info during boot */61 int iVerbose = 0; /* default is quiet. 1=show sign on banner, >1=show adapter info during boot */ 62 62 int use_mbr_test = 1; 63 63 … … 182 182 return(RPDONE | ((init_drv_failed) ? RPERR_INITFAIL : 0)); 183 183 } 184 D32g_DbgLevel = 0; 184 #ifdef DEBUG 185 D32g_DbgLevel = 0x80000000 | DEBUG; 186 #endif 185 187 init_drv_called = 1; 186 188 suspended = 0; … … 203 205 if ((rmrc = RMCreateDriver(&rm_drvinfo, &rm_drvh)) != RMRC_SUCCESS) 204 206 { 205 iprintf(" %s: failed to register driver with resource manager (rc = %d)", drv_name, rmrc);207 iprintf("OS2AHCI.ADD: failed to register driver with resource manager (rc = %d)", rmrc); 206 208 goto init_fail; 207 209 } … … 236 238 } 237 239 238 if (ArgCmp(pszCmdLine, "D")) 239 { 240 pszCmdLine++; 241 if (*pszCmdLine == ':') 242 { 243 pszCmdLine++; 244 D32g_DbgLevel = strtol(pszCmdLine, &pszCmdLine, 0); 245 } 246 else D32g_DbgLevel++; /* increase debug level */ 247 continue; 248 } 240 #ifdef DEBUG 241 if (ArgCmp(pszCmdLine, "DEBUG:")) 242 { 243 pszCmdLine += 6; 244 D32g_DbgLevel = strtol(pszCmdLine, &pszCmdLine, 0); 245 continue; 246 } 247 #endif 249 248 250 249 if (ArgCmp(pszCmdLine, "G:")) … … 261 260 if (add_pci_id(usVendor, usDevice)) 262 261 { 263 iprintf(" %s: failed to add PCI ID %04x:%04x", drv_name, usVendor, usDevice);262 iprintf("OS2AHCI.ADD: failed to add PCI ID %04x:%04x", usVendor, usDevice); 264 263 iStatus = 1; 265 264 } … … 299 298 if (adapter_index < 0 || adapter_index >= MAX_AD) 300 299 { 301 iprintf(" %s: invalid adapter index (%d)", drv_name, adapter_index);300 iprintf("OS2AHCI.ADD: invalid adapter index (%d)", adapter_index); 302 301 iStatus = 1; 303 302 } … … 312 311 if (port_index < 0 || port_index >= AHCI_MAX_PORTS) 313 312 { 314 iprintf(" %s: invalid port index (%d)", drv_name, port_index);313 iprintf("OS2AHCI.ADD: invalid port index (%d)", port_index); 315 314 iStatus = 1; 316 315 } … … 393 392 { 394 393 pszCmdLine++; 395 if (*pszCmdLine == ':') 396 { 397 pszCmdLine++; 398 verbosity = strtol(pszCmdLine, &pszCmdLine, 0); 399 } 400 else verbosity++; /* increase verbosity level */ 394 iVerbose = 1; 401 395 continue; 402 396 } … … 410 404 } 411 405 412 iprintf(" Unrecognized switch: %s", pszCmdLine-1);406 iprintf("OS2AHCI.ADD: Unrecognized switch: %s", pszCmdLine-1); 413 407 iStatus = 1; /* unrecognized argument */ 414 408 } … … 427 421 428 422 /* print initialization message */ 429 ciprintf("%s driver version %d.%02d", drv_name, DMAJOR, DMINOR);423 if (iVerbose) iprintf("OS2AHCI.ADD: driver version %d.%02d", DMAJOR, DMINOR); 430 424 431 425 #ifdef TESTVER … … 442 436 if (Dev32Help_RegisterDeviceClass(drv_name, add_entry, 0, 1, &add_handle)) 443 437 { 444 iprintf(" %s: couldn't register device class", drv_name);438 iprintf("OS2AHCI.ADD: couldn't register device class"); 445 439 goto init_fail; 446 440 } … … 461 455 { 462 456 /* no adapters found */ 463 ciprintf("%s: No adapters found.", drv_name);457 if (iVerbose) iprintf("OS2AHCI.ADD: No adapters found."); 464 458 } 465 459 … … 474 468 } 475 469 476 ciprintf("%s driver *not* installed", drv_name);470 if (iVerbose) iprintf("OS2AHCI.ADD: driver *not* installed"); 477 471 return(RPDONE | RPERR_INITFAIL); 478 472 } … … 486 480 USHORT gen_ioctl(REQPACKET *ioctl) 487 481 { 488 DPRINTF( 2,"IOCTL 0x%x/0x%x\n", ioctl->ioctl.bCategory, ioctl->ioctl.bFunction);482 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": IOCTL 0x%x/0x%x\n", ioctl->ioctl.bCategory, ioctl->ioctl.bFunction); 489 483 AhciStats.ulTestCount2++; 490 484 … … 544 538 USHORT exit_drv(int func) 545 539 { 546 DPRINTF( 2,"exit_drv(%d) called\n", func);540 DPRINTF(DBG_FUNCBEG|DBG_INIT, DBG_PREFIX": exit_drv(%d) called\n", func); 547 541 548 542 if (func == 0) … … 562 556 USHORT sr_drv(int func) 563 557 { 564 DPRINTF( 2,"sr_drv(%d) called\n", func);558 DPRINTF(DBG_FUNCBEG|DBG_INIT, DBG_PREFIX": sr_drv(%d) called\n", func); 565 559 566 560 if (func) resume(); … … 859 853 if (!init_complete) 860 854 { 861 DPRINTF( 1,"leaving initialization mode\n");855 DPRINTF(DBG_INIT, DBG_PREFIX": leaving initialization mode\n"); 862 856 for (a = 0; a < ad_info_cnt; a++) 863 857 { … … 872 866 unlock_adapter(ad_infos + a); 873 867 } 874 DPRINTF( 1,"leaving initialization mode 2\n");868 DPRINTF(DBG_INIT, DBG_PREFIX": leaving initialization mode 2\n"); 875 869 876 870 #ifdef LEGACY_APM … … 1308 1302 1309 1303 #ifdef DEBUG 1310 if (D32g_DbgLevel)1311 1304 { 1312 1305 /* determine queue type (local, driver, abort or port) and minimum debug … … 1314 1307 */ 1315 1308 char *queue_type; 1316 int min_debug = 7;1309 int min_debug = DBG_DETAILED; 1317 1310 1318 1311 if ((u32)queue >> 16 == (u32)&queue >> 16) /* DAZ this is bogus */ … … 1320 1313 /* this queue is on the stack */ 1321 1314 queue_type = "local"; 1322 min_debug = 8;1315 min_debug = DBG_DETAILED; 1323 1316 } 1324 1317 else if (queue == &driver_queue) … … 1329 1322 { 1330 1323 queue_type = "abort"; 1331 min_debug = 8;1324 min_debug = DBG_DETAILED; 1332 1325 } 1333 1326 else … … 1336 1329 } 1337 1330 1338 DPRINTF(min_debug,"IORB %x queued (cmd=%d/%d queue=%x [%s], timeout=%d)\n",1331 dprintf(min_debug, DBG_PREFIX": IORB %x queued (cmd=%d/%d queue=%x [%s], timeout=%d)\n", 1339 1332 vIorb, pIorb->CommandCode, pIorb->CommandModifier, queue, queue_type, 1340 1333 pIorb->Timeout); … … 1381 1374 if (found) 1382 1375 { 1383 DPRINTF( 8,"IORB %x removed (queue = %x)\n", vIorb, queue);1376 DPRINTF(DBG_DETAILED, DBG_PREFIX": IORB %x removed (queue = %x)\n", vIorb, queue); 1384 1377 } 1385 1378 else 1386 1379 { 1387 DPRINTF( 2,"IORB %x not found in queue %x\n", vIorb, queue);1380 DPRINTF(0, DBG_PREFIX": IORB %x not found in queue %x\n", vIorb, queue); 1388 1381 } 1389 1382 #endif … … 1454 1447 pIorb->Status |= IORB_DONE; 1455 1448 1456 DPRINTF( 7,"IORB %x complete status=0x%04x error=0x%04x\n",1449 DPRINTF(DBG_FUNCBEG, DBG_PREFIX": IORB %x complete status=0x%04x error=0x%04x\n", 1457 1450 vIorb, pIorb->Status, pIorb->ErrorCode); 1458 1451 -
trunk/src/os2ahci/os2ahci.h
r207 r209 64 64 #define MAX_RETRIES 3 65 65 66 #define DBG_ALWAYS 0x0000 67 #define DBG_FUNCBEG 0x0001 68 #define DBG_FUNCEND 0x0002 69 #define DBG_ATTACH 0x0004 70 #define DBG_DETAILED 0x0008 71 #define DBG_INIT 0x0010 72 #define DBG_SPECIAL 0x0020 73 #define DBG_VERBOSE 0x0100 74 #define DBG_ERROR_ALL 0x800000ff 75 76 #define DBG_PREFIX "AHCI: "__func__ 77 66 78 /* debug output macros */ 67 79 #ifdef DEBUG 68 80 #define DPRINTF(a,b,...) dprintf(a, b, ##__VA_ARGS__) 69 81 #define DHEXDUMP(a,b,c,d,...) dHexDump(a, b, c, d, ##__VA_ARGS__) 70 #define DUMP_HOST_REGS(l,a,b) {if (D32g_DbgLevel >=l) ahci_dump_host_regs(a,b);}71 #define DUMP_PORT_REGS(l,a,b) {if (D32g_DbgLevel >=l) ahci_dump_port_regs(a,b);}82 #define DUMP_HOST_REGS(l,a,b) {if (D32g_DbgLevel&l) ahci_dump_host_regs(a,b);} 83 #define DUMP_PORT_REGS(l,a,b) {if (D32g_DbgLevel&l) ahci_dump_port_regs(a,b);} 72 84 #else 73 85 #define DPRINTF(a,b,...) … … 76 88 #define DUMP_PORT_REGS(l,a,b) 77 89 #endif 78 79 /* verbosity console print macros80 * (we use 'i' in ciprintf here to avoid name clash81 * with vprintf-like funcs)82 */83 #define ciprintf(a,...) {if (verbosity > 0) iprintf(a, ##__VA_ARGS__);}84 #define ciiprintf(a,...) {if (verbosity > 1) iprintf(a, ##__VA_ARGS__);}85 90 86 91 /* adapter number from AD_INFO pointer; mainly for dprintf() purposes */ … … 230 235 231 236 typedef struct { 232 ULONG Cylinders;233 USHORT HeadsPerCylinder;234 USHORT SectorsPerTrack;235 ULONGLONG TotalSectors;236 char * Method;237 ULONG ulCylinders; 238 USHORT usHeadsPerCylinder; 239 USHORT usSectorsPerTrack; 240 ULONGLONG ullTotalSectors; 241 char *pMethod; 237 242 } DEV_INFO; 238 243 … … 479 484 extern int init_reset; /* if != 0, reset ports during init */ 480 485 extern int force_write_cache; /* if != 0, force write cache */ 481 extern int verbosity; /* if != 0, show some info during boot */486 extern int iVerbose; /* if != 0, show some info during boot */ 482 487 extern int use_mbr_test; 483 488 -
trunk/src/os2ahci/pci.c
r205 r209 271 271 USHORT BusDevFunc; 272 272 273 DPRINTF( 3,"scanning PCI bus...\n");273 DPRINTF(DBG_INIT|DBG_FUNCBEG, DBG_PREFIX": scanning PCI bus...\n"); 274 274 275 275 /* Go through the list of PCI IDs and search for each device … … 374 374 { 375 375 /* set IRQ for first device/func to 11 */ 376 DPRINTF( 1,"hacking virtualbox PIIX3 PCI to ISA bridge IRQ mapping\n");376 DPRINTF(DBG_INIT, DBG_PREFIX": hacking virtualbox PIIX3 PCI to ISA bridge IRQ mapping\n"); 377 377 irq = ad_infos[0].irq; 378 378 PciWriteConfig(0x0008, 0x60, sizeof(irq), irq); … … 467 467 pin = (int) ((val >> 8) & 0xff); 468 468 469 #if 0470 i = 1;471 if (irq==0 || irq==255) i = 0;472 473 if (verbosity > i)474 {475 iprintf("%s AHCI device %s %s (%d:%d:%d %04x:%04x) class:0x%06x", i?"Found":"Ignoring",476 vendor_from_id(vendor), device_from_id(device),477 PCI_BUS_FROM_BDF(BusDevFunc), PCI_DEV_FROM_BDF(BusDevFunc), PCI_FUNC_FROM_BDF(BusDevFunc),478 vendor, device, class);479 if (i==0) iprintf("Invalid interrupt (IRQ=%d).", irq);480 }481 if (i==0) return;482 #endif483 484 469 /* make sure we got room in the adapter information array */ 485 470 if (ad_info_cnt >= MAX_AD - 1) 486 471 { 487 iprintf(" %s: too many AHCI devices", drv_name);472 iprintf("OS2AHCI.ADD: too many AHCI devices"); 488 473 return; 489 474 } … … 511 496 */ 512 497 513 ciprintf("Adapter %d PCI=%d:%d:%d ID=%04x:%04x\n", ad_info_cnt, PCI_BUS_FROM_BDF(BusDevFunc), 514 PCI_DEV_FROM_BDF(BusDevFunc), PCI_FUNC_FROM_BDF(BusDevFunc), vendor, device); 515 DPRINTF(1,"Adapter %d PCI=%d:%d:%d ID=%04x:%04x\n", ad_info_cnt, PCI_BUS_FROM_BDF(BusDevFunc), 498 if (iVerbose) 499 { 500 iprintf("OS2AHCI.ADD: Adapter %d PCI=%d:%d:%d ID=%04x:%04x", ad_info_cnt, PCI_BUS_FROM_BDF(BusDevFunc), 501 PCI_DEV_FROM_BDF(BusDevFunc), PCI_FUNC_FROM_BDF(BusDevFunc), vendor, device); 502 } 503 DPRINTF(DBG_INIT, DBG_PREFIX": Adapter %d PCI=%d:%d:%d ID=%04x:%04x\n", ad_info_cnt, PCI_BUS_FROM_BDF(BusDevFunc), 516 504 PCI_DEV_FROM_BDF(BusDevFunc), PCI_FUNC_FROM_BDF(BusDevFunc), vendor, device); 517 505 … … 535 523 if (resource.ResourceType != RS_TYPE_MEM) 536 524 { 537 iprintf(" %s: BAR #5 must be an MMIO region", drv_name);525 iprintf("OS2AHCI.ADD: BAR #5 must be an MMIO region"); 538 526 goto add_pci_fail; 539 527 } … … 549 537 if (ret == RMRC_RES_ALREADY_CLAIMED) 550 538 { 551 ciiprintf("Device already claimed.");539 if (iVerbose) iprintf("OS2AHCI.ADD: Device already claimed."); 552 540 } 553 541 else 554 542 { 555 iprintf(" %s: couldn't register [MM]IO region (rc = %s)", drv_name, rmerr(ret));543 iprintf("OS2AHCI.ADD: couldn't register [MM]IO region (rc = %s)", rmerr(ret)); 556 544 } 557 545 goto add_pci_fail; … … 562 550 if (ad_info->mmio_phys == 0) 563 551 { 564 iprintf(" %s: couldn't determine MMIO base address", drv_name);552 iprintf("OS2AHCI.ADD: couldn't determine MMIO base address"); 565 553 goto add_pci_fail; 566 554 } … … 602 590 if (ret != RMRC_SUCCESS) 603 591 { 604 iprintf(" %s: couldn't register adapter (rc = %s)", drv_name, rmerr(ret));592 iprintf("OS2AHCI.ADD: couldn't register adapter (rc = %s)", rmerr(ret)); 605 593 goto add_pci_fail; 606 594 } … … 666 654 PciWriteConfig(BusDevFunc, PCI_BAR(i), sizeof(u32), bar_addr) ) 667 655 { 668 iprintf(" %s: couldn't determine [MM]IO size", drv_name);656 iprintf("OS2AHCI.ADD: couldn't determine [MM]IO size"); 669 657 if (bar_addr != 0) 670 658 { … … 703 691 } 704 692 705 DPRINTF(3,"BAR #%d: type = %s, addr = 0x%08lx, size = %d\n", i, 706 (resource->ResourceType == RS_TYPE_IO) ? "I/O" : "MEM", 707 bar_addr, bar_size); 693 DPRINTF(DBG_INIT, DBG_PREFIX": BAR #%d: type = %s, addr = 0x%08lx, size = %d\n", i, 694 (resource->ResourceType == RS_TYPE_IO) ? "I/O" : "MEM", bar_addr, bar_size); 708 695 709 696 return((long) bar_size); -
trunk/src/os2ahci/trace.c
r207 r209 42 42 if (pi->devs[d].atapi) dprintf(0," atapi"); 43 43 if (pi->devs[d].removable) dprintf(0," removable"); 44 if (pi->devs[d].dev_info. Method != NULL)44 if (pi->devs[d].dev_info.pMethod != NULL) 45 45 { 46 46 dprintf(0," %d cylinders, %d heads, %d sectors per track (%dMB) (%s)", 47 pi->devs[d].dev_info.Cylinders, pi->devs[d].dev_info.HeadsPerCylinder, pi->devs[d].dev_info.SectorsPerTrack, 48 (ULONG)(pi->devs[d].dev_info.TotalSectors/2048), pi->devs[d].dev_info.Method); 47 pi->devs[d].dev_info.ulCylinders, pi->devs[d].dev_info.usHeadsPerCylinder, 48 pi->devs[d].dev_info.usSectorsPerTrack, 49 (ULONG)(pi->devs[d].dev_info.ullTotalSectors/2048), pi->devs[d].dev_info.pMethod); 49 50 } 50 51 if (pi->devs[d].ignored) dprintf(0," Unusable"); … … 52 53 dprintf(0," Model: %s\n", pi->devs[d].dev_name); 53 54 } 54 else if ( verbosity> 0)55 else if (iVerbose > 0) 55 56 { 56 57 if (iFlag) dprintf(0," Port %d: No drive present\n", p); … … 64 65 void DumpIorb(IORBH *pIorb) 65 66 { 66 if ( D32g_DbgLevel < 2) return;67 if (!(D32g_DbgLevel & DBG_DETAILED)) return; 67 68 if (!ad_infos[iorb_unit_adapter(pIorb)].ports[iorb_unit_port(pIorb)].devs[iorb_unit_device(pIorb)].atapi) return; 68 69
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