Changeset 154 for trunk/src/os2ahci/ahci.c

Timestamp:

Apr 10, 2013, 6:47:05 PM (12 years ago)

Author:

David Azarewicz

Message:

Begin adding user info output.
Added LVM support.

File:

• trunk/src/os2ahci/ahci.c (modified) (9 diffs)

trunk/src/os2ahci/ahci.c

@@ -144 +144 @@
   ddprintf("ahci_save_bios_config: BIOS AHCI mode is %d\n", ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN);
 
+#if 0
   if ((ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) == 0 &&
       ai->pci->vendor == PCI_VENDOR_ID_INTEL) {
@@ -151 +152 @@
     init_reset = 1;
   }
+#endif
 
   /* HOST_CAP2 only exists for AHCI V1.2 and later */
@@ -676 +678 @@
     if (ai->port_map & (1UL << p)) {
       if (init_reset) {
-        dprintf("ahci_complete_init: resetting port %d\n", p);
+        ddprintf("ahci_complete_init: resetting port %d\n", p);
         ahci_reset_port(ai, p, 1);
       } else {
-        dprintf("ahci_complete_init: restarting port #%d\n", p);
+        ddprintf("ahci_complete_init: restarting port #%d\n", p);
         ahci_stop_port(ai, p);
         ahci_start_port(ai, p, 1);
@@ -718 +720 @@
   int timeout;
 
-  dprintf("ahci_reset_port: resetting port %d.%d\n", ad_no(ai), p);
+  ddprintf("ahci_reset_port: resetting port %d.%d\n", ad_no(ai), p);
   if (debug > 1) {
     printf(" PORT_CMD       = 0x%lx\n", readl(port_mmio + PORT_CMD));
@@ -749 +751 @@
   /* set link speed and power management options */
   ddprintf("ahci_reset_port: setting link speed and power management options\n");
-  tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x00000fffUL; //DAZ
+  tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x00000fffUL;
   tmp |= ((u32) link_speed[ad_no(ai)][p] & 0x0f) << 4;
   tmp |= ((u32) link_power[ad_no(ai)][p] & 0x0f) << 8;
-  //DAZ writel(port_mmio + PORT_SCR_CTL, tmp);
+  writel(port_mmio + PORT_SCR_CTL, tmp);
 
   /* issue COMRESET on the port */
   ddprintf("ahci_reset_port: issuing COMRESET on port %d\n", p);
-  //DAZ tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x0000000fUL;
   writel(port_mmio + PORT_SCR_CTL, tmp | 1);
   readl(port_mmio + PORT_SCR_CTL);  /* flush */
@@ -810 +811 @@
   u8 _far *port_mmio = port_base(ai, p);
   u32 status;
-  //int timeout;
-
-  dprintf("ahci_start_port %d.%d\n", ad_no(ai), p);
+
+  ddprintf("ahci_start_port %d.%d\n", ad_no(ai), p);
   /* check whether device presence is detected and link established */
-
-#if 0
-  /* wait for communication to be re-established after port reset */
-  timeout = 5000;
-  while (((status = readl(port_mmio + PORT_SCR_STAT)) & 3) != 3) {
-    mdelay(10);
-    timeout -= 10;
-    if (timeout <= 0) {
-      dprintf("ahci_start_port #%d (PORT_SCR_STAT = 0x%lx)\n", p, status);
-      return(-1);
-    }
-  }
-#endif
 
   status = readl(port_mmio + PORT_SCR_STAT);
@@ -920 +907 @@
   int rc;
 
-  dprintf("ahci_stop_port %d.%d\n", ad_no(ai), p);
+  ddprintf("ahci_stop_port %d.%d\n", ad_no(ai), p);
 
   /* disable port interrupts */
@@ -1195 +1182 @@
 
   /* restart/reset port (includes the necessary port configuration) */
-  if ((ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) == 0 &&
-      ai->pci->vendor == PCI_VENDOR_ID_INTEL) {
+  if (init_reset) {
     /* As outlined in ahci_restore_bios_config(), switching back and
      * forth between SATA and AHCI mode requires a COMRESET to force
@@ -1803 +1789 @@
 }
 
-