Changeset 772 for GPL/trunk/alsa-kernel/hda/hdac_stream.c

Timestamp:

Apr 19, 2025, 8:08:37 PM (4 months ago)

Author:

David Azarewicz

Message:

Merge in changes from 6.6-LTS branch.
Fixed additional 25+ problems.

Location:

GPL/trunk

Files:

• . (modified) (1 prop)
• alsa-kernel/hda/hdac_stream.c (modified) (25 diffs)

GPL/trunk/alsa-kernel/hda/hdac_stream.c

@@ -8 +8 @@
 #include <linux/export.h>
 #include <linux/clocksource.h>
+#include <sound/compress_driver.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
@@ -19 +20 @@
 #endif
 
+/*
+ * the hdac_stream library is intended to be used with the following
+ * transitions. The states are not formally defined in the code but loosely
+ * inspired by boolean variables. Note that the 'prepared' field is not used
+ * in this library but by the callers during the hw_params/prepare transitions
+ *
+ *                         |
+ *      stream_init()      |
+ *                         v
+ *                      +--+-------+
+ *                      |  unused  |
+ *                      +--+----+--+
+ *                         |    ^
+ *      stream_assign()    |    |    stream_release()
+ *                         v    |
+ *                      +--+----+--+
+ *                      |  opened  |
+ *                      +--+----+--+
+ *                         |    ^
+ *      stream_reset()     |    |
+ *      stream_setup()     |    |    stream_cleanup()
+ *                         v    |
+ *                      +--+----+--+
+ *                      | prepared |
+ *                      +--+----+--+
+ *                         |    ^
+ *      stream_start()     |    |    stream_stop()
+ *                         v    |
+ *                      +--+----+--+
+ *                      |  running |
+ *                      +----------+
+ */
+
 /**
  * snd_hdac_get_stream_stripe_ctl - get stripe control value
@@ -76 +110 @@
         snd_hdac_dsp_lock_init(azx_dev);
         list_add_tail(&azx_dev->list, &bus->stream_list);
+
+        if (bus->spbcap) {
+                azx_dev->spib_addr = (void*)bus->spbcap + AZX_SPB_BASE +
+                                        AZX_SPB_INTERVAL * idx +
+                                        AZX_SPB_SPIB;
+
+                azx_dev->fifo_addr = (void*)bus->spbcap + AZX_SPB_BASE +
+                                        AZX_SPB_INTERVAL * idx +
+                                        AZX_SPB_MAXFIFO;
+        }
+
+        if (bus->drsmcap)
+                azx_dev->dpibr_addr = (void*)bus->drsmcap + AZX_DRSM_BASE +
+                                        AZX_DRSM_INTERVAL * idx;
 }
 EXPORT_SYMBOL_GPL(snd_hdac_stream_init);
@@ -82 +130 @@
  * snd_hdac_stream_start - start a stream
  * @azx_dev: HD-audio core stream to start
- * @fresh_start: false = wallclock timestamp relative to period wallclock
  *
  * Start a stream, set start_wallclk and set the running flag.
  */
-void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start)
+void snd_hdac_stream_start(struct hdac_stream *azx_dev)
 {
         struct hdac_bus *bus = azx_dev->bus;
@@ -94 +141 @@
 
         azx_dev->start_wallclk = snd_hdac_chip_readl(bus, WALLCLK);
-        if (!fresh_start)
-                azx_dev->start_wallclk -= azx_dev->period_wallclk;
 
         /* enable SIE */
@@ -111 +156 @@
         }
         /* set DMA start and interrupt mask */
-        snd_hdac_stream_updateb(azx_dev, SD_CTL,
+        if (bus->access_sdnctl_in_dword)
+                snd_hdac_stream_updatel(azx_dev, SD_CTL,
+                                0, SD_CTL_DMA_START | SD_INT_MASK);
+        else
+                snd_hdac_stream_updateb(azx_dev, SD_CTL,
                                 0, SD_CTL_DMA_START | SD_INT_MASK);
         azx_dev->running = true;
@@ -118 +167 @@
 
 /**
- * snd_hdac_stream_clear - stop a stream DMA
+ * snd_hdac_stream_clear - helper to clear stream registers and stop DMA transfers
  * @azx_dev: HD-audio core stream to stop
  */
-void snd_hdac_stream_clear(struct hdac_stream *azx_dev)
+static void snd_hdac_stream_clear(struct hdac_stream *azx_dev)
 {
         snd_hdac_stream_updateb(azx_dev, SD_CTL,
@@ -130 +179 @@
         azx_dev->running = false;
 }
-EXPORT_SYMBOL_GPL(snd_hdac_stream_clear);
 
 /**
@@ -149 +197 @@
 
 /**
+ * snd_hdac_stop_streams - stop all streams
+ * @bus: HD-audio core bus
+ */
+void snd_hdac_stop_streams(struct hdac_bus *bus)
+{
+        struct hdac_stream *stream;
+
+        list_for_each_entry(stream, &bus->stream_list, list, struct hdac_stream)
+                snd_hdac_stream_stop(stream);
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stop_streams);
+
+/**
+ * snd_hdac_stop_streams_and_chip - stop all streams and chip if running
+ * @bus: HD-audio core bus
+ */
+void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus)
+{
+        if (bus->chip_init) {
+                snd_hdac_stop_streams(bus);
+                snd_hdac_bus_stop_chip(bus);
+        }
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip);
+
+/**
  * snd_hdac_stream_reset - reset a stream
  * @azx_dev: HD-audio core stream to reset
@@ -155 +229 @@
 {
         unsigned char val;
+#ifdef TARGET_OS2
         int timeout;
+#endif
         int dma_run_state;
 
@@ -163 +239 @@
 
         snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
+
+#ifndef TARGET_OS2
+        /* wait for hardware to report that the stream entered reset */
+        snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
+#else
         udelay(3);
         timeout = 300;
@@ -171 +252 @@
                         break;
         } while (--timeout);
-
+#endif
         if (azx_dev->bus->dma_stop_delay && dma_run_state)
                 udelay(azx_dev->bus->dma_stop_delay);
 
-        val &= ~SD_CTL_STREAM_RESET;
-        snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
+        snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
+
+#ifndef TARGET_OS2
+        /* wait for hardware to report that the stream is out of reset */
+        snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
+#else
         udelay(3);
 
@@ -187 +272 @@
                         break;
         } while (--timeout);
-
+#endif
         /* reset first position - may not be synced with hw at this time */
         if (azx_dev->posbuf)
@@ -299 +384 @@
 
         /* make a non-zero unique key for the substream */
-        int key = (substream->pcm->device << 16) | (substream->number << 2) |
-                (substream->stream + 1);
+        int key = (substream->number << 2) | (substream->stream + 1);
+
+        if (substream->pcm)
+                key |= (substream->pcm->device << 16);
 
         spin_lock_irq(&bus->reg_lock);
@@ -327 +414 @@
 
 /**
- * snd_hdac_stream_release - release the assigned stream
+ * snd_hdac_stream_release_locked - release the assigned stream
  * @azx_dev: HD-audio core stream to release
  *
  * Release the stream that has been assigned by snd_hdac_stream_assign().
- */
-void snd_hdac_stream_release(struct hdac_stream *azx_dev)
-{
-        struct hdac_bus *bus = azx_dev->bus;
-
-        spin_lock_irq(&bus->reg_lock);
+ * The bus->reg_lock needs to be taken at a higher level
+ */
+void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev)
+{
         azx_dev->opened = 0;
         azx_dev->running = 0;
         azx_dev->substream = NULL;
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_release_locked);
+
+/**
+ * snd_hdac_stream_release - release the assigned stream
+ * @azx_dev: HD-audio core stream to release
+ *
+ * Release the stream that has been assigned by snd_hdac_stream_assign().
+ */
+void snd_hdac_stream_release(struct hdac_stream *azx_dev)
+{
+        struct hdac_bus *bus = azx_dev->bus;
+
+        spin_lock_irq(&bus->reg_lock);
+        snd_hdac_stream_release_locked(azx_dev);
         spin_unlock_irq(&bus->reg_lock);
 }
@@ -421 +521 @@
         struct hdac_bus *bus = azx_dev->bus;
         struct snd_pcm_substream *substream = azx_dev->substream;
-        struct snd_pcm_runtime *runtime = substream->runtime;
+        struct snd_compr_stream *cstream = azx_dev->cstream;
+        struct snd_pcm_runtime *runtime = NULL;
+        struct snd_dma_buffer *dmab;
         __le32 *bdl;
         int i, ofs, periods, period_bytes;
         int pos_adj, pos_align;
+
+        if (substream) {
+                runtime = substream->runtime;
+                dmab = snd_pcm_get_dma_buf(substream);
+        } else if (cstream) {
+                dmab = snd_pcm_get_dma_buf(cstream);
+        } else {
+                WARN(1, "No substream or cstream assigned\n");
+                return -EINVAL;
+        }
 
         /* reset BDL address */
@@ -439 +551 @@
 
         pos_adj = bus->bdl_pos_adj;
-        if (!azx_dev->no_period_wakeup && pos_adj > 0) {
+        if (runtime && !azx_dev->no_period_wakeup && pos_adj > 0) {
                 pos_align = pos_adj;
                 pos_adj = DIV_ROUND_UP(pos_adj * runtime->rate, 48000);
@@ -452 +564 @@
                         pos_adj = 0;
                 } else {
-                        ofs = setup_bdle(bus, snd_pcm_get_dma_buf(substream),
-                                         azx_dev,
+                        ofs = setup_bdle(bus, dmab, azx_dev,
                                          &bdl, ofs, pos_adj, true);
                         if (ofs < 0)
@@ -463 +574 @@
         for (i = 0; i < periods; i++) {
                 if (i == periods - 1 && pos_adj)
-                        ofs = setup_bdle(bus, snd_pcm_get_dma_buf(substream),
-                                         azx_dev, &bdl, ofs,
-                                         period_bytes - pos_adj, 0);
+                        ofs = setup_bdle(bus, dmab, azx_dev,
+                                         &bdl, ofs, period_bytes - pos_adj, 0);
                 else
-                        ofs = setup_bdle(bus, snd_pcm_get_dma_buf(substream),
-                                         azx_dev, &bdl, ofs,
-                                         period_bytes,
+                        ofs = setup_bdle(bus, dmab, azx_dev,
+                                         &bdl, ofs, period_bytes,
                                          !azx_dev->no_period_wakeup);
                 if (ofs < 0)
@@ -494 +603 @@
                                  unsigned int format_val)
 {
-
+        struct snd_pcm_substream *substream = azx_dev->substream;
+        struct snd_compr_stream *cstream = azx_dev->cstream;
         unsigned int bufsize, period_bytes;
-        struct snd_pcm_substream *substream = azx_dev->substream;
-        struct snd_pcm_runtime *runtime;
+        unsigned int no_period_wakeup;
         int err;
 
-        if (!substream)
+        if (substream) {
+                bufsize = snd_pcm_lib_buffer_bytes(substream);
+                period_bytes = snd_pcm_lib_period_bytes(substream);
+                no_period_wakeup = substream->runtime->no_period_wakeup;
+        } else if (cstream) {
+                bufsize = cstream->runtime->buffer_size;
+                period_bytes = cstream->runtime->fragment_size;
+                no_period_wakeup = 0;
+        } else {
                 return -EINVAL;
-        runtime = substream->runtime;
-        bufsize = snd_pcm_lib_buffer_bytes(substream);
-        period_bytes = snd_pcm_lib_period_bytes(substream);
+        }
 
         if (bufsize != azx_dev->bufsize ||
             period_bytes != azx_dev->period_bytes ||
             format_val != azx_dev->format_val ||
-            runtime->no_period_wakeup != azx_dev->no_period_wakeup) {
+            no_period_wakeup != azx_dev->no_period_wakeup) {
                 azx_dev->bufsize = bufsize;
                 azx_dev->period_bytes = period_bytes;
                 azx_dev->format_val = format_val;
-                azx_dev->no_period_wakeup = runtime->no_period_wakeup;
+                azx_dev->no_period_wakeup = no_period_wakeup;
                 err = snd_hdac_stream_setup_periods(azx_dev);
                 if (err < 0)
@@ -589 +704 @@
         bool inited = false;
         u64 cycle_last = 0;
-        int i = 0;
 
         list_for_each_entry(s, &bus->stream_list, list, struct hdac_stream) {
-                if (streams & (1 << i)) {
+                if ((streams & (1 << s->index))) {
                         azx_timecounter_init(s, inited, cycle_last);
                         if (!inited) {
@@ -599 +713 @@
                         }
                 }
-                i++;
         }
 
@@ -644 +757 @@
 {
         struct hdac_bus *bus = azx_dev->bus;
-        int i, nwait, timeout;
+        int nwait, timeout;
         struct hdac_stream *s;
 
         for (timeout = 5000; timeout; timeout--) {
                 nwait = 0;
-                i = 0;
                 list_for_each_entry(s, &bus->stream_list, list, struct hdac_stream) {
-                        if (!(streams & (1 << i++)))
+                        if (!(streams & (1 << s->index)))
                                 continue;
 
@@ -680 +792 @@
 EXPORT_SYMBOL_GPL(snd_hdac_stream_sync);
 
+/**
+ * snd_hdac_stream_spbcap_enable - enable SPIB for a stream
+ * @bus: HD-audio core bus
+ * @enable: flag to enable/disable SPIB
+ * @index: stream index for which SPIB need to be enabled
+ */
+void snd_hdac_stream_spbcap_enable(struct hdac_bus *bus,
+                                   bool enable, int index)
+{
+        u32 mask = 0;
+
+        if (!bus->spbcap) {
+                dev_err(bus->dev, "Address of SPB capability is NULL\n");
+                return;
+        }
+
+        mask |= (1 << index);
+
+        if (enable)
+                snd_hdac_updatel(bus->spbcap, AZX_REG_SPB_SPBFCCTL, mask, mask);
+        else
+                snd_hdac_updatel(bus->spbcap, AZX_REG_SPB_SPBFCCTL, mask, 0);
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_spbcap_enable);
+
+/**
+ * snd_hdac_stream_set_spib - sets the spib value of a stream
+ * @bus: HD-audio core bus
+ * @azx_dev: hdac_stream
+ * @value: spib value to set
+ */
+int snd_hdac_stream_set_spib(struct hdac_bus *bus,
+                             struct hdac_stream *azx_dev, u32 value)
+{
+        if (!bus->spbcap) {
+                dev_err(bus->dev, "Address of SPB capability is NULL\n");
+                return -EINVAL;
+        }
+
+        writel(value, azx_dev->spib_addr);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_set_spib);
+
+/**
+ * snd_hdac_stream_get_spbmaxfifo - gets the spib value of a stream
+ * @bus: HD-audio core bus
+ * @azx_dev: hdac_stream
+ *
+ * Return maxfifo for the stream
+ */
+int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
+                                   struct hdac_stream *azx_dev)
+{
+        if (!bus->spbcap) {
+                dev_err(bus->dev, "Address of SPB capability is NULL\n");
+                return -EINVAL;
+        }
+
+        return readl(azx_dev->fifo_addr);
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_get_spbmaxfifo);
+
+/**
+ * snd_hdac_stream_drsm_enable - enable DMA resume for a stream
+ * @bus: HD-audio core bus
+ * @enable: flag to enable/disable DRSM
+ * @index: stream index for which DRSM need to be enabled
+ */
+void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
+                                 bool enable, int index)
+{
+        u32 mask = 0;
+
+        if (!bus->drsmcap) {
+                dev_err(bus->dev, "Address of DRSM capability is NULL\n");
+                return;
+        }
+
+        mask |= (1 << index);
+
+        if (enable)
+                snd_hdac_updatel(bus->drsmcap, AZX_REG_DRSM_CTL, mask, mask);
+        else
+                snd_hdac_updatel(bus->drsmcap, AZX_REG_DRSM_CTL, mask, 0);
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_drsm_enable);
+
+#ifndef TARGET_OS2
+/*
+ * snd_hdac_stream_wait_drsm - wait for HW to clear RSM for a stream
+ * @azx_dev: HD-audio core stream to await RSM for
+ *
+ * Returns 0 on success and -ETIMEDOUT upon a timeout.
+ */
+int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev)
+{
+        struct hdac_bus *bus = azx_dev->bus;
+        u32 mask, reg;
+        int ret;
+
+        mask = 1 << azx_dev->index;
+
+        ret = read_poll_timeout(snd_hdac_reg_readl, reg, !(reg & mask), 250, 2000, false, bus,
+                                bus->drsmcap + AZX_REG_DRSM_CTL);
+        if (ret)
+                dev_dbg(bus->dev, "polling RSM 0x%08x failed: %d\n", mask, ret);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_wait_drsm);
+#endif
+
+/**
+ * snd_hdac_stream_set_dpibr - sets the dpibr value of a stream
+ * @bus: HD-audio core bus
+ * @azx_dev: hdac_stream
+ * @value: dpib value to set
+ */
+int snd_hdac_stream_set_dpibr(struct hdac_bus *bus,
+                              struct hdac_stream *azx_dev, u32 value)
+{
+        if (!bus->drsmcap) {
+                dev_err(bus->dev, "Address of DRSM capability is NULL\n");
+                return -EINVAL;
+        }
+
+        writel(value, azx_dev->dpibr_addr);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_set_dpibr);
+
+/**
+ * snd_hdac_stream_set_lpib - sets the lpib value of a stream
+ * @azx_dev: hdac_stream
+ * @value: lpib value to set
+ */
+int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value)
+{
+        snd_hdac_stream_writel(azx_dev, SD_LPIB, value);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(snd_hdac_stream_set_lpib);
+
 #ifdef CONFIG_SND_HDA_DSP_LOADER
 /**
@@ -754 +1012 @@
 {
         if (start)
-                snd_hdac_stream_start(azx_dev, true);
+                snd_hdac_stream_start(azx_dev);
         else
                 snd_hdac_stream_stop(azx_dev);