Ignore:
Timestamp:
Apr 9, 2006, 12:09:39 PM (19 years ago)
Author:
vladest
Message:

Latest ALSA patches
HDA patches
Patch for Intel from Rudy's
Fixes locks on NM256 chipsets
Fixes PM on Maestro3 chipsets

File:
1 edited

Legend:

Unmodified
Added
Removed
  • GPL/trunk/alsa-kernel/pci/maestro3.c

    r70 r76  
    830830
    831831    struct pci_dev *pci;
    832     struct m3_quirk *quirk;
    833     struct m3_hv_quirk *hv_quirk;
     832    const struct m3_quirk *quirk;
     833    const struct m3_hv_quirk *hv_quirk;
    834834
    835835    int dacs_active;
     
    918918
    919919MODULE_DEVICE_TABLE(pci, snd_m3_ids);
    920 #if 0
    921 struct m3_quirk {
    922     const char *name;   /* device name */
    923     u16 vendor, device; /* subsystem ids */
    924     int amp_gpio;               /* gpio pin #  for external amp, -1 = default */
    925     int irda_workaround;        /* non-zero if avoid to touch 0x10 on GPIO_DIRECTION
    926     (e.g. for IrDA on Dell Inspirons) */
    927 };
    928 #endif
    929 static struct m3_quirk m3_quirk_list[] = {
     920
     921static const struct m3_quirk m3_quirk_list[] = {
    930922    /* panasonic CF-28 "toughbook" */
    931923    {
    932         /*.name = */"Panasonic CF-28",
    933         /*.vendor = */0x10f7,
    934         /*.device = */0x833e,
    935         /*.amp_gpio = */0x0d,
    936         0
     924        .name = "Panasonic CF-28",
     925        .vendor = 0x10f7,
     926        .device = 0x833e,
     927        .amp_gpio = 0x0d,
    937928    },
    938929    /* panasonic CF-72 "toughbook" */
    939930    {
    940         /*.name = */"Panasonic CF-72",
    941         /*.vendor = */0x10f7,
    942         /*.device = */0x833d,
    943         /*.amp_gpio = */0x0d,
    944         0
     931        .name = "Panasonic CF-72",
     932        .vendor = 0x10f7,
     933        .device = 0x833d,
     934        .amp_gpio = 0x0d,
    945935    },
    946936    /* Dell Inspiron 4000 */
    947937    {
    948         /*.name = */"Dell Inspiron 4000",
    949         /*.vendor = */0x1028,
    950         /*.device = */0x00b0,
    951         /*.amp_gpio = */-1,
    952         /*.irda_workaround = */1,
     938        .name = "Dell Inspiron 4000",
     939        .vendor = 0x1028,
     940        .device = 0x00b0,
     941        .amp_gpio = -1,
     942        .irda_workaround = 1,
    953943    },
    954944    /* Dell Inspiron 8000 */
    955945    {
    956         /*.name = */"Dell Inspiron 8000",
    957         /*.vendor = */0x1028,
    958         /*.device = */0x00a4,
    959         /*.amp_gpio = */-1,
    960         /*.irda_workaround = */1,
     946        .name = "Dell Inspiron 8000",
     947        .vendor = 0x1028,
     948        .device = 0x00a4,
     949        .amp_gpio = -1,
     950        .irda_workaround = 1,
    961951    },
    962 #if 1
    963952    /* Dell Inspiron 8100 */
    964953    {
    965         /*.name = */"Dell Inspiron 8100",
    966         /*.vendor = */0x1028,
    967         /*.device = */0x00e6,
    968         /*.amp_gpio = */-1,
    969         /*.irda_workaround = */1,
     954        .name = "Dell Inspiron 8100",
     955        .vendor = 0x1028,
     956        .device = 0x00e6,
     957        .amp_gpio = -1,
     958        .irda_workaround = 1,
    970959    },
    971 #endif
    972960    /* NEC LM800J/7 */
    973961    {
    974         /*.name = */"NEC LM800J/7",
    975         /*.vendor = */0x1033,
    976         /*.device = */0x80f1,
    977         /*.amp_gpio = */0x03,
    978         0
     962        .name = "NEC LM800J/7",
     963        .vendor = 0x1033,
     964        .device = 0x80f1,
     965        .amp_gpio = 0x03,
    979966    },
    980967    /* LEGEND ZhaoYang 3100CF */
    981968    {
    982         "LEGEND ZhaoYang 3100CF",
    983         0x1509,
    984         0x1740,
    985         0x03,
    986         0
     969        .name = "LEGEND ZhaoYang 3100CF",
     970        .vendor = 0x1509,
     971        .device = 0x1740,
     972        .amp_gpio = 0x03,
    987973    },
    988974    /* END */
    989     { 0 }
     975    { NULL }
    990976};
    991977
    992978/* These values came from the Windows driver. */
    993 static struct m3_hv_quirk m3_hv_quirk_list[] = {
     979static const struct m3_hv_quirk m3_hv_quirk_list[] = {
    994980    /* Allegro chips */
    995981    { 0x125D, 0x1988, 0x0E11, 0x002E, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD, 0 },
     
    13981384}
    13991385
    1400 
    1401 static struct play_vals {
     1386static const struct play_vals {
    14021387    u16 addr, val;
    14031388} pv[] = {
     
    14651450 *    Native record driver
    14661451 */
    1467 static struct rec_vals {
     1452static const struct rec_vals {
    14681453    u16 addr, val;
    14691454} rv[] = {
     
    16351620        return;
    16361621
    1637     hwptr = snd_m3_get_pointer(chip, s, subs) % s->dma_size;
    1638     diff = (s->dma_size + hwptr - s->hwptr) % s->dma_size;
     1622    hwptr = snd_m3_get_pointer(chip, s, subs);
     1623    /* try to avoid expensive modulo divisions */
     1624    if (hwptr >= s->dma_size)
     1625        hwptr %= s->dma_size;
     1626
     1627    diff = s->dma_size + hwptr - s->hwptr;
     1628    if (diff >= s->dma_size)
     1629        diff %= s->dma_size;
     1630
    16391631    s->hwptr = hwptr;
    16401632    s->count += diff;
     1633
    16411634    if (s->count >= (signed)s->period_size) {
    1642         s->count %= s->period_size;
     1635        if (s->count < 2 * (signed)s->period_size)
     1636            s->count -= (signed)s->period_size;
     1637        else
     1638            s->count %= s->period_size;
     1639
    16431640        spin_unlock(&chip->reg_lock);
    16441641        snd_pcm_period_elapsed(subs);
     
    17151712    u8 status;
    17161713    int i;
    1717 #ifdef TARGET_OS2
    1718     int fOurIrq = FALSE;
    1719 #endif
    1720 #ifdef DEBUG
    1721     dprintf(("int"));
    1722 #endif
     1714
    17231715    status = inb(chip->iobase + HOST_INT_STATUS);
    1724 #ifdef DEBUG
    1725     dprintf(("%x",status));
    1726 #endif
    17271716
    17281717    if (status == 0xff)
    17291718        return IRQ_NONE;
    17301719
    1731 #ifdef TARGET_OS2
    1732     fOurIrq = TRUE;
    1733 #endif
    17341720    if (status & HV_INT_PENDING)
    17351721        tasklet_hi_schedule(&chip->hwvol_tq);
     
    17641750    /* ack ints */
    17651751    outb(status, chip->iobase + HOST_INT_STATUS);
    1766 #ifdef TARGET_OS2
    1767     if (fOurIrq) {
    1768         eoi_irq(irq);
    1769     }
    1770 #endif //TARGET_OS2
    1771 
    17721752    return IRQ_HANDLED;
    17731753}
     
    19961976        if (! (snd_m3_inb(chip, 0x30) & 1))
    19971977            return 0;
     1978        cpu_relax();
    19981979    } while (i-- > 0);
    19991980
     
    20071988    m3_t *chip = ac97->private_data;
    20081989    unsigned long flags;
    2009     unsigned short data;
     1990    unsigned short data = 0xffff;
    20101991
    20111992    if (snd_m3_ac97_wait(chip))
    2012         return 0xffff;
     1993        goto fail;
    20131994    spin_lock_irqsave(&chip->ac97_lock, flags);
    20141995    snd_m3_outb(chip, 0x80 | (reg & 0x7f), CODEC_COMMAND);
    20151996    if (snd_m3_ac97_wait(chip))
    2016         return 0xffff;
     1997        goto fail_unlock;
    20171998    data = snd_m3_inw(chip, CODEC_DATA);
     1999fail_unlock:
    20182000    spin_unlock_irqrestore(&chip->ac97_lock, flags);
     2001fail:
    20192002    return data;
    20202003}
     
    21782161 */
    21792162
    2180 static u16 assp_kernel_image[] __devinitdata = {
     2163static const u16 assp_kernel_image[] __devinitdata = {
    21812164    0x7980, 0x0030, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x00FB, 0x7980, 0x00DD, 0x7980, 0x03B4,
    21822165    0x7980, 0x0332, 0x7980, 0x0287, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4,
     
    22652248 * that is to be loaded at 0x400 on the DSP.
    22662249 */
    2267 static u16 assp_minisrc_image[] __devinitdata = {
     2250static const u16 assp_minisrc_image[] __devinitdata = {
    22682251
    22692252    0xBF80, 0x101E, 0x906E, 0x006E, 0x8B88, 0x6980, 0xEF88, 0x906F, 0x0D6F, 0x6900, 0xEB08, 0x0412,
     
    23082291
    23092292#define MINISRC_LPF_LEN 10
    2310 static u16 minisrc_lpf[MINISRC_LPF_LEN] __devinitdata = {
     2293static const u16 minisrc_lpf[MINISRC_LPF_LEN] __devinitdata = {
    23112294    0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C,
    23122295    0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F
     
    24152398
    24162399    /*
    2417      * align instance address to 256 bytes so that it's
     2400     * align instance address to 256 bytes so that its
    24182401     * shifted list address is aligned.
    24192402     * list address = (mem address >> 1) >> 7;
     
    26982681    m3_t *chip;
    26992682    int i, err;
    2700     struct m3_quirk *quirk;
    2701     struct m3_hv_quirk *hv_quirk;
    2702 #ifdef TARGET_OS2
    2703     static snd_device_ops_t ops = {
    2704         snd_m3_dev_free,0,0,0
     2683    const struct m3_quirk *quirk;
     2684    const struct m3_hv_quirk *hv_quirk;
     2685    static struct snd_device_ops ops = {
     2686        .dev_free =     snd_m3_dev_free,
    27052687    };
    2706 #else
    2707     static snd_device_ops_t ops = {
    2708     dev_free:   snd_m3_dev_free,
    2709     };
    2710 #endif
    27112688
    27122689    *chip_ret = NULL;
     
    28542831
    28552832    pci_read_config_dword(pci, PCI_CLASS_REVISION, &pci->_class);
    2856 
    2857 #ifdef DEBUG
    2858     dprintf(("m3_probe. %x",pci->_class));
    2859 #endif
    28602833
    28612834#if 0   // os/2 doesnt pickup classes
     
    29122885        return err;
    29132886    }
    2914 #ifdef DEBUG
    2915     dprintf(("m3_probe: card registered"));
    2916 #endif
    29172887
    29182888#if 0 /* TODO: not supported yet */
    2919     /* TODO enable midi irq and i/o */
     2889    /* TODO enable MIDI IRQ and I/O */
    29202890    err = snd_mpu401_uart_new(chip->card, 0, MPU401_HW_MPU401,
    29212891                              chip->iobase + MPU401_DATA_PORT, 1,
    29222892                              chip->irq, 0, &chip->rmidi);
    29232893    if (err < 0)
    2924         printk(KERN_WARNING "maestro3: no midi support.\n");
     2894        printk(KERN_WARNING "maestro3: no MIDI support.\n");
    29252895#endif
    29262896
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