Changeset 76 for GPL/trunk/alsa-kernel/pci/maestro3.c
- Timestamp:
- Apr 9, 2006, 12:09:39 PM (19 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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GPL/trunk/alsa-kernel/pci/maestro3.c
r70 r76 830 830 831 831 struct pci_dev *pci; 832 struct m3_quirk *quirk;833 struct m3_hv_quirk *hv_quirk;832 const struct m3_quirk *quirk; 833 const struct m3_hv_quirk *hv_quirk; 834 834 835 835 int dacs_active; … … 918 918 919 919 MODULE_DEVICE_TABLE(pci, snd_m3_ids); 920 #if 0 921 struct m3_quirk { 922 const char *name; /* device name */ 923 u16 vendor, device; /* subsystem ids */ 924 int amp_gpio; /* gpio pin # for external amp, -1 = default */ 925 int irda_workaround; /* non-zero if avoid to touch 0x10 on GPIO_DIRECTION 926 (e.g. for IrDA on Dell Inspirons) */ 927 }; 928 #endif 929 static struct m3_quirk m3_quirk_list[] = { 920 921 static const struct m3_quirk m3_quirk_list[] = { 930 922 /* panasonic CF-28 "toughbook" */ 931 923 { 932 /*.name = */"Panasonic CF-28", 933 /*.vendor = */0x10f7, 934 /*.device = */0x833e, 935 /*.amp_gpio = */0x0d, 936 0 924 .name = "Panasonic CF-28", 925 .vendor = 0x10f7, 926 .device = 0x833e, 927 .amp_gpio = 0x0d, 937 928 }, 938 929 /* panasonic CF-72 "toughbook" */ 939 930 { 940 /*.name = */"Panasonic CF-72", 941 /*.vendor = */0x10f7, 942 /*.device = */0x833d, 943 /*.amp_gpio = */0x0d, 944 0 931 .name = "Panasonic CF-72", 932 .vendor = 0x10f7, 933 .device = 0x833d, 934 .amp_gpio = 0x0d, 945 935 }, 946 936 /* Dell Inspiron 4000 */ 947 937 { 948 /*.name = */"Dell Inspiron 4000",949 /*.vendor = */0x1028,950 /*.device = */0x00b0,951 /*.amp_gpio = */-1,952 /*.irda_workaround = */1,938 .name = "Dell Inspiron 4000", 939 .vendor = 0x1028, 940 .device = 0x00b0, 941 .amp_gpio = -1, 942 .irda_workaround = 1, 953 943 }, 954 944 /* Dell Inspiron 8000 */ 955 945 { 956 /*.name = */"Dell Inspiron 8000",957 /*.vendor = */0x1028,958 /*.device = */0x00a4,959 /*.amp_gpio = */-1,960 /*.irda_workaround = */1,946 .name = "Dell Inspiron 8000", 947 .vendor = 0x1028, 948 .device = 0x00a4, 949 .amp_gpio = -1, 950 .irda_workaround = 1, 961 951 }, 962 #if 1963 952 /* Dell Inspiron 8100 */ 964 953 { 965 /*.name = */"Dell Inspiron 8100",966 /*.vendor = */0x1028,967 /*.device = */0x00e6,968 /*.amp_gpio = */-1,969 /*.irda_workaround = */1,954 .name = "Dell Inspiron 8100", 955 .vendor = 0x1028, 956 .device = 0x00e6, 957 .amp_gpio = -1, 958 .irda_workaround = 1, 970 959 }, 971 #endif972 960 /* NEC LM800J/7 */ 973 961 { 974 /*.name = */"NEC LM800J/7", 975 /*.vendor = */0x1033, 976 /*.device = */0x80f1, 977 /*.amp_gpio = */0x03, 978 0 962 .name = "NEC LM800J/7", 963 .vendor = 0x1033, 964 .device = 0x80f1, 965 .amp_gpio = 0x03, 979 966 }, 980 967 /* LEGEND ZhaoYang 3100CF */ 981 968 { 982 "LEGEND ZhaoYang 3100CF", 983 0x1509, 984 0x1740, 985 0x03, 986 0 969 .name = "LEGEND ZhaoYang 3100CF", 970 .vendor = 0x1509, 971 .device = 0x1740, 972 .amp_gpio = 0x03, 987 973 }, 988 974 /* END */ 989 { 0}975 { NULL } 990 976 }; 991 977 992 978 /* These values came from the Windows driver. */ 993 static struct m3_hv_quirk m3_hv_quirk_list[] = {979 static const struct m3_hv_quirk m3_hv_quirk_list[] = { 994 980 /* Allegro chips */ 995 981 { 0x125D, 0x1988, 0x0E11, 0x002E, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD, 0 }, … … 1398 1384 } 1399 1385 1400 1401 static struct play_vals { 1386 static const struct play_vals { 1402 1387 u16 addr, val; 1403 1388 } pv[] = { … … 1465 1450 * Native record driver 1466 1451 */ 1467 static struct rec_vals {1452 static const struct rec_vals { 1468 1453 u16 addr, val; 1469 1454 } rv[] = { … … 1635 1620 return; 1636 1621 1637 hwptr = snd_m3_get_pointer(chip, s, subs) % s->dma_size; 1638 diff = (s->dma_size + hwptr - s->hwptr) % s->dma_size; 1622 hwptr = snd_m3_get_pointer(chip, s, subs); 1623 /* try to avoid expensive modulo divisions */ 1624 if (hwptr >= s->dma_size) 1625 hwptr %= s->dma_size; 1626 1627 diff = s->dma_size + hwptr - s->hwptr; 1628 if (diff >= s->dma_size) 1629 diff %= s->dma_size; 1630 1639 1631 s->hwptr = hwptr; 1640 1632 s->count += diff; 1633 1641 1634 if (s->count >= (signed)s->period_size) { 1642 s->count %= s->period_size; 1635 if (s->count < 2 * (signed)s->period_size) 1636 s->count -= (signed)s->period_size; 1637 else 1638 s->count %= s->period_size; 1639 1643 1640 spin_unlock(&chip->reg_lock); 1644 1641 snd_pcm_period_elapsed(subs); … … 1715 1712 u8 status; 1716 1713 int i; 1717 #ifdef TARGET_OS2 1718 int fOurIrq = FALSE; 1719 #endif 1720 #ifdef DEBUG 1721 dprintf(("int")); 1722 #endif 1714 1723 1715 status = inb(chip->iobase + HOST_INT_STATUS); 1724 #ifdef DEBUG1725 dprintf(("%x",status));1726 #endif1727 1716 1728 1717 if (status == 0xff) 1729 1718 return IRQ_NONE; 1730 1719 1731 #ifdef TARGET_OS21732 fOurIrq = TRUE;1733 #endif1734 1720 if (status & HV_INT_PENDING) 1735 1721 tasklet_hi_schedule(&chip->hwvol_tq); … … 1764 1750 /* ack ints */ 1765 1751 outb(status, chip->iobase + HOST_INT_STATUS); 1766 #ifdef TARGET_OS21767 if (fOurIrq) {1768 eoi_irq(irq);1769 }1770 #endif //TARGET_OS21771 1772 1752 return IRQ_HANDLED; 1773 1753 } … … 1996 1976 if (! (snd_m3_inb(chip, 0x30) & 1)) 1997 1977 return 0; 1978 cpu_relax(); 1998 1979 } while (i-- > 0); 1999 1980 … … 2007 1988 m3_t *chip = ac97->private_data; 2008 1989 unsigned long flags; 2009 unsigned short data ;1990 unsigned short data = 0xffff; 2010 1991 2011 1992 if (snd_m3_ac97_wait(chip)) 2012 return 0xffff;1993 goto fail; 2013 1994 spin_lock_irqsave(&chip->ac97_lock, flags); 2014 1995 snd_m3_outb(chip, 0x80 | (reg & 0x7f), CODEC_COMMAND); 2015 1996 if (snd_m3_ac97_wait(chip)) 2016 return 0xffff;1997 goto fail_unlock; 2017 1998 data = snd_m3_inw(chip, CODEC_DATA); 1999 fail_unlock: 2018 2000 spin_unlock_irqrestore(&chip->ac97_lock, flags); 2001 fail: 2019 2002 return data; 2020 2003 } … … 2178 2161 */ 2179 2162 2180 static u16 assp_kernel_image[] __devinitdata = {2163 static const u16 assp_kernel_image[] __devinitdata = { 2181 2164 0x7980, 0x0030, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x00FB, 0x7980, 0x00DD, 0x7980, 0x03B4, 2182 2165 0x7980, 0x0332, 0x7980, 0x0287, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, … … 2265 2248 * that is to be loaded at 0x400 on the DSP. 2266 2249 */ 2267 static u16 assp_minisrc_image[] __devinitdata = {2250 static const u16 assp_minisrc_image[] __devinitdata = { 2268 2251 2269 2252 0xBF80, 0x101E, 0x906E, 0x006E, 0x8B88, 0x6980, 0xEF88, 0x906F, 0x0D6F, 0x6900, 0xEB08, 0x0412, … … 2308 2291 2309 2292 #define MINISRC_LPF_LEN 10 2310 static u16 minisrc_lpf[MINISRC_LPF_LEN] __devinitdata = {2293 static const u16 minisrc_lpf[MINISRC_LPF_LEN] __devinitdata = { 2311 2294 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C, 2312 2295 0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F … … 2415 2398 2416 2399 /* 2417 * align instance address to 256 bytes so that it 's2400 * align instance address to 256 bytes so that its 2418 2401 * shifted list address is aligned. 2419 2402 * list address = (mem address >> 1) >> 7; … … 2698 2681 m3_t *chip; 2699 2682 int i, err; 2700 struct m3_quirk *quirk; 2701 struct m3_hv_quirk *hv_quirk; 2702 #ifdef TARGET_OS2 2703 static snd_device_ops_t ops = { 2704 snd_m3_dev_free,0,0,0 2683 const struct m3_quirk *quirk; 2684 const struct m3_hv_quirk *hv_quirk; 2685 static struct snd_device_ops ops = { 2686 .dev_free = snd_m3_dev_free, 2705 2687 }; 2706 #else2707 static snd_device_ops_t ops = {2708 dev_free: snd_m3_dev_free,2709 };2710 #endif2711 2688 2712 2689 *chip_ret = NULL; … … 2854 2831 2855 2832 pci_read_config_dword(pci, PCI_CLASS_REVISION, &pci->_class); 2856 2857 #ifdef DEBUG2858 dprintf(("m3_probe. %x",pci->_class));2859 #endif2860 2833 2861 2834 #if 0 // os/2 doesnt pickup classes … … 2912 2885 return err; 2913 2886 } 2914 #ifdef DEBUG2915 dprintf(("m3_probe: card registered"));2916 #endif2917 2887 2918 2888 #if 0 /* TODO: not supported yet */ 2919 /* TODO enable midi irq and i/o*/2889 /* TODO enable MIDI IRQ and I/O */ 2920 2890 err = snd_mpu401_uart_new(chip->card, 0, MPU401_HW_MPU401, 2921 2891 chip->iobase + MPU401_DATA_PORT, 1, 2922 2892 chip->irq, 0, &chip->rmidi); 2923 2893 if (err < 0) 2924 printk(KERN_WARNING "maestro3: no midisupport.\n");2894 printk(KERN_WARNING "maestro3: no MIDI support.\n"); 2925 2895 #endif 2926 2896
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