Changeset 679 for GPL/trunk/alsa-kernel/pci/intel8x0.c
- Timestamp:
- Mar 18, 2021, 8:57:36 PM (4 years ago)
- Location:
- GPL/trunk
- Files:
-
- 2 edited
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- Unmodified
- Added
- Removed
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GPL/trunk
- Property svn:mergeinfo changed
/GPL/branches/uniaud32-linux-3.2.102 (added) merged: 611-614 /GPL/branches/uniaud32-next (added) merged: 615-678
- Property svn:mergeinfo changed
-
GPL/trunk/alsa-kernel/pci/intel8x0.c
r598 r679 1 // SPDX-License-Identifier: GPL-2.0-or-later 1 2 /* 2 3 * ALSA driver for Intel ICH (i8x0) chipsets … … 4 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 5 6 * 6 *7 7 * This code also contains alpha support for SiS 735 chipsets provided 8 8 * by Mike Pieper <mptei@users.sourceforge.net>. We have no datasheet 9 9 * for SiS735, so the code is not fully functional. 10 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 26 * 27 */ 28 29 #include <asm/io.h> 11 */ 12 13 #ifdef TARGET_OS2 14 #define KBUILD_MODNAME "intel8x0" 15 #endif 16 17 #include <linux/io.h> 30 18 #include <linux/delay.h> 31 19 #include <linux/interrupt.h> … … 33 21 #include <linux/pci.h> 34 22 #include <linux/slab.h> 35 #include <linux/module param.h>23 #include <linux/module.h> 36 24 #include <sound/core.h> 37 25 #include <sound/pcm.h> … … 39 27 #include <sound/info.h> 40 28 #include <sound/initval.h> 41 /* for 440MX workaround */42 #include <asm/pgtable.h>43 #include <asm/cacheflush.h>44 29 45 30 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); … … 74 59 static int ac97_clock; 75 60 static char *ac97_quirk; 76 static intbuggy_semaphore;61 static bool buggy_semaphore; 77 62 static int buggy_irq = -1; /* auto-check */ 78 static intxbox;63 static bool xbox; 79 64 static int spdif_aclink = -1; 65 static int inside_vm = -1; 80 66 81 67 module_param(index, int, 0444); … … 84 70 MODULE_PARM_DESC(id, "ID string for Intel i8x0 soundcard."); 85 71 module_param(ac97_clock, int, 0444); 86 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (0 = whitelist + auto-detect, 1 = force autodetect).");72 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (0 = allowlist + auto-detect, 1 = force autodetect)."); 87 73 module_param(ac97_quirk, charp, 0444); 88 74 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 89 75 module_param(buggy_semaphore, bool, 0444); 90 76 MODULE_PARM_DESC(buggy_semaphore, "Enable workaround for hardwares with problematic codec semaphores."); 91 module_param(buggy_irq, b ool, 0444);77 module_param(buggy_irq, bint, 0444); 92 78 MODULE_PARM_DESC(buggy_irq, "Enable workaround for buggy interrupts on some motherboards."); 93 79 module_param(xbox, bool, 0444); … … 95 81 module_param(spdif_aclink, int, 0444); 96 82 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 83 module_param(inside_vm, bint, 0444); 84 MODULE_PARM_DESC(inside_vm, "KVM/Parallels optimization."); 97 85 98 86 /* just for backward compatibility */ 99 //static intenable;87 //static bool enable; 100 88 module_param(enable, bool, 0444); 101 89 //static int joystick; … … 269 257 270 258 /* interrupts for the whole chip by interrupt status register finish */ 271 259 272 260 #define ALI_INT_MICIN2 (1<<26) 273 261 #define ALI_INT_PCMIN2 (1<<25) … … 313 301 314 302 /* 315 * 303 * 316 304 */ 317 305 … … 347 335 unsigned int ichd; /* ich device number */ 348 336 unsigned long reg_offset; /* offset to bmaddr */ 349 u32 *bdbar; /* CPU address (32bit) */337 __le32 *bdbar; /* CPU address (32bit) */ 350 338 unsigned int bdbar_addr; /* PCI bus address (32bit) */ 351 339 struct snd_pcm_substream *substream; … … 370 358 struct ac97_pcm *pcm; 371 359 int pcm_open_flag; 372 unsigned int page_attr_changed: 1;373 360 unsigned int suspended: 1; 374 361 }; … … 401 388 unsigned xbox: 1; /* workaround for Xbox AC'97 detection */ 402 389 unsigned buggy_semaphore: 1; /* workaround for buggy codec semaphore */ 390 unsigned inside_vm: 1; /* enable VM optimization */ 403 391 404 392 int spdif_idx; /* SPDIF BAR index; *_SPBAR or -1 if use PCMOUT */ … … 409 397 unsigned int ac97_sdin[3]; 410 398 unsigned int max_codecs, ncodecs; 411 unsigned int *codec_bit;399 const unsigned int *codec_bit; 412 400 unsigned int codec_isr_bits; 413 401 unsigned int codec_ready_bits; … … 421 409 }; 422 410 423 static DEFINE_PCI_DEVICE_TABLE(snd_intel8x0_ids)= {411 static const struct pci_device_id snd_intel8x0_ids[] = { 424 412 { PCI_VDEVICE(INTEL, 0x2415), DEVICE_INTEL }, /* 82801AA */ 425 413 { PCI_VDEVICE(INTEL, 0x2425), DEVICE_INTEL }, /* 82901AB */ … … 535 523 } while (time--); 536 524 537 /* access to some forbidden (non exist ant) ac97 registers will not525 /* access to some forbidden (non existent) ac97 registers will not 538 526 * reset the semaphore. So even if you don't get the semaphore, still 539 527 * continue the access. We don't need the semaphore anyway. */ 540 snd_printk(KERN_ERR "codec_semaphore: semaphore is not ready [0x%x][0x%x]\n", 528 dev_err(chip->card->dev, 529 "codec_semaphore: semaphore is not ready [0x%x][0x%x]\n", 541 530 igetbyte(chip, ICHREG(ACC_SEMA)), igetdword(chip, ICHREG(GLOB_STA))); 542 531 iagetword(chip, 0); /* clear semaphore flag */ … … 553 542 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) { 554 543 if (! chip->in_ac97_init) 555 snd_printk(KERN_ERR "codec_write %d: semaphore is not ready for register 0x%x\n", ac97->num, reg); 544 dev_err(chip->card->dev, 545 "codec_write %d: semaphore is not ready for register 0x%x\n", 546 ac97->num, reg); 556 547 } 557 548 iaputword(chip, reg + ac97->num * 0x80, val); … … 567 558 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) { 568 559 if (! chip->in_ac97_init) 569 snd_printk(KERN_ERR "codec_read %d: semaphore is not ready for register 0x%x\n", ac97->num, reg); 560 dev_err(chip->card->dev, 561 "codec_read %d: semaphore is not ready for register 0x%x\n", 562 ac97->num, reg); 570 563 res = 0xffff; 571 564 } else { … … 576 569 ~(chip->codec_ready_bits | ICH_GSCI)); 577 570 if (! chip->in_ac97_init) 578 snd_printk(KERN_ERR "codec_read %d: read timeout for register 0x%x\n", ac97->num, reg); 571 dev_err(chip->card->dev, 572 "codec_read %d: read timeout for register 0x%x\n", 573 ac97->num, reg); 579 574 res = 0xffff; 580 575 } … … 583 578 } 584 579 585 static void __devinitsnd_intel8x0_codec_read_test(struct intel8x0 *chip,586 580 static void snd_intel8x0_codec_read_test(struct intel8x0 *chip, 581 unsigned int codec) 587 582 { 588 583 unsigned int tmp; … … 610 605 } 611 606 if (! chip->in_ac97_init) 612 snd_printd(KERN_WARNING "intel8x0:AC97 codec ready timeout.\n");607 dev_warn(chip->card->dev, "AC97 codec ready timeout.\n"); 613 608 return -EBUSY; 614 609 } … … 622 617 udelay(1); 623 618 if (! time && ! chip->in_ac97_init) 624 snd_printk(KERN_WARNING"ali_codec_semaphore timeout\n");619 dev_warn(chip->card->dev, "ali_codec_semaphore timeout\n"); 625 620 return snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_CODEC_READY); 626 621 } … … 662 657 * DMA I/O 663 658 */ 664 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev) 659 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev) 665 660 { 666 661 int idx; 667 u32 *bdbar = ichdev->bdbar;662 __le32 *bdbar = ichdev->bdbar; 668 663 unsigned long port = ichdev->reg_offset; 669 664 … … 691 686 ichdev->fragsize >> ichdev->pos_shift); 692 687 #if 0 693 printk(KERN_DEBUG"bdbar[%i] = 0x%x [0x%x]\n",688 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n", 694 689 idx + 0, bdbar[idx + 0], bdbar[idx + 1]); 695 690 #endif … … 703 698 ichdev->position = 0; 704 699 #if 0 705 printk(KERN_DEBUG "lvi_frag = %i, frags = %i, period_size = 0x%x, "706 "period_size1 = 0x%x\n",700 dev_dbg(chip->card->dev, 701 "lvi_frag = %i, frags = %i, period_size = 0x%x, period_size1 = 0x%x\n", 707 702 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, 708 703 ichdev->fragsize1); … … 711 706 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); 712 707 } 713 714 #ifdef __i386__715 /*716 * Intel 82443MX running a 100MHz processor system bus has a hardware bug,717 * which aborts PCI busmaster for audio transfer. A workaround is to set718 * the pages as non-cached. For details, see the errata in719 * http://download.intel.com/design/chipsets/specupdt/24505108.pdf720 */721 static void fill_nocache(void *buf, int size, int nocache)722 {723 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;724 if (nocache)725 set_pages_uc(virt_to_page(buf), size);726 else727 set_pages_wb(virt_to_page(buf), size);728 }729 #else730 #define fill_nocache(buf, size, nocache) do { ; } while (0)731 #endif732 708 733 709 /* … … 772 748 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize1); 773 749 #if 0 774 printk(KERN_DEBUG "new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, "775 "all = 0x%x, 0x%x\n",750 dev_dbg(chip->card->dev, 751 "new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, all = 0x%x, 0x%x\n", 776 752 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], 777 753 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), … … 838 814 case SNDRV_PCM_TRIGGER_RESUME: 839 815 ichdev->suspended = 0; 840 /* fallthru */816 fallthrough; 841 817 case SNDRV_PCM_TRIGGER_START: 842 818 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: … … 846 822 case SNDRV_PCM_TRIGGER_SUSPEND: 847 823 ichdev->suspended = 1; 848 /* fallthru */824 fallthrough; 849 825 case SNDRV_PCM_TRIGGER_STOP: 850 826 val = 0; … … 871 847 struct ichdev *ichdev = get_ichdev(substream); 872 848 unsigned long port = ichdev->reg_offset; 873 static int fiforeg[] = {849 static const int fiforeg[] = { 874 850 ICHREG(ALI_FIFOCR1), ICHREG(ALI_FIFOCR2), ICHREG(ALI_FIFOCR3) 875 851 }; … … 880 856 case SNDRV_PCM_TRIGGER_RESUME: 881 857 ichdev->suspended = 0; 882 /* fallthru */858 fallthrough; 883 859 case SNDRV_PCM_TRIGGER_START: 884 860 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: … … 886 862 /* clear FIFO for synchronization of channels */ 887 863 fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]); 888 fifo &= ~(0xff << (ichdev->ali_slot % 4)); 889 fifo |= 0x83 << (ichdev->ali_slot % 4); 864 fifo &= ~(0xff << (ichdev->ali_slot % 4)); 865 fifo |= 0x83 << (ichdev->ali_slot % 4); 890 866 iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo); 891 867 } … … 897 873 case SNDRV_PCM_TRIGGER_SUSPEND: 898 874 ichdev->suspended = 1; 899 /* fallthru */875 fallthrough; 900 876 case SNDRV_PCM_TRIGGER_STOP: 901 877 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: … … 926 902 struct intel8x0 *chip = snd_pcm_substream_chip(substream); 927 903 struct ichdev *ichdev = get_ichdev(substream); 928 struct snd_pcm_runtime *runtime = substream->runtime;929 904 int dbl = params_rate(hw_params) > 48000; 930 905 int err; 931 906 932 if (chip->fix_nocache && ichdev->page_attr_changed) {933 fill_nocache(runtime->dma_area, runtime->dma_bytes, 0); /* clear */934 ichdev->page_attr_changed = 0;935 }936 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));937 if (err < 0)938 return err;939 if (chip->fix_nocache) {940 if (runtime->dma_area && ! ichdev->page_attr_changed) {941 fill_nocache(runtime->dma_area, runtime->dma_bytes, 1);942 ichdev->page_attr_changed = 1;943 }944 }945 907 if (ichdev->pcm_open_flag) { 946 908 snd_ac97_pcm_close(ichdev->pcm); … … 962 924 static int snd_intel8x0_hw_free(struct snd_pcm_substream *substream) 963 925 { 964 struct intel8x0 *chip = snd_pcm_substream_chip(substream);965 926 struct ichdev *ichdev = get_ichdev(substream); 966 927 … … 969 930 ichdev->pcm_open_flag = 0; 970 931 } 971 if (chip->fix_nocache && ichdev->page_attr_changed) { 972 fill_nocache(substream->runtime->dma_area, substream->runtime->dma_bytes, 0); 973 ichdev->page_attr_changed = 0; 974 } 975 return snd_pcm_lib_free_pages(substream); 932 return 0; 976 933 } 977 934 … … 1066 1023 continue; 1067 1024 } 1068 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) && 1069 ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) 1025 if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV)) 1026 continue; 1027 1028 /* IO read operation is very expensive inside virtual machine 1029 * as it is emulated. The probability that subsequent PICB read 1030 * will return different result is high enough to loop till 1031 * timeout here. 1032 * Same CIV is strict enough condition to be sure that PICB 1033 * is valid inside VM on emulated card. */ 1034 if (chip->inside_vm) 1035 break; 1036 if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) 1070 1037 break; 1071 1038 } while (timeout--); … … 1093 1060 } 1094 1061 1095 static struct snd_pcm_hardware snd_intel8x0_stream =1062 static const struct snd_pcm_hardware snd_intel8x0_stream = 1096 1063 { 1097 1064 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | … … 1114 1081 }; 1115 1082 1116 static unsigned int channels4[] = {1083 static const unsigned int channels4[] = { 1117 1084 2, 4, 1118 1085 }; 1119 1086 1120 static struct snd_pcm_hw_constraint_list hw_constraints_channels4 = {1087 static const struct snd_pcm_hw_constraint_list hw_constraints_channels4 = { 1121 1088 .count = ARRAY_SIZE(channels4), 1122 1089 .list = channels4, … … 1124 1091 }; 1125 1092 1126 static unsigned int channels6[] = {1093 static const unsigned int channels6[] = { 1127 1094 2, 4, 6, 1128 1095 }; 1129 1096 1130 static struct snd_pcm_hw_constraint_list hw_constraints_channels6 = {1097 static const struct snd_pcm_hw_constraint_list hw_constraints_channels6 = { 1131 1098 .count = ARRAY_SIZE(channels6), 1132 1099 .list = channels6, … … 1134 1101 }; 1135 1102 1136 static unsigned int channels8[] = {1103 static const unsigned int channels8[] = { 1137 1104 2, 4, 6, 8, 1138 1105 }; 1139 1106 1140 static struct snd_pcm_hw_constraint_list hw_constraints_channels8 = {1107 static const struct snd_pcm_hw_constraint_list hw_constraints_channels8 = { 1141 1108 .count = ARRAY_SIZE(channels8), 1142 1109 .list = channels8, … … 1345 1312 #endif 1346 1313 1347 static struct snd_pcm_ops snd_intel8x0_playback_ops = {1314 static const struct snd_pcm_ops snd_intel8x0_playback_ops = { 1348 1315 .open = snd_intel8x0_playback_open, 1349 1316 .close = snd_intel8x0_playback_close, 1350 .ioctl = snd_pcm_lib_ioctl,1351 1317 .hw_params = snd_intel8x0_hw_params, 1352 1318 .hw_free = snd_intel8x0_hw_free, … … 1356 1322 }; 1357 1323 1358 static struct snd_pcm_ops snd_intel8x0_capture_ops = {1324 static const struct snd_pcm_ops snd_intel8x0_capture_ops = { 1359 1325 .open = snd_intel8x0_capture_open, 1360 1326 .close = snd_intel8x0_capture_close, 1361 .ioctl = snd_pcm_lib_ioctl,1362 1327 .hw_params = snd_intel8x0_hw_params, 1363 1328 .hw_free = snd_intel8x0_hw_free, … … 1367 1332 }; 1368 1333 1369 static struct snd_pcm_ops snd_intel8x0_capture_mic_ops = {1334 static const struct snd_pcm_ops snd_intel8x0_capture_mic_ops = { 1370 1335 .open = snd_intel8x0_mic_open, 1371 1336 .close = snd_intel8x0_mic_close, 1372 .ioctl = snd_pcm_lib_ioctl,1373 1337 .hw_params = snd_intel8x0_hw_params, 1374 1338 .hw_free = snd_intel8x0_hw_free, … … 1378 1342 }; 1379 1343 1380 static struct snd_pcm_ops snd_intel8x0_capture_mic2_ops = {1344 static const struct snd_pcm_ops snd_intel8x0_capture_mic2_ops = { 1381 1345 .open = snd_intel8x0_mic2_open, 1382 1346 .close = snd_intel8x0_mic2_close, 1383 .ioctl = snd_pcm_lib_ioctl,1384 1347 .hw_params = snd_intel8x0_hw_params, 1385 1348 .hw_free = snd_intel8x0_hw_free, … … 1389 1352 }; 1390 1353 1391 static struct snd_pcm_ops snd_intel8x0_capture2_ops = {1354 static const struct snd_pcm_ops snd_intel8x0_capture2_ops = { 1392 1355 .open = snd_intel8x0_capture2_open, 1393 1356 .close = snd_intel8x0_capture2_close, 1394 .ioctl = snd_pcm_lib_ioctl,1395 1357 .hw_params = snd_intel8x0_hw_params, 1396 1358 .hw_free = snd_intel8x0_hw_free, … … 1400 1362 }; 1401 1363 1402 static struct snd_pcm_ops snd_intel8x0_spdif_ops = {1364 static const struct snd_pcm_ops snd_intel8x0_spdif_ops = { 1403 1365 .open = snd_intel8x0_spdif_open, 1404 1366 .close = snd_intel8x0_spdif_close, 1405 .ioctl = snd_pcm_lib_ioctl,1406 1367 .hw_params = snd_intel8x0_hw_params, 1407 1368 .hw_free = snd_intel8x0_hw_free, … … 1411 1372 }; 1412 1373 1413 static struct snd_pcm_ops snd_intel8x0_ali_playback_ops = {1374 static const struct snd_pcm_ops snd_intel8x0_ali_playback_ops = { 1414 1375 .open = snd_intel8x0_playback_open, 1415 1376 .close = snd_intel8x0_playback_close, 1416 .ioctl = snd_pcm_lib_ioctl,1417 1377 .hw_params = snd_intel8x0_hw_params, 1418 1378 .hw_free = snd_intel8x0_hw_free, … … 1422 1382 }; 1423 1383 1424 static struct snd_pcm_ops snd_intel8x0_ali_capture_ops = {1384 static const struct snd_pcm_ops snd_intel8x0_ali_capture_ops = { 1425 1385 .open = snd_intel8x0_capture_open, 1426 1386 .close = snd_intel8x0_capture_close, 1427 .ioctl = snd_pcm_lib_ioctl,1428 1387 .hw_params = snd_intel8x0_hw_params, 1429 1388 .hw_free = snd_intel8x0_hw_free, … … 1433 1392 }; 1434 1393 1435 static struct snd_pcm_ops snd_intel8x0_ali_capture_mic_ops = {1394 static const struct snd_pcm_ops snd_intel8x0_ali_capture_mic_ops = { 1436 1395 .open = snd_intel8x0_mic_open, 1437 1396 .close = snd_intel8x0_mic_close, 1438 .ioctl = snd_pcm_lib_ioctl,1439 1397 .hw_params = snd_intel8x0_hw_params, 1440 1398 .hw_free = snd_intel8x0_hw_free, … … 1444 1402 }; 1445 1403 1446 static struct snd_pcm_ops snd_intel8x0_ali_ac97spdifout_ops = {1404 static const struct snd_pcm_ops snd_intel8x0_ali_ac97spdifout_ops = { 1447 1405 .open = snd_intel8x0_ali_ac97spdifout_open, 1448 1406 .close = snd_intel8x0_ali_ac97spdifout_close, 1449 .ioctl = snd_pcm_lib_ioctl,1450 1407 .hw_params = snd_intel8x0_hw_params, 1451 1408 .hw_free = snd_intel8x0_hw_free, … … 1459 1416 .open = snd_intel8x0_ali_spdifin_open, 1460 1417 .close = snd_intel8x0_ali_spdifin_close, 1461 .ioctl = snd_pcm_lib_ioctl,1462 1418 .hw_params = snd_intel8x0_hw_params, 1463 1419 .hw_free = snd_intel8x0_hw_free, … … 1470 1426 .open = snd_intel8x0_ali_spdifout_open, 1471 1427 .close = snd_intel8x0_ali_spdifout_close, 1472 .ioctl = snd_pcm_lib_ioctl,1473 1428 .hw_params = snd_intel8x0_hw_params, 1474 1429 .hw_free = snd_intel8x0_hw_free, … … 1481 1436 struct ich_pcm_table { 1482 1437 char *suffix; 1483 struct snd_pcm_ops *playback_ops;1484 struct snd_pcm_ops *capture_ops;1438 const struct snd_pcm_ops *playback_ops; 1439 const struct snd_pcm_ops *capture_ops; 1485 1440 size_t prealloc_size; 1486 1441 size_t prealloc_max_size; … … 1488 1443 }; 1489 1444 1490 static int __devinit snd_intel8x0_pcm1(struct intel8x0 *chip, int device, 1491 struct ich_pcm_table *rec) 1445 #define intel8x0_dma_type(chip) \ 1446 ((chip)->fix_nocache ? SNDRV_DMA_TYPE_DEV_UC : SNDRV_DMA_TYPE_DEV) 1447 1448 static int snd_intel8x0_pcm1(struct intel8x0 *chip, int device, 1449 const struct ich_pcm_table *rec) 1492 1450 { 1493 1451 struct snd_pcm *pcm; … … 1518 1476 chip->pcm[device] = pcm; 1519 1477 1520 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1521 snd_dma_pci_data(chip->pci), 1522 rec->prealloc_size, rec->prealloc_max_size); 1478 snd_pcm_set_managed_buffer_all(pcm, intel8x0_dma_type(chip), 1479 &chip->pci->dev, 1480 rec->prealloc_size, rec->prealloc_max_size); 1481 1482 if (rec->playback_ops && 1483 rec->playback_ops->open == snd_intel8x0_playback_open) { 1484 struct snd_pcm_chmap *chmap; 1485 int chs = 2; 1486 if (chip->multi8) 1487 chs = 8; 1488 else if (chip->multi6) 1489 chs = 6; 1490 else if (chip->multi4) 1491 chs = 4; 1492 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1493 snd_pcm_alt_chmaps, chs, 0, 1494 &chmap); 1495 if (err < 0) 1496 return err; 1497 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468; 1498 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; 1499 } 1523 1500 1524 1501 return 0; 1525 1502 } 1526 1503 1527 static struct ich_pcm_table intel_pcms[] __devinitdata= {1504 static const struct ich_pcm_table intel_pcms[] = { 1528 1505 { 1529 1506 .playback_ops = &snd_intel8x0_playback_ops, … … 1562 1539 }; 1563 1540 1564 static struct ich_pcm_table nforce_pcms[] __devinitdata= {1541 static const struct ich_pcm_table nforce_pcms[] = { 1565 1542 { 1566 1543 .playback_ops = &snd_intel8x0_playback_ops, … … 1585 1562 }; 1586 1563 1587 static struct ich_pcm_table ali_pcms[] __devinitdata= {1564 static const struct ich_pcm_table ali_pcms[] = { 1588 1565 { 1589 1566 .playback_ops = &snd_intel8x0_ali_playback_ops, … … 1617 1594 }; 1618 1595 1619 static int __devinitsnd_intel8x0_pcm(struct intel8x0 *chip)1596 static int snd_intel8x0_pcm(struct intel8x0 *chip) 1620 1597 { 1621 1598 int i, tblsize, device, err; 1622 struct ich_pcm_table *tbl, *rec;1599 const struct ich_pcm_table *tbl, *rec; 1623 1600 1624 1601 switch (chip->device_type) { … … 1680 1657 } 1681 1658 1682 static struct ac97_pcm ac97_pcm_defs[] __devinitdata= {1659 static const struct ac97_pcm ac97_pcm_defs[] = { 1683 1660 /* front PCM */ 1684 1661 { 1685 1662 .exclusive = 1, 1686 .r = 1687 { 1688 { 1663 .r = { { 1689 1664 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1690 1665 (1 << AC97_SLOT_PCM_RIGHT) | … … 1752 1727 }; 1753 1728 1754 static struct ac97_quirk ac97_quirks[] __devinitdata= {1755 {1729 static const struct ac97_quirk ac97_quirks[] = { 1730 { 1756 1731 .subvendor = 0x0e11, 1757 1732 .subdevice = 0x000e, 1758 1733 .name = "Compaq Deskpro EN", /* AD1885 */ 1759 1734 .type = AC97_TUNE_HP_ONLY 1760 },1735 }, 1761 1736 { 1762 1737 .subvendor = 0x0e11, … … 1771 1746 .type = AC97_TUNE_HP_ONLY 1772 1747 }, 1773 {1748 { 1774 1749 .subvendor = 0x0e11, 1775 1750 .subdevice = 0x0860, 1776 1751 .name = "HP/Compaq nx7010", 1777 1752 .type = AC97_TUNE_MUTE_LED 1778 },1753 }, 1779 1754 { 1780 1755 .subvendor = 0x1014, … … 1884 1859 .name = "Dell Inspiron 6000", 1885 1860 .type = AC97_TUNE_HP_MUTE_LED /* cf. Malone #41015 */ 1861 }, 1862 { 1863 .subvendor = 0x1028, 1864 .subdevice = 0x0189, 1865 .name = "Dell Inspiron 9300", 1866 .type = AC97_TUNE_HP_MUTE_LED 1886 1867 }, 1887 1868 { … … 2079 2060 { 2080 2061 .subvendor = 0x161f, 2062 .subdevice = 0x202f, 2063 .name = "Gateway M520", 2064 .type = AC97_TUNE_INV_EAPD 2065 }, 2066 { 2067 .subvendor = 0x161f, 2081 2068 .subdevice = 0x203a, 2082 2069 .name = "Gateway 4525GZ", /* AD1981B */ … … 2087 2074 .subdevice = 0x0088, 2088 2075 .name = "Fujitsu-Siemens D1522", /* AD1981 */ 2089 .type = AC97_TUNE_HP_ONLY2090 },2091 {2092 .subvendor = 0x107B,2093 .subdevice = 0x0111,2094 .name = "Gateway 2000 ICH2/AD1885",2095 2076 .type = AC97_TUNE_HP_ONLY 2096 2077 }, … … 2153 2134 }; 2154 2135 2155 static int __devinitsnd_intel8x0_mixer(struct intel8x0 *chip, int ac97_clock,2156 2136 static int snd_intel8x0_mixer(struct intel8x0 *chip, int ac97_clock, 2137 const char *quirk_override) 2157 2138 { 2158 2139 struct snd_ac97_bus *pbus; … … 2161 2142 unsigned int i, codecs; 2162 2143 unsigned int glob_sta = 0; 2163 struct snd_ac97_bus_ops *ops;2164 static struct snd_ac97_bus_ops standard_bus_ops = {2144 const struct snd_ac97_bus_ops *ops; 2145 static const struct snd_ac97_bus_ops standard_bus_ops = { 2165 2146 .write = snd_intel8x0_codec_write, 2166 2147 .read = snd_intel8x0_codec_read, 2167 2148 }; 2168 static struct snd_ac97_bus_ops ali_bus_ops = {2149 static const struct snd_ac97_bus_ops ali_bus_ops = { 2169 2150 .write = snd_intel8x0_ali_codec_write, 2170 2151 .read = snd_intel8x0_ali_codec_read, … … 2183 2164 chip->spdif_idx = ICHD_SPBAR; 2184 2165 break; 2185 } ;2166 } 2186 2167 } 2187 2168 … … 2247 2228 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 2248 2229 if (err != -EACCES) 2249 snd_printk(KERN_ERR "Unable to initialize codec #%d\n", i); 2230 dev_err(chip->card->dev, 2231 "Unable to initialize codec #%d\n", i); 2250 2232 if (i == 0) 2251 2233 goto __err; … … 2350 2332 2351 2333 #ifdef CONFIG_SND_AC97_POWER_SAVE 2352 static struct snd_pci_quirk ich_chip_reset_mode[] = {2334 static const struct snd_pci_quirk ich_chip_reset_mode[] = { 2353 2335 SND_PCI_QUIRK(0x1014, 0x051f, "Thinkpad R32", 1), 2354 { 2336 {0} /* end */ 2355 2337 }; 2356 2338 … … 2399 2381 schedule_timeout_uninterruptible(1); 2400 2382 } while (time_after_eq(end_time, jiffies)); 2401 snd_printk(KERN_ERR"AC'97 warm reset still in progress? [0x%x]\n",2383 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n", 2402 2384 igetdword(chip, ICHREG(GLOB_CNT))); 2403 2385 return -EIO; … … 2443 2425 if (! status) { 2444 2426 /* no codec is found */ 2445 snd_printk(KERN_ERR "codec_ready: codec is not ready [0x%x]\n", 2427 dev_err(chip->card->dev, 2428 "codec_ready: codec is not ready [0x%x]\n", 2446 2429 igetdword(chip, ICHREG(GLOB_STA))); 2447 2430 return -EIO; … … 2507 2490 schedule_timeout_uninterruptible(1); 2508 2491 } 2509 snd_printk(KERN_ERR"AC'97 reset failed.\n");2492 dev_err(chip->card->dev, "AC'97 reset failed.\n"); 2510 2493 if (probing) 2511 2494 return -EIO; … … 2551 2534 } 2552 2535 if (timeout == 0) 2553 printk(KERN_ERR "intel8x0:reset of registers failed?\n");2536 dev_err(chip->card->dev, "reset of registers failed?\n"); 2554 2537 } 2555 2538 /* initialize Buffer Descriptor Lists */ … … 2584 2567 if (chip->irq >= 0) 2585 2568 free_irq(chip->irq, chip); 2586 if (chip->bdbars.area) { 2587 if (chip->fix_nocache) 2588 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 0); 2569 if (chip->bdbars.area) 2589 2570 snd_dma_free_pages(&chip->bdbars); 2590 }2591 2571 if (chip->addr) 2592 2572 pci_iounmap(chip->pci, chip->addr); … … 2599 2579 } 2600 2580 2601 #ifdef CONFIG_PM 2581 #ifdef CONFIG_PM_SLEEP 2602 2582 /* 2603 2583 * power management 2604 2584 */ 2605 static int intel8x0_suspend(struct pci_dev *pci, pm_message_t state)2606 { 2607 struct snd_card *card = pci_get_drvdata(pci);2585 static int intel8x0_suspend(struct device *dev) 2586 { 2587 struct snd_card *card = dev_get_drvdata(dev); 2608 2588 struct intel8x0 *chip = card->private_data; 2609 2589 int i; 2610 2590 2611 2591 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2612 for (i = 0; i < chip->pcm_devs; i++)2613 snd_pcm_suspend_all(chip->pcm[i]);2614 /* clear nocache */2615 if (chip->fix_nocache) {2616 for (i = 0; i < chip->bdbars_count; i++) {2617 struct ichdev *ichdev = &chip->ichd[i];2618 if (ichdev->substream && ichdev->page_attr_changed) {2619 struct snd_pcm_runtime *runtime = ichdev->substream->runtime;2620 if (runtime->dma_area)2621 fill_nocache(runtime->dma_area, runtime->dma_bytes, 0);2622 }2623 }2624 }2625 2592 for (i = 0; i < chip->ncodecs; i++) 2626 2593 snd_ac97_suspend(chip->ac97[i]); … … 2631 2598 free_irq(chip->irq, chip); 2632 2599 chip->irq = -1; 2633 } 2634 pci_disable_device(pci); 2635 pci_save_state(pci); 2636 /* The call below may disable built-in speaker on some laptops 2637 * after S2RAM. So, don't touch it. 2638 */ 2639 /* pci_set_power_state(pci, pci_choose_state(pci, state)); */ 2600 card->sync_irq = -1; 2601 } 2640 2602 return 0; 2641 2603 } 2642 2604 2643 static int intel8x0_resume(struct pci_dev *pci) 2644 { 2645 struct snd_card *card = pci_get_drvdata(pci); 2605 static int intel8x0_resume(struct device *dev) 2606 { 2607 struct pci_dev *pci = to_pci_dev(dev); 2608 struct snd_card *card = dev_get_drvdata(dev); 2646 2609 struct intel8x0 *chip = card->private_data; 2647 2610 int i; 2648 2611 2649 pci_set_power_state(pci, PCI_D0);2650 pci_restore_state(pci);2651 if (pci_enable_device(pci) < 0) {2652 printk(KERN_ERR "intel8x0: pci_enable_device failed, "2653 "disabling device\n");2612 snd_intel8x0_chip_init(chip, 0); 2613 if (request_irq(pci->irq, snd_intel8x0_interrupt, 2614 IRQF_SHARED, KBUILD_MODNAME, chip)) { 2615 dev_err(dev, "unable to grab IRQ %d, disabling device\n", 2616 pci->irq); 2654 2617 snd_card_disconnect(card); 2655 2618 return -EIO; 2656 2619 } 2657 pci_set_master(pci);2658 snd_intel8x0_chip_init(chip, 0);2659 if (request_irq(pci->irq, snd_intel8x0_interrupt,2660 IRQF_SHARED, card->shortname, chip)) {2661 printk(KERN_ERR "intel8x0: unable to grab IRQ %d, "2662 "disabling device\n", pci->irq);2663 snd_card_disconnect(card);2664 return -EIO;2665 }2666 2620 chip->irq = pci->irq; 2667 synchronize_irq(chip->irq);2621 card->sync_irq = chip->irq; 2668 2622 2669 2623 /* re-initialize mixer stuff */ … … 2677 2631 } 2678 2632 2679 /* refill nocache */2680 if (chip->fix_nocache)2681 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1);2682 2683 2633 for (i = 0; i < chip->ncodecs; i++) 2684 2634 snd_ac97_resume(chip->ac97[i]); 2685 2686 /* refill nocache */2687 if (chip->fix_nocache) {2688 for (i = 0; i < chip->bdbars_count; i++) {2689 struct ichdev *ichdev = &chip->ichd[i];2690 if (ichdev->substream && ichdev->page_attr_changed) {2691 struct snd_pcm_runtime *runtime = ichdev->substream->runtime;2692 if (runtime->dma_area)2693 fill_nocache(runtime->dma_area, runtime->dma_bytes, 1);2694 }2695 }2696 }2697 2635 2698 2636 /* resume status */ … … 2713 2651 return 0; 2714 2652 } 2715 #endif /* CONFIG_PM */ 2653 2654 static SIMPLE_DEV_PM_OPS(intel8x0_pm, intel8x0_suspend, intel8x0_resume); 2655 #define INTEL8X0_PM_OPS &intel8x0_pm 2656 #else 2657 #define INTEL8X0_PM_OPS NULL 2658 #endif /* CONFIG_PM_SLEEP */ 2716 2659 2717 2660 #define INTEL8X0_TESTBUF_SIZE 32768 /* enough large for one shot */ 2718 2661 2719 static void __devinitintel8x0_measure_ac97_clock(struct intel8x0 *chip)2662 static void intel8x0_measure_ac97_clock(struct intel8x0 *chip) 2720 2663 { 2721 2664 struct snd_pcm_substream *subs; … … 2724 2667 unsigned long pos, pos1, t; 2725 2668 int civ, timeout = 1000, attempt = 1; 2669 #ifndef TARGET_OS2 2670 ktime_t start_time, stop_time; 2671 #else 2726 2672 struct timespec start_time, stop_time; 2673 #endif 2727 2674 2728 2675 if (chip->ac97_bus->clock != 48000) … … 2732 2679 subs = chip->pcm[0]->streams[0].substream; 2733 2680 if (! subs || subs->dma_buffer.bytes < INTEL8X0_TESTBUF_SIZE) { 2734 snd_printk(KERN_WARNING "no playback buffer allocated - aborting measure ac97 clock\n"); 2681 dev_warn(chip->card->dev, 2682 "no playback buffer allocated - aborting measure ac97 clock\n"); 2735 2683 return; 2736 2684 } … … 2742 2690 /* set rate */ 2743 2691 if (snd_ac97_set_rate(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 48000) < 0) { 2744 snd_printk(KERN_ERR "cannot set ac97 rate: clock = %d\n", chip->ac97_bus->clock); 2692 dev_err(chip->card->dev, "cannot set ac97 rate: clock = %d\n", 2693 chip->ac97_bus->clock); 2745 2694 return; 2746 2695 } … … 2756 2705 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot); 2757 2706 } 2707 #ifndef TARGET_OS2 2708 start_time = ktime_get(); 2709 #else 2758 2710 do_posix_clock_monotonic_gettime(&start_time); 2711 #endif 2759 2712 spin_unlock_irq(&chip->reg_lock); 2760 2713 msleep(50); … … 2780 2733 } 2781 2734 chip->in_measurement = 0; 2735 #ifndef TARGET_OS2 2736 stop_time = ktime_get(); 2737 #else 2782 2738 do_posix_clock_monotonic_gettime(&stop_time); 2739 #endif 2783 2740 /* stop */ 2784 2741 if (chip->device_type == DEVICE_ALI) { … … 2796 2753 2797 2754 if (pos == 0) { 2798 snd_printk(KERN_ERR "intel8x0: measure - unreliable DMA position..\n"); 2755 dev_err(chip->card->dev, 2756 "measure - unreliable DMA position..\n"); 2799 2757 __retry: 2800 2758 if (attempt < 3) { … … 2807 2765 2808 2766 pos /= 4; 2767 #ifndef TARGET_OS2 2768 t = ktime_us_delta(stop_time, start_time); 2769 #else 2809 2770 t = stop_time.tv_sec - start_time.tv_sec; 2810 2771 t *= 1000000; 2811 2772 t += (stop_time.tv_nsec - start_time.tv_nsec) / 1000; 2812 2773 dprintf(("%s: measured %lu usecs (%lu samples)\n", __func__, t, pos)); 2774 #endif 2775 dev_info(chip->card->dev, 2776 "%s: measured %lu usecs (%lu samples)\n", __func__, t, pos); 2813 2777 if (t == 0) { 2814 snd_printk(KERN_ERR "intel8x0:?? calculation error..\n");2778 dev_err(chip->card->dev, "?? calculation error..\n"); 2815 2779 goto __retry; 2816 2780 } … … 2819 2783 if (pos < 40000 || pos >= 60000) { 2820 2784 /* abnormal value. hw problem? */ 2821 printk(KERN_INFO "intel8x0:measured clock %ld rejected\n", pos);2785 dev_info(chip->card->dev, "measured clock %ld rejected\n", pos); 2822 2786 goto __retry; 2823 2787 } else if (pos > 40500 && pos < 41500) … … 2831 2795 chip->ac97_bus->clock = (chip->ac97_bus->clock * 48000) / pos; 2832 2796 __end: 2833 d printf(("intel8x0: clocking to %d\n", chip->ac97_bus->clock));2797 dev_info(chip->card->dev, "clocking to %d\n", chip->ac97_bus->clock); 2834 2798 snd_ac97_update_power(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 0); 2835 2799 } 2836 2800 2837 static struct snd_pci_quirk intel8x0_clock_list[] __devinitdata= {2801 static const struct snd_pci_quirk intel8x0_clock_list[] = { 2838 2802 SND_PCI_QUIRK(0x0e11, 0x008a, "AD1885", 41000), 2803 SND_PCI_QUIRK(0x1014, 0x0581, "AD1981B", 48000), 2839 2804 SND_PCI_QUIRK(0x1028, 0x00be, "AD1885", 44100), 2840 2805 SND_PCI_QUIRK(0x1028, 0x0177, "AD1980", 48000), … … 2844 2809 }; 2845 2810 2846 static int __devinitintel8x0_in_clock_list(struct intel8x0 *chip)2811 static int intel8x0_in_clock_list(struct intel8x0 *chip) 2847 2812 { 2848 2813 struct pci_dev *pci = chip->pci; … … 2852 2817 if (!wl) 2853 2818 return 0; 2854 printk(KERN_INFO "intel8x0: whitelist rate for %04x:%04x is %i\n",2819 dev_info(chip->card->dev, "allow list rate for %04x:%04x is %i\n", 2855 2820 pci->subsystem_vendor, pci->subsystem_device, wl->value); 2856 2821 chip->ac97_bus->clock = wl->value; … … 2858 2823 } 2859 2824 2860 #ifdef CONFIG_PROC_FS2861 2825 static void snd_intel8x0_proc_read(struct snd_info_entry * entry, 2862 2826 struct snd_info_buffer *buffer) … … 2893 2857 } 2894 2858 2895 static void __devinit snd_intel8x0_proc_init(struct intel8x0 * chip) 2896 { 2897 struct snd_info_entry *entry; 2898 2899 if (! snd_card_proc_new(chip->card, "intel8x0", &entry)) 2900 snd_info_set_text_ops(entry, chip, snd_intel8x0_proc_read); 2901 } 2902 #else 2903 #define snd_intel8x0_proc_init(x) 2904 #endif 2859 static void snd_intel8x0_proc_init(struct intel8x0 *chip) 2860 { 2861 snd_card_ro_proc_new(chip->card, "intel8x0", chip, 2862 snd_intel8x0_proc_read); 2863 } 2905 2864 2906 2865 static int snd_intel8x0_dev_free(struct snd_device *device) … … 2915 2874 }; 2916 2875 2917 static unsigned int ich_codec_bits[3] = {2876 static const unsigned int ich_codec_bits[3] = { 2918 2877 ICH_PCR, ICH_SCR, ICH_TCR 2919 2878 }; 2920 static unsigned int sis_codec_bits[3] = {2879 static const unsigned int sis_codec_bits[3] = { 2921 2880 ICH_PCR, ICH_SCR, ICH_SIS_TCR 2922 2881 }; 2923 2882 2924 static int __devinit snd_intel8x0_create(struct snd_card *card, 2925 struct pci_dev *pci, 2926 unsigned long device_type, 2927 struct intel8x0 ** r_intel8x0) 2883 static int snd_intel8x0_inside_vm(struct pci_dev *pci) 2884 { 2885 int result = inside_vm; 2886 char *msg = NULL; 2887 2888 /* check module parameter first (override detection) */ 2889 if (result >= 0) { 2890 msg = result ? "enable (forced) VM" : "disable (forced) VM"; 2891 goto fini; 2892 } 2893 2894 /* check for known (emulated) devices */ 2895 result = 0; 2896 if (pci->subsystem_vendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET && 2897 pci->subsystem_device == PCI_SUBDEVICE_ID_QEMU) { 2898 /* KVM emulated sound, PCI SSID: 1af4:1100 */ 2899 msg = "enable KVM"; 2900 result = 1; 2901 } else if (pci->subsystem_vendor == 0x1ab8) { 2902 /* Parallels VM emulated sound, PCI SSID: 1ab8:xxxx */ 2903 msg = "enable Parallels VM"; 2904 result = 1; 2905 } 2906 2907 fini: 2908 if (msg != NULL) 2909 dev_info(&pci->dev, "%s optimization\n", msg); 2910 2911 return result; 2912 } 2913 2914 static int snd_intel8x0_create(struct snd_card *card, 2915 struct pci_dev *pci, 2916 unsigned long device_type, 2917 struct intel8x0 **r_intel8x0) 2928 2918 { 2929 2919 struct intel8x0 *chip; … … 2932 2922 unsigned int int_sta_masks; 2933 2923 struct ichdev *ichdev; 2934 static struct snd_device_ops ops = {2924 static const struct snd_device_ops ops = { 2935 2925 .dev_free = snd_intel8x0_dev_free, 2936 2926 }; 2937 2927 2938 static unsigned int bdbars[] = {2928 static const unsigned int bdbars[] = { 2939 2929 3, /* DEVICE_INTEL */ 2940 2930 6, /* DEVICE_INTEL_ICH4 */ … … 2943 2933 4, /* DEVICE_NFORCE */ 2944 2934 }; 2945 static struct ich_reg_info intel_regs[6] = {2935 static const struct ich_reg_info intel_regs[6] = { 2946 2936 { ICH_PIINT, 0 }, 2947 2937 { ICH_POINT, 0x10 }, … … 2951 2941 { ICH_SPINT, 0x60 }, 2952 2942 }; 2953 static struct ich_reg_info nforce_regs[4] = {2943 static const struct ich_reg_info nforce_regs[4] = { 2954 2944 { ICH_PIINT, 0 }, 2955 2945 { ICH_POINT, 0x10 }, … … 2957 2947 { ICH_NVSPINT, 0x70 }, 2958 2948 }; 2959 static struct ich_reg_info ali_regs[6] = {2949 static const struct ich_reg_info ali_regs[6] = { 2960 2950 { ALI_INT_PCMIN, 0x40 }, 2961 2951 { ALI_INT_PCMOUT, 0x50 }, … … 2965 2955 { ALI_INT_SPDIFOUT, 0xb0 }, 2966 2956 }; 2967 struct ich_reg_info *tbl;2957 const struct ich_reg_info *tbl; 2968 2958 2969 2959 *r_intel8x0 = NULL; … … 2989 2979 chip->xbox = 1; 2990 2980 2981 chip->inside_vm = snd_intel8x0_inside_vm(pci); 2982 2983 /* 2984 * Intel 82443MX running a 100MHz processor system bus has a hardware 2985 * bug, which aborts PCI busmaster for audio transfer. A workaround 2986 * is to set the pages as non-cached. For details, see the errata in 2987 * http://download.intel.com/design/chipsets/specupdt/24505108.pdf 2988 */ 2991 2989 if (pci->vendor == PCI_VENDOR_ID_INTEL && 2992 2990 pci->device == PCI_DEVICE_ID_INTEL_440MX) … … 3010 3008 chip->addr = pci_iomap(pci, 0, 0); 3011 3009 if (!chip->addr) { 3012 snd_printk(KERN_ERR"AC'97 space ioremap problem\n");3010 dev_err(card->dev, "AC'97 space ioremap problem\n"); 3013 3011 snd_intel8x0_free(chip); 3014 3012 return -EIO; … … 3018 3016 else 3019 3017 chip->bmaddr = pci_iomap(pci, 1, 0); 3018 3019 port_inited: 3020 3020 if (!chip->bmaddr) { 3021 snd_printk(KERN_ERR"Controller space ioremap problem\n");3021 dev_err(card->dev, "Controller space ioremap problem\n"); 3022 3022 snd_intel8x0_free(chip); 3023 3023 return -EIO; 3024 3024 } 3025 3026 port_inited:3027 3025 chip->bdbars_count = bdbars[device_type]; 3028 3026 … … 3060 3058 /* allocate buffer descriptor lists */ 3061 3059 /* the start of each lists must be aligned to 8 bytes */ 3062 if (snd_dma_alloc_pages( SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),3060 if (snd_dma_alloc_pages(intel8x0_dma_type(chip), &pci->dev, 3063 3061 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, 3064 3062 &chip->bdbars) < 0) { 3065 3063 snd_intel8x0_free(chip); 3066 snd_printk(KERN_ERR "intel8x0:cannot allocate buffer descriptors\n");3064 dev_err(card->dev, "cannot allocate buffer descriptors\n"); 3067 3065 return -ENOMEM; 3068 3066 } 3069 3067 /* tables must be aligned to 8 bytes here, but the kernel pages 3070 3068 are much bigger, so we don't care (on i386) */ 3071 /* workaround for 440MX */3072 if (chip->fix_nocache)3073 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1);3074 3069 int_sta_masks = 0; 3075 3070 for (i = 0; i < chip->bdbars_count; i++) { 3076 3071 ichdev = &chip->ichd[i]; 3077 ichdev->bdbar = (( u32 *)chip->bdbars.area) +3072 ichdev->bdbar = ((__le32 *)chip->bdbars.area) + 3078 3073 (i * ICH_MAX_FRAGS * 2); 3079 3074 ichdev->bdbar_addr = chip->bdbars.addr + … … 3117 3112 /* request irq after initializaing int_sta_mask, etc */ 3118 3113 if (request_irq(pci->irq, snd_intel8x0_interrupt, 3119 IRQF_SHARED, card->shortname, chip)) {3120 snd_printk(KERN_ERR"unable to grab IRQ %d\n", pci->irq);3114 IRQF_SHARED, KBUILD_MODNAME, chip)) { 3115 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 3121 3116 snd_intel8x0_free(chip); 3122 3117 return -EBUSY; 3123 3118 } 3124 3119 chip->irq = pci->irq; 3120 card->sync_irq = chip->irq; 3125 3121 3126 3122 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { … … 3129 3125 } 3130 3126 3131 snd_card_set_dev(card, &pci->dev);3132 3133 3127 *r_intel8x0 = chip; 3134 3128 return 0; … … 3138 3132 unsigned int id; 3139 3133 const char *s; 3140 } shortnames[] __devinitdata= {3134 } shortnames[] = { 3141 3135 { PCI_DEVICE_ID_INTEL_82801AA_5, "Intel 82801AA-ICH" }, 3142 3136 { PCI_DEVICE_ID_INTEL_82801AB_5, "Intel 82901AB-ICH0" }, … … 3164 3158 }; 3165 3159 3166 #ifdef NOT_USED 3167 static struct snd_pci_quirk spdif_aclink_defaults[] __devinitdata = { 3160 static const struct snd_pci_quirk spdif_aclink_defaults[] = { 3168 3161 SND_PCI_QUIRK(0x147b, 0x1c1a, "ASUS KN8", 1), 3169 3162 {0} /* end */ 3170 3163 }; 3171 #endif 3172 3173 /* look up white/black list for SPDIF over ac-link */ 3174 static int __devinit check_default_spdif_aclink(struct pci_dev *pci) 3175 { 3176 #ifndef TARGET_OS2 3164 3165 /* look up allow/deny list for SPDIF over ac-link */ 3166 static int check_default_spdif_aclink(struct pci_dev *pci) 3167 { 3177 3168 const struct snd_pci_quirk *w; 3178 3169 … … 3180 3171 if (w) { 3181 3172 if (w->value) 3182 snd_printdd(KERN_INFO "intel8x0: Using SPDIF over " 3183 "AC-Link for %s\n", w->name); 3173 dev_dbg(&pci->dev, 3174 "Using SPDIF over AC-Link for %s\n", 3175 snd_pci_quirk_name(w)); 3184 3176 else 3185 snd_printdd(KERN_INFO "intel8x0: Using integrated " 3186 "SPDIF DMA for %s\n", w->name); 3177 dev_dbg(&pci->dev, 3178 "Using integrated SPDIF DMA for %s\n", 3179 snd_pci_quirk_name(w)); 3187 3180 return w->value; 3188 3181 } 3189 #endif3190 3182 return 0; 3191 3183 } 3192 3184 3193 static int __devinitsnd_intel8x0_probe(struct pci_dev *pci,3194 3185 static int snd_intel8x0_probe(struct pci_dev *pci, 3186 const struct pci_device_id *pci_id) 3195 3187 { 3196 3188 struct snd_card *card; … … 3199 3191 struct shortname_table *name; 3200 3192 3201 err = snd_card_ create(index, id, THIS_MODULE, 0, &card);3193 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); 3202 3194 if (err < 0) 3203 3195 return err; … … 3274 3266 } 3275 3267 3276 static void __devexitsnd_intel8x0_remove(struct pci_dev *pci)3268 static void snd_intel8x0_remove(struct pci_dev *pci) 3277 3269 { 3278 3270 snd_card_free(pci_get_drvdata(pci)); 3279 pci_set_drvdata(pci, NULL); 3280 } 3281 3282 static struct pci_driver driver = { 3283 .name = "Intel ICH", 3271 } 3272 3273 static struct pci_driver intel8x0_driver = { 3274 .name = KBUILD_MODNAME, 3284 3275 .id_table = snd_intel8x0_ids, 3285 3276 .probe = snd_intel8x0_probe, 3286 .remove = __devexit_p(snd_intel8x0_remove), 3287 #ifdef CONFIG_PM 3288 .suspend = intel8x0_suspend, 3289 .resume = intel8x0_resume, 3290 #endif 3291 }; 3292 3293 3294 static int __init alsa_card_intel8x0_init(void) 3295 { 3296 return pci_register_driver(&driver); 3297 } 3298 3299 static void __exit alsa_card_intel8x0_exit(void) 3300 { 3301 pci_unregister_driver(&driver); 3302 } 3303 3304 module_init(alsa_card_intel8x0_init) 3305 module_exit(alsa_card_intel8x0_exit) 3277 .remove = snd_intel8x0_remove, 3278 .driver = { 3279 .pm = INTEL8X0_PM_OPS, 3280 }, 3281 }; 3282 3283 module_pci_driver(intel8x0_driver);
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