Changeset 652 for GPL/branches/uniaud32-next/lib32/regcache.c

Timestamp:

Jan 24, 2021, 8:40:08 AM (5 years ago)

Author:

Paul Smedley

Message:

Update regmap & regcache to 5.10.10 kernel code

File:

• GPL/branches/uniaud32-next/lib32/regcache.c (modified) (10 diffs)

GPL/branches/uniaud32-next/lib32/regcache.c

@@ -1 @@
-/*
- * Register cache access API
- *
- * Copyright 2011 Wolfson Microelectronics plc
- *
- * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/* from 4.19.163 */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Register cache access API
+//
+// Copyright 2011 Wolfson Microelectronics plc
+//
+// Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
+
+/* from 5.10.10 */
 
 //#include <linux/bsearch.h>
@@ -253 +250 @@
                 ret = map->cache_ops->read(map, reg, value);
 
+#ifndef TARGET_OS2
+                if (ret == 0)
+                        trace_regmap_reg_read_cache(map, reg, *value);
+#endif
                 return ret;
         }
@@ -358 +359 @@
                 map->cache_ops->name);
         name = map->cache_ops->name;
-
+#ifndef TARGET_OS2
+        trace_regcache_sync(map, name, "start");
+#endif
         if (!map->cache_dirty)
                 goto out;
@@ -393 +396 @@
         regmap_async_complete(map);
 
+#ifndef TARGET_OS2
+        trace_regcache_sync(map, name, "stop");
+#endif
         return ret;
 }
@@ -426 +432 @@
         dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
 
+#ifndef TARGET_OS2
+        trace_regcache_sync(map, name, "start region");
+#endif
         if (!map->cache_dirty)
                 goto out;
@@ -445 +454 @@
         regmap_async_complete(map);
 
+#ifndef TARGET_OS2
+        trace_regcache_sync(map, name, "stop region");
+#endif
         return ret;
 }
@@ -470 +482 @@
         map->lock(map->lock_arg);
 
+#ifndef TARGET_OS2
+        trace_regcache_drop_region(map, min, max);
+#endif
         ret = map->cache_ops->drop(map, min, max);
 
@@ -495 +510 @@
         WARN_ON(map->cache_bypass && enable);
         map->cache_only = enable;
+#ifndef TARGET_OS2
+        trace_regmap_cache_only(map, enable);
+#endif
         map->unlock(map->lock_arg);
 }
@@ -537 +555 @@
         WARN_ON(map->cache_only && enable);
         map->cache_bypass = enable;
+#ifndef TARGET_OS2
+        trace_regmap_cache_bypass(map, enable);
+#endif
         map->unlock(map->lock_arg);
 }
@@ -713 +734 @@
         map->cache_bypass = true;
 
-        ret = _regmap_raw_write(map, base, *data, count * val_bytes);
+        ret = _regmap_raw_write(map, base, *data, count * val_bytes, false);
         if (ret)
                 dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n",