Changeset 629 for GPL/branches/uniaud32-next/alsa-kernel/pci/intel8x0m.c
- Timestamp:
- Jan 4, 2021, 10:15:17 AM (5 years ago)
- File:
-
- 1 edited
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GPL/branches/uniaud32-next/alsa-kernel/pci/intel8x0m.c
r615 r629 289 289 static unsigned int get_ich_codec_bit(struct intel8x0m *chip, unsigned int codec) 290 290 { 291 static unsigned int codec_bit[3] = {291 static const unsigned int codec_bit[3] = { 292 292 ICH_PCR, ICH_SCR, ICH_TCR 293 293 }; … … 554 554 } 555 555 556 static int snd_intel8x0m_hw_params(struct snd_pcm_substream *substream,557 struct snd_pcm_hw_params *hw_params)558 {559 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));560 }561 562 static int snd_intel8x0m_hw_free(struct snd_pcm_substream *substream)563 {564 return snd_pcm_lib_free_pages(substream);565 }566 567 556 static snd_pcm_uframes_t snd_intel8x0m_pcm_pointer(struct snd_pcm_substream *substream) 568 557 { … … 674 663 .open = snd_intel8x0m_playback_open, 675 664 .close = snd_intel8x0m_playback_close, 676 .ioctl = snd_pcm_lib_ioctl,677 .hw_params = snd_intel8x0m_hw_params,678 .hw_free = snd_intel8x0m_hw_free,679 665 .prepare = snd_intel8x0m_pcm_prepare, 680 666 .trigger = snd_intel8x0m_pcm_trigger, … … 685 671 .open = snd_intel8x0m_capture_open, 686 672 .close = snd_intel8x0m_capture_close, 687 .ioctl = snd_pcm_lib_ioctl,688 .hw_params = snd_intel8x0m_hw_params,689 .hw_free = snd_intel8x0m_hw_free,690 673 .prepare = snd_intel8x0m_pcm_prepare, 691 674 .trigger = snd_intel8x0m_pcm_trigger, … … 704 687 705 688 static int snd_intel8x0m_pcm1(struct intel8x0m *chip, int device, 706 struct ich_pcm_table *rec)689 const struct ich_pcm_table *rec) 707 690 { 708 691 struct snd_pcm *pcm; … … 734 717 chip->pcm[device] = pcm; 735 718 736 snd_pcm_ lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,737 snd_dma_pci_data(chip->pci),738 739 740 741 return 0; 742 } 743 744 static struct ich_pcm_table intel_pcms[] = {719 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 720 &chip->pci->dev, 721 rec->prealloc_size, 722 rec->prealloc_max_size); 723 724 return 0; 725 } 726 727 static const struct ich_pcm_table intel_pcms[] = { 745 728 { 746 729 .suffix = "Modem", … … 755 738 { 756 739 int i, tblsize, device, err; 757 struct ich_pcm_table *tbl, *rec;740 const struct ich_pcm_table *tbl, *rec; 758 741 759 742 #if 1 … … 819 802 int err; 820 803 unsigned int glob_sta = 0; 821 static struct snd_ac97_bus_ops ops = {804 static const struct snd_ac97_bus_ops ops = { 822 805 .write = snd_intel8x0m_codec_write, 823 806 .read = snd_intel8x0m_codec_read, … … 1017 1000 free_irq(chip->irq, chip); 1018 1001 chip->irq = -1; 1002 card->sync_irq = -1; 1019 1003 } 1020 1004 return 0; … … 1035 1019 } 1036 1020 chip->irq = pci->irq; 1021 card->sync_irq = chip->irq; 1037 1022 snd_intel8x0m_chip_init(chip, 0); 1038 1023 snd_ac97_resume(chip->ac97); … … 1095 1080 unsigned int int_sta_masks; 1096 1081 struct ichdev *ichdev; 1097 static struct snd_device_ops ops = {1082 static const struct snd_device_ops ops = { 1098 1083 .dev_free = snd_intel8x0m_dev_free, 1099 1084 }; 1100 static struct ich_reg_info intel_regs[2] = {1085 static const struct ich_reg_info intel_regs[2] = { 1101 1086 { ICH_MIINT, 0 }, 1102 1087 { ICH_MOINT, 0x10 }, 1103 1088 }; 1104 struct ich_reg_info *tbl;1089 const struct ich_reg_info *tbl; 1105 1090 1106 1091 *r_intel8x0m = NULL; … … 1177 1162 /* allocate buffer descriptor lists */ 1178 1163 /* the start of each lists must be aligned to 8 bytes */ 1179 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),1164 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, 1180 1165 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, 1181 1166 &chip->bdbars) < 0) { … … 1209 1194 } 1210 1195 chip->irq = pci->irq; 1196 card->sync_irq = chip->irq; 1211 1197 1212 1198 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
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