Changeset 615 for GPL/branches/uniaud32-next/alsa-kernel/pci/intel8x0.c
- Timestamp:
- Jan 1, 2021, 5:31:48 AM (5 years ago)
- Location:
- GPL/branches/uniaud32-next
- Files:
-
- 1 edited
- 1 copied
Legend:
- Unmodified
- Added
- Removed
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GPL/branches/uniaud32-next/alsa-kernel/pci/intel8x0.c
r612 r615 1 // SPDX-License-Identifier: GPL-2.0-or-later 1 2 /* 2 3 * ALSA driver for Intel ICH (i8x0) chipsets … … 4 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 5 6 * 6 *7 7 * This code also contains alpha support for SiS 735 chipsets provided 8 8 * by Mike Pieper <mptei@users.sourceforge.net>. We have no datasheet 9 9 * for SiS735, so the code is not fully functional. 10 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 26 * 11 27 12 */ 28 13 29 14 #ifdef TARGET_OS2 30 15 #define KBUILD_MODNAME "intel8x0" 16 #include <linux/ktime.h> 17 extern ktime_t ktime_get(void); 31 18 #endif 32 19 33 #include < asm/io.h>20 #include <linux/io.h> 34 21 #include <linux/delay.h> 35 22 #include <linux/interrupt.h> … … 43 30 #include <sound/info.h> 44 31 #include <sound/initval.h> 45 /* for 440MX workaround */46 #include <asm/pgtable.h>47 #include <asm/cacheflush.h>48 49 #ifdef CONFIG_KVM_GUEST50 #include <linux/kvm_para.h>51 #else52 #define kvm_para_available() (0)53 #endif54 32 55 33 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); … … 84 62 static int ac97_clock; 85 63 static char *ac97_quirk; 86 static intbuggy_semaphore;64 static bool buggy_semaphore; 87 65 static int buggy_irq = -1; /* auto-check */ 88 static intxbox;66 static bool xbox; 89 67 static int spdif_aclink = -1; 90 68 static int inside_vm = -1; … … 100 78 module_param(buggy_semaphore, bool, 0444); 101 79 MODULE_PARM_DESC(buggy_semaphore, "Enable workaround for hardwares with problematic codec semaphores."); 102 module_param(buggy_irq, b ool, 0444);80 module_param(buggy_irq, bint, 0444); 103 81 MODULE_PARM_DESC(buggy_irq, "Enable workaround for buggy interrupts on some motherboards."); 104 82 module_param(xbox, bool, 0444); … … 106 84 module_param(spdif_aclink, int, 0444); 107 85 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 108 module_param(inside_vm, b ool, 0444);86 module_param(inside_vm, bint, 0444); 109 87 MODULE_PARM_DESC(inside_vm, "KVM/Parallels optimization."); 110 88 111 89 /* just for backward compatibility */ 112 //static intenable;90 //static bool enable; 113 91 module_param(enable, bool, 0444); 114 92 //static int joystick; … … 360 338 unsigned int ichd; /* ich device number */ 361 339 unsigned long reg_offset; /* offset to bmaddr */ 362 u32 *bdbar; /* CPU address (32bit) */340 __le32 *bdbar; /* CPU address (32bit) */ 363 341 unsigned int bdbar_addr; /* PCI bus address (32bit) */ 364 342 struct snd_pcm_substream *substream; … … 383 361 struct ac97_pcm *pcm; 384 362 int pcm_open_flag; 385 unsigned int page_attr_changed: 1;386 363 unsigned int suspended: 1; 387 364 }; … … 435 412 }; 436 413 437 static DEFINE_PCI_DEVICE_TABLE(snd_intel8x0_ids)= {414 static const struct pci_device_id snd_intel8x0_ids[] = { 438 415 { PCI_VDEVICE(INTEL, 0x2415), DEVICE_INTEL }, /* 82801AA */ 439 416 { PCI_VDEVICE(INTEL, 0x2425), DEVICE_INTEL }, /* 82901AB */ … … 552 529 * reset the semaphore. So even if you don't get the semaphore, still 553 530 * continue the access. We don't need the semaphore anyway. */ 554 snd_printk(KERN_ERR "codec_semaphore: semaphore is not ready [0x%x][0x%x]\n", 531 dev_err(chip->card->dev, 532 "codec_semaphore: semaphore is not ready [0x%x][0x%x]\n", 555 533 igetbyte(chip, ICHREG(ACC_SEMA)), igetdword(chip, ICHREG(GLOB_STA))); 556 534 iagetword(chip, 0); /* clear semaphore flag */ … … 558 536 return -EBUSY; 559 537 } 560 538 561 539 static void snd_intel8x0_codec_write(struct snd_ac97 *ac97, 562 540 unsigned short reg, … … 567 545 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) { 568 546 if (! chip->in_ac97_init) 569 snd_printk(KERN_ERR "codec_write %d: semaphore is not ready for register 0x%x\n", ac97->num, reg); 547 dev_err(chip->card->dev, 548 "codec_write %d: semaphore is not ready for register 0x%x\n", 549 ac97->num, reg); 570 550 } 571 551 iaputword(chip, reg + ac97->num * 0x80, val); … … 581 561 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) { 582 562 if (! chip->in_ac97_init) 583 snd_printk(KERN_ERR "codec_read %d: semaphore is not ready for register 0x%x\n", ac97->num, reg); 563 dev_err(chip->card->dev, 564 "codec_read %d: semaphore is not ready for register 0x%x\n", 565 ac97->num, reg); 584 566 res = 0xffff; 585 567 } else { … … 590 572 ~(chip->codec_ready_bits | ICH_GSCI)); 591 573 if (! chip->in_ac97_init) 592 snd_printk(KERN_ERR "codec_read %d: read timeout for register 0x%x\n", ac97->num, reg); 574 dev_err(chip->card->dev, 575 "codec_read %d: read timeout for register 0x%x\n", 576 ac97->num, reg); 593 577 res = 0xffff; 594 578 } … … 597 581 } 598 582 599 static void __devinitsnd_intel8x0_codec_read_test(struct intel8x0 *chip,600 583 static void snd_intel8x0_codec_read_test(struct intel8x0 *chip, 584 unsigned int codec) 601 585 { 602 586 unsigned int tmp; … … 624 608 } 625 609 if (! chip->in_ac97_init) 626 snd_printd(KERN_WARNING "intel8x0:AC97 codec ready timeout.\n");610 dev_warn(chip->card->dev, "AC97 codec ready timeout.\n"); 627 611 return -EBUSY; 628 612 } … … 636 620 udelay(1); 637 621 if (! time && ! chip->in_ac97_init) 638 snd_printk(KERN_WARNING"ali_codec_semaphore timeout\n");622 dev_warn(chip->card->dev, "ali_codec_semaphore timeout\n"); 639 623 return snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_CODEC_READY); 640 624 } … … 679 663 { 680 664 int idx; 681 u32 *bdbar = ichdev->bdbar;665 __le32 *bdbar = ichdev->bdbar; 682 666 unsigned long port = ichdev->reg_offset; 683 667 … … 705 689 ichdev->fragsize >> ichdev->pos_shift); 706 690 #if 0 707 printk(KERN_DEBUG"bdbar[%i] = 0x%x [0x%x]\n",691 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n", 708 692 idx + 0, bdbar[idx + 0], bdbar[idx + 1]); 709 693 #endif … … 717 701 ichdev->position = 0; 718 702 #if 0 719 printk(KERN_DEBUG "lvi_frag = %i, frags = %i, period_size = 0x%x, "720 "period_size1 = 0x%x\n",703 dev_dbg(chip->card->dev, 704 "lvi_frag = %i, frags = %i, period_size = 0x%x, period_size1 = 0x%x\n", 721 705 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, 722 706 ichdev->fragsize1); … … 725 709 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); 726 710 } 727 728 #ifdef __i386__729 /*730 * Intel 82443MX running a 100MHz processor system bus has a hardware bug,731 * which aborts PCI busmaster for audio transfer. A workaround is to set732 * the pages as non-cached. For details, see the errata in733 * http://download.intel.com/design/chipsets/specupdt/24505108.pdf734 */735 static void fill_nocache(void *buf, int size, int nocache)736 {737 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;738 if (nocache)739 set_pages_uc(virt_to_page(buf), size);740 else741 set_pages_wb(virt_to_page(buf), size);742 }743 #else744 #define fill_nocache(buf, size, nocache) do { ; } while (0)745 #endif746 711 747 712 /* … … 786 751 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize1); 787 752 #if 0 788 printk(KERN_DEBUG "new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, "789 "all = 0x%x, 0x%x\n",753 dev_dbg(chip->card->dev, 754 "new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, all = 0x%x, 0x%x\n", 790 755 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], 791 756 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), … … 852 817 case SNDRV_PCM_TRIGGER_RESUME: 853 818 ichdev->suspended = 0; 854 /* fall thru*/819 /* fall through */ 855 820 case SNDRV_PCM_TRIGGER_START: 856 821 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: … … 860 825 case SNDRV_PCM_TRIGGER_SUSPEND: 861 826 ichdev->suspended = 1; 862 /* fall thru*/827 /* fall through */ 863 828 case SNDRV_PCM_TRIGGER_STOP: 864 829 val = 0; … … 894 859 case SNDRV_PCM_TRIGGER_RESUME: 895 860 ichdev->suspended = 0; 896 /* fall thru*/861 /* fall through */ 897 862 case SNDRV_PCM_TRIGGER_START: 898 863 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: … … 911 876 case SNDRV_PCM_TRIGGER_SUSPEND: 912 877 ichdev->suspended = 1; 913 /* fall thru*/878 /* fall through */ 914 879 case SNDRV_PCM_TRIGGER_STOP: 915 880 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: … … 940 905 struct intel8x0 *chip = snd_pcm_substream_chip(substream); 941 906 struct ichdev *ichdev = get_ichdev(substream); 942 struct snd_pcm_runtime *runtime = substream->runtime;943 907 int dbl = params_rate(hw_params) > 48000; 944 908 int err; 945 909 946 if (chip->fix_nocache && ichdev->page_attr_changed) {947 fill_nocache(runtime->dma_area, runtime->dma_bytes, 0); /* clear */948 ichdev->page_attr_changed = 0;949 }950 910 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 951 911 if (err < 0) 952 912 return err; 953 if (chip->fix_nocache) {954 if (runtime->dma_area && ! ichdev->page_attr_changed) {955 fill_nocache(runtime->dma_area, runtime->dma_bytes, 1);956 ichdev->page_attr_changed = 1;957 }958 }959 913 if (ichdev->pcm_open_flag) { 960 914 snd_ac97_pcm_close(ichdev->pcm); … … 976 930 static int snd_intel8x0_hw_free(struct snd_pcm_substream *substream) 977 931 { 978 struct intel8x0 *chip = snd_pcm_substream_chip(substream);979 932 struct ichdev *ichdev = get_ichdev(substream); 980 933 … … 982 935 snd_ac97_pcm_close(ichdev->pcm); 983 936 ichdev->pcm_open_flag = 0; 984 }985 if (chip->fix_nocache && ichdev->page_attr_changed) {986 fill_nocache(substream->runtime->dma_area, substream->runtime->dma_bytes, 0);987 ichdev->page_attr_changed = 0;988 937 } 989 938 return snd_pcm_lib_free_pages(substream); … … 1117 1066 } 1118 1067 1119 static struct snd_pcm_hardware snd_intel8x0_stream =1068 static const struct snd_pcm_hardware snd_intel8x0_stream = 1120 1069 { 1121 1070 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | … … 1138 1087 }; 1139 1088 1140 static unsigned int channels4[] = {1089 static const unsigned int channels4[] = { 1141 1090 2, 4, 1142 1091 }; 1143 1092 1144 static struct snd_pcm_hw_constraint_list hw_constraints_channels4 = {1093 static const struct snd_pcm_hw_constraint_list hw_constraints_channels4 = { 1145 1094 .count = ARRAY_SIZE(channels4), 1146 1095 .list = channels4, … … 1148 1097 }; 1149 1098 1150 static unsigned int channels6[] = {1099 static const unsigned int channels6[] = { 1151 1100 2, 4, 6, 1152 1101 }; 1153 1102 1154 static struct snd_pcm_hw_constraint_list hw_constraints_channels6 = {1103 static const struct snd_pcm_hw_constraint_list hw_constraints_channels6 = { 1155 1104 .count = ARRAY_SIZE(channels6), 1156 1105 .list = channels6, … … 1158 1107 }; 1159 1108 1160 static unsigned int channels8[] = {1109 static const unsigned int channels8[] = { 1161 1110 2, 4, 6, 8, 1162 1111 }; 1163 1112 1164 static struct snd_pcm_hw_constraint_list hw_constraints_channels8 = {1113 static const struct snd_pcm_hw_constraint_list hw_constraints_channels8 = { 1165 1114 .count = ARRAY_SIZE(channels8), 1166 1115 .list = channels8, … … 1369 1318 #endif 1370 1319 1371 static struct snd_pcm_ops snd_intel8x0_playback_ops = {1320 static const struct snd_pcm_ops snd_intel8x0_playback_ops = { 1372 1321 .open = snd_intel8x0_playback_open, 1373 1322 .close = snd_intel8x0_playback_close, … … 1380 1329 }; 1381 1330 1382 static struct snd_pcm_ops snd_intel8x0_capture_ops = {1331 static const struct snd_pcm_ops snd_intel8x0_capture_ops = { 1383 1332 .open = snd_intel8x0_capture_open, 1384 1333 .close = snd_intel8x0_capture_close, … … 1391 1340 }; 1392 1341 1393 static struct snd_pcm_ops snd_intel8x0_capture_mic_ops = {1342 static const struct snd_pcm_ops snd_intel8x0_capture_mic_ops = { 1394 1343 .open = snd_intel8x0_mic_open, 1395 1344 .close = snd_intel8x0_mic_close, … … 1402 1351 }; 1403 1352 1404 static struct snd_pcm_ops snd_intel8x0_capture_mic2_ops = {1353 static const struct snd_pcm_ops snd_intel8x0_capture_mic2_ops = { 1405 1354 .open = snd_intel8x0_mic2_open, 1406 1355 .close = snd_intel8x0_mic2_close, … … 1413 1362 }; 1414 1363 1415 static struct snd_pcm_ops snd_intel8x0_capture2_ops = {1364 static const struct snd_pcm_ops snd_intel8x0_capture2_ops = { 1416 1365 .open = snd_intel8x0_capture2_open, 1417 1366 .close = snd_intel8x0_capture2_close, … … 1424 1373 }; 1425 1374 1426 static struct snd_pcm_ops snd_intel8x0_spdif_ops = {1375 static const struct snd_pcm_ops snd_intel8x0_spdif_ops = { 1427 1376 .open = snd_intel8x0_spdif_open, 1428 1377 .close = snd_intel8x0_spdif_close, … … 1435 1384 }; 1436 1385 1437 static struct snd_pcm_ops snd_intel8x0_ali_playback_ops = {1386 static const struct snd_pcm_ops snd_intel8x0_ali_playback_ops = { 1438 1387 .open = snd_intel8x0_playback_open, 1439 1388 .close = snd_intel8x0_playback_close, … … 1446 1395 }; 1447 1396 1448 static struct snd_pcm_ops snd_intel8x0_ali_capture_ops = {1397 static const struct snd_pcm_ops snd_intel8x0_ali_capture_ops = { 1449 1398 .open = snd_intel8x0_capture_open, 1450 1399 .close = snd_intel8x0_capture_close, … … 1457 1406 }; 1458 1407 1459 static struct snd_pcm_ops snd_intel8x0_ali_capture_mic_ops = {1408 static const struct snd_pcm_ops snd_intel8x0_ali_capture_mic_ops = { 1460 1409 .open = snd_intel8x0_mic_open, 1461 1410 .close = snd_intel8x0_mic_close, … … 1468 1417 }; 1469 1418 1470 static struct snd_pcm_ops snd_intel8x0_ali_ac97spdifout_ops = {1419 static const struct snd_pcm_ops snd_intel8x0_ali_ac97spdifout_ops = { 1471 1420 .open = snd_intel8x0_ali_ac97spdifout_open, 1472 1421 .close = snd_intel8x0_ali_ac97spdifout_close, … … 1505 1454 struct ich_pcm_table { 1506 1455 char *suffix; 1507 struct snd_pcm_ops *playback_ops;1508 struct snd_pcm_ops *capture_ops;1456 const struct snd_pcm_ops *playback_ops; 1457 const struct snd_pcm_ops *capture_ops; 1509 1458 size_t prealloc_size; 1510 1459 size_t prealloc_max_size; … … 1512 1461 }; 1513 1462 1514 static int __devinit snd_intel8x0_pcm1(struct intel8x0 *chip, int device, 1515 struct ich_pcm_table *rec) 1463 #define intel8x0_dma_type(chip) \ 1464 ((chip)->fix_nocache ? SNDRV_DMA_TYPE_DEV_UC : SNDRV_DMA_TYPE_DEV) 1465 1466 static int snd_intel8x0_pcm1(struct intel8x0 *chip, int device, 1467 struct ich_pcm_table *rec) 1516 1468 { 1517 1469 struct snd_pcm *pcm; … … 1542 1494 chip->pcm[device] = pcm; 1543 1495 1544 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,1496 snd_pcm_lib_preallocate_pages_for_all(pcm, intel8x0_dma_type(chip), 1545 1497 snd_dma_pci_data(chip->pci), 1546 1498 rec->prealloc_size, rec->prealloc_max_size); 1547 1499 1500 if (rec->playback_ops && 1501 rec->playback_ops->open == snd_intel8x0_playback_open) { 1502 struct snd_pcm_chmap *chmap; 1503 int chs = 2; 1504 if (chip->multi8) 1505 chs = 8; 1506 else if (chip->multi6) 1507 chs = 6; 1508 else if (chip->multi4) 1509 chs = 4; 1510 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1511 snd_pcm_alt_chmaps, chs, 0, 1512 &chmap); 1513 if (err < 0) 1514 return err; 1515 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468; 1516 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; 1517 } 1518 1548 1519 return 0; 1549 1520 } 1550 1521 1551 static struct ich_pcm_table intel_pcms[] __devinitdata= {1522 static struct ich_pcm_table intel_pcms[] = { 1552 1523 { 1553 1524 .playback_ops = &snd_intel8x0_playback_ops, … … 1586 1557 }; 1587 1558 1588 static struct ich_pcm_table nforce_pcms[] __devinitdata= {1559 static struct ich_pcm_table nforce_pcms[] = { 1589 1560 { 1590 1561 .playback_ops = &snd_intel8x0_playback_ops, … … 1609 1580 }; 1610 1581 1611 static struct ich_pcm_table ali_pcms[] __devinitdata= {1582 static struct ich_pcm_table ali_pcms[] = { 1612 1583 { 1613 1584 .playback_ops = &snd_intel8x0_ali_playback_ops, … … 1641 1612 }; 1642 1613 1643 static int __devinitsnd_intel8x0_pcm(struct intel8x0 *chip)1614 static int snd_intel8x0_pcm(struct intel8x0 *chip) 1644 1615 { 1645 1616 int i, tblsize, device, err; … … 1704 1675 } 1705 1676 1706 static struct ac97_pcm ac97_pcm_defs[] __devinitdata= {1677 static const struct ac97_pcm ac97_pcm_defs[] = { 1707 1678 /* front PCM */ 1708 1679 { … … 1774 1745 }; 1775 1746 1776 static struct ac97_quirk ac97_quirks[] __devinitdata= {1747 static const struct ac97_quirk ac97_quirks[] = { 1777 1748 { 1778 1749 .subvendor = 0x0e11, … … 1792 1763 .name = "Compaq Evo D510C", 1793 1764 .type = AC97_TUNE_HP_ONLY 1794 1795 1765 }, 1766 { 1796 1767 .subvendor = 0x0e11, 1797 1768 .subdevice = 0x0860, … … 2124 2095 }, 2125 2096 { 2126 .subvendor = 0x107B,2127 .subdevice = 0x0111,2128 .name = "Gateway 2000 ICH2/AD1885",2129 .type = AC97_TUNE_HP_ONLY2130 },2131 {2132 2097 .subvendor = 0x8086, 2133 2098 .subdevice = 0x2000, … … 2187 2152 }; 2188 2153 2189 static int __devinitsnd_intel8x0_mixer(struct intel8x0 *chip, int ac97_clock,2190 2154 static int snd_intel8x0_mixer(struct intel8x0 *chip, int ac97_clock, 2155 const char *quirk_override) 2191 2156 { 2192 2157 struct snd_ac97_bus *pbus; … … 2217 2182 chip->spdif_idx = ICHD_SPBAR; 2218 2183 break; 2219 } ;2184 } 2220 2185 } 2221 2186 … … 2281 2246 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 2282 2247 if (err != -EACCES) 2283 snd_printk(KERN_ERR "Unable to initialize codec #%d\n", i); 2248 dev_err(chip->card->dev, 2249 "Unable to initialize codec #%d\n", i); 2284 2250 if (i == 0) 2285 2251 goto __err; … … 2386 2352 static struct snd_pci_quirk ich_chip_reset_mode[] = { 2387 2353 SND_PCI_QUIRK(0x1014, 0x051f, "Thinkpad R32", 1), 2388 { 2354 {0} /* end */ 2389 2355 }; 2390 2356 … … 2433 2399 schedule_timeout_uninterruptible(1); 2434 2400 } while (time_after_eq(end_time, jiffies)); 2435 snd_printk(KERN_ERR"AC'97 warm reset still in progress? [0x%x]\n",2401 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n", 2436 2402 igetdword(chip, ICHREG(GLOB_CNT))); 2437 2403 return -EIO; … … 2477 2443 if (! status) { 2478 2444 /* no codec is found */ 2479 snd_printk(KERN_ERR "codec_ready: codec is not ready [0x%x]\n", 2445 dev_err(chip->card->dev, 2446 "codec_ready: codec is not ready [0x%x]\n", 2480 2447 igetdword(chip, ICHREG(GLOB_STA))); 2481 2448 return -EIO; … … 2541 2508 schedule_timeout_uninterruptible(1); 2542 2509 } 2543 snd_printk(KERN_ERR"AC'97 reset failed.\n");2510 dev_err(chip->card->dev, "AC'97 reset failed.\n"); 2544 2511 if (probing) 2545 2512 return -EIO; … … 2585 2552 } 2586 2553 if (timeout == 0) 2587 printk(KERN_ERR "intel8x0:reset of registers failed?\n");2554 dev_err(chip->card->dev, "reset of registers failed?\n"); 2588 2555 } 2589 2556 /* initialize Buffer Descriptor Lists */ … … 2618 2585 if (chip->irq >= 0) 2619 2586 free_irq(chip->irq, chip); 2620 if (chip->bdbars.area) { 2621 if (chip->fix_nocache) 2622 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 0); 2587 if (chip->bdbars.area) 2623 2588 snd_dma_free_pages(&chip->bdbars); 2624 }2625 2589 if (chip->addr) 2626 2590 pci_iounmap(chip->pci, chip->addr); … … 2633 2597 } 2634 2598 2635 #ifdef CONFIG_PM 2599 #ifdef CONFIG_PM_SLEEP 2636 2600 /* 2637 2601 * power management 2638 2602 */ 2639 static int intel8x0_suspend(struct pci_dev *pci, pm_message_t state)2640 { 2641 struct snd_card *card = pci_get_drvdata(pci);2603 static int intel8x0_suspend(struct device *dev) 2604 { 2605 struct snd_card *card = dev_get_drvdata(dev); 2642 2606 struct intel8x0 *chip = card->private_data; 2643 2607 int i; 2644 2608 2645 2609 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2646 for (i = 0; i < chip->pcm_devs; i++)2647 snd_pcm_suspend_all(chip->pcm[i]);2648 /* clear nocache */2649 if (chip->fix_nocache) {2650 for (i = 0; i < chip->bdbars_count; i++) {2651 struct ichdev *ichdev = &chip->ichd[i];2652 if (ichdev->substream && ichdev->page_attr_changed) {2653 struct snd_pcm_runtime *runtime = ichdev->substream->runtime;2654 if (runtime->dma_area)2655 fill_nocache(runtime->dma_area, runtime->dma_bytes, 0);2656 }2657 }2658 }2659 2610 for (i = 0; i < chip->ncodecs; i++) 2660 2611 snd_ac97_suspend(chip->ac97[i]); … … 2666 2617 chip->irq = -1; 2667 2618 } 2668 pci_disable_device(pci);2669 pci_save_state(pci);2670 /* The call below may disable built-in speaker on some laptops2671 * after S2RAM. So, don't touch it.2672 */2673 /* pci_set_power_state(pci, pci_choose_state(pci, state)); */2674 2619 return 0; 2675 2620 } 2676 2621 2677 static int intel8x0_resume(struct pci_dev *pci) 2678 { 2679 struct snd_card *card = pci_get_drvdata(pci); 2622 static int intel8x0_resume(struct device *dev) 2623 { 2624 struct pci_dev *pci = to_pci_dev(dev); 2625 struct snd_card *card = dev_get_drvdata(dev); 2680 2626 struct intel8x0 *chip = card->private_data; 2681 2627 int i; 2682 2628 2683 pci_set_power_state(pci, PCI_D0);2684 pci_restore_state(pci);2685 if (pci_enable_device(pci) < 0) {2686 printk(KERN_ERR "intel8x0: pci_enable_device failed, "2687 "disabling device\n");2688 snd_card_disconnect(card);2689 return -EIO;2690 }2691 pci_set_master(pci);2692 2629 snd_intel8x0_chip_init(chip, 0); 2693 2630 if (request_irq(pci->irq, snd_intel8x0_interrupt, 2694 2631 IRQF_SHARED, KBUILD_MODNAME, chip)) { 2695 printk(KERN_ERR "intel8x0: unable to grab IRQ %d, "2696 "disabling device\n",pci->irq);2632 dev_err(dev, "unable to grab IRQ %d, disabling device\n", 2633 pci->irq); 2697 2634 snd_card_disconnect(card); 2698 2635 return -EIO; … … 2711 2648 } 2712 2649 2713 /* refill nocache */2714 if (chip->fix_nocache)2715 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1);2716 2717 2650 for (i = 0; i < chip->ncodecs; i++) 2718 2651 snd_ac97_resume(chip->ac97[i]); 2719 2720 /* refill nocache */2721 if (chip->fix_nocache) {2722 for (i = 0; i < chip->bdbars_count; i++) {2723 struct ichdev *ichdev = &chip->ichd[i];2724 if (ichdev->substream && ichdev->page_attr_changed) {2725 struct snd_pcm_runtime *runtime = ichdev->substream->runtime;2726 if (runtime->dma_area)2727 fill_nocache(runtime->dma_area, runtime->dma_bytes, 1);2728 }2729 }2730 }2731 2652 2732 2653 /* resume status */ … … 2747 2668 return 0; 2748 2669 } 2749 #endif /* CONFIG_PM */ 2670 2671 static SIMPLE_DEV_PM_OPS(intel8x0_pm, intel8x0_suspend, intel8x0_resume); 2672 #define INTEL8X0_PM_OPS &intel8x0_pm 2673 #else 2674 #define INTEL8X0_PM_OPS NULL 2675 #endif /* CONFIG_PM_SLEEP */ 2750 2676 2751 2677 #define INTEL8X0_TESTBUF_SIZE 32768 /* enough large for one shot */ 2752 2678 2753 static void __devinitintel8x0_measure_ac97_clock(struct intel8x0 *chip)2679 static void intel8x0_measure_ac97_clock(struct intel8x0 *chip) 2754 2680 { 2755 2681 struct snd_pcm_substream *subs; … … 2758 2684 unsigned long pos, pos1, t; 2759 2685 int civ, timeout = 1000, attempt = 1; 2686 #ifndef TARGET_OS2 2687 ktime_t start_time, stop_time; 2688 #else 2760 2689 struct timespec start_time, stop_time; 2690 #endif 2761 2691 2762 2692 if (chip->ac97_bus->clock != 48000) … … 2766 2696 subs = chip->pcm[0]->streams[0].substream; 2767 2697 if (! subs || subs->dma_buffer.bytes < INTEL8X0_TESTBUF_SIZE) { 2768 snd_printk(KERN_WARNING "no playback buffer allocated - aborting measure ac97 clock\n"); 2698 dev_warn(chip->card->dev, 2699 "no playback buffer allocated - aborting measure ac97 clock\n"); 2769 2700 return; 2770 2701 } … … 2776 2707 /* set rate */ 2777 2708 if (snd_ac97_set_rate(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 48000) < 0) { 2778 snd_printk(KERN_ERR "cannot set ac97 rate: clock = %d\n", chip->ac97_bus->clock); 2709 dev_err(chip->card->dev, "cannot set ac97 rate: clock = %d\n", 2710 chip->ac97_bus->clock); 2779 2711 return; 2780 2712 } … … 2790 2722 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot); 2791 2723 } 2724 #ifndef TARGET_OS2 2725 start_time = ktime_get(); 2726 #else 2792 2727 do_posix_clock_monotonic_gettime(&start_time); 2728 #endif 2793 2729 spin_unlock_irq(&chip->reg_lock); 2794 2730 msleep(50); … … 2814 2750 } 2815 2751 chip->in_measurement = 0; 2752 #ifndef TARGET_OS2 2753 stop_time = ktime_get(); 2754 #else 2816 2755 do_posix_clock_monotonic_gettime(&stop_time); 2756 #endif 2817 2757 /* stop */ 2818 2758 if (chip->device_type == DEVICE_ALI) { … … 2830 2770 2831 2771 if (pos == 0) { 2832 snd_printk(KERN_ERR "intel8x0: measure - unreliable DMA position..\n"); 2772 dev_err(chip->card->dev, 2773 "measure - unreliable DMA position..\n"); 2833 2774 __retry: 2834 2775 if (attempt < 3) { … … 2841 2782 2842 2783 pos /= 4; 2784 #ifndef TARGET_OS2 2785 t = ktime_us_delta(stop_time, start_time); 2786 #else 2843 2787 t = stop_time.tv_sec - start_time.tv_sec; 2844 2788 t *= 1000000; 2845 2789 t += (stop_time.tv_nsec - start_time.tv_nsec) / 1000; 2846 printk(KERN_INFO "%s: measured %lu usecs (%lu samples)\n", __func__, t, pos); 2790 dprintf(("%s: measured %lu usecs (%lu samples)\n", __func__, t, pos)); 2791 #endif 2792 dev_info(chip->card->dev, 2793 "%s: measured %lu usecs (%lu samples)\n", __func__, t, pos); 2847 2794 if (t == 0) { 2848 snd_printk(KERN_ERR "intel8x0:?? calculation error..\n");2795 dev_err(chip->card->dev, "?? calculation error..\n"); 2849 2796 goto __retry; 2850 2797 } … … 2853 2800 if (pos < 40000 || pos >= 60000) { 2854 2801 /* abnormal value. hw problem? */ 2855 printk(KERN_INFO "intel8x0:measured clock %ld rejected\n", pos);2802 dev_info(chip->card->dev, "measured clock %ld rejected\n", pos); 2856 2803 goto __retry; 2857 2804 } else if (pos > 40500 && pos < 41500) … … 2865 2812 chip->ac97_bus->clock = (chip->ac97_bus->clock * 48000) / pos; 2866 2813 __end: 2867 printk(KERN_INFO "intel8x0:clocking to %d\n", chip->ac97_bus->clock);2814 dev_info(chip->card->dev, "clocking to %d\n", chip->ac97_bus->clock); 2868 2815 snd_ac97_update_power(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 0); 2869 2816 } 2870 2817 2871 static struct snd_pci_quirk intel8x0_clock_list[] __devinitdata= {2818 static struct snd_pci_quirk intel8x0_clock_list[] = { 2872 2819 SND_PCI_QUIRK(0x0e11, 0x008a, "AD1885", 41000), 2873 2820 SND_PCI_QUIRK(0x1014, 0x0581, "AD1981B", 48000), … … 2879 2826 }; 2880 2827 2881 static int __devinitintel8x0_in_clock_list(struct intel8x0 *chip)2828 static int intel8x0_in_clock_list(struct intel8x0 *chip) 2882 2829 { 2883 2830 struct pci_dev *pci = chip->pci; … … 2887 2834 if (!wl) 2888 2835 return 0; 2889 printk(KERN_INFO "intel8x0:white list rate for %04x:%04x is %i\n",2836 dev_info(chip->card->dev, "white list rate for %04x:%04x is %i\n", 2890 2837 pci->subsystem_vendor, pci->subsystem_device, wl->value); 2891 2838 chip->ac97_bus->clock = wl->value; … … 2893 2840 } 2894 2841 2895 #ifdef CONFIG_PROC_FS2896 2842 static void snd_intel8x0_proc_read(struct snd_info_entry * entry, 2897 2843 struct snd_info_buffer *buffer) … … 2928 2874 } 2929 2875 2930 static void __devinit snd_intel8x0_proc_init(struct intel8x0 * chip) 2931 { 2932 struct snd_info_entry *entry; 2933 2934 if (! snd_card_proc_new(chip->card, "intel8x0", &entry)) 2935 snd_info_set_text_ops(entry, chip, snd_intel8x0_proc_read); 2936 } 2937 #else 2938 #define snd_intel8x0_proc_init(x) 2939 #endif 2876 static void snd_intel8x0_proc_init(struct intel8x0 *chip) 2877 { 2878 snd_card_ro_proc_new(chip->card, "intel8x0", chip, 2879 snd_intel8x0_proc_read); 2880 } 2940 2881 2941 2882 static int snd_intel8x0_dev_free(struct snd_device *device) … … 2957 2898 }; 2958 2899 2959 static int __devinitsnd_intel8x0_inside_vm(struct pci_dev *pci)2900 static int snd_intel8x0_inside_vm(struct pci_dev *pci) 2960 2901 { 2961 2902 int result = inside_vm; … … 2968 2909 } 2969 2910 2970 /* detect KVM and Parallels virtual environments */2971 result = kvm_para_available();2972 #ifdef X86_FEATURE_HYPERVISOR2973 result = result || boot_cpu_has(X86_FEATURE_HYPERVISOR);2974 #endif2975 if (!result)2976 goto fini;2977 2978 2911 /* check for known (emulated) devices */ 2979 if (pci->subsystem_vendor == 0x1af4 && 2980 pci->subsystem_device == 0x1100) { 2912 result = 0; 2913 if (pci->subsystem_vendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET && 2914 pci->subsystem_device == PCI_SUBDEVICE_ID_QEMU) { 2981 2915 /* KVM emulated sound, PCI SSID: 1af4:1100 */ 2982 2916 msg = "enable KVM"; 2917 result = 1; 2983 2918 } else if (pci->subsystem_vendor == 0x1ab8) { 2984 2919 /* Parallels VM emulated sound, PCI SSID: 1ab8:xxxx */ 2985 2920 msg = "enable Parallels VM"; 2986 } else { 2987 msg = "disable (unknown or VT-d) VM"; 2988 result = 0; 2921 result = 1; 2989 2922 } 2990 2923 2991 2924 fini: 2992 2925 if (msg != NULL) 2993 printk(KERN_INFO "intel8x0:%s optimization\n", msg);2926 dev_info(&pci->dev, "%s optimization\n", msg); 2994 2927 2995 2928 return result; 2996 2929 } 2997 2930 2998 static int __devinitsnd_intel8x0_create(struct snd_card *card,2999 3000 3001 struct intel8x0 **r_intel8x0)2931 static int snd_intel8x0_create(struct snd_card *card, 2932 struct pci_dev *pci, 2933 unsigned long device_type, 2934 struct intel8x0 **r_intel8x0) 3002 2935 { 3003 2936 struct intel8x0 *chip; … … 3065 2998 chip->inside_vm = snd_intel8x0_inside_vm(pci); 3066 2999 3000 /* 3001 * Intel 82443MX running a 100MHz processor system bus has a hardware 3002 * bug, which aborts PCI busmaster for audio transfer. A workaround 3003 * is to set the pages as non-cached. For details, see the errata in 3004 * http://download.intel.com/design/chipsets/specupdt/24505108.pdf 3005 */ 3067 3006 if (pci->vendor == PCI_VENDOR_ID_INTEL && 3068 3007 pci->device == PCI_DEVICE_ID_INTEL_440MX) … … 3086 3025 chip->addr = pci_iomap(pci, 0, 0); 3087 3026 if (!chip->addr) { 3088 snd_printk(KERN_ERR"AC'97 space ioremap problem\n");3027 dev_err(card->dev, "AC'97 space ioremap problem\n"); 3089 3028 snd_intel8x0_free(chip); 3090 3029 return -EIO; … … 3094 3033 else 3095 3034 chip->bmaddr = pci_iomap(pci, 1, 0); 3035 3036 port_inited: 3096 3037 if (!chip->bmaddr) { 3097 snd_printk(KERN_ERR"Controller space ioremap problem\n");3038 dev_err(card->dev, "Controller space ioremap problem\n"); 3098 3039 snd_intel8x0_free(chip); 3099 3040 return -EIO; 3100 3041 } 3101 3102 port_inited:3103 3042 chip->bdbars_count = bdbars[device_type]; 3104 3043 … … 3136 3075 /* allocate buffer descriptor lists */ 3137 3076 /* the start of each lists must be aligned to 8 bytes */ 3138 if (snd_dma_alloc_pages( SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),3077 if (snd_dma_alloc_pages(intel8x0_dma_type(chip), snd_dma_pci_data(pci), 3139 3078 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, 3140 3079 &chip->bdbars) < 0) { 3141 3080 snd_intel8x0_free(chip); 3142 snd_printk(KERN_ERR "intel8x0:cannot allocate buffer descriptors\n");3081 dev_err(card->dev, "cannot allocate buffer descriptors\n"); 3143 3082 return -ENOMEM; 3144 3083 } 3145 3084 /* tables must be aligned to 8 bytes here, but the kernel pages 3146 3085 are much bigger, so we don't care (on i386) */ 3147 /* workaround for 440MX */3148 if (chip->fix_nocache)3149 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1);3150 3086 int_sta_masks = 0; 3151 3087 for (i = 0; i < chip->bdbars_count; i++) { 3152 3088 ichdev = &chip->ichd[i]; 3153 ichdev->bdbar = (( u32 *)chip->bdbars.area) +3089 ichdev->bdbar = ((__le32 *)chip->bdbars.area) + 3154 3090 (i * ICH_MAX_FRAGS * 2); 3155 3091 ichdev->bdbar_addr = chip->bdbars.addr + … … 3194 3130 if (request_irq(pci->irq, snd_intel8x0_interrupt, 3195 3131 IRQF_SHARED, KBUILD_MODNAME, chip)) { 3196 snd_printk(KERN_ERR"unable to grab IRQ %d\n", pci->irq);3132 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 3197 3133 snd_intel8x0_free(chip); 3198 3134 return -EBUSY; … … 3205 3141 } 3206 3142 3207 snd_card_set_dev(card, &pci->dev);3208 3209 3143 *r_intel8x0 = chip; 3210 3144 return 0; … … 3214 3148 unsigned int id; 3215 3149 const char *s; 3216 } shortnames[] __devinitdata= {3150 } shortnames[] = { 3217 3151 { PCI_DEVICE_ID_INTEL_82801AA_5, "Intel 82801AA-ICH" }, 3218 3152 { PCI_DEVICE_ID_INTEL_82801AB_5, "Intel 82901AB-ICH0" }, … … 3240 3174 }; 3241 3175 3242 #ifdef NOT_USED 3243 static struct snd_pci_quirk spdif_aclink_defaults[] __devinitdata = { 3176 static struct snd_pci_quirk spdif_aclink_defaults[] = { 3244 3177 SND_PCI_QUIRK(0x147b, 0x1c1a, "ASUS KN8", 1), 3245 3178 {0} /* end */ 3246 3179 }; 3247 #endif3248 3180 3249 3181 /* look up white/black list for SPDIF over ac-link */ 3250 static int __devinitcheck_default_spdif_aclink(struct pci_dev *pci)3182 static int check_default_spdif_aclink(struct pci_dev *pci) 3251 3183 { 3252 3184 #ifndef TARGET_OS2 … … 3256 3188 if (w) { 3257 3189 if (w->value) 3258 snd_printdd(KERN_INFO "intel8x0: Using SPDIF over " 3259 "AC-Link for %s\n", w->name); 3190 dev_dbg(&pci->dev, 3191 "Using SPDIF over AC-Link for %s\n", 3192 snd_pci_quirk_name(w)); 3260 3193 else 3261 snd_printdd(KERN_INFO "intel8x0: Using integrated " 3262 "SPDIF DMA for %s\n", w->name); 3194 dev_dbg(&pci->dev, 3195 "Using integrated SPDIF DMA for %s\n", 3196 snd_pci_quirk_name(w)); 3263 3197 return w->value; 3264 3198 } … … 3267 3201 } 3268 3202 3269 static int __devinitsnd_intel8x0_probe(struct pci_dev *pci,3270 3203 static int snd_intel8x0_probe(struct pci_dev *pci, 3204 const struct pci_device_id *pci_id) 3271 3205 { 3272 3206 struct snd_card *card; … … 3275 3209 struct shortname_table *name; 3276 3210 3277 err = snd_card_ create(index, id, THIS_MODULE, 0, &card);3211 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); 3278 3212 if (err < 0) 3279 3213 return err; … … 3350 3284 } 3351 3285 3352 static void __devexitsnd_intel8x0_remove(struct pci_dev *pci)3286 static void snd_intel8x0_remove(struct pci_dev *pci) 3353 3287 { 3354 3288 snd_card_free(pci_get_drvdata(pci)); 3355 pci_set_drvdata(pci, NULL); 3356 } 3357 3358 static struct pci_driver driver = { 3289 } 3290 3291 static struct pci_driver intel8x0_driver = { 3359 3292 .name = KBUILD_MODNAME, 3360 3293 .id_table = snd_intel8x0_ids, 3361 3294 .probe = snd_intel8x0_probe, 3362 .remove = __devexit_p(snd_intel8x0_remove), 3363 #ifdef CONFIG_PM 3364 .suspend = intel8x0_suspend, 3365 .resume = intel8x0_resume, 3366 #endif 3367 }; 3368 3369 3370 static int __init alsa_card_intel8x0_init(void) 3371 { 3372 return pci_register_driver(&driver); 3373 } 3374 3375 static void __exit alsa_card_intel8x0_exit(void) 3376 { 3377 pci_unregister_driver(&driver); 3378 } 3379 3380 module_init(alsa_card_intel8x0_init) 3381 module_exit(alsa_card_intel8x0_exit) 3295 .remove = snd_intel8x0_remove, 3296 .driver = { 3297 .pm = INTEL8X0_PM_OPS, 3298 }, 3299 }; 3300 3301 module_pci_driver(intel8x0_driver);
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