Changeset 267 for GPL/trunk/alsa-kernel/pci

Timestamp:

Nov 8, 2007, 4:47:51 AM (18 years ago)

Author:

Brendan Oakley

Message:

Fix HDA buffering in Uniaud32, from Pavel

File:

• GPL/trunk/alsa-kernel/pci/hda/hda_intel.c (modified) (7 diffs)

GPL/trunk/alsa-kernel/pci/hda/hda_intel.c

@@ -256 +256 @@
 
 struct azx_dev {
-        u32 *bdl;                       /* virtual address of the BDL */
+#ifdef TARGET_OS2
+        volatile u32 *bdl;                      /* virtual address of the BDL */
         dma_addr_t bdl_addr;            /* physical address of the BDL */
-        u32 *posbuf;                    /* position buffer pointer */
+        volatile u32 *posbuf;                   /* position buffer pointer */
+#else /* !TARGET_OS2 */
+        u32 *bdl;               /* virtual address of the BDL */
+        dma_addr_t bdl_addr;    /* physical address of the BDL */
+        u32 *posbuf;            /* position buffer pointer */
+#endif /* !TARGET_OS2 */
 
         unsigned int bufsize;           /* size of the play buffer in bytes */
@@ -265 +271 @@
         unsigned int fifo_size;         /* FIFO size */
 
-        void __iomem *sd_addr;          /* stream descriptor pointer */
+#ifdef TARGET_OS2
+        volatile void __iomem *sd_addr;         /* stream descriptor pointer */
+#else /* !TARGET_OS2 */
+        void __iomem *sd_addr;  /* stream descriptor pointer */
+#endif /* !TARGET_OS2 */
 
         u32 sd_int_sta_mask;            /* stream int status mask */
@@ -283 +293 @@
 /* CORB/RIRB */
 struct azx_rb {
+#ifdef TARGET_OS2
+        volatile u32 *buf;              /* CORB/RIRB buffer
+#else /* !TARGET_OS2 */
         u32 *buf;               /* CORB/RIRB buffer
+#endif /* !TARGET_OS2 */
                                  * Each CORB entry is 4byte, RIRB is 8byte
                                  */
@@ -307 +321 @@
         /* pci resources */
         unsigned long addr;
+#ifdef TARGET_OS2
+        volatile void __iomem *remap_addr;
+#else /* !TARGET_OS2 */
         void __iomem *remap_addr;
+#endif /* !TARGET_OS2 */
         int irq;
 
@@ -880 +898 @@
 static void azx_setup_periods(struct azx_dev *azx_dev)
 {
+#ifdef TARGET_OS2
+        volatile u32 *bdl = azx_dev->bdl;
+#else /* !TARGET_OS2 */
         u32 *bdl = azx_dev->bdl;
+#endif /* !TARGET_OS2 */
         dma_addr_t dma_addr = azx_dev->substream->runtime->dma_addr;
         int idx;
@@ -1196 +1218 @@
             cmd == SNDRV_PCM_TRIGGER_SUSPEND ||
             cmd == SNDRV_PCM_TRIGGER_STOP) {
+#ifndef TARGET_OS2
                 int timeout = 5000;
+#else /* TARGET_OS2 */
+                int timeout = 100000;
+#endif /* TARGET_OS2 */
                 while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout)
                         ;
@@ -1482 +1508 @@
                 pci_disable_msi(chip->pci);
         if (chip->remap_addr)
+#ifdef TARGET_OS2
+                iounmap((void *)chip->remap_addr);
+#else /* !TARGET_OS2 */
                 iounmap(chip->remap_addr);
+#endif /* !TARGET_OS2 */
 
         if (chip->bdl.area)