Changeset 267
- Timestamp:
- Nov 8, 2007, 4:47:51 AM (18 years ago)
- Location:
- GPL/trunk
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
GPL/trunk/alsa-kernel/pci/hda/hda_intel.c
r130 r267 256 256 257 257 struct azx_dev { 258 u32 *bdl; /* virtual address of the BDL */ 258 #ifdef TARGET_OS2 259 volatile u32 *bdl; /* virtual address of the BDL */ 259 260 dma_addr_t bdl_addr; /* physical address of the BDL */ 260 u32 *posbuf; /* position buffer pointer */ 261 volatile u32 *posbuf; /* position buffer pointer */ 262 #else /* !TARGET_OS2 */ 263 u32 *bdl; /* virtual address of the BDL */ 264 dma_addr_t bdl_addr; /* physical address of the BDL */ 265 u32 *posbuf; /* position buffer pointer */ 266 #endif /* !TARGET_OS2 */ 261 267 262 268 unsigned int bufsize; /* size of the play buffer in bytes */ … … 265 271 unsigned int fifo_size; /* FIFO size */ 266 272 267 void __iomem *sd_addr; /* stream descriptor pointer */ 273 #ifdef TARGET_OS2 274 volatile void __iomem *sd_addr; /* stream descriptor pointer */ 275 #else /* !TARGET_OS2 */ 276 void __iomem *sd_addr; /* stream descriptor pointer */ 277 #endif /* !TARGET_OS2 */ 268 278 269 279 u32 sd_int_sta_mask; /* stream int status mask */ … … 283 293 /* CORB/RIRB */ 284 294 struct azx_rb { 295 #ifdef TARGET_OS2 296 volatile u32 *buf; /* CORB/RIRB buffer 297 #else /* !TARGET_OS2 */ 285 298 u32 *buf; /* CORB/RIRB buffer 299 #endif /* !TARGET_OS2 */ 286 300 * Each CORB entry is 4byte, RIRB is 8byte 287 301 */ … … 307 321 /* pci resources */ 308 322 unsigned long addr; 323 #ifdef TARGET_OS2 324 volatile void __iomem *remap_addr; 325 #else /* !TARGET_OS2 */ 309 326 void __iomem *remap_addr; 327 #endif /* !TARGET_OS2 */ 310 328 int irq; 311 329 … … 880 898 static void azx_setup_periods(struct azx_dev *azx_dev) 881 899 { 900 #ifdef TARGET_OS2 901 volatile u32 *bdl = azx_dev->bdl; 902 #else /* !TARGET_OS2 */ 882 903 u32 *bdl = azx_dev->bdl; 904 #endif /* !TARGET_OS2 */ 883 905 dma_addr_t dma_addr = azx_dev->substream->runtime->dma_addr; 884 906 int idx; … … 1196 1218 cmd == SNDRV_PCM_TRIGGER_SUSPEND || 1197 1219 cmd == SNDRV_PCM_TRIGGER_STOP) { 1220 #ifndef TARGET_OS2 1198 1221 int timeout = 5000; 1222 #else /* TARGET_OS2 */ 1223 int timeout = 100000; 1224 #endif /* TARGET_OS2 */ 1199 1225 while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout) 1200 1226 ; … … 1482 1508 pci_disable_msi(chip->pci); 1483 1509 if (chip->remap_addr) 1510 #ifdef TARGET_OS2 1511 iounmap((void *)chip->remap_addr); 1512 #else /* !TARGET_OS2 */ 1484 1513 iounmap(chip->remap_addr); 1514 #endif /* !TARGET_OS2 */ 1485 1515 1486 1516 if (chip->bdl.area) -
GPL/trunk/lib32/sound.c
r130 r267 1072 1072 int ret, align, size1, ret1; 1073 1073 LONG transferred; 1074 ULONG position ;1074 ULONG position,i; 1075 1075 char *buf; 1076 1076 int toret = 0; … … 1140 1140 while(TRUE) { 1141 1141 again: 1142 for ( i=0; i < 10000; i++) 1143 { 1144 ret1 = pHandle->file.f_op->ioctl(&pHandle->inode, &pHandle->file, SNDRV_PCM_IOCTL_STATUS, (ULONG)__Stack32ToFlat(&status)); 1145 if ( status.state != SNDRV_PCM_STATE_XRUN ) break; 1146 } 1147 if ( i > 9998 ) 1148 { 1149 printk("timeout stat %x avail:%i:%i \n",status.state,samples_to_bytes(status.avail),status.avail); 1150 ret1 = pHandle->file.f_op->ioctl(&pHandle->inode, &pHandle->file, SNDRV_PCM_IOCTL_PREPARE, 0); 1151 ret1 = pHandle->file.f_op->ioctl(&pHandle->inode, &pHandle->file, SNDRV_PCM_IOCTL_STATUS, (ULONG)__Stack32ToFlat(&status)); 1152 } 1142 1153 ret = pHandle->file.f_op->write(&pHandle->file, (char *)buffer, size, &pHandle->file.f_pos); 1143 1154 if(ret < 0) { … … 1153 1164 printk("OSS32_WaveAddBuffer failed on partial transfer %x %i; ret = %i\n", buffer, size, ret); 1154 1165 *pTransferred = transferred; 1155 if (toret )1166 if (toret > 4) 1156 1167 return OSSERR_SUCCESS; /* avoid infinite loop */ 1157 toret = 1;1168 toret++; 1158 1169 goto again; 1159 1170 }
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