source: GPL/trunk/alsa-kernel/pci/es1938.c@ 777

Last change on this file since 777 was 777, checked in by David Azarewicz, 5 months ago

Merge from uniaud32-exp branch
File size: 55.4 KB
Line 
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5 * Jaroslav Kysela <perex@perex.cz>,
6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34#ifdef TARGET_OS2
35#define KBUILD_MODNAME "es1938"
36#endif
37
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/gameport.h>
43#include <linux/module.h>
44#include <linux/delay.h>
45#include <linux/dma-mapping.h>
46#include <linux/io.h>
47#include <sound/core.h>
48#include <sound/control.h>
49#include <sound/pcm.h>
50#include <sound/opl3.h>
51#include <sound/mpu401.h>
52#include <sound/initval.h>
53#include <sound/tlv.h>
54
55MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
56MODULE_DESCRIPTION("ESS Solo-1");
57MODULE_LICENSE("GPL");
58
59#if IS_REACHABLE(CONFIG_GAMEPORT)
60#define SUPPORT_JOYSTICK 1
61#endif
62
63static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
64static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
65static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
66
67module_param_array(index, int, NULL, 0444);
68MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
69module_param_array(id, charp, NULL, 0444);
70MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
71module_param_array(enable, bool, NULL, 0444);
72MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
73
74#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
75
76#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
77
78#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
79
80#define SL_PCI_LEGACYCONTROL 0x40
81#define SL_PCI_CONFIG 0x50
82#define SL_PCI_DDMACONTROL 0x60
83
84#define ESSIO_REG_AUDIO2DMAADDR 0
85#define ESSIO_REG_AUDIO2DMACOUNT 4
86#define ESSIO_REG_AUDIO2MODE 6
87#define ESSIO_REG_IRQCONTROL 7
88
89#define ESSDM_REG_DMAADDR 0x00
90#define ESSDM_REG_DMACOUNT 0x04
91#define ESSDM_REG_DMACOMMAND 0x08
92#define ESSDM_REG_DMASTATUS 0x08
93#define ESSDM_REG_DMAMODE 0x0b
94#define ESSDM_REG_DMACLEAR 0x0d
95#define ESSDM_REG_DMAMASK 0x0f
96
97#define ESSSB_REG_FMLOWADDR 0x00
98#define ESSSB_REG_FMHIGHADDR 0x02
99#define ESSSB_REG_MIXERADDR 0x04
100#define ESSSB_REG_MIXERDATA 0x05
101
102#define ESSSB_IREG_AUDIO1 0x14
103#define ESSSB_IREG_MICMIX 0x1a
104#define ESSSB_IREG_RECSRC 0x1c
105#define ESSSB_IREG_MASTER 0x32
106#define ESSSB_IREG_FM 0x36
107#define ESSSB_IREG_AUXACD 0x38
108#define ESSSB_IREG_AUXB 0x3a
109#define ESSSB_IREG_PCSPEAKER 0x3c
110#define ESSSB_IREG_LINE 0x3e
111#define ESSSB_IREG_SPATCONTROL 0x50
112#define ESSSB_IREG_SPATLEVEL 0x52
113#define ESSSB_IREG_MASTER_LEFT 0x60
114#define ESSSB_IREG_MASTER_RIGHT 0x62
115#define ESSSB_IREG_MPU401CONTROL 0x64
116#define ESSSB_IREG_MICMIXRECORD 0x68
117#define ESSSB_IREG_AUDIO2RECORD 0x69
118#define ESSSB_IREG_AUXACDRECORD 0x6a
119#define ESSSB_IREG_FMRECORD 0x6b
120#define ESSSB_IREG_AUXBRECORD 0x6c
121#define ESSSB_IREG_MONO 0x6d
122#define ESSSB_IREG_LINERECORD 0x6e
123#define ESSSB_IREG_MONORECORD 0x6f
124#define ESSSB_IREG_AUDIO2SAMPLE 0x70
125#define ESSSB_IREG_AUDIO2MODE 0x71
126#define ESSSB_IREG_AUDIO2FILTER 0x72
127#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
128#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
129#define ESSSB_IREG_AUDIO2CONTROL1 0x78
130#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
131#define ESSSB_IREG_AUDIO2 0x7c
132
133#define ESSSB_REG_RESET 0x06
134
135#define ESSSB_REG_READDATA 0x0a
136#define ESSSB_REG_WRITEDATA 0x0c
137#define ESSSB_REG_READSTATUS 0x0c
138
139#define ESSSB_REG_STATUS 0x0e
140
141#define ESS_CMD_EXTSAMPLERATE 0xa1
142#define ESS_CMD_FILTERDIV 0xa2
143#define ESS_CMD_DMACNTRELOADL 0xa4
144#define ESS_CMD_DMACNTRELOADH 0xa5
145#define ESS_CMD_ANALOGCONTROL 0xa8
146#define ESS_CMD_IRQCONTROL 0xb1
147#define ESS_CMD_DRQCONTROL 0xb2
148#define ESS_CMD_RECLEVEL 0xb4
149#define ESS_CMD_SETFORMAT 0xb6
150#define ESS_CMD_SETFORMAT2 0xb7
151#define ESS_CMD_DMACONTROL 0xb8
152#define ESS_CMD_DMATYPE 0xb9
153#define ESS_CMD_OFFSETLEFT 0xba
154#define ESS_CMD_OFFSETRIGHT 0xbb
155#define ESS_CMD_READREG 0xc0
156#define ESS_CMD_ENABLEEXT 0xc6
157#define ESS_CMD_PAUSEDMA 0xd0
158#define ESS_CMD_ENABLEAUDIO1 0xd1
159#define ESS_CMD_STOPAUDIO1 0xd3
160#define ESS_CMD_AUDIO1STATUS 0xd8
161#define ESS_CMD_CONTDMA 0xd4
162#define ESS_CMD_TESTIRQ 0xf2
163
164#define ESS_RECSRC_MIC 0
165#define ESS_RECSRC_AUXACD 2
166#define ESS_RECSRC_AUXB 5
167#define ESS_RECSRC_LINE 6
168#define ESS_RECSRC_NONE 7
169
170#define DAC1 0x01
171#define ADC1 0x02
172#define DAC2 0x04
173
174/*
175
176 */
177
178#define SAVED_REG_SIZE 32 /* max. number of registers to save */
179
180struct es1938 {
181 int irq;
182
183 unsigned long io_port;
184 unsigned long sb_port;
185 unsigned long vc_port;
186 unsigned long mpu_port;
187 unsigned long game_port;
188 unsigned long ddma_port;
189
190 unsigned char irqmask;
191 unsigned char revision;
192
193 struct snd_kcontrol *hw_volume;
194 struct snd_kcontrol *hw_switch;
195 struct snd_kcontrol *master_volume;
196 struct snd_kcontrol *master_switch;
197
198 struct pci_dev *pci;
199 struct snd_card *card;
200 struct snd_pcm *pcm;
201 struct snd_pcm_substream *capture_substream;
202 struct snd_pcm_substream *playback1_substream;
203 struct snd_pcm_substream *playback2_substream;
204 struct snd_rawmidi *rmidi;
205
206 unsigned int dma1_size;
207 unsigned int dma2_size;
208 unsigned int dma1_start;
209 unsigned int dma2_start;
210 unsigned int dma1_shift;
211 unsigned int dma2_shift;
212 unsigned int last_capture_dmaaddr;
213 unsigned int active;
214
215 spinlock_t reg_lock;
216 spinlock_t mixer_lock;
217 struct snd_info_entry *proc_entry;
218
219#ifdef SUPPORT_JOYSTICK
220 struct gameport *gameport;
221#endif
222 unsigned char saved_regs[SAVED_REG_SIZE];
223};
224
225static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
226
227static const struct pci_device_id snd_es1938_ids[] = {
228 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
229 { 0, }
230};
231
232MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
233
234#define RESET_LOOP_TIMEOUT 0x10000
235#define WRITE_LOOP_TIMEOUT 0x10000
236#define GET_LOOP_TIMEOUT 0x01000
237
238/* -----------------------------------------------------------------
239 * Write to a mixer register
240 * -----------------------------------------------------------------*/
241static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
242{
243 unsigned long flags;
244 spin_lock_irqsave(&chip->mixer_lock, flags);
245 outb(reg, SLSB_REG(chip, MIXERADDR));
246 outb(val, SLSB_REG(chip, MIXERDATA));
247 spin_unlock_irqrestore(&chip->mixer_lock, flags);
248 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
249}
250
251/* -----------------------------------------------------------------
252 * Read from a mixer register
253 * -----------------------------------------------------------------*/
254static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
255{
256 int data;
257 unsigned long flags;
258 spin_lock_irqsave(&chip->mixer_lock, flags);
259 outb(reg, SLSB_REG(chip, MIXERADDR));
260 data = inb(SLSB_REG(chip, MIXERDATA));
261 spin_unlock_irqrestore(&chip->mixer_lock, flags);
262 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
263 return data;
264}
265
266/* -----------------------------------------------------------------
267 * Write to some bits of a mixer register (return old value)
268 * -----------------------------------------------------------------*/
269static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
270 unsigned char mask, unsigned char val)
271{
272 unsigned long flags;
273 unsigned char old, new, oval;
274 spin_lock_irqsave(&chip->mixer_lock, flags);
275 outb(reg, SLSB_REG(chip, MIXERADDR));
276 old = inb(SLSB_REG(chip, MIXERDATA));
277 oval = old & mask;
278 if (val != oval) {
279 new = (old & ~mask) | (val & mask);
280 outb(new, SLSB_REG(chip, MIXERDATA));
281 dev_dbg(chip->card->dev,
282 "Mixer reg %02x was %02x, set to %02x\n",
283 reg, old, new);
284 }
285 spin_unlock_irqrestore(&chip->mixer_lock, flags);
286 return oval;
287}
288
289/* -----------------------------------------------------------------
290 * Write command to Controller Registers
291 * -----------------------------------------------------------------*/
292static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
293{
294 int i;
295 unsigned char v;
296 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
297 v = inb(SLSB_REG(chip, READSTATUS));
298 if (!(v & 0x80)) {
299 outb(cmd, SLSB_REG(chip, WRITEDATA));
300 return;
301 }
302 }
303 dev_err(chip->card->dev,
304 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
305}
306
307/* -----------------------------------------------------------------
308 * Read the Read Data Buffer
309 * -----------------------------------------------------------------*/
310static int snd_es1938_get_byte(struct es1938 *chip)
311{
312 int i;
313 unsigned char v;
314 for (i = GET_LOOP_TIMEOUT; i; i--) {
315 v = inb(SLSB_REG(chip, STATUS));
316 if (v & 0x80)
317 return inb(SLSB_REG(chip, READDATA));
318 }
319 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
320 return -ENODEV;
321}
322
323/* -----------------------------------------------------------------
324 * Write value cmd register
325 * -----------------------------------------------------------------*/
326static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
327{
328 unsigned long flags;
329 spin_lock_irqsave(&chip->reg_lock, flags);
330 snd_es1938_write_cmd(chip, reg);
331 snd_es1938_write_cmd(chip, val);
332 spin_unlock_irqrestore(&chip->reg_lock, flags);
333 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
334}
335
336/* -----------------------------------------------------------------
337 * Read data from cmd register and return it
338 * -----------------------------------------------------------------*/
339static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
340{
341 unsigned char val;
342 unsigned long flags;
343 spin_lock_irqsave(&chip->reg_lock, flags);
344 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
345 snd_es1938_write_cmd(chip, reg);
346 val = snd_es1938_get_byte(chip);
347 spin_unlock_irqrestore(&chip->reg_lock, flags);
348 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
349 return val;
350}
351
352/* -----------------------------------------------------------------
353 * Write data to cmd register and return old value
354 * -----------------------------------------------------------------*/
355static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
356 unsigned char val)
357{
358 unsigned long flags;
359 unsigned char old, new, oval;
360 spin_lock_irqsave(&chip->reg_lock, flags);
361 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
362 snd_es1938_write_cmd(chip, reg);
363 old = snd_es1938_get_byte(chip);
364 oval = old & mask;
365 if (val != oval) {
366 snd_es1938_write_cmd(chip, reg);
367 new = (old & ~mask) | (val & mask);
368 snd_es1938_write_cmd(chip, new);
369 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
370 reg, old, new);
371 }
372 spin_unlock_irqrestore(&chip->reg_lock, flags);
373 return oval;
374}
375
376/* --------------------------------------------------------------------
377 * Reset the chip
378 * --------------------------------------------------------------------*/
379static void snd_es1938_reset(struct es1938 *chip)
380{
381 int i;
382
383 outb(3, SLSB_REG(chip, RESET));
384 inb(SLSB_REG(chip, RESET));
385 outb(0, SLSB_REG(chip, RESET));
386 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
387 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
388 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
389 goto __next;
390 }
391 }
392 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
393
394 __next:
395 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
396
397 /* Demand transfer DMA: 4 bytes per DMA request */
398 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
399
400 /* Change behaviour of register A1
401 4x oversampling
402 2nd channel DAC asynchronous */
403 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
404 /* enable/select DMA channel and IRQ channel */
405 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
406 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
407 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
408 /* Set spatializer parameters to recommended values */
409 snd_es1938_mixer_write(chip, 0x54, 0x8f);
410 snd_es1938_mixer_write(chip, 0x56, 0x95);
411 snd_es1938_mixer_write(chip, 0x58, 0x94);
412 snd_es1938_mixer_write(chip, 0x5a, 0x80);
413}
414
415/* --------------------------------------------------------------------
416 * Reset the FIFOs
417 * --------------------------------------------------------------------*/
418static void snd_es1938_reset_fifo(struct es1938 *chip)
419{
420 outb(2, SLSB_REG(chip, RESET));
421 outb(0, SLSB_REG(chip, RESET));
422}
423
424static const struct snd_ratnum clocks[2] = {
425 {
426 .num = 793800,
427 .den_min = 1,
428 .den_max = 128,
429 .den_step = 1,
430 },
431 {
432 .num = 768000,
433 .den_min = 1,
434 .den_max = 128,
435 .den_step = 1,
436 }
437};
438
439static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
440 .nrats = 2,
441 .rats = clocks,
442};
443
444
445static void snd_es1938_rate_set(struct es1938 *chip,
446 struct snd_pcm_substream *substream,
447 int mode)
448{
449 unsigned int bits, div0;
450 struct snd_pcm_runtime *runtime = substream->runtime;
451 if (runtime->rate_num == clocks[0].num)
452 bits = 128 - runtime->rate_den;
453 else
454 bits = 256 - runtime->rate_den;
455
456 /* set filter register */
457 div0 = 256 - 7160000*20/(8*82*runtime->rate);
458
459 if (mode == DAC2) {
460 snd_es1938_mixer_write(chip, 0x70, bits);
461 snd_es1938_mixer_write(chip, 0x72, div0);
462 } else {
463 snd_es1938_write(chip, 0xA1, bits);
464 snd_es1938_write(chip, 0xA2, div0);
465 }
466}
467
468/* --------------------------------------------------------------------
469 * Configure Solo1 builtin DMA Controller
470 * --------------------------------------------------------------------*/
471
472static void snd_es1938_playback1_setdma(struct es1938 *chip)
473{
474 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
475 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
476 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
477 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
478}
479
480static void snd_es1938_playback2_setdma(struct es1938 *chip)
481{
482 /* Enable DMA controller */
483 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
484 /* 1. Master reset */
485 outb(0, SLDM_REG(chip, DMACLEAR));
486 /* 2. Mask DMA */
487 outb(1, SLDM_REG(chip, DMAMASK));
488 outb(0x18, SLDM_REG(chip, DMAMODE));
489 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
490 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
491 /* 3. Unmask DMA */
492 outb(0, SLDM_REG(chip, DMAMASK));
493}
494
495static void snd_es1938_capture_setdma(struct es1938 *chip)
496{
497 /* Enable DMA controller */
498 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
499 /* 1. Master reset */
500 outb(0, SLDM_REG(chip, DMACLEAR));
501 /* 2. Mask DMA */
502 outb(1, SLDM_REG(chip, DMAMASK));
503 outb(0x14, SLDM_REG(chip, DMAMODE));
504 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
505 chip->last_capture_dmaaddr = chip->dma1_start;
506 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
507 /* 3. Unmask DMA */
508 outb(0, SLDM_REG(chip, DMAMASK));
509}
510
511/* ----------------------------------------------------------------------
512 *
513 * *** PCM part ***
514 */
515
516static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
517 int cmd)
518{
519 struct es1938 *chip = snd_pcm_substream_chip(substream);
520 int val;
521 switch (cmd) {
522 case SNDRV_PCM_TRIGGER_START:
523 case SNDRV_PCM_TRIGGER_RESUME:
524 val = 0x0f;
525 chip->active |= ADC1;
526 break;
527 case SNDRV_PCM_TRIGGER_STOP:
528 case SNDRV_PCM_TRIGGER_SUSPEND:
529 val = 0x00;
530 chip->active &= ~ADC1;
531 break;
532 default:
533 return -EINVAL;
534 }
535 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
536 return 0;
537}
538
539static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
540 int cmd)
541{
542 struct es1938 *chip = snd_pcm_substream_chip(substream);
543 switch (cmd) {
544 case SNDRV_PCM_TRIGGER_START:
545 case SNDRV_PCM_TRIGGER_RESUME:
546 /* According to the documentation this should be:
547 0x13 but that value may randomly swap stereo channels */
548 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
549 udelay(10);
550 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
551 /* This two stage init gives the FIFO -> DAC connection time to
552 * settle before first data from DMA flows in. This should ensure
553 * no swapping of stereo channels. Report a bug if otherwise :-) */
554 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
555 chip->active |= DAC2;
556 break;
557 case SNDRV_PCM_TRIGGER_STOP:
558 case SNDRV_PCM_TRIGGER_SUSPEND:
559 outb(0, SLIO_REG(chip, AUDIO2MODE));
560 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
561 chip->active &= ~DAC2;
562 break;
563 default:
564 return -EINVAL;
565 }
566 return 0;
567}
568
569static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
570 int cmd)
571{
572 struct es1938 *chip = snd_pcm_substream_chip(substream);
573 int val;
574 switch (cmd) {
575 case SNDRV_PCM_TRIGGER_START:
576 case SNDRV_PCM_TRIGGER_RESUME:
577 val = 5;
578 chip->active |= DAC1;
579 break;
580 case SNDRV_PCM_TRIGGER_STOP:
581 case SNDRV_PCM_TRIGGER_SUSPEND:
582 val = 0;
583 chip->active &= ~DAC1;
584 break;
585 default:
586 return -EINVAL;
587 }
588 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
589 return 0;
590}
591
592static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
593 int cmd)
594{
595 switch (substream->number) {
596 case 0:
597 return snd_es1938_playback1_trigger(substream, cmd);
598 case 1:
599 return snd_es1938_playback2_trigger(substream, cmd);
600 }
601 snd_BUG();
602 return -EINVAL;
603}
604
605/* --------------------------------------------------------------------
606 * First channel for Extended Mode Audio 1 ADC Operation
607 * --------------------------------------------------------------------*/
608static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
609{
610 struct es1938 *chip = snd_pcm_substream_chip(substream);
611 struct snd_pcm_runtime *runtime = substream->runtime;
612 int u, is8, mono;
613 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
614 unsigned int count = snd_pcm_lib_period_bytes(substream);
615
616 chip->dma1_size = size;
617 chip->dma1_start = runtime->dma_addr;
618
619 mono = (runtime->channels > 1) ? 0 : 1;
620 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
621 u = snd_pcm_format_unsigned(runtime->format);
622
623 chip->dma1_shift = 2 - mono - is8;
624
625 snd_es1938_reset_fifo(chip);
626
627 /* program type */
628 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
629
630 /* set clock and counters */
631 snd_es1938_rate_set(chip, substream, ADC1);
632
633 count = 0x10000 - count;
634 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
635 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
636
637 /* initialize and configure ADC */
638 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
639 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
640 (u ? 0x00 : 0x20) |
641 (is8 ? 0x00 : 0x04) |
642 (mono ? 0x40 : 0x08));
643
644 // snd_es1938_reset_fifo(chip);
645
646 /* 11. configure system interrupt controller and DMA controller */
647 snd_es1938_capture_setdma(chip);
648
649 return 0;
650}
651
652
653/* ------------------------------------------------------------------------------
654 * Second Audio channel DAC Operation
655 * ------------------------------------------------------------------------------*/
656static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
657{
658 struct es1938 *chip = snd_pcm_substream_chip(substream);
659 struct snd_pcm_runtime *runtime = substream->runtime;
660 int u, is8, mono;
661 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
662 unsigned int count = snd_pcm_lib_period_bytes(substream);
663
664 chip->dma2_size = size;
665 chip->dma2_start = runtime->dma_addr;
666
667 mono = (runtime->channels > 1) ? 0 : 1;
668 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
669 u = snd_pcm_format_unsigned(runtime->format);
670
671 chip->dma2_shift = 2 - mono - is8;
672
673 snd_es1938_reset_fifo(chip);
674
675 /* set clock and counters */
676 snd_es1938_rate_set(chip, substream, DAC2);
677
678 count >>= 1;
679 count = 0x10000 - count;
680 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
681 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
682
683 /* initialize and configure Audio 2 DAC */
684 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
685 (mono ? 0 : 2) | (is8 ? 0 : 1));
686
687 /* program DMA */
688 snd_es1938_playback1_setdma(chip);
689
690 return 0;
691}
692
693static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
694{
695 struct es1938 *chip = snd_pcm_substream_chip(substream);
696 struct snd_pcm_runtime *runtime = substream->runtime;
697 int u, is8, mono;
698 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
699 unsigned int count = snd_pcm_lib_period_bytes(substream);
700
701 chip->dma1_size = size;
702 chip->dma1_start = runtime->dma_addr;
703
704 mono = (runtime->channels > 1) ? 0 : 1;
705 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
706 u = snd_pcm_format_unsigned(runtime->format);
707
708 chip->dma1_shift = 2 - mono - is8;
709
710 count = 0x10000 - count;
711
712 /* reset */
713 snd_es1938_reset_fifo(chip);
714
715 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
716
717 /* set clock and counters */
718 snd_es1938_rate_set(chip, substream, DAC1);
719 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
720 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
721
722 /* initialized and configure DAC */
723 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
724 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
725 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
726 0x90 | (mono ? 0x40 : 0x08) |
727 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
728
729 /* program DMA */
730 snd_es1938_playback2_setdma(chip);
731
732 return 0;
733}
734
735static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
736{
737 switch (substream->number) {
738 case 0:
739 return snd_es1938_playback1_prepare(substream);
740 case 1:
741 return snd_es1938_playback2_prepare(substream);
742 }
743 snd_BUG();
744 return -EINVAL;
745}
746
747/* during the incrementing of dma counters the DMA register reads sometimes
748 returns garbage. To ensure a valid hw pointer, the following checks which
749 should be very unlikely to fail are used:
750 - is the current DMA address in the valid DMA range ?
751 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
752 One can argue this could differ by one byte depending on which register is
753 updated first, so the implementation below allows for that.
754*/
755static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
756{
757 struct es1938 *chip = snd_pcm_substream_chip(substream);
758 size_t ptr;
759#if 0
760 size_t old, new;
761 /* This stuff is *needed*, don't ask why - AB */
762 old = inw(SLDM_REG(chip, DMACOUNT));
763 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
764 old = new;
765 ptr = chip->dma1_size - 1 - new;
766#else
767 size_t count;
768 unsigned int diff;
769
770 ptr = inl(SLDM_REG(chip, DMAADDR));
771 count = inw(SLDM_REG(chip, DMACOUNT));
772 diff = chip->dma1_start + chip->dma1_size - ptr - count;
773
774 if (diff > 3 || ptr < chip->dma1_start
775 || ptr >= chip->dma1_start+chip->dma1_size)
776 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
777 else
778 chip->last_capture_dmaaddr = ptr; /* good, remember it */
779
780 ptr -= chip->dma1_start;
781#endif
782 return ptr >> chip->dma1_shift;
783}
784
785static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
786{
787 struct es1938 *chip = snd_pcm_substream_chip(substream);
788 size_t ptr;
789#if 1
790 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
791#else
792 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
793#endif
794 return ptr >> chip->dma2_shift;
795}
796
797static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
798{
799 struct es1938 *chip = snd_pcm_substream_chip(substream);
800 size_t ptr;
801 size_t old, new;
802#if 1
803 /* This stuff is *needed*, don't ask why - AB */
804 old = inw(SLDM_REG(chip, DMACOUNT));
805 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
806 old = new;
807 ptr = chip->dma1_size - 1 - new;
808#else
809 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
810#endif
811 return ptr >> chip->dma1_shift;
812}
813
814static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
815{
816 switch (substream->number) {
817 case 0:
818 return snd_es1938_playback1_pointer(substream);
819 case 1:
820 return snd_es1938_playback2_pointer(substream);
821 }
822 snd_BUG();
823 return -EINVAL;
824}
825
826static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
827 int channel, unsigned long pos,
828#ifndef TARGET_OS2
829 struct iov_iter *dst, unsigned long count)
830#else
831 void *dst, unsigned long count)
832#endif
833{
834 struct snd_pcm_runtime *runtime = substream->runtime;
835 struct es1938 *chip = snd_pcm_substream_chip(substream);
836
837 if (snd_BUG_ON(pos + count > chip->dma1_size))
838 return -EINVAL;
839#ifndef TARGET_OS2
840 if (pos + count < chip->dma1_size) {
841 if (copy_to_iter(runtime->dma_area + pos + 1, count, dst) != count)
842 return -EFAULT;
843 } else {
844 if (copy_to_iter(runtime->dma_area + pos + 1, count - 1, dst) != count - 1)
845 return -EFAULT;
846 if (copy_to_iter(runtime->dma_area, 1, dst) != 1)
847 return -EFAULT;
848 }
849#else
850 if (pos + count < chip->dma1_size) {
851 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
852 return -EFAULT;
853 } else {
854 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
855 return -EFAULT;
856 if (put_user(runtime->dma_area[0],
857 ((unsigned char __user *)dst) + count - 1))
858 return -EFAULT;
859 }
860#endif
861 return 0;
862}
863
864/* ----------------------------------------------------------------------
865 * Audio1 Capture (ADC)
866 * ----------------------------------------------------------------------*/
867static const struct snd_pcm_hardware snd_es1938_capture =
868{
869 .info = (SNDRV_PCM_INFO_INTERLEAVED |
870 SNDRV_PCM_INFO_BLOCK_TRANSFER),
871 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
872 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
873 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
874 .rate_min = 6000,
875 .rate_max = 48000,
876 .channels_min = 1,
877 .channels_max = 2,
878 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
879 .period_bytes_min = 64,
880 .period_bytes_max = 0x8000,
881 .periods_min = 1,
882 .periods_max = 1024,
883 .fifo_size = 256,
884};
885
886/* -----------------------------------------------------------------------
887 * Audio2 Playback (DAC)
888 * -----------------------------------------------------------------------*/
889static const struct snd_pcm_hardware snd_es1938_playback =
890{
891 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
892 SNDRV_PCM_INFO_BLOCK_TRANSFER |
893 SNDRV_PCM_INFO_MMAP_VALID),
894 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
895 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
896 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
897 .rate_min = 6000,
898 .rate_max = 48000,
899 .channels_min = 1,
900 .channels_max = 2,
901 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
902 .period_bytes_min = 64,
903 .period_bytes_max = 0x8000,
904 .periods_min = 1,
905 .periods_max = 1024,
906 .fifo_size = 256,
907};
908
909static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
910{
911 struct es1938 *chip = snd_pcm_substream_chip(substream);
912 struct snd_pcm_runtime *runtime = substream->runtime;
913
914 if (chip->playback2_substream)
915 return -EAGAIN;
916 chip->capture_substream = substream;
917 runtime->hw = snd_es1938_capture;
918 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
919 &hw_constraints_clocks);
920 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
921 return 0;
922}
923
924static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
925{
926 struct es1938 *chip = snd_pcm_substream_chip(substream);
927 struct snd_pcm_runtime *runtime = substream->runtime;
928
929 switch (substream->number) {
930 case 0:
931 chip->playback1_substream = substream;
932 break;
933 case 1:
934 if (chip->capture_substream)
935 return -EAGAIN;
936 chip->playback2_substream = substream;
937 break;
938 default:
939 snd_BUG();
940 return -EINVAL;
941 }
942 runtime->hw = snd_es1938_playback;
943 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
944 &hw_constraints_clocks);
945 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
946 return 0;
947}
948
949static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
950{
951 struct es1938 *chip = snd_pcm_substream_chip(substream);
952
953 chip->capture_substream = NULL;
954 return 0;
955}
956
957static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
958{
959 struct es1938 *chip = snd_pcm_substream_chip(substream);
960
961 switch (substream->number) {
962 case 0:
963 chip->playback1_substream = NULL;
964 break;
965 case 1:
966 chip->playback2_substream = NULL;
967 break;
968 default:
969 snd_BUG();
970 return -EINVAL;
971 }
972 return 0;
973}
974
975static const struct snd_pcm_ops snd_es1938_playback_ops = {
976 .open = snd_es1938_playback_open,
977 .close = snd_es1938_playback_close,
978 .prepare = snd_es1938_playback_prepare,
979 .trigger = snd_es1938_playback_trigger,
980 .pointer = snd_es1938_playback_pointer,
981};
982
983static const struct snd_pcm_ops snd_es1938_capture_ops = {
984 .open = snd_es1938_capture_open,
985 .close = snd_es1938_capture_close,
986 .prepare = snd_es1938_capture_prepare,
987 .trigger = snd_es1938_capture_trigger,
988 .pointer = snd_es1938_capture_pointer,
989 .copy = snd_es1938_capture_copy,
990};
991
992static int snd_es1938_new_pcm(struct es1938 *chip, int device)
993{
994 struct snd_pcm *pcm;
995 int err;
996
997 err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
998 if (err < 0)
999 return err;
1000 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1001 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1002
1003 pcm->private_data = chip;
1004 pcm->info_flags = 0;
1005 strcpy(pcm->name, "ESS Solo-1");
1006
1007 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1008 &chip->pci->dev, 64*1024, 64*1024);
1009
1010 chip->pcm = pcm;
1011 return 0;
1012}
1013
1014/* -------------------------------------------------------------------
1015 *
1016 * *** Mixer part ***
1017 */
1018
1019static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1020 struct snd_ctl_elem_info *uinfo)
1021{
1022 static const char * const texts[8] = {
1023 "Mic", "Mic Master", "CD", "AOUT",
1024 "Mic1", "Mix", "Line", "Master"
1025 };
1026
1027 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1028}
1029
1030static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1031 struct snd_ctl_elem_value *ucontrol)
1032{
1033 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1034 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1035 return 0;
1036}
1037
1038static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1039 struct snd_ctl_elem_value *ucontrol)
1040{
1041 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1042 unsigned char val = ucontrol->value.enumerated.item[0];
1043
1044 if (val > 7)
1045 return -EINVAL;
1046 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1047}
1048
1049#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1050
1051static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1052 struct snd_ctl_elem_value *ucontrol)
1053{
1054 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1055 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1056 ucontrol->value.integer.value[0] = !!(val & 8);
1057 return 0;
1058}
1059
1060static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1061 struct snd_ctl_elem_value *ucontrol)
1062{
1063 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1064 unsigned char oval, nval;
1065 int change;
1066 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1067 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1068 change = nval != oval;
1069 if (change) {
1070 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1071 snd_es1938_mixer_write(chip, 0x50, nval);
1072 }
1073 return change;
1074}
1075
1076static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1077 struct snd_ctl_elem_info *uinfo)
1078{
1079 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1080 uinfo->count = 2;
1081 uinfo->value.integer.min = 0;
1082 uinfo->value.integer.max = 63;
1083 return 0;
1084}
1085
1086static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1087 struct snd_ctl_elem_value *ucontrol)
1088{
1089 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1090 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1091 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1092 return 0;
1093}
1094
1095#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1096
1097static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1098 struct snd_ctl_elem_value *ucontrol)
1099{
1100 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1101 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1102 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1103 return 0;
1104}
1105
1106static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1107{
1108 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1109 chip->master_volume = NULL;
1110 chip->master_switch = NULL;
1111 chip->hw_volume = NULL;
1112 chip->hw_switch = NULL;
1113}
1114
1115static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1116 unsigned char mask, unsigned char val)
1117{
1118 if (reg < 0xa0)
1119 return snd_es1938_mixer_bits(chip, reg, mask, val);
1120 else
1121 return snd_es1938_bits(chip, reg, mask, val);
1122}
1123
1124static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1125{
1126 if (reg < 0xa0)
1127 return snd_es1938_mixer_read(chip, reg);
1128 else
1129 return snd_es1938_read(chip, reg);
1130}
1131
1132#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1133{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1134 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1135 .name = xname, .index = xindex, \
1136 .info = snd_es1938_info_single, \
1137 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1138 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1139 .tlv = { .p = xtlv } }
1140#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1141{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1142 .info = snd_es1938_info_single, \
1143 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1144 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1145
1146static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1147 struct snd_ctl_elem_info *uinfo)
1148{
1149 int mask = (kcontrol->private_value >> 16) & 0xff;
1150
1151 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1152 uinfo->count = 1;
1153 uinfo->value.integer.min = 0;
1154 uinfo->value.integer.max = mask;
1155 return 0;
1156}
1157
1158static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1159 struct snd_ctl_elem_value *ucontrol)
1160{
1161 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1162 int reg = kcontrol->private_value & 0xff;
1163 int shift = (kcontrol->private_value >> 8) & 0xff;
1164 int mask = (kcontrol->private_value >> 16) & 0xff;
1165 int invert = (kcontrol->private_value >> 24) & 0xff;
1166 int val;
1167
1168 val = snd_es1938_reg_read(chip, reg);
1169 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1170 if (invert)
1171 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1172 return 0;
1173}
1174
1175static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1176 struct snd_ctl_elem_value *ucontrol)
1177{
1178 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1179 int reg = kcontrol->private_value & 0xff;
1180 int shift = (kcontrol->private_value >> 8) & 0xff;
1181 int mask = (kcontrol->private_value >> 16) & 0xff;
1182 int invert = (kcontrol->private_value >> 24) & 0xff;
1183 unsigned char val;
1184
1185 val = (ucontrol->value.integer.value[0] & mask);
1186 if (invert)
1187 val = mask - val;
1188 mask <<= shift;
1189 val <<= shift;
1190 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1191}
1192
1193#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1194{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1195 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1196 .name = xname, .index = xindex, \
1197 .info = snd_es1938_info_double, \
1198 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1199 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1200 .tlv = { .p = xtlv } }
1201#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1202{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1203 .info = snd_es1938_info_double, \
1204 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1205 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1206
1207static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1208 struct snd_ctl_elem_info *uinfo)
1209{
1210 int mask = (kcontrol->private_value >> 24) & 0xff;
1211
1212 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1213 uinfo->count = 2;
1214 uinfo->value.integer.min = 0;
1215 uinfo->value.integer.max = mask;
1216 return 0;
1217}
1218
1219static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1220 struct snd_ctl_elem_value *ucontrol)
1221{
1222 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1223 int left_reg = kcontrol->private_value & 0xff;
1224 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1225 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1226 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1227 int mask = (kcontrol->private_value >> 24) & 0xff;
1228 int invert = (kcontrol->private_value >> 22) & 1;
1229 unsigned char left, right;
1230
1231 left = snd_es1938_reg_read(chip, left_reg);
1232 if (left_reg != right_reg)
1233 right = snd_es1938_reg_read(chip, right_reg);
1234 else
1235 right = left;
1236 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1237 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1238 if (invert) {
1239 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1240 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1241 }
1242 return 0;
1243}
1244
1245static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1246 struct snd_ctl_elem_value *ucontrol)
1247{
1248 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1249 int left_reg = kcontrol->private_value & 0xff;
1250 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1251 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1252 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1253 int mask = (kcontrol->private_value >> 24) & 0xff;
1254 int invert = (kcontrol->private_value >> 22) & 1;
1255 int change;
1256 unsigned char val1, val2, mask1, mask2;
1257
1258 val1 = ucontrol->value.integer.value[0] & mask;
1259 val2 = ucontrol->value.integer.value[1] & mask;
1260 if (invert) {
1261 val1 = mask - val1;
1262 val2 = mask - val2;
1263 }
1264 val1 <<= shift_left;
1265 val2 <<= shift_right;
1266 mask1 = mask << shift_left;
1267 mask2 = mask << shift_right;
1268 if (left_reg != right_reg) {
1269 change = 0;
1270 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1271 change = 1;
1272 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1273 change = 1;
1274 } else {
1275 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1276 val1 | val2) != (val1 | val2));
1277 }
1278 return change;
1279}
1280
1281#ifndef TARGET_OS2
1282static const DECLARE_TLV_DB_RANGE(db_scale_master,
1283 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1284 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1285);
1286
1287static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1288 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1289 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1290);
1291
1292static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1293 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1294 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1295);
1296
1297static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1298 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1299 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1300);
1301
1302static const DECLARE_TLV_DB_RANGE(db_scale_line,
1303 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1304 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1305);
1306#else
1307static unsigned int db_scale_master[] = {
1308 TLV_DB_RANGE_HEAD(2),
1309 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1310 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1311};
1312
1313static unsigned int db_scale_audio1[] = {
1314 TLV_DB_RANGE_HEAD(2),
1315 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1316 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1317};
1318
1319static unsigned int db_scale_audio2[] = {
1320 TLV_DB_RANGE_HEAD(2),
1321 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1322 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1323};
1324
1325static unsigned int db_scale_mic[] = {
1326 TLV_DB_RANGE_HEAD(2),
1327 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1328 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1329};
1330
1331static unsigned int db_scale_line[] = {
1332 TLV_DB_RANGE_HEAD(2),
1333 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1334 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1335};
1336#endif
1337
1338static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1339
1340static const struct snd_kcontrol_new snd_es1938_controls[] = {
1341ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1342 db_scale_master),
1343ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1344{
1345 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1346 .name = "Hardware Master Playback Volume",
1347 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1348 .info = snd_es1938_info_hw_volume,
1349 .get = snd_es1938_get_hw_volume,
1350},
1351{
1352 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1353 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1354 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1355 .name = "Hardware Master Playback Switch",
1356 .info = snd_es1938_info_hw_switch,
1357 .get = snd_es1938_get_hw_switch,
1358 .tlv = { .p = db_scale_master },
1359},
1360ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1361ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1362 db_scale_line),
1363ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1364ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1365 db_scale_mic),
1366ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1367 db_scale_line),
1368ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1369 db_scale_mic),
1370ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1371 db_scale_line),
1372ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1373 db_scale_capture),
1374ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1375ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1376ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1377{
1378 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1379 .name = "Capture Source",
1380 .info = snd_es1938_info_mux,
1381 .get = snd_es1938_get_mux,
1382 .put = snd_es1938_put_mux,
1383},
1384ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1385 db_scale_line),
1386ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1387 db_scale_audio2),
1388ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1389 db_scale_mic),
1390ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1391 db_scale_line),
1392ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1393 db_scale_mic),
1394ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1395 db_scale_line),
1396ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1397 db_scale_line),
1398ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1399 db_scale_line),
1400ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1401 db_scale_audio2),
1402ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1403 db_scale_audio1),
1404ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1405{
1406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1407 .name = "3D Control - Switch",
1408 .info = snd_es1938_info_spatializer_enable,
1409 .get = snd_es1938_get_spatializer_enable,
1410 .put = snd_es1938_put_spatializer_enable,
1411},
1412ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1413};
1414
1415
1416/* ---------------------------------------------------------------------------- */
1417/* ---------------------------------------------------------------------------- */
1418
1419/*
1420 * initialize the chip - used by resume callback, too
1421 */
1422static void snd_es1938_chip_init(struct es1938 *chip)
1423{
1424 /* reset chip */
1425 snd_es1938_reset(chip);
1426
1427 /* configure native mode */
1428
1429 /* enable bus master */
1430 pci_set_master(chip->pci);
1431
1432 /* disable legacy audio */
1433 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1434
1435 /* set DDMA base */
1436 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1437
1438 /* set DMA/IRQ policy */
1439 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1440
1441 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1442 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1443
1444 /* reset DMA */
1445 outb(0, SLDM_REG(chip, DMACLEAR));
1446}
1447
1448/*
1449 * PM support
1450 */
1451
1452static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1453 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1454 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1455 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1456 0xa8, 0xb4,
1457};
1458
1459
1460static int es1938_suspend(struct device *dev)
1461{
1462 struct snd_card *card = dev_get_drvdata(dev);
1463 struct es1938 *chip = card->private_data;
1464 const unsigned char *s;
1465 unsigned char *d;
1466
1467 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1468
1469 /* save mixer-related registers */
1470 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1471 *d = snd_es1938_reg_read(chip, *s);
1472
1473 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1474 if (chip->irq >= 0) {
1475 free_irq(chip->irq, chip);
1476 chip->irq = -1;
1477 card->sync_irq = -1;
1478 }
1479 return 0;
1480}
1481
1482static int es1938_resume(struct device *dev)
1483{
1484 struct pci_dev *pci = to_pci_dev(dev);
1485 struct snd_card *card = dev_get_drvdata(dev);
1486 struct es1938 *chip = card->private_data;
1487 const unsigned char *s;
1488 unsigned char *d;
1489
1490 if (request_irq(pci->irq, snd_es1938_interrupt,
1491 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1492 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1493 pci->irq);
1494 snd_card_disconnect(card);
1495 return -EIO;
1496 }
1497 chip->irq = pci->irq;
1498 card->sync_irq = chip->irq;
1499 snd_es1938_chip_init(chip);
1500
1501 /* restore mixer-related registers */
1502 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1503 if (*s < 0xa0)
1504 snd_es1938_mixer_write(chip, *s, *d);
1505 else
1506 snd_es1938_write(chip, *s, *d);
1507 }
1508
1509 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1510 return 0;
1511}
1512
1513static DEFINE_SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1514
1515#ifdef SUPPORT_JOYSTICK
1516static int snd_es1938_create_gameport(struct es1938 *chip)
1517{
1518 struct gameport *gp;
1519
1520 chip->gameport = gp = gameport_allocate_port();
1521 if (!gp) {
1522 dev_err(chip->card->dev,
1523 "cannot allocate memory for gameport\n");
1524 return -ENOMEM;
1525 }
1526
1527 gameport_set_name(gp, "ES1938");
1528 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1529 gameport_set_dev_parent(gp, &chip->pci->dev);
1530 gp->io = chip->game_port;
1531
1532 gameport_register_port(gp);
1533
1534 return 0;
1535}
1536
1537static void snd_es1938_free_gameport(struct es1938 *chip)
1538{
1539 if (chip->gameport) {
1540 gameport_unregister_port(chip->gameport);
1541 chip->gameport = NULL;
1542 }
1543}
1544#else
1545static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1546static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1547#endif /* SUPPORT_JOYSTICK */
1548
1549static void snd_es1938_free(struct snd_card *card)
1550{
1551 struct es1938 *chip = card->private_data;
1552
1553 /* disable irqs */
1554 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1555 if (chip->rmidi)
1556 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1557
1558 snd_es1938_free_gameport(chip);
1559
1560 if (chip->irq >= 0)
1561 free_irq(chip->irq, chip);
1562}
1563
1564static int snd_es1938_create(struct snd_card *card,
1565 struct pci_dev *pci)
1566{
1567 struct es1938 *chip = card->private_data;
1568 int err;
1569
1570 /* enable PCI device */
1571 err = pcim_enable_device(pci);
1572 if (err < 0)
1573 return err;
1574 /* check, if we can restrict PCI DMA transfers to 24 bits */
1575 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1576 dev_err(card->dev,
1577 "architecture does not support 24bit PCI busmaster DMA\n");
1578 return -ENXIO;
1579 }
1580
1581 spin_lock_init(&chip->reg_lock);
1582 spin_lock_init(&chip->mixer_lock);
1583 chip->card = card;
1584 chip->pci = pci;
1585 chip->irq = -1;
1586 err = pci_request_regions(pci, "ESS Solo-1");
1587 if (err < 0)
1588 return err;
1589 chip->io_port = pci_resource_start(pci, 0);
1590 chip->sb_port = pci_resource_start(pci, 1);
1591 chip->vc_port = pci_resource_start(pci, 2);
1592 chip->mpu_port = pci_resource_start(pci, 3);
1593 chip->game_port = pci_resource_start(pci, 4);
1594 /* still use non-managed irq handler as it's re-acquired at PM resume */
1595 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1596 KBUILD_MODNAME, chip)) {
1597 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1598 return -EBUSY;
1599 }
1600 chip->irq = pci->irq;
1601 card->sync_irq = chip->irq;
1602 card->private_free = snd_es1938_free;
1603 dev_dbg(card->dev,
1604 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1605 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1606
1607 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1608
1609 snd_es1938_chip_init(chip);
1610 return 0;
1611}
1612
1613/* --------------------------------------------------------------------
1614 * Interrupt handler
1615 * -------------------------------------------------------------------- */
1616static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1617{
1618 struct es1938 *chip = dev_id;
1619 unsigned char status;
1620 __always_unused unsigned char audiostatus;
1621 int handled = 0;
1622
1623 status = inb(SLIO_REG(chip, IRQCONTROL));
1624#if 0
1625 dev_dbg(chip->card->dev,
1626 "Es1938debug - interrupt status: =0x%x\n", status);
1627#endif
1628
1629 /* AUDIO 1 */
1630 if (status & 0x10) {
1631#if 0
1632 dev_dbg(chip->card->dev,
1633 "Es1938debug - AUDIO channel 1 interrupt\n");
1634 dev_dbg(chip->card->dev,
1635 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1636 inw(SLDM_REG(chip, DMACOUNT)));
1637 dev_dbg(chip->card->dev,
1638 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1639 inl(SLDM_REG(chip, DMAADDR)));
1640 dev_dbg(chip->card->dev,
1641 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1642 inl(SLDM_REG(chip, DMASTATUS)));
1643#endif
1644 /* clear irq */
1645 handled = 1;
1646 audiostatus = inb(SLSB_REG(chip, STATUS));
1647 if (chip->active & ADC1)
1648 snd_pcm_period_elapsed(chip->capture_substream);
1649 else if (chip->active & DAC1)
1650 snd_pcm_period_elapsed(chip->playback2_substream);
1651 }
1652
1653 /* AUDIO 2 */
1654 if (status & 0x20) {
1655#if 0
1656 dev_dbg(chip->card->dev,
1657 "Es1938debug - AUDIO channel 2 interrupt\n");
1658 dev_dbg(chip->card->dev,
1659 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1660 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1661 dev_dbg(chip->card->dev,
1662 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1663 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1664
1665#endif
1666 /* clear irq */
1667 handled = 1;
1668 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1669 if (chip->active & DAC2)
1670 snd_pcm_period_elapsed(chip->playback1_substream);
1671 }
1672
1673 /* Hardware volume */
1674 if (status & 0x40) {
1675 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1676 handled = 1;
1677 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1678 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1679 if (!split) {
1680 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1681 &chip->master_switch->id);
1682 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1683 &chip->master_volume->id);
1684 }
1685 /* ack interrupt */
1686 snd_es1938_mixer_write(chip, 0x66, 0x00);
1687 }
1688
1689 /* MPU401 */
1690 if (status & 0x80) {
1691 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1692 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1693 // andreas@flying-snail.de
1694 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1695 if (chip->rmidi) {
1696 handled = 1;
1697 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1698 }
1699 }
1700 return IRQ_RETVAL(handled);
1701}
1702
1703#define ES1938_DMA_SIZE 64
1704
1705static int snd_es1938_mixer(struct es1938 *chip)
1706{
1707 struct snd_card *card;
1708 unsigned int idx;
1709 int err;
1710
1711 card = chip->card;
1712
1713 strcpy(card->mixername, "ESS Solo-1");
1714
1715 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1716 struct snd_kcontrol *kctl;
1717 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1718 switch (idx) {
1719 case 0:
1720 chip->master_volume = kctl;
1721 kctl->private_free = snd_es1938_hwv_free;
1722 break;
1723 case 1:
1724 chip->master_switch = kctl;
1725 kctl->private_free = snd_es1938_hwv_free;
1726 break;
1727 case 2:
1728 chip->hw_volume = kctl;
1729 kctl->private_free = snd_es1938_hwv_free;
1730 break;
1731 case 3:
1732 chip->hw_switch = kctl;
1733 kctl->private_free = snd_es1938_hwv_free;
1734 break;
1735 }
1736 err = snd_ctl_add(card, kctl);
1737 if (err < 0)
1738 return err;
1739 }
1740 return 0;
1741}
1742
1743
1744static int __snd_es1938_probe(struct pci_dev *pci,
1745 const struct pci_device_id *pci_id)
1746{
1747 static int dev;
1748 struct snd_card *card;
1749 struct es1938 *chip;
1750 struct snd_opl3 *opl3;
1751 int idx, err;
1752
1753 if (dev >= SNDRV_CARDS)
1754 return -ENODEV;
1755 if (!enable[dev]) {
1756 dev++;
1757 return -ENOENT;
1758 }
1759
1760 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1761 sizeof(*chip), &card);
1762 if (err < 0)
1763 return err;
1764 chip = card->private_data;
1765
1766 for (idx = 0; idx < 5; idx++)
1767 if (pci_resource_start(pci, idx) == 0 ||
1768 !(pci_resource_flags(pci, idx) & IORESOURCE_IO))
1769 return -ENODEV;
1770
1771 err = snd_es1938_create(card, pci);
1772 if (err < 0)
1773 return err;
1774
1775 strcpy(card->driver, "ES1938");
1776 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1777 sprintf(card->longname, "%s rev %i, irq %i",
1778 card->shortname,
1779 chip->revision,
1780 chip->irq);
1781
1782 err = snd_es1938_new_pcm(chip, 0);
1783 if (err < 0)
1784 return err;
1785 err = snd_es1938_mixer(chip);
1786 if (err < 0)
1787 return err;
1788 if (snd_opl3_create(card,
1789 SLSB_REG(chip, FMLOWADDR),
1790 SLSB_REG(chip, FMHIGHADDR),
1791 OPL3_HW_OPL3, 1, &opl3) < 0) {
1792 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1793 SLSB_REG(chip, FMLOWADDR));
1794 } else {
1795 err = snd_opl3_timer_new(opl3, 0, 1);
1796 if (err < 0)
1797 return err;
1798 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1799 if (err < 0)
1800 return err;
1801 }
1802 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1803 chip->mpu_port,
1804 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1805 -1, &chip->rmidi) < 0) {
1806 dev_err(card->dev, "unable to initialize MPU-401\n");
1807 } else {
1808 // this line is vital for MIDI interrupt handling on ess-solo1
1809 // andreas@flying-snail.de
1810 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1811 }
1812
1813 snd_es1938_create_gameport(chip);
1814
1815 err = snd_card_register(card);
1816 if (err < 0)
1817 return err;
1818
1819 pci_set_drvdata(pci, card);
1820 dev++;
1821 return 0;
1822}
1823
1824static int snd_es1938_probe(struct pci_dev *pci,
1825 const struct pci_device_id *pci_id)
1826{
1827 return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
1828}
1829
1830static struct pci_driver es1938_driver = {
1831 .name = KBUILD_MODNAME,
1832 .id_table = snd_es1938_ids,
1833 .probe = snd_es1938_probe,
1834 .driver = {
1835 .pm = &es1938_pm,
1836 },
1837};
1838
1839module_pci_driver(es1938_driver);
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