source: GPL/trunk/alsa-kernel/pci/es1938.c@ 772

Last change on this file since 772 was 772, checked in by David Azarewicz, 5 months ago

Merge in changes from 6.6-LTS branch.
Fixed additional 25+ problems.
File size: 55.6 KB
Line 
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5 * Jaroslav Kysela <perex@perex.cz>,
6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34#ifdef TARGET_OS2
35#define KBUILD_MODNAME "es1938"
36#endif
37
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/gameport.h>
43#include <linux/module.h>
44#include <linux/delay.h>
45#include <linux/dma-mapping.h>
46#include <linux/io.h>
47#include <sound/core.h>
48#include <sound/control.h>
49#include <sound/pcm.h>
50#include <sound/opl3.h>
51#include <sound/mpu401.h>
52#include <sound/initval.h>
53#include <sound/tlv.h>
54
55MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
56MODULE_DESCRIPTION("ESS Solo-1");
57MODULE_LICENSE("GPL");
58
59#if IS_REACHABLE(CONFIG_GAMEPORT)
60#define SUPPORT_JOYSTICK 1
61#endif
62
63static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
64static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
65static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
66
67module_param_array(index, int, NULL, 0444);
68MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
69module_param_array(id, charp, NULL, 0444);
70MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
71module_param_array(enable, bool, NULL, 0444);
72MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
73
74#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
75
76#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
77
78#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
79
80#define SL_PCI_LEGACYCONTROL 0x40
81#define SL_PCI_CONFIG 0x50
82#define SL_PCI_DDMACONTROL 0x60
83
84#define ESSIO_REG_AUDIO2DMAADDR 0
85#define ESSIO_REG_AUDIO2DMACOUNT 4
86#define ESSIO_REG_AUDIO2MODE 6
87#define ESSIO_REG_IRQCONTROL 7
88
89#define ESSDM_REG_DMAADDR 0x00
90#define ESSDM_REG_DMACOUNT 0x04
91#define ESSDM_REG_DMACOMMAND 0x08
92#define ESSDM_REG_DMASTATUS 0x08
93#define ESSDM_REG_DMAMODE 0x0b
94#define ESSDM_REG_DMACLEAR 0x0d
95#define ESSDM_REG_DMAMASK 0x0f
96
97#define ESSSB_REG_FMLOWADDR 0x00
98#define ESSSB_REG_FMHIGHADDR 0x02
99#define ESSSB_REG_MIXERADDR 0x04
100#define ESSSB_REG_MIXERDATA 0x05
101
102#define ESSSB_IREG_AUDIO1 0x14
103#define ESSSB_IREG_MICMIX 0x1a
104#define ESSSB_IREG_RECSRC 0x1c
105#define ESSSB_IREG_MASTER 0x32
106#define ESSSB_IREG_FM 0x36
107#define ESSSB_IREG_AUXACD 0x38
108#define ESSSB_IREG_AUXB 0x3a
109#define ESSSB_IREG_PCSPEAKER 0x3c
110#define ESSSB_IREG_LINE 0x3e
111#define ESSSB_IREG_SPATCONTROL 0x50
112#define ESSSB_IREG_SPATLEVEL 0x52
113#define ESSSB_IREG_MASTER_LEFT 0x60
114#define ESSSB_IREG_MASTER_RIGHT 0x62
115#define ESSSB_IREG_MPU401CONTROL 0x64
116#define ESSSB_IREG_MICMIXRECORD 0x68
117#define ESSSB_IREG_AUDIO2RECORD 0x69
118#define ESSSB_IREG_AUXACDRECORD 0x6a
119#define ESSSB_IREG_FMRECORD 0x6b
120#define ESSSB_IREG_AUXBRECORD 0x6c
121#define ESSSB_IREG_MONO 0x6d
122#define ESSSB_IREG_LINERECORD 0x6e
123#define ESSSB_IREG_MONORECORD 0x6f
124#define ESSSB_IREG_AUDIO2SAMPLE 0x70
125#define ESSSB_IREG_AUDIO2MODE 0x71
126#define ESSSB_IREG_AUDIO2FILTER 0x72
127#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
128#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
129#define ESSSB_IREG_AUDIO2CONTROL1 0x78
130#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
131#define ESSSB_IREG_AUDIO2 0x7c
132
133#define ESSSB_REG_RESET 0x06
134
135#define ESSSB_REG_READDATA 0x0a
136#define ESSSB_REG_WRITEDATA 0x0c
137#define ESSSB_REG_READSTATUS 0x0c
138
139#define ESSSB_REG_STATUS 0x0e
140
141#define ESS_CMD_EXTSAMPLERATE 0xa1
142#define ESS_CMD_FILTERDIV 0xa2
143#define ESS_CMD_DMACNTRELOADL 0xa4
144#define ESS_CMD_DMACNTRELOADH 0xa5
145#define ESS_CMD_ANALOGCONTROL 0xa8
146#define ESS_CMD_IRQCONTROL 0xb1
147#define ESS_CMD_DRQCONTROL 0xb2
148#define ESS_CMD_RECLEVEL 0xb4
149#define ESS_CMD_SETFORMAT 0xb6
150#define ESS_CMD_SETFORMAT2 0xb7
151#define ESS_CMD_DMACONTROL 0xb8
152#define ESS_CMD_DMATYPE 0xb9
153#define ESS_CMD_OFFSETLEFT 0xba
154#define ESS_CMD_OFFSETRIGHT 0xbb
155#define ESS_CMD_READREG 0xc0
156#define ESS_CMD_ENABLEEXT 0xc6
157#define ESS_CMD_PAUSEDMA 0xd0
158#define ESS_CMD_ENABLEAUDIO1 0xd1
159#define ESS_CMD_STOPAUDIO1 0xd3
160#define ESS_CMD_AUDIO1STATUS 0xd8
161#define ESS_CMD_CONTDMA 0xd4
162#define ESS_CMD_TESTIRQ 0xf2
163
164#define ESS_RECSRC_MIC 0
165#define ESS_RECSRC_AUXACD 2
166#define ESS_RECSRC_AUXB 5
167#define ESS_RECSRC_LINE 6
168#define ESS_RECSRC_NONE 7
169
170#define DAC1 0x01
171#define ADC1 0x02
172#define DAC2 0x04
173
174/*
175
176 */
177
178#define SAVED_REG_SIZE 32 /* max. number of registers to save */
179
180struct es1938 {
181 int irq;
182
183 unsigned long io_port;
184 unsigned long sb_port;
185 unsigned long vc_port;
186 unsigned long mpu_port;
187 unsigned long game_port;
188 unsigned long ddma_port;
189
190 unsigned char irqmask;
191 unsigned char revision;
192
193 struct snd_kcontrol *hw_volume;
194 struct snd_kcontrol *hw_switch;
195 struct snd_kcontrol *master_volume;
196 struct snd_kcontrol *master_switch;
197
198 struct pci_dev *pci;
199 struct snd_card *card;
200 struct snd_pcm *pcm;
201 struct snd_pcm_substream *capture_substream;
202 struct snd_pcm_substream *playback1_substream;
203 struct snd_pcm_substream *playback2_substream;
204 struct snd_rawmidi *rmidi;
205
206 unsigned int dma1_size;
207 unsigned int dma2_size;
208 unsigned int dma1_start;
209 unsigned int dma2_start;
210 unsigned int dma1_shift;
211 unsigned int dma2_shift;
212 unsigned int last_capture_dmaaddr;
213 unsigned int active;
214
215 spinlock_t reg_lock;
216 spinlock_t mixer_lock;
217 struct snd_info_entry *proc_entry;
218
219#ifdef SUPPORT_JOYSTICK
220 struct gameport *gameport;
221#endif
222#ifdef CONFIG_PM_SLEEP
223 unsigned char saved_regs[SAVED_REG_SIZE];
224#endif
225};
226
227static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
228
229static const struct pci_device_id snd_es1938_ids[] = {
230 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
231 { 0, }
232};
233
234MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
235
236#define RESET_LOOP_TIMEOUT 0x10000
237#define WRITE_LOOP_TIMEOUT 0x10000
238#define GET_LOOP_TIMEOUT 0x01000
239
240/* -----------------------------------------------------------------
241 * Write to a mixer register
242 * -----------------------------------------------------------------*/
243static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
244{
245 unsigned long flags;
246 spin_lock_irqsave(&chip->mixer_lock, flags);
247 outb(reg, SLSB_REG(chip, MIXERADDR));
248 outb(val, SLSB_REG(chip, MIXERDATA));
249 spin_unlock_irqrestore(&chip->mixer_lock, flags);
250 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
251}
252
253/* -----------------------------------------------------------------
254 * Read from a mixer register
255 * -----------------------------------------------------------------*/
256static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
257{
258 int data;
259 unsigned long flags;
260 spin_lock_irqsave(&chip->mixer_lock, flags);
261 outb(reg, SLSB_REG(chip, MIXERADDR));
262 data = inb(SLSB_REG(chip, MIXERDATA));
263 spin_unlock_irqrestore(&chip->mixer_lock, flags);
264 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
265 return data;
266}
267
268/* -----------------------------------------------------------------
269 * Write to some bits of a mixer register (return old value)
270 * -----------------------------------------------------------------*/
271static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
272 unsigned char mask, unsigned char val)
273{
274 unsigned long flags;
275 unsigned char old, new, oval;
276 spin_lock_irqsave(&chip->mixer_lock, flags);
277 outb(reg, SLSB_REG(chip, MIXERADDR));
278 old = inb(SLSB_REG(chip, MIXERDATA));
279 oval = old & mask;
280 if (val != oval) {
281 new = (old & ~mask) | (val & mask);
282 outb(new, SLSB_REG(chip, MIXERDATA));
283 dev_dbg(chip->card->dev,
284 "Mixer reg %02x was %02x, set to %02x\n",
285 reg, old, new);
286 }
287 spin_unlock_irqrestore(&chip->mixer_lock, flags);
288 return oval;
289}
290
291/* -----------------------------------------------------------------
292 * Write command to Controller Registers
293 * -----------------------------------------------------------------*/
294static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
295{
296 int i;
297 unsigned char v;
298 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
299 v = inb(SLSB_REG(chip, READSTATUS));
300 if (!(v & 0x80)) {
301 outb(cmd, SLSB_REG(chip, WRITEDATA));
302 return;
303 }
304 }
305 dev_err(chip->card->dev,
306 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
307}
308
309/* -----------------------------------------------------------------
310 * Read the Read Data Buffer
311 * -----------------------------------------------------------------*/
312static int snd_es1938_get_byte(struct es1938 *chip)
313{
314 int i;
315 unsigned char v;
316 for (i = GET_LOOP_TIMEOUT; i; i--) {
317 v = inb(SLSB_REG(chip, STATUS));
318 if (v & 0x80)
319 return inb(SLSB_REG(chip, READDATA));
320 }
321 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
322 return -ENODEV;
323}
324
325/* -----------------------------------------------------------------
326 * Write value cmd register
327 * -----------------------------------------------------------------*/
328static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
329{
330 unsigned long flags;
331 spin_lock_irqsave(&chip->reg_lock, flags);
332 snd_es1938_write_cmd(chip, reg);
333 snd_es1938_write_cmd(chip, val);
334 spin_unlock_irqrestore(&chip->reg_lock, flags);
335 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
336}
337
338/* -----------------------------------------------------------------
339 * Read data from cmd register and return it
340 * -----------------------------------------------------------------*/
341static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
342{
343 unsigned char val;
344 unsigned long flags;
345 spin_lock_irqsave(&chip->reg_lock, flags);
346 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
347 snd_es1938_write_cmd(chip, reg);
348 val = snd_es1938_get_byte(chip);
349 spin_unlock_irqrestore(&chip->reg_lock, flags);
350 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
351 return val;
352}
353
354/* -----------------------------------------------------------------
355 * Write data to cmd register and return old value
356 * -----------------------------------------------------------------*/
357static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
358 unsigned char val)
359{
360 unsigned long flags;
361 unsigned char old, new, oval;
362 spin_lock_irqsave(&chip->reg_lock, flags);
363 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
364 snd_es1938_write_cmd(chip, reg);
365 old = snd_es1938_get_byte(chip);
366 oval = old & mask;
367 if (val != oval) {
368 snd_es1938_write_cmd(chip, reg);
369 new = (old & ~mask) | (val & mask);
370 snd_es1938_write_cmd(chip, new);
371 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
372 reg, old, new);
373 }
374 spin_unlock_irqrestore(&chip->reg_lock, flags);
375 return oval;
376}
377
378/* --------------------------------------------------------------------
379 * Reset the chip
380 * --------------------------------------------------------------------*/
381static void snd_es1938_reset(struct es1938 *chip)
382{
383 int i;
384
385 outb(3, SLSB_REG(chip, RESET));
386 inb(SLSB_REG(chip, RESET));
387 outb(0, SLSB_REG(chip, RESET));
388 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
389 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
390 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
391 goto __next;
392 }
393 }
394 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
395
396 __next:
397 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
398
399 /* Demand transfer DMA: 4 bytes per DMA request */
400 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
401
402 /* Change behaviour of register A1
403 4x oversampling
404 2nd channel DAC asynchronous */
405 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
406 /* enable/select DMA channel and IRQ channel */
407 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
408 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
409 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
410 /* Set spatializer parameters to recommended values */
411 snd_es1938_mixer_write(chip, 0x54, 0x8f);
412 snd_es1938_mixer_write(chip, 0x56, 0x95);
413 snd_es1938_mixer_write(chip, 0x58, 0x94);
414 snd_es1938_mixer_write(chip, 0x5a, 0x80);
415}
416
417/* --------------------------------------------------------------------
418 * Reset the FIFOs
419 * --------------------------------------------------------------------*/
420static void snd_es1938_reset_fifo(struct es1938 *chip)
421{
422 outb(2, SLSB_REG(chip, RESET));
423 outb(0, SLSB_REG(chip, RESET));
424}
425
426static const struct snd_ratnum clocks[2] = {
427 {
428 .num = 793800,
429 .den_min = 1,
430 .den_max = 128,
431 .den_step = 1,
432 },
433 {
434 .num = 768000,
435 .den_min = 1,
436 .den_max = 128,
437 .den_step = 1,
438 }
439};
440
441static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
442 .nrats = 2,
443 .rats = clocks,
444};
445
446
447static void snd_es1938_rate_set(struct es1938 *chip,
448 struct snd_pcm_substream *substream,
449 int mode)
450{
451 unsigned int bits, div0;
452 struct snd_pcm_runtime *runtime = substream->runtime;
453 if (runtime->rate_num == clocks[0].num)
454 bits = 128 - runtime->rate_den;
455 else
456 bits = 256 - runtime->rate_den;
457
458 /* set filter register */
459 div0 = 256 - 7160000*20/(8*82*runtime->rate);
460
461 if (mode == DAC2) {
462 snd_es1938_mixer_write(chip, 0x70, bits);
463 snd_es1938_mixer_write(chip, 0x72, div0);
464 } else {
465 snd_es1938_write(chip, 0xA1, bits);
466 snd_es1938_write(chip, 0xA2, div0);
467 }
468}
469
470/* --------------------------------------------------------------------
471 * Configure Solo1 builtin DMA Controller
472 * --------------------------------------------------------------------*/
473
474static void snd_es1938_playback1_setdma(struct es1938 *chip)
475{
476 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
477 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
478 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
479 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
480}
481
482static void snd_es1938_playback2_setdma(struct es1938 *chip)
483{
484 /* Enable DMA controller */
485 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
486 /* 1. Master reset */
487 outb(0, SLDM_REG(chip, DMACLEAR));
488 /* 2. Mask DMA */
489 outb(1, SLDM_REG(chip, DMAMASK));
490 outb(0x18, SLDM_REG(chip, DMAMODE));
491 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
492 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
493 /* 3. Unmask DMA */
494 outb(0, SLDM_REG(chip, DMAMASK));
495}
496
497static void snd_es1938_capture_setdma(struct es1938 *chip)
498{
499 /* Enable DMA controller */
500 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
501 /* 1. Master reset */
502 outb(0, SLDM_REG(chip, DMACLEAR));
503 /* 2. Mask DMA */
504 outb(1, SLDM_REG(chip, DMAMASK));
505 outb(0x14, SLDM_REG(chip, DMAMODE));
506 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
507 chip->last_capture_dmaaddr = chip->dma1_start;
508 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
509 /* 3. Unmask DMA */
510 outb(0, SLDM_REG(chip, DMAMASK));
511}
512
513/* ----------------------------------------------------------------------
514 *
515 * *** PCM part ***
516 */
517
518static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
519 int cmd)
520{
521 struct es1938 *chip = snd_pcm_substream_chip(substream);
522 int val;
523 switch (cmd) {
524 case SNDRV_PCM_TRIGGER_START:
525 case SNDRV_PCM_TRIGGER_RESUME:
526 val = 0x0f;
527 chip->active |= ADC1;
528 break;
529 case SNDRV_PCM_TRIGGER_STOP:
530 case SNDRV_PCM_TRIGGER_SUSPEND:
531 val = 0x00;
532 chip->active &= ~ADC1;
533 break;
534 default:
535 return -EINVAL;
536 }
537 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
538 return 0;
539}
540
541static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
542 int cmd)
543{
544 struct es1938 *chip = snd_pcm_substream_chip(substream);
545 switch (cmd) {
546 case SNDRV_PCM_TRIGGER_START:
547 case SNDRV_PCM_TRIGGER_RESUME:
548 /* According to the documentation this should be:
549 0x13 but that value may randomly swap stereo channels */
550 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
551 udelay(10);
552 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
553 /* This two stage init gives the FIFO -> DAC connection time to
554 * settle before first data from DMA flows in. This should ensure
555 * no swapping of stereo channels. Report a bug if otherwise :-) */
556 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
557 chip->active |= DAC2;
558 break;
559 case SNDRV_PCM_TRIGGER_STOP:
560 case SNDRV_PCM_TRIGGER_SUSPEND:
561 outb(0, SLIO_REG(chip, AUDIO2MODE));
562 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
563 chip->active &= ~DAC2;
564 break;
565 default:
566 return -EINVAL;
567 }
568 return 0;
569}
570
571static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
572 int cmd)
573{
574 struct es1938 *chip = snd_pcm_substream_chip(substream);
575 int val;
576 switch (cmd) {
577 case SNDRV_PCM_TRIGGER_START:
578 case SNDRV_PCM_TRIGGER_RESUME:
579 val = 5;
580 chip->active |= DAC1;
581 break;
582 case SNDRV_PCM_TRIGGER_STOP:
583 case SNDRV_PCM_TRIGGER_SUSPEND:
584 val = 0;
585 chip->active &= ~DAC1;
586 break;
587 default:
588 return -EINVAL;
589 }
590 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
591 return 0;
592}
593
594static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
595 int cmd)
596{
597 switch (substream->number) {
598 case 0:
599 return snd_es1938_playback1_trigger(substream, cmd);
600 case 1:
601 return snd_es1938_playback2_trigger(substream, cmd);
602 }
603 snd_BUG();
604 return -EINVAL;
605}
606
607/* --------------------------------------------------------------------
608 * First channel for Extended Mode Audio 1 ADC Operation
609 * --------------------------------------------------------------------*/
610static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
611{
612 struct es1938 *chip = snd_pcm_substream_chip(substream);
613 struct snd_pcm_runtime *runtime = substream->runtime;
614 int u, is8, mono;
615 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
616 unsigned int count = snd_pcm_lib_period_bytes(substream);
617
618 chip->dma1_size = size;
619 chip->dma1_start = runtime->dma_addr;
620
621 mono = (runtime->channels > 1) ? 0 : 1;
622 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
623 u = snd_pcm_format_unsigned(runtime->format);
624
625 chip->dma1_shift = 2 - mono - is8;
626
627 snd_es1938_reset_fifo(chip);
628
629 /* program type */
630 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
631
632 /* set clock and counters */
633 snd_es1938_rate_set(chip, substream, ADC1);
634
635 count = 0x10000 - count;
636 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
637 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
638
639 /* initialize and configure ADC */
640 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
641 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
642 (u ? 0x00 : 0x20) |
643 (is8 ? 0x00 : 0x04) |
644 (mono ? 0x40 : 0x08));
645
646 // snd_es1938_reset_fifo(chip);
647
648 /* 11. configure system interrupt controller and DMA controller */
649 snd_es1938_capture_setdma(chip);
650
651 return 0;
652}
653
654
655/* ------------------------------------------------------------------------------
656 * Second Audio channel DAC Operation
657 * ------------------------------------------------------------------------------*/
658static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
659{
660 struct es1938 *chip = snd_pcm_substream_chip(substream);
661 struct snd_pcm_runtime *runtime = substream->runtime;
662 int u, is8, mono;
663 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
664 unsigned int count = snd_pcm_lib_period_bytes(substream);
665
666 chip->dma2_size = size;
667 chip->dma2_start = runtime->dma_addr;
668
669 mono = (runtime->channels > 1) ? 0 : 1;
670 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
671 u = snd_pcm_format_unsigned(runtime->format);
672
673 chip->dma2_shift = 2 - mono - is8;
674
675 snd_es1938_reset_fifo(chip);
676
677 /* set clock and counters */
678 snd_es1938_rate_set(chip, substream, DAC2);
679
680 count >>= 1;
681 count = 0x10000 - count;
682 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
683 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
684
685 /* initialize and configure Audio 2 DAC */
686 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
687 (mono ? 0 : 2) | (is8 ? 0 : 1));
688
689 /* program DMA */
690 snd_es1938_playback1_setdma(chip);
691
692 return 0;
693}
694
695static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
696{
697 struct es1938 *chip = snd_pcm_substream_chip(substream);
698 struct snd_pcm_runtime *runtime = substream->runtime;
699 int u, is8, mono;
700 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
701 unsigned int count = snd_pcm_lib_period_bytes(substream);
702
703 chip->dma1_size = size;
704 chip->dma1_start = runtime->dma_addr;
705
706 mono = (runtime->channels > 1) ? 0 : 1;
707 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
708 u = snd_pcm_format_unsigned(runtime->format);
709
710 chip->dma1_shift = 2 - mono - is8;
711
712 count = 0x10000 - count;
713
714 /* reset */
715 snd_es1938_reset_fifo(chip);
716
717 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
718
719 /* set clock and counters */
720 snd_es1938_rate_set(chip, substream, DAC1);
721 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
722 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
723
724 /* initialized and configure DAC */
725 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
726 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
727 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
728 0x90 | (mono ? 0x40 : 0x08) |
729 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
730
731 /* program DMA */
732 snd_es1938_playback2_setdma(chip);
733
734 return 0;
735}
736
737static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
738{
739 switch (substream->number) {
740 case 0:
741 return snd_es1938_playback1_prepare(substream);
742 case 1:
743 return snd_es1938_playback2_prepare(substream);
744 }
745 snd_BUG();
746 return -EINVAL;
747}
748
749/* during the incrementing of dma counters the DMA register reads sometimes
750 returns garbage. To ensure a valid hw pointer, the following checks which
751 should be very unlikely to fail are used:
752 - is the current DMA address in the valid DMA range ?
753 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
754 One can argue this could differ by one byte depending on which register is
755 updated first, so the implementation below allows for that.
756*/
757static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
758{
759 struct es1938 *chip = snd_pcm_substream_chip(substream);
760 size_t ptr;
761#if 0
762 size_t old, new;
763 /* This stuff is *needed*, don't ask why - AB */
764 old = inw(SLDM_REG(chip, DMACOUNT));
765 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
766 old = new;
767 ptr = chip->dma1_size - 1 - new;
768#else
769 size_t count;
770 unsigned int diff;
771
772 ptr = inl(SLDM_REG(chip, DMAADDR));
773 count = inw(SLDM_REG(chip, DMACOUNT));
774 diff = chip->dma1_start + chip->dma1_size - ptr - count;
775
776 if (diff > 3 || ptr < chip->dma1_start
777 || ptr >= chip->dma1_start+chip->dma1_size)
778 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
779 else
780 chip->last_capture_dmaaddr = ptr; /* good, remember it */
781
782 ptr -= chip->dma1_start;
783#endif
784 return ptr >> chip->dma1_shift;
785}
786
787static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
788{
789 struct es1938 *chip = snd_pcm_substream_chip(substream);
790 size_t ptr;
791#if 1
792 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
793#else
794 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
795#endif
796 return ptr >> chip->dma2_shift;
797}
798
799static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
800{
801 struct es1938 *chip = snd_pcm_substream_chip(substream);
802 size_t ptr;
803 size_t old, new;
804#if 1
805 /* This stuff is *needed*, don't ask why - AB */
806 old = inw(SLDM_REG(chip, DMACOUNT));
807 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
808 old = new;
809 ptr = chip->dma1_size - 1 - new;
810#else
811 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
812#endif
813 return ptr >> chip->dma1_shift;
814}
815
816static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
817{
818 switch (substream->number) {
819 case 0:
820 return snd_es1938_playback1_pointer(substream);
821 case 1:
822 return snd_es1938_playback2_pointer(substream);
823 }
824 snd_BUG();
825 return -EINVAL;
826}
827
828static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
829 int channel, unsigned long pos,
830#ifndef TARGET_OS2
831 struct iov_iter *dst, unsigned long count)
832#else
833 void *dst, unsigned long count)
834#endif
835{
836 struct snd_pcm_runtime *runtime = substream->runtime;
837 struct es1938 *chip = snd_pcm_substream_chip(substream);
838
839 if (snd_BUG_ON(pos + count > chip->dma1_size))
840 return -EINVAL;
841#ifndef TARGET_OS2
842 if (pos + count < chip->dma1_size) {
843 if (copy_to_iter(runtime->dma_area + pos + 1, count, dst) != count)
844 return -EFAULT;
845 } else {
846 if (copy_to_iter(runtime->dma_area + pos + 1, count - 1, dst) != count - 1)
847 return -EFAULT;
848 if (copy_to_iter(runtime->dma_area, 1, dst) != 1)
849 return -EFAULT;
850 }
851#else
852 if (pos + count < chip->dma1_size) {
853 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
854 return -EFAULT;
855 } else {
856 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
857 return -EFAULT;
858 if (put_user(runtime->dma_area[0],
859 ((unsigned char __user *)dst) + count - 1))
860 return -EFAULT;
861 }
862#endif
863 return 0;
864}
865
866/* ----------------------------------------------------------------------
867 * Audio1 Capture (ADC)
868 * ----------------------------------------------------------------------*/
869static const struct snd_pcm_hardware snd_es1938_capture =
870{
871 .info = (SNDRV_PCM_INFO_INTERLEAVED |
872 SNDRV_PCM_INFO_BLOCK_TRANSFER),
873 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
874 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
875 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
876 .rate_min = 6000,
877 .rate_max = 48000,
878 .channels_min = 1,
879 .channels_max = 2,
880 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
881 .period_bytes_min = 64,
882 .period_bytes_max = 0x8000,
883 .periods_min = 1,
884 .periods_max = 1024,
885 .fifo_size = 256,
886};
887
888/* -----------------------------------------------------------------------
889 * Audio2 Playback (DAC)
890 * -----------------------------------------------------------------------*/
891static const struct snd_pcm_hardware snd_es1938_playback =
892{
893 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
894 SNDRV_PCM_INFO_BLOCK_TRANSFER |
895 SNDRV_PCM_INFO_MMAP_VALID),
896 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
897 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
898 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
899 .rate_min = 6000,
900 .rate_max = 48000,
901 .channels_min = 1,
902 .channels_max = 2,
903 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
904 .period_bytes_min = 64,
905 .period_bytes_max = 0x8000,
906 .periods_min = 1,
907 .periods_max = 1024,
908 .fifo_size = 256,
909};
910
911static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
912{
913 struct es1938 *chip = snd_pcm_substream_chip(substream);
914 struct snd_pcm_runtime *runtime = substream->runtime;
915
916 if (chip->playback2_substream)
917 return -EAGAIN;
918 chip->capture_substream = substream;
919 runtime->hw = snd_es1938_capture;
920 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
921 &hw_constraints_clocks);
922 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
923 return 0;
924}
925
926static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
927{
928 struct es1938 *chip = snd_pcm_substream_chip(substream);
929 struct snd_pcm_runtime *runtime = substream->runtime;
930
931 switch (substream->number) {
932 case 0:
933 chip->playback1_substream = substream;
934 break;
935 case 1:
936 if (chip->capture_substream)
937 return -EAGAIN;
938 chip->playback2_substream = substream;
939 break;
940 default:
941 snd_BUG();
942 return -EINVAL;
943 }
944 runtime->hw = snd_es1938_playback;
945 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
946 &hw_constraints_clocks);
947 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
948 return 0;
949}
950
951static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
952{
953 struct es1938 *chip = snd_pcm_substream_chip(substream);
954
955 chip->capture_substream = NULL;
956 return 0;
957}
958
959static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
960{
961 struct es1938 *chip = snd_pcm_substream_chip(substream);
962
963 switch (substream->number) {
964 case 0:
965 chip->playback1_substream = NULL;
966 break;
967 case 1:
968 chip->playback2_substream = NULL;
969 break;
970 default:
971 snd_BUG();
972 return -EINVAL;
973 }
974 return 0;
975}
976
977static const struct snd_pcm_ops snd_es1938_playback_ops = {
978 .open = snd_es1938_playback_open,
979 .close = snd_es1938_playback_close,
980 .prepare = snd_es1938_playback_prepare,
981 .trigger = snd_es1938_playback_trigger,
982 .pointer = snd_es1938_playback_pointer,
983};
984
985static const struct snd_pcm_ops snd_es1938_capture_ops = {
986 .open = snd_es1938_capture_open,
987 .close = snd_es1938_capture_close,
988 .prepare = snd_es1938_capture_prepare,
989 .trigger = snd_es1938_capture_trigger,
990 .pointer = snd_es1938_capture_pointer,
991 .copy = snd_es1938_capture_copy,
992};
993
994static int snd_es1938_new_pcm(struct es1938 *chip, int device)
995{
996 struct snd_pcm *pcm;
997 int err;
998
999 err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
1000 if (err < 0)
1001 return err;
1002 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1003 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1004
1005 pcm->private_data = chip;
1006 pcm->info_flags = 0;
1007 strcpy(pcm->name, "ESS Solo-1");
1008
1009 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1010 &chip->pci->dev, 64*1024, 64*1024);
1011
1012 chip->pcm = pcm;
1013 return 0;
1014}
1015
1016/* -------------------------------------------------------------------
1017 *
1018 * *** Mixer part ***
1019 */
1020
1021static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1022 struct snd_ctl_elem_info *uinfo)
1023{
1024 static const char * const texts[8] = {
1025 "Mic", "Mic Master", "CD", "AOUT",
1026 "Mic1", "Mix", "Line", "Master"
1027 };
1028
1029 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1030}
1031
1032static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1033 struct snd_ctl_elem_value *ucontrol)
1034{
1035 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1036 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1037 return 0;
1038}
1039
1040static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1041 struct snd_ctl_elem_value *ucontrol)
1042{
1043 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1044 unsigned char val = ucontrol->value.enumerated.item[0];
1045
1046 if (val > 7)
1047 return -EINVAL;
1048 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1049}
1050
1051#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1052
1053static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1054 struct snd_ctl_elem_value *ucontrol)
1055{
1056 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1057 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1058 ucontrol->value.integer.value[0] = !!(val & 8);
1059 return 0;
1060}
1061
1062static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1063 struct snd_ctl_elem_value *ucontrol)
1064{
1065 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1066 unsigned char oval, nval;
1067 int change;
1068 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1069 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1070 change = nval != oval;
1071 if (change) {
1072 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1073 snd_es1938_mixer_write(chip, 0x50, nval);
1074 }
1075 return change;
1076}
1077
1078static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_info *uinfo)
1080{
1081 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1082 uinfo->count = 2;
1083 uinfo->value.integer.min = 0;
1084 uinfo->value.integer.max = 63;
1085 return 0;
1086}
1087
1088static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1089 struct snd_ctl_elem_value *ucontrol)
1090{
1091 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1092 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1093 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1094 return 0;
1095}
1096
1097#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1098
1099static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1100 struct snd_ctl_elem_value *ucontrol)
1101{
1102 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1103 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1104 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1105 return 0;
1106}
1107
1108static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1109{
1110 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1111 chip->master_volume = NULL;
1112 chip->master_switch = NULL;
1113 chip->hw_volume = NULL;
1114 chip->hw_switch = NULL;
1115}
1116
1117static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1118 unsigned char mask, unsigned char val)
1119{
1120 if (reg < 0xa0)
1121 return snd_es1938_mixer_bits(chip, reg, mask, val);
1122 else
1123 return snd_es1938_bits(chip, reg, mask, val);
1124}
1125
1126static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1127{
1128 if (reg < 0xa0)
1129 return snd_es1938_mixer_read(chip, reg);
1130 else
1131 return snd_es1938_read(chip, reg);
1132}
1133
1134#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1135{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1136 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1137 .name = xname, .index = xindex, \
1138 .info = snd_es1938_info_single, \
1139 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1140 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1141 .tlv = { .p = xtlv } }
1142#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1143{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1144 .info = snd_es1938_info_single, \
1145 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1146 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1147
1148static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1149 struct snd_ctl_elem_info *uinfo)
1150{
1151 int mask = (kcontrol->private_value >> 16) & 0xff;
1152
1153 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1154 uinfo->count = 1;
1155 uinfo->value.integer.min = 0;
1156 uinfo->value.integer.max = mask;
1157 return 0;
1158}
1159
1160static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1161 struct snd_ctl_elem_value *ucontrol)
1162{
1163 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1164 int reg = kcontrol->private_value & 0xff;
1165 int shift = (kcontrol->private_value >> 8) & 0xff;
1166 int mask = (kcontrol->private_value >> 16) & 0xff;
1167 int invert = (kcontrol->private_value >> 24) & 0xff;
1168 int val;
1169
1170 val = snd_es1938_reg_read(chip, reg);
1171 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1172 if (invert)
1173 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1174 return 0;
1175}
1176
1177static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1178 struct snd_ctl_elem_value *ucontrol)
1179{
1180 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1181 int reg = kcontrol->private_value & 0xff;
1182 int shift = (kcontrol->private_value >> 8) & 0xff;
1183 int mask = (kcontrol->private_value >> 16) & 0xff;
1184 int invert = (kcontrol->private_value >> 24) & 0xff;
1185 unsigned char val;
1186
1187 val = (ucontrol->value.integer.value[0] & mask);
1188 if (invert)
1189 val = mask - val;
1190 mask <<= shift;
1191 val <<= shift;
1192 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1193}
1194
1195#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1196{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1197 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1198 .name = xname, .index = xindex, \
1199 .info = snd_es1938_info_double, \
1200 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1201 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1202 .tlv = { .p = xtlv } }
1203#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1204{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1205 .info = snd_es1938_info_double, \
1206 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1207 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1208
1209static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1210 struct snd_ctl_elem_info *uinfo)
1211{
1212 int mask = (kcontrol->private_value >> 24) & 0xff;
1213
1214 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1215 uinfo->count = 2;
1216 uinfo->value.integer.min = 0;
1217 uinfo->value.integer.max = mask;
1218 return 0;
1219}
1220
1221static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1222 struct snd_ctl_elem_value *ucontrol)
1223{
1224 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1225 int left_reg = kcontrol->private_value & 0xff;
1226 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1227 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1228 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1229 int mask = (kcontrol->private_value >> 24) & 0xff;
1230 int invert = (kcontrol->private_value >> 22) & 1;
1231 unsigned char left, right;
1232
1233 left = snd_es1938_reg_read(chip, left_reg);
1234 if (left_reg != right_reg)
1235 right = snd_es1938_reg_read(chip, right_reg);
1236 else
1237 right = left;
1238 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1239 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1240 if (invert) {
1241 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1242 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1243 }
1244 return 0;
1245}
1246
1247static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1248 struct snd_ctl_elem_value *ucontrol)
1249{
1250 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1251 int left_reg = kcontrol->private_value & 0xff;
1252 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1253 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1254 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1255 int mask = (kcontrol->private_value >> 24) & 0xff;
1256 int invert = (kcontrol->private_value >> 22) & 1;
1257 int change;
1258 unsigned char val1, val2, mask1, mask2;
1259
1260 val1 = ucontrol->value.integer.value[0] & mask;
1261 val2 = ucontrol->value.integer.value[1] & mask;
1262 if (invert) {
1263 val1 = mask - val1;
1264 val2 = mask - val2;
1265 }
1266 val1 <<= shift_left;
1267 val2 <<= shift_right;
1268 mask1 = mask << shift_left;
1269 mask2 = mask << shift_right;
1270 if (left_reg != right_reg) {
1271 change = 0;
1272 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1273 change = 1;
1274 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1275 change = 1;
1276 } else {
1277 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1278 val1 | val2) != (val1 | val2));
1279 }
1280 return change;
1281}
1282
1283#ifndef TARGET_OS2
1284static const DECLARE_TLV_DB_RANGE(db_scale_master,
1285 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1286 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1287);
1288
1289static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1290 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1291 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1292);
1293
1294static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1295 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1296 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1297);
1298
1299static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1300 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1301 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1302);
1303
1304static const DECLARE_TLV_DB_RANGE(db_scale_line,
1305 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1306 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1307);
1308#else
1309static unsigned int db_scale_master[] = {
1310 TLV_DB_RANGE_HEAD(2),
1311 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1312 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1313};
1314
1315static unsigned int db_scale_audio1[] = {
1316 TLV_DB_RANGE_HEAD(2),
1317 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1318 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1319};
1320
1321static unsigned int db_scale_audio2[] = {
1322 TLV_DB_RANGE_HEAD(2),
1323 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1324 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1325};
1326
1327static unsigned int db_scale_mic[] = {
1328 TLV_DB_RANGE_HEAD(2),
1329 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1330 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1331};
1332
1333static unsigned int db_scale_line[] = {
1334 TLV_DB_RANGE_HEAD(2),
1335 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1336 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1337};
1338#endif
1339
1340static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1341
1342static const struct snd_kcontrol_new snd_es1938_controls[] = {
1343ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1344 db_scale_master),
1345ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1346{
1347 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1348 .name = "Hardware Master Playback Volume",
1349 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1350 .info = snd_es1938_info_hw_volume,
1351 .get = snd_es1938_get_hw_volume,
1352},
1353{
1354 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1355 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1356 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1357 .name = "Hardware Master Playback Switch",
1358 .info = snd_es1938_info_hw_switch,
1359 .get = snd_es1938_get_hw_switch,
1360 .tlv = { .p = db_scale_master },
1361},
1362ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1363ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1364 db_scale_line),
1365ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1366ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1367 db_scale_mic),
1368ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1369 db_scale_line),
1370ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1371 db_scale_mic),
1372ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1373 db_scale_line),
1374ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1375 db_scale_capture),
1376ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1377ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1378ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1379{
1380 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1381 .name = "Capture Source",
1382 .info = snd_es1938_info_mux,
1383 .get = snd_es1938_get_mux,
1384 .put = snd_es1938_put_mux,
1385},
1386ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1387 db_scale_line),
1388ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1389 db_scale_audio2),
1390ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1391 db_scale_mic),
1392ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1393 db_scale_line),
1394ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1395 db_scale_mic),
1396ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1397 db_scale_line),
1398ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1399 db_scale_line),
1400ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1401 db_scale_line),
1402ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1403 db_scale_audio2),
1404ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1405 db_scale_audio1),
1406ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1407{
1408 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1409 .name = "3D Control - Switch",
1410 .info = snd_es1938_info_spatializer_enable,
1411 .get = snd_es1938_get_spatializer_enable,
1412 .put = snd_es1938_put_spatializer_enable,
1413},
1414ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1415};
1416
1417
1418/* ---------------------------------------------------------------------------- */
1419/* ---------------------------------------------------------------------------- */
1420
1421/*
1422 * initialize the chip - used by resume callback, too
1423 */
1424static void snd_es1938_chip_init(struct es1938 *chip)
1425{
1426 /* reset chip */
1427 snd_es1938_reset(chip);
1428
1429 /* configure native mode */
1430
1431 /* enable bus master */
1432 pci_set_master(chip->pci);
1433
1434 /* disable legacy audio */
1435 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1436
1437 /* set DDMA base */
1438 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1439
1440 /* set DMA/IRQ policy */
1441 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1442
1443 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1444 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1445
1446 /* reset DMA */
1447 outb(0, SLDM_REG(chip, DMACLEAR));
1448}
1449
1450#ifdef CONFIG_PM_SLEEP
1451/*
1452 * PM support
1453 */
1454
1455static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1456 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1457 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1458 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1459 0xa8, 0xb4,
1460};
1461
1462
1463static int es1938_suspend(struct device *dev)
1464{
1465 struct snd_card *card = dev_get_drvdata(dev);
1466 struct es1938 *chip = card->private_data;
1467 const unsigned char *s;
1468 unsigned char *d;
1469
1470 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1471
1472 /* save mixer-related registers */
1473 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1474 *d = snd_es1938_reg_read(chip, *s);
1475
1476 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1477 if (chip->irq >= 0) {
1478 free_irq(chip->irq, chip);
1479 chip->irq = -1;
1480 card->sync_irq = -1;
1481 }
1482 return 0;
1483}
1484
1485static int es1938_resume(struct device *dev)
1486{
1487 struct pci_dev *pci = to_pci_dev(dev);
1488 struct snd_card *card = dev_get_drvdata(dev);
1489 struct es1938 *chip = card->private_data;
1490 const unsigned char *s;
1491 unsigned char *d;
1492
1493 if (request_irq(pci->irq, snd_es1938_interrupt,
1494 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1495 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1496 pci->irq);
1497 snd_card_disconnect(card);
1498 return -EIO;
1499 }
1500 chip->irq = pci->irq;
1501 card->sync_irq = chip->irq;
1502 snd_es1938_chip_init(chip);
1503
1504 /* restore mixer-related registers */
1505 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1506 if (*s < 0xa0)
1507 snd_es1938_mixer_write(chip, *s, *d);
1508 else
1509 snd_es1938_write(chip, *s, *d);
1510 }
1511
1512 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1513 return 0;
1514}
1515
1516static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1517#define ES1938_PM_OPS &es1938_pm
1518#else
1519#define ES1938_PM_OPS NULL
1520#endif /* CONFIG_PM_SLEEP */
1521
1522#ifdef SUPPORT_JOYSTICK
1523static int snd_es1938_create_gameport(struct es1938 *chip)
1524{
1525 struct gameport *gp;
1526
1527 chip->gameport = gp = gameport_allocate_port();
1528 if (!gp) {
1529 dev_err(chip->card->dev,
1530 "cannot allocate memory for gameport\n");
1531 return -ENOMEM;
1532 }
1533
1534 gameport_set_name(gp, "ES1938");
1535 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1536 gameport_set_dev_parent(gp, &chip->pci->dev);
1537 gp->io = chip->game_port;
1538
1539 gameport_register_port(gp);
1540
1541 return 0;
1542}
1543
1544static void snd_es1938_free_gameport(struct es1938 *chip)
1545{
1546 if (chip->gameport) {
1547 gameport_unregister_port(chip->gameport);
1548 chip->gameport = NULL;
1549 }
1550}
1551#else
1552static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1553static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1554#endif /* SUPPORT_JOYSTICK */
1555
1556static void snd_es1938_free(struct snd_card *card)
1557{
1558 struct es1938 *chip = card->private_data;
1559
1560 /* disable irqs */
1561 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1562 if (chip->rmidi)
1563 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1564
1565 snd_es1938_free_gameport(chip);
1566
1567 if (chip->irq >= 0)
1568 free_irq(chip->irq, chip);
1569}
1570
1571static int snd_es1938_create(struct snd_card *card,
1572 struct pci_dev *pci)
1573{
1574 struct es1938 *chip = card->private_data;
1575 int err;
1576
1577 /* enable PCI device */
1578 err = pcim_enable_device(pci);
1579 if (err < 0)
1580 return err;
1581 /* check, if we can restrict PCI DMA transfers to 24 bits */
1582 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1583 dev_err(card->dev,
1584 "architecture does not support 24bit PCI busmaster DMA\n");
1585 return -ENXIO;
1586 }
1587
1588 spin_lock_init(&chip->reg_lock);
1589 spin_lock_init(&chip->mixer_lock);
1590 chip->card = card;
1591 chip->pci = pci;
1592 chip->irq = -1;
1593 err = pci_request_regions(pci, "ESS Solo-1");
1594 if (err < 0)
1595 return err;
1596 chip->io_port = pci_resource_start(pci, 0);
1597 chip->sb_port = pci_resource_start(pci, 1);
1598 chip->vc_port = pci_resource_start(pci, 2);
1599 chip->mpu_port = pci_resource_start(pci, 3);
1600 chip->game_port = pci_resource_start(pci, 4);
1601 /* still use non-managed irq handler as it's re-acquired at PM resume */
1602 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1603 KBUILD_MODNAME, chip)) {
1604 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1605 return -EBUSY;
1606 }
1607 chip->irq = pci->irq;
1608 card->sync_irq = chip->irq;
1609 card->private_free = snd_es1938_free;
1610 dev_dbg(card->dev,
1611 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1612 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1613
1614 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1615
1616 snd_es1938_chip_init(chip);
1617 return 0;
1618}
1619
1620/* --------------------------------------------------------------------
1621 * Interrupt handler
1622 * -------------------------------------------------------------------- */
1623static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1624{
1625 struct es1938 *chip = dev_id;
1626 unsigned char status;
1627 __always_unused unsigned char audiostatus;
1628 int handled = 0;
1629
1630 status = inb(SLIO_REG(chip, IRQCONTROL));
1631#if 0
1632 dev_dbg(chip->card->dev,
1633 "Es1938debug - interrupt status: =0x%x\n", status);
1634#endif
1635
1636 /* AUDIO 1 */
1637 if (status & 0x10) {
1638#if 0
1639 dev_dbg(chip->card->dev,
1640 "Es1938debug - AUDIO channel 1 interrupt\n");
1641 dev_dbg(chip->card->dev,
1642 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1643 inw(SLDM_REG(chip, DMACOUNT)));
1644 dev_dbg(chip->card->dev,
1645 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1646 inl(SLDM_REG(chip, DMAADDR)));
1647 dev_dbg(chip->card->dev,
1648 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1649 inl(SLDM_REG(chip, DMASTATUS)));
1650#endif
1651 /* clear irq */
1652 handled = 1;
1653 audiostatus = inb(SLSB_REG(chip, STATUS));
1654 if (chip->active & ADC1)
1655 snd_pcm_period_elapsed(chip->capture_substream);
1656 else if (chip->active & DAC1)
1657 snd_pcm_period_elapsed(chip->playback2_substream);
1658 }
1659
1660 /* AUDIO 2 */
1661 if (status & 0x20) {
1662#if 0
1663 dev_dbg(chip->card->dev,
1664 "Es1938debug - AUDIO channel 2 interrupt\n");
1665 dev_dbg(chip->card->dev,
1666 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1667 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1668 dev_dbg(chip->card->dev,
1669 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1670 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1671
1672#endif
1673 /* clear irq */
1674 handled = 1;
1675 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1676 if (chip->active & DAC2)
1677 snd_pcm_period_elapsed(chip->playback1_substream);
1678 }
1679
1680 /* Hardware volume */
1681 if (status & 0x40) {
1682 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1683 handled = 1;
1684 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1685 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1686 if (!split) {
1687 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1688 &chip->master_switch->id);
1689 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1690 &chip->master_volume->id);
1691 }
1692 /* ack interrupt */
1693 snd_es1938_mixer_write(chip, 0x66, 0x00);
1694 }
1695
1696 /* MPU401 */
1697 if (status & 0x80) {
1698 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1699 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1700 // andreas@flying-snail.de
1701 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1702 if (chip->rmidi) {
1703 handled = 1;
1704 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1705 }
1706 }
1707 return IRQ_RETVAL(handled);
1708}
1709
1710#define ES1938_DMA_SIZE 64
1711
1712static int snd_es1938_mixer(struct es1938 *chip)
1713{
1714 struct snd_card *card;
1715 unsigned int idx;
1716 int err;
1717
1718 card = chip->card;
1719
1720 strcpy(card->mixername, "ESS Solo-1");
1721
1722 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1723 struct snd_kcontrol *kctl;
1724 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1725 switch (idx) {
1726 case 0:
1727 chip->master_volume = kctl;
1728 kctl->private_free = snd_es1938_hwv_free;
1729 break;
1730 case 1:
1731 chip->master_switch = kctl;
1732 kctl->private_free = snd_es1938_hwv_free;
1733 break;
1734 case 2:
1735 chip->hw_volume = kctl;
1736 kctl->private_free = snd_es1938_hwv_free;
1737 break;
1738 case 3:
1739 chip->hw_switch = kctl;
1740 kctl->private_free = snd_es1938_hwv_free;
1741 break;
1742 }
1743 err = snd_ctl_add(card, kctl);
1744 if (err < 0)
1745 return err;
1746 }
1747 return 0;
1748}
1749
1750
1751static int __snd_es1938_probe(struct pci_dev *pci,
1752 const struct pci_device_id *pci_id)
1753{
1754 static int dev;
1755 struct snd_card *card;
1756 struct es1938 *chip;
1757 struct snd_opl3 *opl3;
1758 int idx, err;
1759
1760 if (dev >= SNDRV_CARDS)
1761 return -ENODEV;
1762 if (!enable[dev]) {
1763 dev++;
1764 return -ENOENT;
1765 }
1766
1767 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1768 sizeof(*chip), &card);
1769 if (err < 0)
1770 return err;
1771 chip = card->private_data;
1772
1773 for (idx = 0; idx < 5; idx++)
1774 if (pci_resource_start(pci, idx) == 0 ||
1775 !(pci_resource_flags(pci, idx) & IORESOURCE_IO))
1776 return -ENODEV;
1777
1778 err = snd_es1938_create(card, pci);
1779 if (err < 0)
1780 return err;
1781
1782 strcpy(card->driver, "ES1938");
1783 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1784 sprintf(card->longname, "%s rev %i, irq %i",
1785 card->shortname,
1786 chip->revision,
1787 chip->irq);
1788
1789 err = snd_es1938_new_pcm(chip, 0);
1790 if (err < 0)
1791 return err;
1792 err = snd_es1938_mixer(chip);
1793 if (err < 0)
1794 return err;
1795 if (snd_opl3_create(card,
1796 SLSB_REG(chip, FMLOWADDR),
1797 SLSB_REG(chip, FMHIGHADDR),
1798 OPL3_HW_OPL3, 1, &opl3) < 0) {
1799 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1800 SLSB_REG(chip, FMLOWADDR));
1801 } else {
1802 err = snd_opl3_timer_new(opl3, 0, 1);
1803 if (err < 0)
1804 return err;
1805 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1806 if (err < 0)
1807 return err;
1808 }
1809 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1810 chip->mpu_port,
1811 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1812 -1, &chip->rmidi) < 0) {
1813 dev_err(card->dev, "unable to initialize MPU-401\n");
1814 } else {
1815 // this line is vital for MIDI interrupt handling on ess-solo1
1816 // andreas@flying-snail.de
1817 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1818 }
1819
1820 snd_es1938_create_gameport(chip);
1821
1822 err = snd_card_register(card);
1823 if (err < 0)
1824 return err;
1825
1826 pci_set_drvdata(pci, card);
1827 dev++;
1828 return 0;
1829}
1830
1831static int snd_es1938_probe(struct pci_dev *pci,
1832 const struct pci_device_id *pci_id)
1833{
1834 return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
1835}
1836
1837static struct pci_driver es1938_driver = {
1838 .name = KBUILD_MODNAME,
1839 .id_table = snd_es1938_ids,
1840 .probe = snd_es1938_probe,
1841 .driver = {
1842 .pm = ES1938_PM_OPS,
1843 },
1844};
1845
1846module_pci_driver(es1938_driver);
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