source: GPL/trunk/alsa-kernel/pci/es1938.c@ 752

Last change on this file since 752 was 717, checked in by David Azarewicz, 3 years ago

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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5 * Jaroslav Kysela <perex@perex.cz>,
6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34#ifdef TARGET_OS2
35#define KBUILD_MODNAME "es1938"
36#endif
37
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/gameport.h>
43#include <linux/module.h>
44#include <linux/delay.h>
45#include <linux/dma-mapping.h>
46#include <linux/io.h>
47#include <sound/core.h>
48#include <sound/control.h>
49#include <sound/pcm.h>
50#include <sound/opl3.h>
51#include <sound/mpu401.h>
52#include <sound/initval.h>
53#include <sound/tlv.h>
54
55MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
56MODULE_DESCRIPTION("ESS Solo-1");
57MODULE_LICENSE("GPL");
58
59#if IS_REACHABLE(CONFIG_GAMEPORT)
60#define SUPPORT_JOYSTICK 1
61#endif
62
63static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
64static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
65static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
66
67module_param_array(index, int, NULL, 0444);
68MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
69module_param_array(id, charp, NULL, 0444);
70MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
71module_param_array(enable, bool, NULL, 0444);
72MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
73
74#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
75
76#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
77
78#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
79
80#define SL_PCI_LEGACYCONTROL 0x40
81#define SL_PCI_CONFIG 0x50
82#define SL_PCI_DDMACONTROL 0x60
83
84#define ESSIO_REG_AUDIO2DMAADDR 0
85#define ESSIO_REG_AUDIO2DMACOUNT 4
86#define ESSIO_REG_AUDIO2MODE 6
87#define ESSIO_REG_IRQCONTROL 7
88
89#define ESSDM_REG_DMAADDR 0x00
90#define ESSDM_REG_DMACOUNT 0x04
91#define ESSDM_REG_DMACOMMAND 0x08
92#define ESSDM_REG_DMASTATUS 0x08
93#define ESSDM_REG_DMAMODE 0x0b
94#define ESSDM_REG_DMACLEAR 0x0d
95#define ESSDM_REG_DMAMASK 0x0f
96
97#define ESSSB_REG_FMLOWADDR 0x00
98#define ESSSB_REG_FMHIGHADDR 0x02
99#define ESSSB_REG_MIXERADDR 0x04
100#define ESSSB_REG_MIXERDATA 0x05
101
102#define ESSSB_IREG_AUDIO1 0x14
103#define ESSSB_IREG_MICMIX 0x1a
104#define ESSSB_IREG_RECSRC 0x1c
105#define ESSSB_IREG_MASTER 0x32
106#define ESSSB_IREG_FM 0x36
107#define ESSSB_IREG_AUXACD 0x38
108#define ESSSB_IREG_AUXB 0x3a
109#define ESSSB_IREG_PCSPEAKER 0x3c
110#define ESSSB_IREG_LINE 0x3e
111#define ESSSB_IREG_SPATCONTROL 0x50
112#define ESSSB_IREG_SPATLEVEL 0x52
113#define ESSSB_IREG_MASTER_LEFT 0x60
114#define ESSSB_IREG_MASTER_RIGHT 0x62
115#define ESSSB_IREG_MPU401CONTROL 0x64
116#define ESSSB_IREG_MICMIXRECORD 0x68
117#define ESSSB_IREG_AUDIO2RECORD 0x69
118#define ESSSB_IREG_AUXACDRECORD 0x6a
119#define ESSSB_IREG_FMRECORD 0x6b
120#define ESSSB_IREG_AUXBRECORD 0x6c
121#define ESSSB_IREG_MONO 0x6d
122#define ESSSB_IREG_LINERECORD 0x6e
123#define ESSSB_IREG_MONORECORD 0x6f
124#define ESSSB_IREG_AUDIO2SAMPLE 0x70
125#define ESSSB_IREG_AUDIO2MODE 0x71
126#define ESSSB_IREG_AUDIO2FILTER 0x72
127#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
128#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
129#define ESSSB_IREG_AUDIO2CONTROL1 0x78
130#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
131#define ESSSB_IREG_AUDIO2 0x7c
132
133#define ESSSB_REG_RESET 0x06
134
135#define ESSSB_REG_READDATA 0x0a
136#define ESSSB_REG_WRITEDATA 0x0c
137#define ESSSB_REG_READSTATUS 0x0c
138
139#define ESSSB_REG_STATUS 0x0e
140
141#define ESS_CMD_EXTSAMPLERATE 0xa1
142#define ESS_CMD_FILTERDIV 0xa2
143#define ESS_CMD_DMACNTRELOADL 0xa4
144#define ESS_CMD_DMACNTRELOADH 0xa5
145#define ESS_CMD_ANALOGCONTROL 0xa8
146#define ESS_CMD_IRQCONTROL 0xb1
147#define ESS_CMD_DRQCONTROL 0xb2
148#define ESS_CMD_RECLEVEL 0xb4
149#define ESS_CMD_SETFORMAT 0xb6
150#define ESS_CMD_SETFORMAT2 0xb7
151#define ESS_CMD_DMACONTROL 0xb8
152#define ESS_CMD_DMATYPE 0xb9
153#define ESS_CMD_OFFSETLEFT 0xba
154#define ESS_CMD_OFFSETRIGHT 0xbb
155#define ESS_CMD_READREG 0xc0
156#define ESS_CMD_ENABLEEXT 0xc6
157#define ESS_CMD_PAUSEDMA 0xd0
158#define ESS_CMD_ENABLEAUDIO1 0xd1
159#define ESS_CMD_STOPAUDIO1 0xd3
160#define ESS_CMD_AUDIO1STATUS 0xd8
161#define ESS_CMD_CONTDMA 0xd4
162#define ESS_CMD_TESTIRQ 0xf2
163
164#define ESS_RECSRC_MIC 0
165#define ESS_RECSRC_AUXACD 2
166#define ESS_RECSRC_AUXB 5
167#define ESS_RECSRC_LINE 6
168#define ESS_RECSRC_NONE 7
169
170#define DAC1 0x01
171#define ADC1 0x02
172#define DAC2 0x04
173
174/*
175
176 */
177
178#define SAVED_REG_SIZE 32 /* max. number of registers to save */
179
180struct es1938 {
181 int irq;
182
183 unsigned long io_port;
184 unsigned long sb_port;
185 unsigned long vc_port;
186 unsigned long mpu_port;
187 unsigned long game_port;
188 unsigned long ddma_port;
189
190 unsigned char irqmask;
191 unsigned char revision;
192
193 struct snd_kcontrol *hw_volume;
194 struct snd_kcontrol *hw_switch;
195 struct snd_kcontrol *master_volume;
196 struct snd_kcontrol *master_switch;
197
198 struct pci_dev *pci;
199 struct snd_card *card;
200 struct snd_pcm *pcm;
201 struct snd_pcm_substream *capture_substream;
202 struct snd_pcm_substream *playback1_substream;
203 struct snd_pcm_substream *playback2_substream;
204 struct snd_rawmidi *rmidi;
205
206 unsigned int dma1_size;
207 unsigned int dma2_size;
208 unsigned int dma1_start;
209 unsigned int dma2_start;
210 unsigned int dma1_shift;
211 unsigned int dma2_shift;
212 unsigned int last_capture_dmaaddr;
213 unsigned int active;
214
215 spinlock_t reg_lock;
216 spinlock_t mixer_lock;
217 struct snd_info_entry *proc_entry;
218
219#ifdef SUPPORT_JOYSTICK
220 struct gameport *gameport;
221#endif
222#ifdef CONFIG_PM_SLEEP
223 unsigned char saved_regs[SAVED_REG_SIZE];
224#endif
225};
226
227static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
228
229static const struct pci_device_id snd_es1938_ids[] = {
230 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
231 { 0, }
232};
233
234MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
235
236#define RESET_LOOP_TIMEOUT 0x10000
237#define WRITE_LOOP_TIMEOUT 0x10000
238#define GET_LOOP_TIMEOUT 0x01000
239
240/* -----------------------------------------------------------------
241 * Write to a mixer register
242 * -----------------------------------------------------------------*/
243static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
244{
245 unsigned long flags;
246 spin_lock_irqsave(&chip->mixer_lock, flags);
247 outb(reg, SLSB_REG(chip, MIXERADDR));
248 outb(val, SLSB_REG(chip, MIXERDATA));
249 spin_unlock_irqrestore(&chip->mixer_lock, flags);
250 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
251}
252
253/* -----------------------------------------------------------------
254 * Read from a mixer register
255 * -----------------------------------------------------------------*/
256static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
257{
258 int data;
259 unsigned long flags;
260 spin_lock_irqsave(&chip->mixer_lock, flags);
261 outb(reg, SLSB_REG(chip, MIXERADDR));
262 data = inb(SLSB_REG(chip, MIXERDATA));
263 spin_unlock_irqrestore(&chip->mixer_lock, flags);
264 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
265 return data;
266}
267
268/* -----------------------------------------------------------------
269 * Write to some bits of a mixer register (return old value)
270 * -----------------------------------------------------------------*/
271static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
272 unsigned char mask, unsigned char val)
273{
274 unsigned long flags;
275 unsigned char old, new, oval;
276 spin_lock_irqsave(&chip->mixer_lock, flags);
277 outb(reg, SLSB_REG(chip, MIXERADDR));
278 old = inb(SLSB_REG(chip, MIXERDATA));
279 oval = old & mask;
280 if (val != oval) {
281 new = (old & ~mask) | (val & mask);
282 outb(new, SLSB_REG(chip, MIXERDATA));
283 dev_dbg(chip->card->dev,
284 "Mixer reg %02x was %02x, set to %02x\n",
285 reg, old, new);
286 }
287 spin_unlock_irqrestore(&chip->mixer_lock, flags);
288 return oval;
289}
290
291/* -----------------------------------------------------------------
292 * Write command to Controller Registers
293 * -----------------------------------------------------------------*/
294static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
295{
296 int i;
297 unsigned char v;
298 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
299 v = inb(SLSB_REG(chip, READSTATUS));
300 if (!(v & 0x80)) {
301 outb(cmd, SLSB_REG(chip, WRITEDATA));
302 return;
303 }
304 }
305 dev_err(chip->card->dev,
306 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
307}
308
309/* -----------------------------------------------------------------
310 * Read the Read Data Buffer
311 * -----------------------------------------------------------------*/
312static int snd_es1938_get_byte(struct es1938 *chip)
313{
314 int i;
315 unsigned char v;
316 for (i = GET_LOOP_TIMEOUT; i; i--) {
317 v = inb(SLSB_REG(chip, STATUS));
318 if (v & 0x80)
319 return inb(SLSB_REG(chip, READDATA));
320 }
321 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
322 return -ENODEV;
323}
324
325/* -----------------------------------------------------------------
326 * Write value cmd register
327 * -----------------------------------------------------------------*/
328static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
329{
330 unsigned long flags;
331 spin_lock_irqsave(&chip->reg_lock, flags);
332 snd_es1938_write_cmd(chip, reg);
333 snd_es1938_write_cmd(chip, val);
334 spin_unlock_irqrestore(&chip->reg_lock, flags);
335 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
336}
337
338/* -----------------------------------------------------------------
339 * Read data from cmd register and return it
340 * -----------------------------------------------------------------*/
341static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
342{
343 unsigned char val;
344 unsigned long flags;
345 spin_lock_irqsave(&chip->reg_lock, flags);
346 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
347 snd_es1938_write_cmd(chip, reg);
348 val = snd_es1938_get_byte(chip);
349 spin_unlock_irqrestore(&chip->reg_lock, flags);
350 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
351 return val;
352}
353
354/* -----------------------------------------------------------------
355 * Write data to cmd register and return old value
356 * -----------------------------------------------------------------*/
357static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
358 unsigned char val)
359{
360 unsigned long flags;
361 unsigned char old, new, oval;
362 spin_lock_irqsave(&chip->reg_lock, flags);
363 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
364 snd_es1938_write_cmd(chip, reg);
365 old = snd_es1938_get_byte(chip);
366 oval = old & mask;
367 if (val != oval) {
368 snd_es1938_write_cmd(chip, reg);
369 new = (old & ~mask) | (val & mask);
370 snd_es1938_write_cmd(chip, new);
371 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
372 reg, old, new);
373 }
374 spin_unlock_irqrestore(&chip->reg_lock, flags);
375 return oval;
376}
377
378/* --------------------------------------------------------------------
379 * Reset the chip
380 * --------------------------------------------------------------------*/
381static void snd_es1938_reset(struct es1938 *chip)
382{
383 int i;
384
385 outb(3, SLSB_REG(chip, RESET));
386 inb(SLSB_REG(chip, RESET));
387 outb(0, SLSB_REG(chip, RESET));
388 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
389 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
390 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
391 goto __next;
392 }
393 }
394 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
395
396 __next:
397 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
398
399 /* Demand transfer DMA: 4 bytes per DMA request */
400 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
401
402 /* Change behaviour of register A1
403 4x oversampling
404 2nd channel DAC asynchronous */
405 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
406 /* enable/select DMA channel and IRQ channel */
407 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
408 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
409 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
410 /* Set spatializer parameters to recommended values */
411 snd_es1938_mixer_write(chip, 0x54, 0x8f);
412 snd_es1938_mixer_write(chip, 0x56, 0x95);
413 snd_es1938_mixer_write(chip, 0x58, 0x94);
414 snd_es1938_mixer_write(chip, 0x5a, 0x80);
415}
416
417/* --------------------------------------------------------------------
418 * Reset the FIFOs
419 * --------------------------------------------------------------------*/
420static void snd_es1938_reset_fifo(struct es1938 *chip)
421{
422 outb(2, SLSB_REG(chip, RESET));
423 outb(0, SLSB_REG(chip, RESET));
424}
425
426static const struct snd_ratnum clocks[2] = {
427 {
428 .num = 793800,
429 .den_min = 1,
430 .den_max = 128,
431 .den_step = 1,
432 },
433 {
434 .num = 768000,
435 .den_min = 1,
436 .den_max = 128,
437 .den_step = 1,
438 }
439};
440
441static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
442 .nrats = 2,
443 .rats = clocks,
444};
445
446
447static void snd_es1938_rate_set(struct es1938 *chip,
448 struct snd_pcm_substream *substream,
449 int mode)
450{
451 unsigned int bits, div0;
452 struct snd_pcm_runtime *runtime = substream->runtime;
453 if (runtime->rate_num == clocks[0].num)
454 bits = 128 - runtime->rate_den;
455 else
456 bits = 256 - runtime->rate_den;
457
458 /* set filter register */
459 div0 = 256 - 7160000*20/(8*82*runtime->rate);
460
461 if (mode == DAC2) {
462 snd_es1938_mixer_write(chip, 0x70, bits);
463 snd_es1938_mixer_write(chip, 0x72, div0);
464 } else {
465 snd_es1938_write(chip, 0xA1, bits);
466 snd_es1938_write(chip, 0xA2, div0);
467 }
468}
469
470/* --------------------------------------------------------------------
471 * Configure Solo1 builtin DMA Controller
472 * --------------------------------------------------------------------*/
473
474static void snd_es1938_playback1_setdma(struct es1938 *chip)
475{
476 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
477 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
478 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
479 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
480}
481
482static void snd_es1938_playback2_setdma(struct es1938 *chip)
483{
484 /* Enable DMA controller */
485 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
486 /* 1. Master reset */
487 outb(0, SLDM_REG(chip, DMACLEAR));
488 /* 2. Mask DMA */
489 outb(1, SLDM_REG(chip, DMAMASK));
490 outb(0x18, SLDM_REG(chip, DMAMODE));
491 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
492 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
493 /* 3. Unmask DMA */
494 outb(0, SLDM_REG(chip, DMAMASK));
495}
496
497static void snd_es1938_capture_setdma(struct es1938 *chip)
498{
499 /* Enable DMA controller */
500 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
501 /* 1. Master reset */
502 outb(0, SLDM_REG(chip, DMACLEAR));
503 /* 2. Mask DMA */
504 outb(1, SLDM_REG(chip, DMAMASK));
505 outb(0x14, SLDM_REG(chip, DMAMODE));
506 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
507 chip->last_capture_dmaaddr = chip->dma1_start;
508 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
509 /* 3. Unmask DMA */
510 outb(0, SLDM_REG(chip, DMAMASK));
511}
512
513/* ----------------------------------------------------------------------
514 *
515 * *** PCM part ***
516 */
517
518static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
519 int cmd)
520{
521 struct es1938 *chip = snd_pcm_substream_chip(substream);
522 int val;
523 switch (cmd) {
524 case SNDRV_PCM_TRIGGER_START:
525 case SNDRV_PCM_TRIGGER_RESUME:
526 val = 0x0f;
527 chip->active |= ADC1;
528 break;
529 case SNDRV_PCM_TRIGGER_STOP:
530 case SNDRV_PCM_TRIGGER_SUSPEND:
531 val = 0x00;
532 chip->active &= ~ADC1;
533 break;
534 default:
535 return -EINVAL;
536 }
537 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
538 return 0;
539}
540
541static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
542 int cmd)
543{
544 struct es1938 *chip = snd_pcm_substream_chip(substream);
545 switch (cmd) {
546 case SNDRV_PCM_TRIGGER_START:
547 case SNDRV_PCM_TRIGGER_RESUME:
548 /* According to the documentation this should be:
549 0x13 but that value may randomly swap stereo channels */
550 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
551 udelay(10);
552 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
553 /* This two stage init gives the FIFO -> DAC connection time to
554 * settle before first data from DMA flows in. This should ensure
555 * no swapping of stereo channels. Report a bug if otherwise :-) */
556 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
557 chip->active |= DAC2;
558 break;
559 case SNDRV_PCM_TRIGGER_STOP:
560 case SNDRV_PCM_TRIGGER_SUSPEND:
561 outb(0, SLIO_REG(chip, AUDIO2MODE));
562 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
563 chip->active &= ~DAC2;
564 break;
565 default:
566 return -EINVAL;
567 }
568 return 0;
569}
570
571static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
572 int cmd)
573{
574 struct es1938 *chip = snd_pcm_substream_chip(substream);
575 int val;
576 switch (cmd) {
577 case SNDRV_PCM_TRIGGER_START:
578 case SNDRV_PCM_TRIGGER_RESUME:
579 val = 5;
580 chip->active |= DAC1;
581 break;
582 case SNDRV_PCM_TRIGGER_STOP:
583 case SNDRV_PCM_TRIGGER_SUSPEND:
584 val = 0;
585 chip->active &= ~DAC1;
586 break;
587 default:
588 return -EINVAL;
589 }
590 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
591 return 0;
592}
593
594static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
595 int cmd)
596{
597 switch (substream->number) {
598 case 0:
599 return snd_es1938_playback1_trigger(substream, cmd);
600 case 1:
601 return snd_es1938_playback2_trigger(substream, cmd);
602 }
603 snd_BUG();
604 return -EINVAL;
605}
606
607/* --------------------------------------------------------------------
608 * First channel for Extended Mode Audio 1 ADC Operation
609 * --------------------------------------------------------------------*/
610static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
611{
612 struct es1938 *chip = snd_pcm_substream_chip(substream);
613 struct snd_pcm_runtime *runtime = substream->runtime;
614 int u, is8, mono;
615 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
616 unsigned int count = snd_pcm_lib_period_bytes(substream);
617
618 chip->dma1_size = size;
619 chip->dma1_start = runtime->dma_addr;
620
621 mono = (runtime->channels > 1) ? 0 : 1;
622 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
623 u = snd_pcm_format_unsigned(runtime->format);
624
625 chip->dma1_shift = 2 - mono - is8;
626
627 snd_es1938_reset_fifo(chip);
628
629 /* program type */
630 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
631
632 /* set clock and counters */
633 snd_es1938_rate_set(chip, substream, ADC1);
634
635 count = 0x10000 - count;
636 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
637 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
638
639 /* initialize and configure ADC */
640 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
641 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
642 (u ? 0x00 : 0x20) |
643 (is8 ? 0x00 : 0x04) |
644 (mono ? 0x40 : 0x08));
645
646 // snd_es1938_reset_fifo(chip);
647
648 /* 11. configure system interrupt controller and DMA controller */
649 snd_es1938_capture_setdma(chip);
650
651 return 0;
652}
653
654
655/* ------------------------------------------------------------------------------
656 * Second Audio channel DAC Operation
657 * ------------------------------------------------------------------------------*/
658static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
659{
660 struct es1938 *chip = snd_pcm_substream_chip(substream);
661 struct snd_pcm_runtime *runtime = substream->runtime;
662 int u, is8, mono;
663 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
664 unsigned int count = snd_pcm_lib_period_bytes(substream);
665
666 chip->dma2_size = size;
667 chip->dma2_start = runtime->dma_addr;
668
669 mono = (runtime->channels > 1) ? 0 : 1;
670 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
671 u = snd_pcm_format_unsigned(runtime->format);
672
673 chip->dma2_shift = 2 - mono - is8;
674
675 snd_es1938_reset_fifo(chip);
676
677 /* set clock and counters */
678 snd_es1938_rate_set(chip, substream, DAC2);
679
680 count >>= 1;
681 count = 0x10000 - count;
682 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
683 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
684
685 /* initialize and configure Audio 2 DAC */
686 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
687 (mono ? 0 : 2) | (is8 ? 0 : 1));
688
689 /* program DMA */
690 snd_es1938_playback1_setdma(chip);
691
692 return 0;
693}
694
695static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
696{
697 struct es1938 *chip = snd_pcm_substream_chip(substream);
698 struct snd_pcm_runtime *runtime = substream->runtime;
699 int u, is8, mono;
700 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
701 unsigned int count = snd_pcm_lib_period_bytes(substream);
702
703 chip->dma1_size = size;
704 chip->dma1_start = runtime->dma_addr;
705
706 mono = (runtime->channels > 1) ? 0 : 1;
707 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
708 u = snd_pcm_format_unsigned(runtime->format);
709
710 chip->dma1_shift = 2 - mono - is8;
711
712 count = 0x10000 - count;
713
714 /* reset */
715 snd_es1938_reset_fifo(chip);
716
717 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
718
719 /* set clock and counters */
720 snd_es1938_rate_set(chip, substream, DAC1);
721 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
722 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
723
724 /* initialized and configure DAC */
725 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
726 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
727 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
728 0x90 | (mono ? 0x40 : 0x08) |
729 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
730
731 /* program DMA */
732 snd_es1938_playback2_setdma(chip);
733
734 return 0;
735}
736
737static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
738{
739 switch (substream->number) {
740 case 0:
741 return snd_es1938_playback1_prepare(substream);
742 case 1:
743 return snd_es1938_playback2_prepare(substream);
744 }
745 snd_BUG();
746 return -EINVAL;
747}
748
749/* during the incrementing of dma counters the DMA register reads sometimes
750 returns garbage. To ensure a valid hw pointer, the following checks which
751 should be very unlikely to fail are used:
752 - is the current DMA address in the valid DMA range ?
753 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
754 One can argue this could differ by one byte depending on which register is
755 updated first, so the implementation below allows for that.
756*/
757static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
758{
759 struct es1938 *chip = snd_pcm_substream_chip(substream);
760 size_t ptr;
761#if 0
762 size_t old, new;
763 /* This stuff is *needed*, don't ask why - AB */
764 old = inw(SLDM_REG(chip, DMACOUNT));
765 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
766 old = new;
767 ptr = chip->dma1_size - 1 - new;
768#else
769 size_t count;
770 unsigned int diff;
771
772 ptr = inl(SLDM_REG(chip, DMAADDR));
773 count = inw(SLDM_REG(chip, DMACOUNT));
774 diff = chip->dma1_start + chip->dma1_size - ptr - count;
775
776 if (diff > 3 || ptr < chip->dma1_start
777 || ptr >= chip->dma1_start+chip->dma1_size)
778 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
779 else
780 chip->last_capture_dmaaddr = ptr; /* good, remember it */
781
782 ptr -= chip->dma1_start;
783#endif
784 return ptr >> chip->dma1_shift;
785}
786
787static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
788{
789 struct es1938 *chip = snd_pcm_substream_chip(substream);
790 size_t ptr;
791#if 1
792 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
793#else
794 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
795#endif
796 return ptr >> chip->dma2_shift;
797}
798
799static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
800{
801 struct es1938 *chip = snd_pcm_substream_chip(substream);
802 size_t ptr;
803 size_t old, new;
804#if 1
805 /* This stuff is *needed*, don't ask why - AB */
806 old = inw(SLDM_REG(chip, DMACOUNT));
807 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
808 old = new;
809 ptr = chip->dma1_size - 1 - new;
810#else
811 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
812#endif
813 return ptr >> chip->dma1_shift;
814}
815
816static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
817{
818 switch (substream->number) {
819 case 0:
820 return snd_es1938_playback1_pointer(substream);
821 case 1:
822 return snd_es1938_playback2_pointer(substream);
823 }
824 snd_BUG();
825 return -EINVAL;
826}
827
828static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
829 int channel, unsigned long pos,
830 void __user *dst, unsigned long count)
831{
832 struct snd_pcm_runtime *runtime = substream->runtime;
833 struct es1938 *chip = snd_pcm_substream_chip(substream);
834
835 if (snd_BUG_ON(pos + count > chip->dma1_size))
836 return -EINVAL;
837 if (pos + count < chip->dma1_size) {
838 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
839 return -EFAULT;
840 } else {
841 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
842 return -EFAULT;
843 if (put_user(runtime->dma_area[0],
844 ((unsigned char __user *)dst) + count - 1))
845 return -EFAULT;
846 }
847 return 0;
848}
849
850static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
851 int channel, unsigned long pos,
852 void *dst, unsigned long count)
853{
854 struct snd_pcm_runtime *runtime = substream->runtime;
855 struct es1938 *chip = snd_pcm_substream_chip(substream);
856
857 if (snd_BUG_ON(pos + count > chip->dma1_size))
858 return -EINVAL;
859 if (pos + count < chip->dma1_size) {
860 memcpy(dst, runtime->dma_area + pos + 1, count);
861 } else {
862 memcpy(dst, runtime->dma_area + pos + 1, count - 1);
863 runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
864 }
865 return 0;
866}
867
868/* ----------------------------------------------------------------------
869 * Audio1 Capture (ADC)
870 * ----------------------------------------------------------------------*/
871static const struct snd_pcm_hardware snd_es1938_capture =
872{
873 .info = (SNDRV_PCM_INFO_INTERLEAVED |
874 SNDRV_PCM_INFO_BLOCK_TRANSFER),
875 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
876 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
877 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
878 .rate_min = 6000,
879 .rate_max = 48000,
880 .channels_min = 1,
881 .channels_max = 2,
882 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
883 .period_bytes_min = 64,
884 .period_bytes_max = 0x8000,
885 .periods_min = 1,
886 .periods_max = 1024,
887 .fifo_size = 256,
888};
889
890/* -----------------------------------------------------------------------
891 * Audio2 Playback (DAC)
892 * -----------------------------------------------------------------------*/
893static const struct snd_pcm_hardware snd_es1938_playback =
894{
895 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
896 SNDRV_PCM_INFO_BLOCK_TRANSFER |
897 SNDRV_PCM_INFO_MMAP_VALID),
898 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
899 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
900 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
901 .rate_min = 6000,
902 .rate_max = 48000,
903 .channels_min = 1,
904 .channels_max = 2,
905 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
906 .period_bytes_min = 64,
907 .period_bytes_max = 0x8000,
908 .periods_min = 1,
909 .periods_max = 1024,
910 .fifo_size = 256,
911};
912
913static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
914{
915 struct es1938 *chip = snd_pcm_substream_chip(substream);
916 struct snd_pcm_runtime *runtime = substream->runtime;
917
918 if (chip->playback2_substream)
919 return -EAGAIN;
920 chip->capture_substream = substream;
921 runtime->hw = snd_es1938_capture;
922 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
923 &hw_constraints_clocks);
924 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
925 return 0;
926}
927
928static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
929{
930 struct es1938 *chip = snd_pcm_substream_chip(substream);
931 struct snd_pcm_runtime *runtime = substream->runtime;
932
933 switch (substream->number) {
934 case 0:
935 chip->playback1_substream = substream;
936 break;
937 case 1:
938 if (chip->capture_substream)
939 return -EAGAIN;
940 chip->playback2_substream = substream;
941 break;
942 default:
943 snd_BUG();
944 return -EINVAL;
945 }
946 runtime->hw = snd_es1938_playback;
947 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
948 &hw_constraints_clocks);
949 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
950 return 0;
951}
952
953static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
954{
955 struct es1938 *chip = snd_pcm_substream_chip(substream);
956
957 chip->capture_substream = NULL;
958 return 0;
959}
960
961static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
962{
963 struct es1938 *chip = snd_pcm_substream_chip(substream);
964
965 switch (substream->number) {
966 case 0:
967 chip->playback1_substream = NULL;
968 break;
969 case 1:
970 chip->playback2_substream = NULL;
971 break;
972 default:
973 snd_BUG();
974 return -EINVAL;
975 }
976 return 0;
977}
978
979static const struct snd_pcm_ops snd_es1938_playback_ops = {
980 .open = snd_es1938_playback_open,
981 .close = snd_es1938_playback_close,
982 .prepare = snd_es1938_playback_prepare,
983 .trigger = snd_es1938_playback_trigger,
984 .pointer = snd_es1938_playback_pointer,
985};
986
987static const struct snd_pcm_ops snd_es1938_capture_ops = {
988 .open = snd_es1938_capture_open,
989 .close = snd_es1938_capture_close,
990 .prepare = snd_es1938_capture_prepare,
991 .trigger = snd_es1938_capture_trigger,
992 .pointer = snd_es1938_capture_pointer,
993 .copy_user = snd_es1938_capture_copy,
994 .copy_kernel = snd_es1938_capture_copy_kernel,
995};
996
997static int snd_es1938_new_pcm(struct es1938 *chip, int device)
998{
999 struct snd_pcm *pcm;
1000 int err;
1001
1002 err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
1003 if (err < 0)
1004 return err;
1005 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1006 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1007
1008 pcm->private_data = chip;
1009 pcm->info_flags = 0;
1010 strcpy(pcm->name, "ESS Solo-1");
1011
1012 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1013 &chip->pci->dev, 64*1024, 64*1024);
1014
1015 chip->pcm = pcm;
1016 return 0;
1017}
1018
1019/* -------------------------------------------------------------------
1020 *
1021 * *** Mixer part ***
1022 */
1023
1024static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_info *uinfo)
1026{
1027 static const char * const texts[8] = {
1028 "Mic", "Mic Master", "CD", "AOUT",
1029 "Mic1", "Mix", "Line", "Master"
1030 };
1031
1032 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1033}
1034
1035static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1036 struct snd_ctl_elem_value *ucontrol)
1037{
1038 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1039 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1040 return 0;
1041}
1042
1043static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1047 unsigned char val = ucontrol->value.enumerated.item[0];
1048
1049 if (val > 7)
1050 return -EINVAL;
1051 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1052}
1053
1054#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1055
1056static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_value *ucontrol)
1058{
1059 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1060 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1061 ucontrol->value.integer.value[0] = !!(val & 8);
1062 return 0;
1063}
1064
1065static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1066 struct snd_ctl_elem_value *ucontrol)
1067{
1068 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1069 unsigned char oval, nval;
1070 int change;
1071 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1072 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1073 change = nval != oval;
1074 if (change) {
1075 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1076 snd_es1938_mixer_write(chip, 0x50, nval);
1077 }
1078 return change;
1079}
1080
1081static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1082 struct snd_ctl_elem_info *uinfo)
1083{
1084 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1085 uinfo->count = 2;
1086 uinfo->value.integer.min = 0;
1087 uinfo->value.integer.max = 63;
1088 return 0;
1089}
1090
1091static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1092 struct snd_ctl_elem_value *ucontrol)
1093{
1094 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1095 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1096 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1097 return 0;
1098}
1099
1100#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1101
1102static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1106 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1107 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1108 return 0;
1109}
1110
1111static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1112{
1113 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1114 chip->master_volume = NULL;
1115 chip->master_switch = NULL;
1116 chip->hw_volume = NULL;
1117 chip->hw_switch = NULL;
1118}
1119
1120static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1121 unsigned char mask, unsigned char val)
1122{
1123 if (reg < 0xa0)
1124 return snd_es1938_mixer_bits(chip, reg, mask, val);
1125 else
1126 return snd_es1938_bits(chip, reg, mask, val);
1127}
1128
1129static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1130{
1131 if (reg < 0xa0)
1132 return snd_es1938_mixer_read(chip, reg);
1133 else
1134 return snd_es1938_read(chip, reg);
1135}
1136
1137#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1138{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1139 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1140 .name = xname, .index = xindex, \
1141 .info = snd_es1938_info_single, \
1142 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1143 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1144 .tlv = { .p = xtlv } }
1145#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1146{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1147 .info = snd_es1938_info_single, \
1148 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1149 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1150
1151static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1152 struct snd_ctl_elem_info *uinfo)
1153{
1154 int mask = (kcontrol->private_value >> 16) & 0xff;
1155
1156 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1157 uinfo->count = 1;
1158 uinfo->value.integer.min = 0;
1159 uinfo->value.integer.max = mask;
1160 return 0;
1161}
1162
1163static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1164 struct snd_ctl_elem_value *ucontrol)
1165{
1166 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1167 int reg = kcontrol->private_value & 0xff;
1168 int shift = (kcontrol->private_value >> 8) & 0xff;
1169 int mask = (kcontrol->private_value >> 16) & 0xff;
1170 int invert = (kcontrol->private_value >> 24) & 0xff;
1171 int val;
1172
1173 val = snd_es1938_reg_read(chip, reg);
1174 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1175 if (invert)
1176 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1177 return 0;
1178}
1179
1180static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1181 struct snd_ctl_elem_value *ucontrol)
1182{
1183 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1184 int reg = kcontrol->private_value & 0xff;
1185 int shift = (kcontrol->private_value >> 8) & 0xff;
1186 int mask = (kcontrol->private_value >> 16) & 0xff;
1187 int invert = (kcontrol->private_value >> 24) & 0xff;
1188 unsigned char val;
1189
1190 val = (ucontrol->value.integer.value[0] & mask);
1191 if (invert)
1192 val = mask - val;
1193 mask <<= shift;
1194 val <<= shift;
1195 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1196}
1197
1198#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1199{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1200 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1201 .name = xname, .index = xindex, \
1202 .info = snd_es1938_info_double, \
1203 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1204 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1205 .tlv = { .p = xtlv } }
1206#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1207{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1208 .info = snd_es1938_info_double, \
1209 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1210 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1211
1212static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1213 struct snd_ctl_elem_info *uinfo)
1214{
1215 int mask = (kcontrol->private_value >> 24) & 0xff;
1216
1217 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1218 uinfo->count = 2;
1219 uinfo->value.integer.min = 0;
1220 uinfo->value.integer.max = mask;
1221 return 0;
1222}
1223
1224static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1225 struct snd_ctl_elem_value *ucontrol)
1226{
1227 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1228 int left_reg = kcontrol->private_value & 0xff;
1229 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1230 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1231 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1232 int mask = (kcontrol->private_value >> 24) & 0xff;
1233 int invert = (kcontrol->private_value >> 22) & 1;
1234 unsigned char left, right;
1235
1236 left = snd_es1938_reg_read(chip, left_reg);
1237 if (left_reg != right_reg)
1238 right = snd_es1938_reg_read(chip, right_reg);
1239 else
1240 right = left;
1241 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1242 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1243 if (invert) {
1244 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1245 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1246 }
1247 return 0;
1248}
1249
1250static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1251 struct snd_ctl_elem_value *ucontrol)
1252{
1253 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1254 int left_reg = kcontrol->private_value & 0xff;
1255 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1256 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1257 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1258 int mask = (kcontrol->private_value >> 24) & 0xff;
1259 int invert = (kcontrol->private_value >> 22) & 1;
1260 int change;
1261 unsigned char val1, val2, mask1, mask2;
1262
1263 val1 = ucontrol->value.integer.value[0] & mask;
1264 val2 = ucontrol->value.integer.value[1] & mask;
1265 if (invert) {
1266 val1 = mask - val1;
1267 val2 = mask - val2;
1268 }
1269 val1 <<= shift_left;
1270 val2 <<= shift_right;
1271 mask1 = mask << shift_left;
1272 mask2 = mask << shift_right;
1273 if (left_reg != right_reg) {
1274 change = 0;
1275 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1276 change = 1;
1277 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1278 change = 1;
1279 } else {
1280 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1281 val1 | val2) != (val1 | val2));
1282 }
1283 return change;
1284}
1285
1286#ifndef TARGET_OS2
1287static const DECLARE_TLV_DB_RANGE(db_scale_master,
1288 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1289 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1290);
1291
1292static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1293 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1294 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1295);
1296
1297static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1298 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1299 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1300);
1301
1302static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1303 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1304 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1305);
1306
1307static const DECLARE_TLV_DB_RANGE(db_scale_line,
1308 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1309 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1310);
1311#else
1312static unsigned int db_scale_master[] = {
1313 TLV_DB_RANGE_HEAD(2),
1314 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1315 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1316};
1317
1318static unsigned int db_scale_audio1[] = {
1319 TLV_DB_RANGE_HEAD(2),
1320 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1321 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1322};
1323
1324static unsigned int db_scale_audio2[] = {
1325 TLV_DB_RANGE_HEAD(2),
1326 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1327 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1328};
1329
1330static unsigned int db_scale_mic[] = {
1331 TLV_DB_RANGE_HEAD(2),
1332 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1333 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1334};
1335
1336static unsigned int db_scale_line[] = {
1337 TLV_DB_RANGE_HEAD(2),
1338 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1339 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1340};
1341#endif
1342
1343static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1344
1345static const struct snd_kcontrol_new snd_es1938_controls[] = {
1346ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1347 db_scale_master),
1348ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1349{
1350 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1351 .name = "Hardware Master Playback Volume",
1352 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1353 .info = snd_es1938_info_hw_volume,
1354 .get = snd_es1938_get_hw_volume,
1355},
1356{
1357 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1358 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1359 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1360 .name = "Hardware Master Playback Switch",
1361 .info = snd_es1938_info_hw_switch,
1362 .get = snd_es1938_get_hw_switch,
1363 .tlv = { .p = db_scale_master },
1364},
1365ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1366ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1367 db_scale_line),
1368ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1369ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1370 db_scale_mic),
1371ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1372 db_scale_line),
1373ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1374 db_scale_mic),
1375ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1376 db_scale_line),
1377ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1378 db_scale_capture),
1379ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1380ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1381ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1382{
1383 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1384 .name = "Capture Source",
1385 .info = snd_es1938_info_mux,
1386 .get = snd_es1938_get_mux,
1387 .put = snd_es1938_put_mux,
1388},
1389ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1390 db_scale_line),
1391ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1392 db_scale_audio2),
1393ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1394 db_scale_mic),
1395ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1396 db_scale_line),
1397ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1398 db_scale_mic),
1399ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1400 db_scale_line),
1401ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1402 db_scale_line),
1403ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1404 db_scale_line),
1405ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1406 db_scale_audio2),
1407ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1408 db_scale_audio1),
1409ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1410{
1411 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1412 .name = "3D Control - Switch",
1413 .info = snd_es1938_info_spatializer_enable,
1414 .get = snd_es1938_get_spatializer_enable,
1415 .put = snd_es1938_put_spatializer_enable,
1416},
1417ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1418};
1419
1420
1421/* ---------------------------------------------------------------------------- */
1422/* ---------------------------------------------------------------------------- */
1423
1424/*
1425 * initialize the chip - used by resume callback, too
1426 */
1427static void snd_es1938_chip_init(struct es1938 *chip)
1428{
1429 /* reset chip */
1430 snd_es1938_reset(chip);
1431
1432 /* configure native mode */
1433
1434 /* enable bus master */
1435 pci_set_master(chip->pci);
1436
1437 /* disable legacy audio */
1438 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1439
1440 /* set DDMA base */
1441 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1442
1443 /* set DMA/IRQ policy */
1444 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1445
1446 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1447 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1448
1449 /* reset DMA */
1450 outb(0, SLDM_REG(chip, DMACLEAR));
1451}
1452
1453#ifdef CONFIG_PM_SLEEP
1454/*
1455 * PM support
1456 */
1457
1458static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1459 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1460 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1461 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1462 0xa8, 0xb4,
1463};
1464
1465
1466static int es1938_suspend(struct device *dev)
1467{
1468 struct snd_card *card = dev_get_drvdata(dev);
1469 struct es1938 *chip = card->private_data;
1470 const unsigned char *s;
1471 unsigned char *d;
1472
1473 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1474
1475 /* save mixer-related registers */
1476 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1477 *d = snd_es1938_reg_read(chip, *s);
1478
1479 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1480 if (chip->irq >= 0) {
1481 free_irq(chip->irq, chip);
1482 chip->irq = -1;
1483 card->sync_irq = -1;
1484 }
1485 return 0;
1486}
1487
1488static int es1938_resume(struct device *dev)
1489{
1490 struct pci_dev *pci = to_pci_dev(dev);
1491 struct snd_card *card = dev_get_drvdata(dev);
1492 struct es1938 *chip = card->private_data;
1493 const unsigned char *s;
1494 unsigned char *d;
1495
1496 if (request_irq(pci->irq, snd_es1938_interrupt,
1497 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1498 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1499 pci->irq);
1500 snd_card_disconnect(card);
1501 return -EIO;
1502 }
1503 chip->irq = pci->irq;
1504 card->sync_irq = chip->irq;
1505 snd_es1938_chip_init(chip);
1506
1507 /* restore mixer-related registers */
1508 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1509 if (*s < 0xa0)
1510 snd_es1938_mixer_write(chip, *s, *d);
1511 else
1512 snd_es1938_write(chip, *s, *d);
1513 }
1514
1515 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1516 return 0;
1517}
1518
1519static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1520#define ES1938_PM_OPS &es1938_pm
1521#else
1522#define ES1938_PM_OPS NULL
1523#endif /* CONFIG_PM_SLEEP */
1524
1525#ifdef SUPPORT_JOYSTICK
1526static int snd_es1938_create_gameport(struct es1938 *chip)
1527{
1528 struct gameport *gp;
1529
1530 chip->gameport = gp = gameport_allocate_port();
1531 if (!gp) {
1532 dev_err(chip->card->dev,
1533 "cannot allocate memory for gameport\n");
1534 return -ENOMEM;
1535 }
1536
1537 gameport_set_name(gp, "ES1938");
1538 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1539 gameport_set_dev_parent(gp, &chip->pci->dev);
1540 gp->io = chip->game_port;
1541
1542 gameport_register_port(gp);
1543
1544 return 0;
1545}
1546
1547static void snd_es1938_free_gameport(struct es1938 *chip)
1548{
1549 if (chip->gameport) {
1550 gameport_unregister_port(chip->gameport);
1551 chip->gameport = NULL;
1552 }
1553}
1554#else
1555static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1556static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1557#endif /* SUPPORT_JOYSTICK */
1558
1559static void snd_es1938_free(struct snd_card *card)
1560{
1561 struct es1938 *chip = card->private_data;
1562
1563 /* disable irqs */
1564 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1565 if (chip->rmidi)
1566 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1567
1568 snd_es1938_free_gameport(chip);
1569
1570 if (chip->irq >= 0)
1571 free_irq(chip->irq, chip);
1572}
1573
1574static int snd_es1938_create(struct snd_card *card,
1575 struct pci_dev *pci)
1576{
1577 struct es1938 *chip = card->private_data;
1578 int err;
1579
1580 /* enable PCI device */
1581 err = pcim_enable_device(pci);
1582 if (err < 0)
1583 return err;
1584 /* check, if we can restrict PCI DMA transfers to 24 bits */
1585 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1586 dev_err(card->dev,
1587 "architecture does not support 24bit PCI busmaster DMA\n");
1588 return -ENXIO;
1589 }
1590
1591 spin_lock_init(&chip->reg_lock);
1592 spin_lock_init(&chip->mixer_lock);
1593 chip->card = card;
1594 chip->pci = pci;
1595 chip->irq = -1;
1596 err = pci_request_regions(pci, "ESS Solo-1");
1597 if (err < 0)
1598 return err;
1599 chip->io_port = pci_resource_start(pci, 0);
1600 chip->sb_port = pci_resource_start(pci, 1);
1601 chip->vc_port = pci_resource_start(pci, 2);
1602 chip->mpu_port = pci_resource_start(pci, 3);
1603 chip->game_port = pci_resource_start(pci, 4);
1604 /* still use non-managed irq handler as it's re-acquired at PM resume */
1605 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1606 KBUILD_MODNAME, chip)) {
1607 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1608 return -EBUSY;
1609 }
1610 chip->irq = pci->irq;
1611 card->sync_irq = chip->irq;
1612 card->private_free = snd_es1938_free;
1613 dev_dbg(card->dev,
1614 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1615 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1616
1617 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1618
1619 snd_es1938_chip_init(chip);
1620 return 0;
1621}
1622
1623/* --------------------------------------------------------------------
1624 * Interrupt handler
1625 * -------------------------------------------------------------------- */
1626static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1627{
1628 struct es1938 *chip = dev_id;
1629 unsigned char status;
1630 __always_unused unsigned char audiostatus;
1631 int handled = 0;
1632
1633 status = inb(SLIO_REG(chip, IRQCONTROL));
1634#if 0
1635 dev_dbg(chip->card->dev,
1636 "Es1938debug - interrupt status: =0x%x\n", status);
1637#endif
1638
1639 /* AUDIO 1 */
1640 if (status & 0x10) {
1641#if 0
1642 dev_dbg(chip->card->dev,
1643 "Es1938debug - AUDIO channel 1 interrupt\n");
1644 dev_dbg(chip->card->dev,
1645 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1646 inw(SLDM_REG(chip, DMACOUNT)));
1647 dev_dbg(chip->card->dev,
1648 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1649 inl(SLDM_REG(chip, DMAADDR)));
1650 dev_dbg(chip->card->dev,
1651 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1652 inl(SLDM_REG(chip, DMASTATUS)));
1653#endif
1654 /* clear irq */
1655 handled = 1;
1656 audiostatus = inb(SLSB_REG(chip, STATUS));
1657 if (chip->active & ADC1)
1658 snd_pcm_period_elapsed(chip->capture_substream);
1659 else if (chip->active & DAC1)
1660 snd_pcm_period_elapsed(chip->playback2_substream);
1661 }
1662
1663 /* AUDIO 2 */
1664 if (status & 0x20) {
1665#if 0
1666 dev_dbg(chip->card->dev,
1667 "Es1938debug - AUDIO channel 2 interrupt\n");
1668 dev_dbg(chip->card->dev,
1669 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1670 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1671 dev_dbg(chip->card->dev,
1672 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1673 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1674
1675#endif
1676 /* clear irq */
1677 handled = 1;
1678 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1679 if (chip->active & DAC2)
1680 snd_pcm_period_elapsed(chip->playback1_substream);
1681 }
1682
1683 /* Hardware volume */
1684 if (status & 0x40) {
1685 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1686 handled = 1;
1687 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1688 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1689 if (!split) {
1690 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1691 &chip->master_switch->id);
1692 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1693 &chip->master_volume->id);
1694 }
1695 /* ack interrupt */
1696 snd_es1938_mixer_write(chip, 0x66, 0x00);
1697 }
1698
1699 /* MPU401 */
1700 if (status & 0x80) {
1701 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1702 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1703 // andreas@flying-snail.de
1704 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1705 if (chip->rmidi) {
1706 handled = 1;
1707 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1708 }
1709 }
1710 return IRQ_RETVAL(handled);
1711}
1712
1713#define ES1938_DMA_SIZE 64
1714
1715static int snd_es1938_mixer(struct es1938 *chip)
1716{
1717 struct snd_card *card;
1718 unsigned int idx;
1719 int err;
1720
1721 card = chip->card;
1722
1723 strcpy(card->mixername, "ESS Solo-1");
1724
1725 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1726 struct snd_kcontrol *kctl;
1727 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1728 switch (idx) {
1729 case 0:
1730 chip->master_volume = kctl;
1731 kctl->private_free = snd_es1938_hwv_free;
1732 break;
1733 case 1:
1734 chip->master_switch = kctl;
1735 kctl->private_free = snd_es1938_hwv_free;
1736 break;
1737 case 2:
1738 chip->hw_volume = kctl;
1739 kctl->private_free = snd_es1938_hwv_free;
1740 break;
1741 case 3:
1742 chip->hw_switch = kctl;
1743 kctl->private_free = snd_es1938_hwv_free;
1744 break;
1745 }
1746 err = snd_ctl_add(card, kctl);
1747 if (err < 0)
1748 return err;
1749 }
1750 return 0;
1751}
1752
1753
1754static int __snd_es1938_probe(struct pci_dev *pci,
1755 const struct pci_device_id *pci_id)
1756{
1757 static int dev;
1758 struct snd_card *card;
1759 struct es1938 *chip;
1760 struct snd_opl3 *opl3;
1761 int idx, err;
1762
1763 if (dev >= SNDRV_CARDS)
1764 return -ENODEV;
1765 if (!enable[dev]) {
1766 dev++;
1767 return -ENOENT;
1768 }
1769
1770 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1771 sizeof(*chip), &card);
1772 if (err < 0)
1773 return err;
1774 chip = card->private_data;
1775
1776 for (idx = 0; idx < 5; idx++)
1777 if (pci_resource_start(pci, idx) == 0 ||
1778 !(pci_resource_flags(pci, idx) & IORESOURCE_IO))
1779 return -ENODEV;
1780
1781 err = snd_es1938_create(card, pci);
1782 if (err < 0)
1783 return err;
1784
1785 strcpy(card->driver, "ES1938");
1786 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1787 sprintf(card->longname, "%s rev %i, irq %i",
1788 card->shortname,
1789 chip->revision,
1790 chip->irq);
1791
1792 err = snd_es1938_new_pcm(chip, 0);
1793 if (err < 0)
1794 return err;
1795 err = snd_es1938_mixer(chip);
1796 if (err < 0)
1797 return err;
1798 if (snd_opl3_create(card,
1799 SLSB_REG(chip, FMLOWADDR),
1800 SLSB_REG(chip, FMHIGHADDR),
1801 OPL3_HW_OPL3, 1, &opl3) < 0) {
1802 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1803 SLSB_REG(chip, FMLOWADDR));
1804 } else {
1805 err = snd_opl3_timer_new(opl3, 0, 1);
1806 if (err < 0)
1807 return err;
1808 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1809 if (err < 0)
1810 return err;
1811 }
1812 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1813 chip->mpu_port,
1814 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1815 -1, &chip->rmidi) < 0) {
1816 dev_err(card->dev, "unable to initialize MPU-401\n");
1817 } else {
1818 // this line is vital for MIDI interrupt handling on ess-solo1
1819 // andreas@flying-snail.de
1820 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1821 }
1822
1823 snd_es1938_create_gameport(chip);
1824
1825 err = snd_card_register(card);
1826 if (err < 0)
1827 return err;
1828
1829 pci_set_drvdata(pci, card);
1830 dev++;
1831 return 0;
1832}
1833
1834static int snd_es1938_probe(struct pci_dev *pci,
1835 const struct pci_device_id *pci_id)
1836{
1837 return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
1838}
1839
1840static struct pci_driver es1938_driver = {
1841 .name = KBUILD_MODNAME,
1842 .id_table = snd_es1938_ids,
1843 .probe = snd_es1938_probe,
1844 .driver = {
1845 .pm = ES1938_PM_OPS,
1846 },
1847};
1848
1849module_pci_driver(es1938_driver);
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