source: GPL/trunk/alsa-kernel/pci/es1938.c@ 695

Last change on this file since 695 was 695, checked in by David Azarewicz, 4 years ago

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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5 * Jaroslav Kysela <perex@perex.cz>,
6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34#ifdef TARGET_OS2
35#define KBUILD_MODNAME "es1938"
36#endif
37
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/gameport.h>
43#include <linux/module.h>
44#include <linux/delay.h>
45#include <linux/dma-mapping.h>
46#include <linux/io.h>
47#include <sound/core.h>
48#include <sound/control.h>
49#include <sound/pcm.h>
50#include <sound/opl3.h>
51#include <sound/mpu401.h>
52#include <sound/initval.h>
53#include <sound/tlv.h>
54
55MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
56MODULE_DESCRIPTION("ESS Solo-1");
57MODULE_LICENSE("GPL");
58
59#if IS_REACHABLE(CONFIG_GAMEPORT)
60#define SUPPORT_JOYSTICK 1
61#endif
62
63static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
64static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
65static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
66
67module_param_array(index, int, NULL, 0444);
68MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
69module_param_array(id, charp, NULL, 0444);
70MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
71module_param_array(enable, bool, NULL, 0444);
72MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
73
74#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
75
76#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
77
78#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
79
80#define SL_PCI_LEGACYCONTROL 0x40
81#define SL_PCI_CONFIG 0x50
82#define SL_PCI_DDMACONTROL 0x60
83
84#define ESSIO_REG_AUDIO2DMAADDR 0
85#define ESSIO_REG_AUDIO2DMACOUNT 4
86#define ESSIO_REG_AUDIO2MODE 6
87#define ESSIO_REG_IRQCONTROL 7
88
89#define ESSDM_REG_DMAADDR 0x00
90#define ESSDM_REG_DMACOUNT 0x04
91#define ESSDM_REG_DMACOMMAND 0x08
92#define ESSDM_REG_DMASTATUS 0x08
93#define ESSDM_REG_DMAMODE 0x0b
94#define ESSDM_REG_DMACLEAR 0x0d
95#define ESSDM_REG_DMAMASK 0x0f
96
97#define ESSSB_REG_FMLOWADDR 0x00
98#define ESSSB_REG_FMHIGHADDR 0x02
99#define ESSSB_REG_MIXERADDR 0x04
100#define ESSSB_REG_MIXERDATA 0x05
101
102#define ESSSB_IREG_AUDIO1 0x14
103#define ESSSB_IREG_MICMIX 0x1a
104#define ESSSB_IREG_RECSRC 0x1c
105#define ESSSB_IREG_MASTER 0x32
106#define ESSSB_IREG_FM 0x36
107#define ESSSB_IREG_AUXACD 0x38
108#define ESSSB_IREG_AUXB 0x3a
109#define ESSSB_IREG_PCSPEAKER 0x3c
110#define ESSSB_IREG_LINE 0x3e
111#define ESSSB_IREG_SPATCONTROL 0x50
112#define ESSSB_IREG_SPATLEVEL 0x52
113#define ESSSB_IREG_MASTER_LEFT 0x60
114#define ESSSB_IREG_MASTER_RIGHT 0x62
115#define ESSSB_IREG_MPU401CONTROL 0x64
116#define ESSSB_IREG_MICMIXRECORD 0x68
117#define ESSSB_IREG_AUDIO2RECORD 0x69
118#define ESSSB_IREG_AUXACDRECORD 0x6a
119#define ESSSB_IREG_FMRECORD 0x6b
120#define ESSSB_IREG_AUXBRECORD 0x6c
121#define ESSSB_IREG_MONO 0x6d
122#define ESSSB_IREG_LINERECORD 0x6e
123#define ESSSB_IREG_MONORECORD 0x6f
124#define ESSSB_IREG_AUDIO2SAMPLE 0x70
125#define ESSSB_IREG_AUDIO2MODE 0x71
126#define ESSSB_IREG_AUDIO2FILTER 0x72
127#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
128#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
129#define ESSSB_IREG_AUDIO2CONTROL1 0x78
130#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
131#define ESSSB_IREG_AUDIO2 0x7c
132
133#define ESSSB_REG_RESET 0x06
134
135#define ESSSB_REG_READDATA 0x0a
136#define ESSSB_REG_WRITEDATA 0x0c
137#define ESSSB_REG_READSTATUS 0x0c
138
139#define ESSSB_REG_STATUS 0x0e
140
141#define ESS_CMD_EXTSAMPLERATE 0xa1
142#define ESS_CMD_FILTERDIV 0xa2
143#define ESS_CMD_DMACNTRELOADL 0xa4
144#define ESS_CMD_DMACNTRELOADH 0xa5
145#define ESS_CMD_ANALOGCONTROL 0xa8
146#define ESS_CMD_IRQCONTROL 0xb1
147#define ESS_CMD_DRQCONTROL 0xb2
148#define ESS_CMD_RECLEVEL 0xb4
149#define ESS_CMD_SETFORMAT 0xb6
150#define ESS_CMD_SETFORMAT2 0xb7
151#define ESS_CMD_DMACONTROL 0xb8
152#define ESS_CMD_DMATYPE 0xb9
153#define ESS_CMD_OFFSETLEFT 0xba
154#define ESS_CMD_OFFSETRIGHT 0xbb
155#define ESS_CMD_READREG 0xc0
156#define ESS_CMD_ENABLEEXT 0xc6
157#define ESS_CMD_PAUSEDMA 0xd0
158#define ESS_CMD_ENABLEAUDIO1 0xd1
159#define ESS_CMD_STOPAUDIO1 0xd3
160#define ESS_CMD_AUDIO1STATUS 0xd8
161#define ESS_CMD_CONTDMA 0xd4
162#define ESS_CMD_TESTIRQ 0xf2
163
164#define ESS_RECSRC_MIC 0
165#define ESS_RECSRC_AUXACD 2
166#define ESS_RECSRC_AUXB 5
167#define ESS_RECSRC_LINE 6
168#define ESS_RECSRC_NONE 7
169
170#define DAC1 0x01
171#define ADC1 0x02
172#define DAC2 0x04
173
174/*
175
176 */
177
178#define SAVED_REG_SIZE 32 /* max. number of registers to save */
179
180struct es1938 {
181 int irq;
182
183 unsigned long io_port;
184 unsigned long sb_port;
185 unsigned long vc_port;
186 unsigned long mpu_port;
187 unsigned long game_port;
188 unsigned long ddma_port;
189
190 unsigned char irqmask;
191 unsigned char revision;
192
193 struct snd_kcontrol *hw_volume;
194 struct snd_kcontrol *hw_switch;
195 struct snd_kcontrol *master_volume;
196 struct snd_kcontrol *master_switch;
197
198 struct pci_dev *pci;
199 struct snd_card *card;
200 struct snd_pcm *pcm;
201 struct snd_pcm_substream *capture_substream;
202 struct snd_pcm_substream *playback1_substream;
203 struct snd_pcm_substream *playback2_substream;
204 struct snd_rawmidi *rmidi;
205
206 unsigned int dma1_size;
207 unsigned int dma2_size;
208 unsigned int dma1_start;
209 unsigned int dma2_start;
210 unsigned int dma1_shift;
211 unsigned int dma2_shift;
212 unsigned int last_capture_dmaaddr;
213 unsigned int active;
214
215 spinlock_t reg_lock;
216 spinlock_t mixer_lock;
217 struct snd_info_entry *proc_entry;
218
219#ifdef SUPPORT_JOYSTICK
220 struct gameport *gameport;
221#endif
222#ifdef CONFIG_PM_SLEEP
223 unsigned char saved_regs[SAVED_REG_SIZE];
224#endif
225};
226
227static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
228
229static const struct pci_device_id snd_es1938_ids[] = {
230 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
231 { 0, }
232};
233
234MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
235
236#define RESET_LOOP_TIMEOUT 0x10000
237#define WRITE_LOOP_TIMEOUT 0x10000
238#define GET_LOOP_TIMEOUT 0x01000
239
240/* -----------------------------------------------------------------
241 * Write to a mixer register
242 * -----------------------------------------------------------------*/
243static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
244{
245 unsigned long flags;
246 spin_lock_irqsave(&chip->mixer_lock, flags);
247 outb(reg, SLSB_REG(chip, MIXERADDR));
248 outb(val, SLSB_REG(chip, MIXERDATA));
249 spin_unlock_irqrestore(&chip->mixer_lock, flags);
250 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
251}
252
253/* -----------------------------------------------------------------
254 * Read from a mixer register
255 * -----------------------------------------------------------------*/
256static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
257{
258 int data;
259 unsigned long flags;
260 spin_lock_irqsave(&chip->mixer_lock, flags);
261 outb(reg, SLSB_REG(chip, MIXERADDR));
262 data = inb(SLSB_REG(chip, MIXERDATA));
263 spin_unlock_irqrestore(&chip->mixer_lock, flags);
264 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
265 return data;
266}
267
268/* -----------------------------------------------------------------
269 * Write to some bits of a mixer register (return old value)
270 * -----------------------------------------------------------------*/
271static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
272 unsigned char mask, unsigned char val)
273{
274 unsigned long flags;
275 unsigned char old, new, oval;
276 spin_lock_irqsave(&chip->mixer_lock, flags);
277 outb(reg, SLSB_REG(chip, MIXERADDR));
278 old = inb(SLSB_REG(chip, MIXERDATA));
279 oval = old & mask;
280 if (val != oval) {
281 new = (old & ~mask) | (val & mask);
282 outb(new, SLSB_REG(chip, MIXERDATA));
283 dev_dbg(chip->card->dev,
284 "Mixer reg %02x was %02x, set to %02x\n",
285 reg, old, new);
286 }
287 spin_unlock_irqrestore(&chip->mixer_lock, flags);
288 return oval;
289}
290
291/* -----------------------------------------------------------------
292 * Write command to Controller Registers
293 * -----------------------------------------------------------------*/
294static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
295{
296 int i;
297 unsigned char v;
298 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
299 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
300 outb(cmd, SLSB_REG(chip, WRITEDATA));
301 return;
302 }
303 }
304 dev_err(chip->card->dev,
305 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
306}
307
308/* -----------------------------------------------------------------
309 * Read the Read Data Buffer
310 * -----------------------------------------------------------------*/
311static int snd_es1938_get_byte(struct es1938 *chip)
312{
313 int i;
314 unsigned char v;
315 for (i = GET_LOOP_TIMEOUT; i; i--)
316 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
317 return inb(SLSB_REG(chip, READDATA));
318 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
319 return -ENODEV;
320}
321
322/* -----------------------------------------------------------------
323 * Write value cmd register
324 * -----------------------------------------------------------------*/
325static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
326{
327 unsigned long flags;
328 spin_lock_irqsave(&chip->reg_lock, flags);
329 snd_es1938_write_cmd(chip, reg);
330 snd_es1938_write_cmd(chip, val);
331 spin_unlock_irqrestore(&chip->reg_lock, flags);
332 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
333}
334
335/* -----------------------------------------------------------------
336 * Read data from cmd register and return it
337 * -----------------------------------------------------------------*/
338static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
339{
340 unsigned char val;
341 unsigned long flags;
342 spin_lock_irqsave(&chip->reg_lock, flags);
343 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
344 snd_es1938_write_cmd(chip, reg);
345 val = snd_es1938_get_byte(chip);
346 spin_unlock_irqrestore(&chip->reg_lock, flags);
347 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
348 return val;
349}
350
351/* -----------------------------------------------------------------
352 * Write data to cmd register and return old value
353 * -----------------------------------------------------------------*/
354static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
355 unsigned char val)
356{
357 unsigned long flags;
358 unsigned char old, new, oval;
359 spin_lock_irqsave(&chip->reg_lock, flags);
360 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
361 snd_es1938_write_cmd(chip, reg);
362 old = snd_es1938_get_byte(chip);
363 oval = old & mask;
364 if (val != oval) {
365 snd_es1938_write_cmd(chip, reg);
366 new = (old & ~mask) | (val & mask);
367 snd_es1938_write_cmd(chip, new);
368 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
369 reg, old, new);
370 }
371 spin_unlock_irqrestore(&chip->reg_lock, flags);
372 return oval;
373}
374
375/* --------------------------------------------------------------------
376 * Reset the chip
377 * --------------------------------------------------------------------*/
378static void snd_es1938_reset(struct es1938 *chip)
379{
380 int i;
381
382 outb(3, SLSB_REG(chip, RESET));
383 inb(SLSB_REG(chip, RESET));
384 outb(0, SLSB_REG(chip, RESET));
385 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
386 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
387 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
388 goto __next;
389 }
390 }
391 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
392
393 __next:
394 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
395
396 /* Demand transfer DMA: 4 bytes per DMA request */
397 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
398
399 /* Change behaviour of register A1
400 4x oversampling
401 2nd channel DAC asynchronous */
402 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
403 /* enable/select DMA channel and IRQ channel */
404 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
405 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
406 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
407 /* Set spatializer parameters to recommended values */
408 snd_es1938_mixer_write(chip, 0x54, 0x8f);
409 snd_es1938_mixer_write(chip, 0x56, 0x95);
410 snd_es1938_mixer_write(chip, 0x58, 0x94);
411 snd_es1938_mixer_write(chip, 0x5a, 0x80);
412}
413
414/* --------------------------------------------------------------------
415 * Reset the FIFOs
416 * --------------------------------------------------------------------*/
417static void snd_es1938_reset_fifo(struct es1938 *chip)
418{
419 outb(2, SLSB_REG(chip, RESET));
420 outb(0, SLSB_REG(chip, RESET));
421}
422
423static const struct snd_ratnum clocks[2] = {
424 {
425 .num = 793800,
426 .den_min = 1,
427 .den_max = 128,
428 .den_step = 1,
429 },
430 {
431 .num = 768000,
432 .den_min = 1,
433 .den_max = 128,
434 .den_step = 1,
435 }
436};
437
438static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
439 .nrats = 2,
440 .rats = clocks,
441};
442
443
444static void snd_es1938_rate_set(struct es1938 *chip,
445 struct snd_pcm_substream *substream,
446 int mode)
447{
448 unsigned int bits, div0;
449 struct snd_pcm_runtime *runtime = substream->runtime;
450 if (runtime->rate_num == clocks[0].num)
451 bits = 128 - runtime->rate_den;
452 else
453 bits = 256 - runtime->rate_den;
454
455 /* set filter register */
456 div0 = 256 - 7160000*20/(8*82*runtime->rate);
457
458 if (mode == DAC2) {
459 snd_es1938_mixer_write(chip, 0x70, bits);
460 snd_es1938_mixer_write(chip, 0x72, div0);
461 } else {
462 snd_es1938_write(chip, 0xA1, bits);
463 snd_es1938_write(chip, 0xA2, div0);
464 }
465}
466
467/* --------------------------------------------------------------------
468 * Configure Solo1 builtin DMA Controller
469 * --------------------------------------------------------------------*/
470
471static void snd_es1938_playback1_setdma(struct es1938 *chip)
472{
473 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
474 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
475 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
476 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
477}
478
479static void snd_es1938_playback2_setdma(struct es1938 *chip)
480{
481 /* Enable DMA controller */
482 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
483 /* 1. Master reset */
484 outb(0, SLDM_REG(chip, DMACLEAR));
485 /* 2. Mask DMA */
486 outb(1, SLDM_REG(chip, DMAMASK));
487 outb(0x18, SLDM_REG(chip, DMAMODE));
488 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
489 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
490 /* 3. Unmask DMA */
491 outb(0, SLDM_REG(chip, DMAMASK));
492}
493
494static void snd_es1938_capture_setdma(struct es1938 *chip)
495{
496 /* Enable DMA controller */
497 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
498 /* 1. Master reset */
499 outb(0, SLDM_REG(chip, DMACLEAR));
500 /* 2. Mask DMA */
501 outb(1, SLDM_REG(chip, DMAMASK));
502 outb(0x14, SLDM_REG(chip, DMAMODE));
503 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
504 chip->last_capture_dmaaddr = chip->dma1_start;
505 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
506 /* 3. Unmask DMA */
507 outb(0, SLDM_REG(chip, DMAMASK));
508}
509
510/* ----------------------------------------------------------------------
511 *
512 * *** PCM part ***
513 */
514
515static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
516 int cmd)
517{
518 struct es1938 *chip = snd_pcm_substream_chip(substream);
519 int val;
520 switch (cmd) {
521 case SNDRV_PCM_TRIGGER_START:
522 case SNDRV_PCM_TRIGGER_RESUME:
523 val = 0x0f;
524 chip->active |= ADC1;
525 break;
526 case SNDRV_PCM_TRIGGER_STOP:
527 case SNDRV_PCM_TRIGGER_SUSPEND:
528 val = 0x00;
529 chip->active &= ~ADC1;
530 break;
531 default:
532 return -EINVAL;
533 }
534 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
535 return 0;
536}
537
538static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
539 int cmd)
540{
541 struct es1938 *chip = snd_pcm_substream_chip(substream);
542 switch (cmd) {
543 case SNDRV_PCM_TRIGGER_START:
544 case SNDRV_PCM_TRIGGER_RESUME:
545 /* According to the documentation this should be:
546 0x13 but that value may randomly swap stereo channels */
547 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
548 udelay(10);
549 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
550 /* This two stage init gives the FIFO -> DAC connection time to
551 * settle before first data from DMA flows in. This should ensure
552 * no swapping of stereo channels. Report a bug if otherwise :-) */
553 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
554 chip->active |= DAC2;
555 break;
556 case SNDRV_PCM_TRIGGER_STOP:
557 case SNDRV_PCM_TRIGGER_SUSPEND:
558 outb(0, SLIO_REG(chip, AUDIO2MODE));
559 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
560 chip->active &= ~DAC2;
561 break;
562 default:
563 return -EINVAL;
564 }
565 return 0;
566}
567
568static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
569 int cmd)
570{
571 struct es1938 *chip = snd_pcm_substream_chip(substream);
572 int val;
573 switch (cmd) {
574 case SNDRV_PCM_TRIGGER_START:
575 case SNDRV_PCM_TRIGGER_RESUME:
576 val = 5;
577 chip->active |= DAC1;
578 break;
579 case SNDRV_PCM_TRIGGER_STOP:
580 case SNDRV_PCM_TRIGGER_SUSPEND:
581 val = 0;
582 chip->active &= ~DAC1;
583 break;
584 default:
585 return -EINVAL;
586 }
587 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
588 return 0;
589}
590
591static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
592 int cmd)
593{
594 switch (substream->number) {
595 case 0:
596 return snd_es1938_playback1_trigger(substream, cmd);
597 case 1:
598 return snd_es1938_playback2_trigger(substream, cmd);
599 }
600 snd_BUG();
601 return -EINVAL;
602}
603
604/* --------------------------------------------------------------------
605 * First channel for Extended Mode Audio 1 ADC Operation
606 * --------------------------------------------------------------------*/
607static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
608{
609 struct es1938 *chip = snd_pcm_substream_chip(substream);
610 struct snd_pcm_runtime *runtime = substream->runtime;
611 int u, is8, mono;
612 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
613 unsigned int count = snd_pcm_lib_period_bytes(substream);
614
615 chip->dma1_size = size;
616 chip->dma1_start = runtime->dma_addr;
617
618 mono = (runtime->channels > 1) ? 0 : 1;
619 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
620 u = snd_pcm_format_unsigned(runtime->format);
621
622 chip->dma1_shift = 2 - mono - is8;
623
624 snd_es1938_reset_fifo(chip);
625
626 /* program type */
627 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
628
629 /* set clock and counters */
630 snd_es1938_rate_set(chip, substream, ADC1);
631
632 count = 0x10000 - count;
633 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
634 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
635
636 /* initialize and configure ADC */
637 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
638 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
639 (u ? 0x00 : 0x20) |
640 (is8 ? 0x00 : 0x04) |
641 (mono ? 0x40 : 0x08));
642
643 // snd_es1938_reset_fifo(chip);
644
645 /* 11. configure system interrupt controller and DMA controller */
646 snd_es1938_capture_setdma(chip);
647
648 return 0;
649}
650
651
652/* ------------------------------------------------------------------------------
653 * Second Audio channel DAC Operation
654 * ------------------------------------------------------------------------------*/
655static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
656{
657 struct es1938 *chip = snd_pcm_substream_chip(substream);
658 struct snd_pcm_runtime *runtime = substream->runtime;
659 int u, is8, mono;
660 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
661 unsigned int count = snd_pcm_lib_period_bytes(substream);
662
663 chip->dma2_size = size;
664 chip->dma2_start = runtime->dma_addr;
665
666 mono = (runtime->channels > 1) ? 0 : 1;
667 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
668 u = snd_pcm_format_unsigned(runtime->format);
669
670 chip->dma2_shift = 2 - mono - is8;
671
672 snd_es1938_reset_fifo(chip);
673
674 /* set clock and counters */
675 snd_es1938_rate_set(chip, substream, DAC2);
676
677 count >>= 1;
678 count = 0x10000 - count;
679 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
680 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
681
682 /* initialize and configure Audio 2 DAC */
683 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
684 (mono ? 0 : 2) | (is8 ? 0 : 1));
685
686 /* program DMA */
687 snd_es1938_playback1_setdma(chip);
688
689 return 0;
690}
691
692static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
693{
694 struct es1938 *chip = snd_pcm_substream_chip(substream);
695 struct snd_pcm_runtime *runtime = substream->runtime;
696 int u, is8, mono;
697 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
698 unsigned int count = snd_pcm_lib_period_bytes(substream);
699
700 chip->dma1_size = size;
701 chip->dma1_start = runtime->dma_addr;
702
703 mono = (runtime->channels > 1) ? 0 : 1;
704 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
705 u = snd_pcm_format_unsigned(runtime->format);
706
707 chip->dma1_shift = 2 - mono - is8;
708
709 count = 0x10000 - count;
710
711 /* reset */
712 snd_es1938_reset_fifo(chip);
713
714 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
715
716 /* set clock and counters */
717 snd_es1938_rate_set(chip, substream, DAC1);
718 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
719 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
720
721 /* initialized and configure DAC */
722 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
723 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
724 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
725 0x90 | (mono ? 0x40 : 0x08) |
726 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
727
728 /* program DMA */
729 snd_es1938_playback2_setdma(chip);
730
731 return 0;
732}
733
734static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
735{
736 switch (substream->number) {
737 case 0:
738 return snd_es1938_playback1_prepare(substream);
739 case 1:
740 return snd_es1938_playback2_prepare(substream);
741 }
742 snd_BUG();
743 return -EINVAL;
744}
745
746/* during the incrementing of dma counters the DMA register reads sometimes
747 returns garbage. To ensure a valid hw pointer, the following checks which
748 should be very unlikely to fail are used:
749 - is the current DMA address in the valid DMA range ?
750 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
751 One can argue this could differ by one byte depending on which register is
752 updated first, so the implementation below allows for that.
753*/
754static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
755{
756 struct es1938 *chip = snd_pcm_substream_chip(substream);
757 size_t ptr;
758#if 0
759 size_t old, new;
760 /* This stuff is *needed*, don't ask why - AB */
761 old = inw(SLDM_REG(chip, DMACOUNT));
762 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
763 old = new;
764 ptr = chip->dma1_size - 1 - new;
765#else
766 size_t count;
767 unsigned int diff;
768
769 ptr = inl(SLDM_REG(chip, DMAADDR));
770 count = inw(SLDM_REG(chip, DMACOUNT));
771 diff = chip->dma1_start + chip->dma1_size - ptr - count;
772
773 if (diff > 3 || ptr < chip->dma1_start
774 || ptr >= chip->dma1_start+chip->dma1_size)
775 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
776 else
777 chip->last_capture_dmaaddr = ptr; /* good, remember it */
778
779 ptr -= chip->dma1_start;
780#endif
781 return ptr >> chip->dma1_shift;
782}
783
784static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
785{
786 struct es1938 *chip = snd_pcm_substream_chip(substream);
787 size_t ptr;
788#if 1
789 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
790#else
791 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
792#endif
793 return ptr >> chip->dma2_shift;
794}
795
796static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
797{
798 struct es1938 *chip = snd_pcm_substream_chip(substream);
799 size_t ptr;
800 size_t old, new;
801#if 1
802 /* This stuff is *needed*, don't ask why - AB */
803 old = inw(SLDM_REG(chip, DMACOUNT));
804 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
805 old = new;
806 ptr = chip->dma1_size - 1 - new;
807#else
808 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
809#endif
810 return ptr >> chip->dma1_shift;
811}
812
813static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
814{
815 switch (substream->number) {
816 case 0:
817 return snd_es1938_playback1_pointer(substream);
818 case 1:
819 return snd_es1938_playback2_pointer(substream);
820 }
821 snd_BUG();
822 return -EINVAL;
823}
824
825static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
826 int channel, unsigned long pos,
827 void __user *dst, unsigned long count)
828{
829 struct snd_pcm_runtime *runtime = substream->runtime;
830 struct es1938 *chip = snd_pcm_substream_chip(substream);
831
832 if (snd_BUG_ON(pos + count > chip->dma1_size))
833 return -EINVAL;
834 if (pos + count < chip->dma1_size) {
835 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
836 return -EFAULT;
837 } else {
838 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
839 return -EFAULT;
840 if (put_user(runtime->dma_area[0],
841 ((unsigned char __user *)dst) + count - 1))
842 return -EFAULT;
843 }
844 return 0;
845}
846
847static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
848 int channel, unsigned long pos,
849 void *dst, unsigned long count)
850{
851 struct snd_pcm_runtime *runtime = substream->runtime;
852 struct es1938 *chip = snd_pcm_substream_chip(substream);
853
854 if (snd_BUG_ON(pos + count > chip->dma1_size))
855 return -EINVAL;
856 if (pos + count < chip->dma1_size) {
857 memcpy(dst, runtime->dma_area + pos + 1, count);
858 } else {
859 memcpy(dst, runtime->dma_area + pos + 1, count - 1);
860 runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
861 }
862 return 0;
863}
864
865/* ----------------------------------------------------------------------
866 * Audio1 Capture (ADC)
867 * ----------------------------------------------------------------------*/
868static const struct snd_pcm_hardware snd_es1938_capture =
869{
870 .info = (SNDRV_PCM_INFO_INTERLEAVED |
871 SNDRV_PCM_INFO_BLOCK_TRANSFER),
872 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
873 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
874 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
875 .rate_min = 6000,
876 .rate_max = 48000,
877 .channels_min = 1,
878 .channels_max = 2,
879 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
880 .period_bytes_min = 64,
881 .period_bytes_max = 0x8000,
882 .periods_min = 1,
883 .periods_max = 1024,
884 .fifo_size = 256,
885};
886
887/* -----------------------------------------------------------------------
888 * Audio2 Playback (DAC)
889 * -----------------------------------------------------------------------*/
890static const struct snd_pcm_hardware snd_es1938_playback =
891{
892 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
893 SNDRV_PCM_INFO_BLOCK_TRANSFER |
894 SNDRV_PCM_INFO_MMAP_VALID),
895 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
896 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
897 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
898 .rate_min = 6000,
899 .rate_max = 48000,
900 .channels_min = 1,
901 .channels_max = 2,
902 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
903 .period_bytes_min = 64,
904 .period_bytes_max = 0x8000,
905 .periods_min = 1,
906 .periods_max = 1024,
907 .fifo_size = 256,
908};
909
910static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
911{
912 struct es1938 *chip = snd_pcm_substream_chip(substream);
913 struct snd_pcm_runtime *runtime = substream->runtime;
914
915 if (chip->playback2_substream)
916 return -EAGAIN;
917 chip->capture_substream = substream;
918 runtime->hw = snd_es1938_capture;
919 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
920 &hw_constraints_clocks);
921 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
922 return 0;
923}
924
925static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
926{
927 struct es1938 *chip = snd_pcm_substream_chip(substream);
928 struct snd_pcm_runtime *runtime = substream->runtime;
929
930 switch (substream->number) {
931 case 0:
932 chip->playback1_substream = substream;
933 break;
934 case 1:
935 if (chip->capture_substream)
936 return -EAGAIN;
937 chip->playback2_substream = substream;
938 break;
939 default:
940 snd_BUG();
941 return -EINVAL;
942 }
943 runtime->hw = snd_es1938_playback;
944 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
945 &hw_constraints_clocks);
946 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
947 return 0;
948}
949
950static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
951{
952 struct es1938 *chip = snd_pcm_substream_chip(substream);
953
954 chip->capture_substream = NULL;
955 return 0;
956}
957
958static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
959{
960 struct es1938 *chip = snd_pcm_substream_chip(substream);
961
962 switch (substream->number) {
963 case 0:
964 chip->playback1_substream = NULL;
965 break;
966 case 1:
967 chip->playback2_substream = NULL;
968 break;
969 default:
970 snd_BUG();
971 return -EINVAL;
972 }
973 return 0;
974}
975
976static const struct snd_pcm_ops snd_es1938_playback_ops = {
977 .open = snd_es1938_playback_open,
978 .close = snd_es1938_playback_close,
979 .prepare = snd_es1938_playback_prepare,
980 .trigger = snd_es1938_playback_trigger,
981 .pointer = snd_es1938_playback_pointer,
982};
983
984static const struct snd_pcm_ops snd_es1938_capture_ops = {
985 .open = snd_es1938_capture_open,
986 .close = snd_es1938_capture_close,
987 .prepare = snd_es1938_capture_prepare,
988 .trigger = snd_es1938_capture_trigger,
989 .pointer = snd_es1938_capture_pointer,
990 .copy_user = snd_es1938_capture_copy,
991 .copy_kernel = snd_es1938_capture_copy_kernel,
992};
993
994static int snd_es1938_new_pcm(struct es1938 *chip, int device)
995{
996 struct snd_pcm *pcm;
997 int err;
998
999 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1000 return err;
1001 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1002 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1003
1004 pcm->private_data = chip;
1005 pcm->info_flags = 0;
1006 strcpy(pcm->name, "ESS Solo-1");
1007
1008 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1009 &chip->pci->dev, 64*1024, 64*1024);
1010
1011 chip->pcm = pcm;
1012 return 0;
1013}
1014
1015/* -------------------------------------------------------------------
1016 *
1017 * *** Mixer part ***
1018 */
1019
1020static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1021 struct snd_ctl_elem_info *uinfo)
1022{
1023 static const char * const texts[8] = {
1024 "Mic", "Mic Master", "CD", "AOUT",
1025 "Mic1", "Mix", "Line", "Master"
1026 };
1027
1028 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1029}
1030
1031static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1032 struct snd_ctl_elem_value *ucontrol)
1033{
1034 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1035 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1036 return 0;
1037}
1038
1039static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1040 struct snd_ctl_elem_value *ucontrol)
1041{
1042 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1043 unsigned char val = ucontrol->value.enumerated.item[0];
1044
1045 if (val > 7)
1046 return -EINVAL;
1047 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1048}
1049
1050#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1051
1052static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1053 struct snd_ctl_elem_value *ucontrol)
1054{
1055 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1056 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1057 ucontrol->value.integer.value[0] = !!(val & 8);
1058 return 0;
1059}
1060
1061static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1062 struct snd_ctl_elem_value *ucontrol)
1063{
1064 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1065 unsigned char oval, nval;
1066 int change;
1067 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1068 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1069 change = nval != oval;
1070 if (change) {
1071 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1072 snd_es1938_mixer_write(chip, 0x50, nval);
1073 }
1074 return change;
1075}
1076
1077static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_info *uinfo)
1079{
1080 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1081 uinfo->count = 2;
1082 uinfo->value.integer.min = 0;
1083 uinfo->value.integer.max = 63;
1084 return 0;
1085}
1086
1087static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1091 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1092 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1093 return 0;
1094}
1095
1096#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1097
1098static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1099 struct snd_ctl_elem_value *ucontrol)
1100{
1101 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1102 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1103 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1104 return 0;
1105}
1106
1107static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1108{
1109 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1110 chip->master_volume = NULL;
1111 chip->master_switch = NULL;
1112 chip->hw_volume = NULL;
1113 chip->hw_switch = NULL;
1114}
1115
1116static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1117 unsigned char mask, unsigned char val)
1118{
1119 if (reg < 0xa0)
1120 return snd_es1938_mixer_bits(chip, reg, mask, val);
1121 else
1122 return snd_es1938_bits(chip, reg, mask, val);
1123}
1124
1125static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1126{
1127 if (reg < 0xa0)
1128 return snd_es1938_mixer_read(chip, reg);
1129 else
1130 return snd_es1938_read(chip, reg);
1131}
1132
1133#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1134{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1135 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1136 .name = xname, .index = xindex, \
1137 .info = snd_es1938_info_single, \
1138 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1139 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1140 .tlv = { .p = xtlv } }
1141#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1142{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1143 .info = snd_es1938_info_single, \
1144 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1145 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1146
1147static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1148 struct snd_ctl_elem_info *uinfo)
1149{
1150 int mask = (kcontrol->private_value >> 16) & 0xff;
1151
1152 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1153 uinfo->count = 1;
1154 uinfo->value.integer.min = 0;
1155 uinfo->value.integer.max = mask;
1156 return 0;
1157}
1158
1159static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1160 struct snd_ctl_elem_value *ucontrol)
1161{
1162 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1163 int reg = kcontrol->private_value & 0xff;
1164 int shift = (kcontrol->private_value >> 8) & 0xff;
1165 int mask = (kcontrol->private_value >> 16) & 0xff;
1166 int invert = (kcontrol->private_value >> 24) & 0xff;
1167 int val;
1168
1169 val = snd_es1938_reg_read(chip, reg);
1170 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1171 if (invert)
1172 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1173 return 0;
1174}
1175
1176static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1177 struct snd_ctl_elem_value *ucontrol)
1178{
1179 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1180 int reg = kcontrol->private_value & 0xff;
1181 int shift = (kcontrol->private_value >> 8) & 0xff;
1182 int mask = (kcontrol->private_value >> 16) & 0xff;
1183 int invert = (kcontrol->private_value >> 24) & 0xff;
1184 unsigned char val;
1185
1186 val = (ucontrol->value.integer.value[0] & mask);
1187 if (invert)
1188 val = mask - val;
1189 mask <<= shift;
1190 val <<= shift;
1191 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1192}
1193
1194#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1195{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1196 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1197 .name = xname, .index = xindex, \
1198 .info = snd_es1938_info_double, \
1199 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1200 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1201 .tlv = { .p = xtlv } }
1202#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1203{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1204 .info = snd_es1938_info_double, \
1205 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1206 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1207
1208static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1209 struct snd_ctl_elem_info *uinfo)
1210{
1211 int mask = (kcontrol->private_value >> 24) & 0xff;
1212
1213 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1214 uinfo->count = 2;
1215 uinfo->value.integer.min = 0;
1216 uinfo->value.integer.max = mask;
1217 return 0;
1218}
1219
1220static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1221 struct snd_ctl_elem_value *ucontrol)
1222{
1223 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1224 int left_reg = kcontrol->private_value & 0xff;
1225 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1226 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1227 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1228 int mask = (kcontrol->private_value >> 24) & 0xff;
1229 int invert = (kcontrol->private_value >> 22) & 1;
1230 unsigned char left, right;
1231
1232 left = snd_es1938_reg_read(chip, left_reg);
1233 if (left_reg != right_reg)
1234 right = snd_es1938_reg_read(chip, right_reg);
1235 else
1236 right = left;
1237 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1238 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1239 if (invert) {
1240 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1241 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1242 }
1243 return 0;
1244}
1245
1246static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248{
1249 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1250 int left_reg = kcontrol->private_value & 0xff;
1251 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1252 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1253 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1254 int mask = (kcontrol->private_value >> 24) & 0xff;
1255 int invert = (kcontrol->private_value >> 22) & 1;
1256 int change;
1257 unsigned char val1, val2, mask1, mask2;
1258
1259 val1 = ucontrol->value.integer.value[0] & mask;
1260 val2 = ucontrol->value.integer.value[1] & mask;
1261 if (invert) {
1262 val1 = mask - val1;
1263 val2 = mask - val2;
1264 }
1265 val1 <<= shift_left;
1266 val2 <<= shift_right;
1267 mask1 = mask << shift_left;
1268 mask2 = mask << shift_right;
1269 if (left_reg != right_reg) {
1270 change = 0;
1271 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1272 change = 1;
1273 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1274 change = 1;
1275 } else {
1276 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1277 val1 | val2) != (val1 | val2));
1278 }
1279 return change;
1280}
1281
1282#ifndef TARGET_OS2
1283static const DECLARE_TLV_DB_RANGE(db_scale_master,
1284 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1285 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1286);
1287
1288static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1289 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1290 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1291);
1292
1293static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1294 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1295 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1296);
1297
1298static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1299 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1300 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1301);
1302
1303static const DECLARE_TLV_DB_RANGE(db_scale_line,
1304 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1305 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1306);
1307#else
1308static unsigned int db_scale_master[] = {
1309 TLV_DB_RANGE_HEAD(2),
1310 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1311 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1312};
1313
1314static unsigned int db_scale_audio1[] = {
1315 TLV_DB_RANGE_HEAD(2),
1316 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1317 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1318};
1319
1320static unsigned int db_scale_audio2[] = {
1321 TLV_DB_RANGE_HEAD(2),
1322 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1323 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1324};
1325
1326static unsigned int db_scale_mic[] = {
1327 TLV_DB_RANGE_HEAD(2),
1328 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1329 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1330};
1331
1332static unsigned int db_scale_line[] = {
1333 TLV_DB_RANGE_HEAD(2),
1334 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1335 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1336};
1337#endif
1338
1339static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1340
1341static const struct snd_kcontrol_new snd_es1938_controls[] = {
1342ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1343 db_scale_master),
1344ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1345{
1346 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1347 .name = "Hardware Master Playback Volume",
1348 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1349 .info = snd_es1938_info_hw_volume,
1350 .get = snd_es1938_get_hw_volume,
1351},
1352{
1353 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1354 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1355 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1356 .name = "Hardware Master Playback Switch",
1357 .info = snd_es1938_info_hw_switch,
1358 .get = snd_es1938_get_hw_switch,
1359 .tlv = { .p = db_scale_master },
1360},
1361ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1362ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1363 db_scale_line),
1364ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1365ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1366 db_scale_mic),
1367ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1368 db_scale_line),
1369ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1370 db_scale_mic),
1371ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1372 db_scale_line),
1373ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1374 db_scale_capture),
1375ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1376ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1377ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1378{
1379 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1380 .name = "Capture Source",
1381 .info = snd_es1938_info_mux,
1382 .get = snd_es1938_get_mux,
1383 .put = snd_es1938_put_mux,
1384},
1385ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1386 db_scale_line),
1387ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1388 db_scale_audio2),
1389ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1390 db_scale_mic),
1391ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1392 db_scale_line),
1393ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1394 db_scale_mic),
1395ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1396 db_scale_line),
1397ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1398 db_scale_line),
1399ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1400 db_scale_line),
1401ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1402 db_scale_audio2),
1403ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1404 db_scale_audio1),
1405ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1406{
1407 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1408 .name = "3D Control - Switch",
1409 .info = snd_es1938_info_spatializer_enable,
1410 .get = snd_es1938_get_spatializer_enable,
1411 .put = snd_es1938_put_spatializer_enable,
1412},
1413ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1414};
1415
1416
1417/* ---------------------------------------------------------------------------- */
1418/* ---------------------------------------------------------------------------- */
1419
1420/*
1421 * initialize the chip - used by resume callback, too
1422 */
1423static void snd_es1938_chip_init(struct es1938 *chip)
1424{
1425 /* reset chip */
1426 snd_es1938_reset(chip);
1427
1428 /* configure native mode */
1429
1430 /* enable bus master */
1431 pci_set_master(chip->pci);
1432
1433 /* disable legacy audio */
1434 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1435
1436 /* set DDMA base */
1437 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1438
1439 /* set DMA/IRQ policy */
1440 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1441
1442 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1443 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1444
1445 /* reset DMA */
1446 outb(0, SLDM_REG(chip, DMACLEAR));
1447}
1448
1449#ifdef CONFIG_PM_SLEEP
1450/*
1451 * PM support
1452 */
1453
1454static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1455 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1456 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1457 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1458 0xa8, 0xb4,
1459};
1460
1461
1462static int es1938_suspend(struct device *dev)
1463{
1464 struct snd_card *card = dev_get_drvdata(dev);
1465 struct es1938 *chip = card->private_data;
1466 const unsigned char *s;
1467 unsigned char *d;
1468
1469 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1470
1471 /* save mixer-related registers */
1472 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1473 *d = snd_es1938_reg_read(chip, *s);
1474
1475 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1476 if (chip->irq >= 0) {
1477 free_irq(chip->irq, chip);
1478 chip->irq = -1;
1479 card->sync_irq = -1;
1480 }
1481 return 0;
1482}
1483
1484static int es1938_resume(struct device *dev)
1485{
1486 struct pci_dev *pci = to_pci_dev(dev);
1487 struct snd_card *card = dev_get_drvdata(dev);
1488 struct es1938 *chip = card->private_data;
1489 const unsigned char *s;
1490 unsigned char *d;
1491
1492 if (request_irq(pci->irq, snd_es1938_interrupt,
1493 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1494 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1495 pci->irq);
1496 snd_card_disconnect(card);
1497 return -EIO;
1498 }
1499 chip->irq = pci->irq;
1500 card->sync_irq = chip->irq;
1501 snd_es1938_chip_init(chip);
1502
1503 /* restore mixer-related registers */
1504 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1505 if (*s < 0xa0)
1506 snd_es1938_mixer_write(chip, *s, *d);
1507 else
1508 snd_es1938_write(chip, *s, *d);
1509 }
1510
1511 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1512 return 0;
1513}
1514
1515static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1516#define ES1938_PM_OPS &es1938_pm
1517#else
1518#define ES1938_PM_OPS NULL
1519#endif /* CONFIG_PM_SLEEP */
1520
1521#ifdef SUPPORT_JOYSTICK
1522static int snd_es1938_create_gameport(struct es1938 *chip)
1523{
1524 struct gameport *gp;
1525
1526 chip->gameport = gp = gameport_allocate_port();
1527 if (!gp) {
1528 dev_err(chip->card->dev,
1529 "cannot allocate memory for gameport\n");
1530 return -ENOMEM;
1531 }
1532
1533 gameport_set_name(gp, "ES1938");
1534 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1535 gameport_set_dev_parent(gp, &chip->pci->dev);
1536 gp->io = chip->game_port;
1537
1538 gameport_register_port(gp);
1539
1540 return 0;
1541}
1542
1543static void snd_es1938_free_gameport(struct es1938 *chip)
1544{
1545 if (chip->gameport) {
1546 gameport_unregister_port(chip->gameport);
1547 chip->gameport = NULL;
1548 }
1549}
1550#else
1551static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1552static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1553#endif /* SUPPORT_JOYSTICK */
1554
1555static int snd_es1938_free(struct es1938 *chip)
1556{
1557 /* disable irqs */
1558 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1559 if (chip->rmidi)
1560 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1561
1562 snd_es1938_free_gameport(chip);
1563
1564 if (chip->irq >= 0)
1565 free_irq(chip->irq, chip);
1566 pci_release_regions(chip->pci);
1567 pci_disable_device(chip->pci);
1568 kfree(chip);
1569 return 0;
1570}
1571
1572static int snd_es1938_dev_free(struct snd_device *device)
1573{
1574 struct es1938 *chip = device->device_data;
1575 return snd_es1938_free(chip);
1576}
1577
1578static int snd_es1938_create(struct snd_card *card,
1579 struct pci_dev *pci,
1580 struct es1938 **rchip)
1581{
1582 struct es1938 *chip;
1583 int err;
1584 static const struct snd_device_ops ops = {
1585 .dev_free = snd_es1938_dev_free,
1586 };
1587
1588 *rchip = NULL;
1589
1590 /* enable PCI device */
1591 if ((err = pci_enable_device(pci)) < 0)
1592 return err;
1593 /* check, if we can restrict PCI DMA transfers to 24 bits */
1594 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1595 dev_err(card->dev,
1596 "architecture does not support 24bit PCI busmaster DMA\n");
1597 pci_disable_device(pci);
1598 return -ENXIO;
1599 }
1600
1601 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1602 if (chip == NULL) {
1603 pci_disable_device(pci);
1604 return -ENOMEM;
1605 }
1606 spin_lock_init(&chip->reg_lock);
1607 spin_lock_init(&chip->mixer_lock);
1608 chip->card = card;
1609 chip->pci = pci;
1610 chip->irq = -1;
1611 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1612 kfree(chip);
1613 pci_disable_device(pci);
1614 return err;
1615 }
1616 chip->io_port = pci_resource_start(pci, 0);
1617 chip->sb_port = pci_resource_start(pci, 1);
1618 chip->vc_port = pci_resource_start(pci, 2);
1619 chip->mpu_port = pci_resource_start(pci, 3);
1620 chip->game_port = pci_resource_start(pci, 4);
1621 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1622 KBUILD_MODNAME, chip)) {
1623 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1624 snd_es1938_free(chip);
1625 return -EBUSY;
1626 }
1627 chip->irq = pci->irq;
1628 card->sync_irq = chip->irq;
1629 dev_dbg(card->dev,
1630 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1631 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1632
1633 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1634
1635 snd_es1938_chip_init(chip);
1636
1637 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1638 snd_es1938_free(chip);
1639 return err;
1640 }
1641
1642 *rchip = chip;
1643 return 0;
1644}
1645
1646/* --------------------------------------------------------------------
1647 * Interrupt handler
1648 * -------------------------------------------------------------------- */
1649static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1650{
1651 struct es1938 *chip = dev_id;
1652 unsigned char status;
1653 __always_unused unsigned char audiostatus;
1654 int handled = 0;
1655
1656 status = inb(SLIO_REG(chip, IRQCONTROL));
1657#if 0
1658 dev_dbg(chip->card->dev,
1659 "Es1938debug - interrupt status: =0x%x\n", status);
1660#endif
1661
1662 /* AUDIO 1 */
1663 if (status & 0x10) {
1664#if 0
1665 dev_dbg(chip->card->dev,
1666 "Es1938debug - AUDIO channel 1 interrupt\n");
1667 dev_dbg(chip->card->dev,
1668 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1669 inw(SLDM_REG(chip, DMACOUNT)));
1670 dev_dbg(chip->card->dev,
1671 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1672 inl(SLDM_REG(chip, DMAADDR)));
1673 dev_dbg(chip->card->dev,
1674 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1675 inl(SLDM_REG(chip, DMASTATUS)));
1676#endif
1677 /* clear irq */
1678 handled = 1;
1679 audiostatus = inb(SLSB_REG(chip, STATUS));
1680 if (chip->active & ADC1)
1681 snd_pcm_period_elapsed(chip->capture_substream);
1682 else if (chip->active & DAC1)
1683 snd_pcm_period_elapsed(chip->playback2_substream);
1684 }
1685
1686 /* AUDIO 2 */
1687 if (status & 0x20) {
1688#if 0
1689 dev_dbg(chip->card->dev,
1690 "Es1938debug - AUDIO channel 2 interrupt\n");
1691 dev_dbg(chip->card->dev,
1692 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1693 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1694 dev_dbg(chip->card->dev,
1695 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1696 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1697
1698#endif
1699 /* clear irq */
1700 handled = 1;
1701 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1702 if (chip->active & DAC2)
1703 snd_pcm_period_elapsed(chip->playback1_substream);
1704 }
1705
1706 /* Hardware volume */
1707 if (status & 0x40) {
1708 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1709 handled = 1;
1710 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1711 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1712 if (!split) {
1713 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1714 &chip->master_switch->id);
1715 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1716 &chip->master_volume->id);
1717 }
1718 /* ack interrupt */
1719 snd_es1938_mixer_write(chip, 0x66, 0x00);
1720 }
1721
1722 /* MPU401 */
1723 if (status & 0x80) {
1724 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1725 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1726 // andreas@flying-snail.de
1727 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1728 if (chip->rmidi) {
1729 handled = 1;
1730 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1731 }
1732 }
1733 return IRQ_RETVAL(handled);
1734}
1735
1736#define ES1938_DMA_SIZE 64
1737
1738static int snd_es1938_mixer(struct es1938 *chip)
1739{
1740 struct snd_card *card;
1741 unsigned int idx;
1742 int err;
1743
1744 card = chip->card;
1745
1746 strcpy(card->mixername, "ESS Solo-1");
1747
1748 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1749 struct snd_kcontrol *kctl;
1750 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1751 switch (idx) {
1752 case 0:
1753 chip->master_volume = kctl;
1754 kctl->private_free = snd_es1938_hwv_free;
1755 break;
1756 case 1:
1757 chip->master_switch = kctl;
1758 kctl->private_free = snd_es1938_hwv_free;
1759 break;
1760 case 2:
1761 chip->hw_volume = kctl;
1762 kctl->private_free = snd_es1938_hwv_free;
1763 break;
1764 case 3:
1765 chip->hw_switch = kctl;
1766 kctl->private_free = snd_es1938_hwv_free;
1767 break;
1768 }
1769 if ((err = snd_ctl_add(card, kctl)) < 0)
1770 return err;
1771 }
1772 return 0;
1773}
1774
1775
1776static int snd_es1938_probe(struct pci_dev *pci,
1777 const struct pci_device_id *pci_id)
1778{
1779 static int dev;
1780 struct snd_card *card;
1781 struct es1938 *chip;
1782 struct snd_opl3 *opl3;
1783 int idx, err;
1784
1785 if (dev >= SNDRV_CARDS)
1786 return -ENODEV;
1787 if (!enable[dev]) {
1788 dev++;
1789 return -ENOENT;
1790 }
1791
1792 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1793 0, &card);
1794 if (err < 0)
1795 return err;
1796 for (idx = 0; idx < 5; idx++) {
1797 if (pci_resource_start(pci, idx) == 0 ||
1798 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1799 snd_card_free(card);
1800 return -ENODEV;
1801 }
1802 }
1803 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1804 snd_card_free(card);
1805 return err;
1806 }
1807 card->private_data = chip;
1808
1809 strcpy(card->driver, "ES1938");
1810 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1811 sprintf(card->longname, "%s rev %i, irq %i",
1812 card->shortname,
1813 chip->revision,
1814 chip->irq);
1815
1816 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1817 snd_card_free(card);
1818 return err;
1819 }
1820 if ((err = snd_es1938_mixer(chip)) < 0) {
1821 snd_card_free(card);
1822 return err;
1823 }
1824 if (snd_opl3_create(card,
1825 SLSB_REG(chip, FMLOWADDR),
1826 SLSB_REG(chip, FMHIGHADDR),
1827 OPL3_HW_OPL3, 1, &opl3) < 0) {
1828 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1829 SLSB_REG(chip, FMLOWADDR));
1830 } else {
1831 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1832 snd_card_free(card);
1833 return err;
1834 }
1835 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1836 snd_card_free(card);
1837 return err;
1838 }
1839 }
1840 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1841 chip->mpu_port,
1842 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1843 -1, &chip->rmidi) < 0) {
1844 dev_err(card->dev, "unable to initialize MPU-401\n");
1845 } else {
1846 // this line is vital for MIDI interrupt handling on ess-solo1
1847 // andreas@flying-snail.de
1848 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1849 }
1850
1851 snd_es1938_create_gameport(chip);
1852
1853 if ((err = snd_card_register(card)) < 0) {
1854 snd_card_free(card);
1855 return err;
1856 }
1857
1858 pci_set_drvdata(pci, card);
1859 dev++;
1860 return 0;
1861}
1862
1863static void snd_es1938_remove(struct pci_dev *pci)
1864{
1865 snd_card_free(pci_get_drvdata(pci));
1866}
1867
1868static struct pci_driver es1938_driver = {
1869 .name = KBUILD_MODNAME,
1870 .id_table = snd_es1938_ids,
1871 .probe = snd_es1938_probe,
1872 .remove = snd_es1938_remove,
1873 .driver = {
1874 .pm = ES1938_PM_OPS,
1875 },
1876};
1877
1878module_pci_driver(es1938_driver);
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