source: GPL/trunk/alsa-kernel/pci/es1938.c@ 679

Last change on this file since 679 was 679, checked in by David Azarewicz, 4 years ago

Merge changes from Paul's uniaud32next branch.
File size: 56.7 KB
Line 
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5 * Jaroslav Kysela <perex@perex.cz>,
6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34#ifdef TARGET_OS2
35#define KBUILD_MODNAME "es1938"
36#endif
37
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/gameport.h>
43#include <linux/module.h>
44#include <linux/delay.h>
45#include <linux/dma-mapping.h>
46#include <linux/io.h>
47#include <sound/core.h>
48#include <sound/control.h>
49#include <sound/pcm.h>
50#include <sound/opl3.h>
51#include <sound/mpu401.h>
52#include <sound/initval.h>
53#include <sound/tlv.h>
54
55MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
56MODULE_DESCRIPTION("ESS Solo-1");
57MODULE_LICENSE("GPL");
58MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
59 "{ESS,ES1946},"
60 "{ESS,ES1969},"
61 "{TerraTec,128i PCI}}");
62
63#if IS_REACHABLE(CONFIG_GAMEPORT)
64#define SUPPORT_JOYSTICK 1
65#endif
66
67static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
68static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
69static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
70
71module_param_array(index, int, NULL, 0444);
72MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
73module_param_array(id, charp, NULL, 0444);
74MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
75module_param_array(enable, bool, NULL, 0444);
76MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
77
78#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
79
80#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
81
82#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
83
84#define SL_PCI_LEGACYCONTROL 0x40
85#define SL_PCI_CONFIG 0x50
86#define SL_PCI_DDMACONTROL 0x60
87
88#define ESSIO_REG_AUDIO2DMAADDR 0
89#define ESSIO_REG_AUDIO2DMACOUNT 4
90#define ESSIO_REG_AUDIO2MODE 6
91#define ESSIO_REG_IRQCONTROL 7
92
93#define ESSDM_REG_DMAADDR 0x00
94#define ESSDM_REG_DMACOUNT 0x04
95#define ESSDM_REG_DMACOMMAND 0x08
96#define ESSDM_REG_DMASTATUS 0x08
97#define ESSDM_REG_DMAMODE 0x0b
98#define ESSDM_REG_DMACLEAR 0x0d
99#define ESSDM_REG_DMAMASK 0x0f
100
101#define ESSSB_REG_FMLOWADDR 0x00
102#define ESSSB_REG_FMHIGHADDR 0x02
103#define ESSSB_REG_MIXERADDR 0x04
104#define ESSSB_REG_MIXERDATA 0x05
105
106#define ESSSB_IREG_AUDIO1 0x14
107#define ESSSB_IREG_MICMIX 0x1a
108#define ESSSB_IREG_RECSRC 0x1c
109#define ESSSB_IREG_MASTER 0x32
110#define ESSSB_IREG_FM 0x36
111#define ESSSB_IREG_AUXACD 0x38
112#define ESSSB_IREG_AUXB 0x3a
113#define ESSSB_IREG_PCSPEAKER 0x3c
114#define ESSSB_IREG_LINE 0x3e
115#define ESSSB_IREG_SPATCONTROL 0x50
116#define ESSSB_IREG_SPATLEVEL 0x52
117#define ESSSB_IREG_MASTER_LEFT 0x60
118#define ESSSB_IREG_MASTER_RIGHT 0x62
119#define ESSSB_IREG_MPU401CONTROL 0x64
120#define ESSSB_IREG_MICMIXRECORD 0x68
121#define ESSSB_IREG_AUDIO2RECORD 0x69
122#define ESSSB_IREG_AUXACDRECORD 0x6a
123#define ESSSB_IREG_FMRECORD 0x6b
124#define ESSSB_IREG_AUXBRECORD 0x6c
125#define ESSSB_IREG_MONO 0x6d
126#define ESSSB_IREG_LINERECORD 0x6e
127#define ESSSB_IREG_MONORECORD 0x6f
128#define ESSSB_IREG_AUDIO2SAMPLE 0x70
129#define ESSSB_IREG_AUDIO2MODE 0x71
130#define ESSSB_IREG_AUDIO2FILTER 0x72
131#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
132#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
133#define ESSSB_IREG_AUDIO2CONTROL1 0x78
134#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
135#define ESSSB_IREG_AUDIO2 0x7c
136
137#define ESSSB_REG_RESET 0x06
138
139#define ESSSB_REG_READDATA 0x0a
140#define ESSSB_REG_WRITEDATA 0x0c
141#define ESSSB_REG_READSTATUS 0x0c
142
143#define ESSSB_REG_STATUS 0x0e
144
145#define ESS_CMD_EXTSAMPLERATE 0xa1
146#define ESS_CMD_FILTERDIV 0xa2
147#define ESS_CMD_DMACNTRELOADL 0xa4
148#define ESS_CMD_DMACNTRELOADH 0xa5
149#define ESS_CMD_ANALOGCONTROL 0xa8
150#define ESS_CMD_IRQCONTROL 0xb1
151#define ESS_CMD_DRQCONTROL 0xb2
152#define ESS_CMD_RECLEVEL 0xb4
153#define ESS_CMD_SETFORMAT 0xb6
154#define ESS_CMD_SETFORMAT2 0xb7
155#define ESS_CMD_DMACONTROL 0xb8
156#define ESS_CMD_DMATYPE 0xb9
157#define ESS_CMD_OFFSETLEFT 0xba
158#define ESS_CMD_OFFSETRIGHT 0xbb
159#define ESS_CMD_READREG 0xc0
160#define ESS_CMD_ENABLEEXT 0xc6
161#define ESS_CMD_PAUSEDMA 0xd0
162#define ESS_CMD_ENABLEAUDIO1 0xd1
163#define ESS_CMD_STOPAUDIO1 0xd3
164#define ESS_CMD_AUDIO1STATUS 0xd8
165#define ESS_CMD_CONTDMA 0xd4
166#define ESS_CMD_TESTIRQ 0xf2
167
168#define ESS_RECSRC_MIC 0
169#define ESS_RECSRC_AUXACD 2
170#define ESS_RECSRC_AUXB 5
171#define ESS_RECSRC_LINE 6
172#define ESS_RECSRC_NONE 7
173
174#define DAC1 0x01
175#define ADC1 0x02
176#define DAC2 0x04
177
178/*
179
180 */
181
182#define SAVED_REG_SIZE 32 /* max. number of registers to save */
183
184struct es1938 {
185 int irq;
186
187 unsigned long io_port;
188 unsigned long sb_port;
189 unsigned long vc_port;
190 unsigned long mpu_port;
191 unsigned long game_port;
192 unsigned long ddma_port;
193
194 unsigned char irqmask;
195 unsigned char revision;
196
197 struct snd_kcontrol *hw_volume;
198 struct snd_kcontrol *hw_switch;
199 struct snd_kcontrol *master_volume;
200 struct snd_kcontrol *master_switch;
201
202 struct pci_dev *pci;
203 struct snd_card *card;
204 struct snd_pcm *pcm;
205 struct snd_pcm_substream *capture_substream;
206 struct snd_pcm_substream *playback1_substream;
207 struct snd_pcm_substream *playback2_substream;
208 struct snd_rawmidi *rmidi;
209
210 unsigned int dma1_size;
211 unsigned int dma2_size;
212 unsigned int dma1_start;
213 unsigned int dma2_start;
214 unsigned int dma1_shift;
215 unsigned int dma2_shift;
216 unsigned int last_capture_dmaaddr;
217 unsigned int active;
218
219 spinlock_t reg_lock;
220 spinlock_t mixer_lock;
221 struct snd_info_entry *proc_entry;
222
223#ifdef SUPPORT_JOYSTICK
224 struct gameport *gameport;
225#endif
226#ifdef CONFIG_PM_SLEEP
227 unsigned char saved_regs[SAVED_REG_SIZE];
228#endif
229};
230
231static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
232
233static const struct pci_device_id snd_es1938_ids[] = {
234 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
235 { 0, }
236};
237
238MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
239
240#define RESET_LOOP_TIMEOUT 0x10000
241#define WRITE_LOOP_TIMEOUT 0x10000
242#define GET_LOOP_TIMEOUT 0x01000
243
244/* -----------------------------------------------------------------
245 * Write to a mixer register
246 * -----------------------------------------------------------------*/
247static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
248{
249 unsigned long flags;
250 spin_lock_irqsave(&chip->mixer_lock, flags);
251 outb(reg, SLSB_REG(chip, MIXERADDR));
252 outb(val, SLSB_REG(chip, MIXERDATA));
253 spin_unlock_irqrestore(&chip->mixer_lock, flags);
254 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
255}
256
257/* -----------------------------------------------------------------
258 * Read from a mixer register
259 * -----------------------------------------------------------------*/
260static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
261{
262 int data;
263 unsigned long flags;
264 spin_lock_irqsave(&chip->mixer_lock, flags);
265 outb(reg, SLSB_REG(chip, MIXERADDR));
266 data = inb(SLSB_REG(chip, MIXERDATA));
267 spin_unlock_irqrestore(&chip->mixer_lock, flags);
268 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
269 return data;
270}
271
272/* -----------------------------------------------------------------
273 * Write to some bits of a mixer register (return old value)
274 * -----------------------------------------------------------------*/
275static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
276 unsigned char mask, unsigned char val)
277{
278 unsigned long flags;
279 unsigned char old, new, oval;
280 spin_lock_irqsave(&chip->mixer_lock, flags);
281 outb(reg, SLSB_REG(chip, MIXERADDR));
282 old = inb(SLSB_REG(chip, MIXERDATA));
283 oval = old & mask;
284 if (val != oval) {
285 new = (old & ~mask) | (val & mask);
286 outb(new, SLSB_REG(chip, MIXERDATA));
287 dev_dbg(chip->card->dev,
288 "Mixer reg %02x was %02x, set to %02x\n",
289 reg, old, new);
290 }
291 spin_unlock_irqrestore(&chip->mixer_lock, flags);
292 return oval;
293}
294
295/* -----------------------------------------------------------------
296 * Write command to Controller Registers
297 * -----------------------------------------------------------------*/
298static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
299{
300 int i;
301 unsigned char v;
302 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
303 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
304 outb(cmd, SLSB_REG(chip, WRITEDATA));
305 return;
306 }
307 }
308 dev_err(chip->card->dev,
309 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
310}
311
312/* -----------------------------------------------------------------
313 * Read the Read Data Buffer
314 * -----------------------------------------------------------------*/
315static int snd_es1938_get_byte(struct es1938 *chip)
316{
317 int i;
318 unsigned char v;
319 for (i = GET_LOOP_TIMEOUT; i; i--)
320 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
321 return inb(SLSB_REG(chip, READDATA));
322 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
323 return -ENODEV;
324}
325
326/* -----------------------------------------------------------------
327 * Write value cmd register
328 * -----------------------------------------------------------------*/
329static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
330{
331 unsigned long flags;
332 spin_lock_irqsave(&chip->reg_lock, flags);
333 snd_es1938_write_cmd(chip, reg);
334 snd_es1938_write_cmd(chip, val);
335 spin_unlock_irqrestore(&chip->reg_lock, flags);
336 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
337}
338
339/* -----------------------------------------------------------------
340 * Read data from cmd register and return it
341 * -----------------------------------------------------------------*/
342static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
343{
344 unsigned char val;
345 unsigned long flags;
346 spin_lock_irqsave(&chip->reg_lock, flags);
347 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
348 snd_es1938_write_cmd(chip, reg);
349 val = snd_es1938_get_byte(chip);
350 spin_unlock_irqrestore(&chip->reg_lock, flags);
351 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
352 return val;
353}
354
355/* -----------------------------------------------------------------
356 * Write data to cmd register and return old value
357 * -----------------------------------------------------------------*/
358static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
359 unsigned char val)
360{
361 unsigned long flags;
362 unsigned char old, new, oval;
363 spin_lock_irqsave(&chip->reg_lock, flags);
364 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
365 snd_es1938_write_cmd(chip, reg);
366 old = snd_es1938_get_byte(chip);
367 oval = old & mask;
368 if (val != oval) {
369 snd_es1938_write_cmd(chip, reg);
370 new = (old & ~mask) | (val & mask);
371 snd_es1938_write_cmd(chip, new);
372 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
373 reg, old, new);
374 }
375 spin_unlock_irqrestore(&chip->reg_lock, flags);
376 return oval;
377}
378
379/* --------------------------------------------------------------------
380 * Reset the chip
381 * --------------------------------------------------------------------*/
382static void snd_es1938_reset(struct es1938 *chip)
383{
384 int i;
385
386 outb(3, SLSB_REG(chip, RESET));
387 inb(SLSB_REG(chip, RESET));
388 outb(0, SLSB_REG(chip, RESET));
389 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
390 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
391 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
392 goto __next;
393 }
394 }
395 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
396
397 __next:
398 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
399
400 /* Demand transfer DMA: 4 bytes per DMA request */
401 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
402
403 /* Change behaviour of register A1
404 4x oversampling
405 2nd channel DAC asynchronous */
406 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
407 /* enable/select DMA channel and IRQ channel */
408 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
409 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
410 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
411 /* Set spatializer parameters to recommended values */
412 snd_es1938_mixer_write(chip, 0x54, 0x8f);
413 snd_es1938_mixer_write(chip, 0x56, 0x95);
414 snd_es1938_mixer_write(chip, 0x58, 0x94);
415 snd_es1938_mixer_write(chip, 0x5a, 0x80);
416}
417
418/* --------------------------------------------------------------------
419 * Reset the FIFOs
420 * --------------------------------------------------------------------*/
421static void snd_es1938_reset_fifo(struct es1938 *chip)
422{
423 outb(2, SLSB_REG(chip, RESET));
424 outb(0, SLSB_REG(chip, RESET));
425}
426
427static const struct snd_ratnum clocks[2] = {
428 {
429 .num = 793800,
430 .den_min = 1,
431 .den_max = 128,
432 .den_step = 1,
433 },
434 {
435 .num = 768000,
436 .den_min = 1,
437 .den_max = 128,
438 .den_step = 1,
439 }
440};
441
442static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
443 .nrats = 2,
444 .rats = clocks,
445};
446
447
448static void snd_es1938_rate_set(struct es1938 *chip,
449 struct snd_pcm_substream *substream,
450 int mode)
451{
452 unsigned int bits, div0;
453 struct snd_pcm_runtime *runtime = substream->runtime;
454 if (runtime->rate_num == clocks[0].num)
455 bits = 128 - runtime->rate_den;
456 else
457 bits = 256 - runtime->rate_den;
458
459 /* set filter register */
460 div0 = 256 - 7160000*20/(8*82*runtime->rate);
461
462 if (mode == DAC2) {
463 snd_es1938_mixer_write(chip, 0x70, bits);
464 snd_es1938_mixer_write(chip, 0x72, div0);
465 } else {
466 snd_es1938_write(chip, 0xA1, bits);
467 snd_es1938_write(chip, 0xA2, div0);
468 }
469}
470
471/* --------------------------------------------------------------------
472 * Configure Solo1 builtin DMA Controller
473 * --------------------------------------------------------------------*/
474
475static void snd_es1938_playback1_setdma(struct es1938 *chip)
476{
477 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
478 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
479 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
480 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
481}
482
483static void snd_es1938_playback2_setdma(struct es1938 *chip)
484{
485 /* Enable DMA controller */
486 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
487 /* 1. Master reset */
488 outb(0, SLDM_REG(chip, DMACLEAR));
489 /* 2. Mask DMA */
490 outb(1, SLDM_REG(chip, DMAMASK));
491 outb(0x18, SLDM_REG(chip, DMAMODE));
492 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
493 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
494 /* 3. Unmask DMA */
495 outb(0, SLDM_REG(chip, DMAMASK));
496}
497
498static void snd_es1938_capture_setdma(struct es1938 *chip)
499{
500 /* Enable DMA controller */
501 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
502 /* 1. Master reset */
503 outb(0, SLDM_REG(chip, DMACLEAR));
504 /* 2. Mask DMA */
505 outb(1, SLDM_REG(chip, DMAMASK));
506 outb(0x14, SLDM_REG(chip, DMAMODE));
507 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
508 chip->last_capture_dmaaddr = chip->dma1_start;
509 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
510 /* 3. Unmask DMA */
511 outb(0, SLDM_REG(chip, DMAMASK));
512}
513
514/* ----------------------------------------------------------------------
515 *
516 * *** PCM part ***
517 */
518
519static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
520 int cmd)
521{
522 struct es1938 *chip = snd_pcm_substream_chip(substream);
523 int val;
524 switch (cmd) {
525 case SNDRV_PCM_TRIGGER_START:
526 case SNDRV_PCM_TRIGGER_RESUME:
527 val = 0x0f;
528 chip->active |= ADC1;
529 break;
530 case SNDRV_PCM_TRIGGER_STOP:
531 case SNDRV_PCM_TRIGGER_SUSPEND:
532 val = 0x00;
533 chip->active &= ~ADC1;
534 break;
535 default:
536 return -EINVAL;
537 }
538 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
539 return 0;
540}
541
542static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
543 int cmd)
544{
545 struct es1938 *chip = snd_pcm_substream_chip(substream);
546 switch (cmd) {
547 case SNDRV_PCM_TRIGGER_START:
548 case SNDRV_PCM_TRIGGER_RESUME:
549 /* According to the documentation this should be:
550 0x13 but that value may randomly swap stereo channels */
551 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
552 udelay(10);
553 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
554 /* This two stage init gives the FIFO -> DAC connection time to
555 * settle before first data from DMA flows in. This should ensure
556 * no swapping of stereo channels. Report a bug if otherwise :-) */
557 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
558 chip->active |= DAC2;
559 break;
560 case SNDRV_PCM_TRIGGER_STOP:
561 case SNDRV_PCM_TRIGGER_SUSPEND:
562 outb(0, SLIO_REG(chip, AUDIO2MODE));
563 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
564 chip->active &= ~DAC2;
565 break;
566 default:
567 return -EINVAL;
568 }
569 return 0;
570}
571
572static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
573 int cmd)
574{
575 struct es1938 *chip = snd_pcm_substream_chip(substream);
576 int val;
577 switch (cmd) {
578 case SNDRV_PCM_TRIGGER_START:
579 case SNDRV_PCM_TRIGGER_RESUME:
580 val = 5;
581 chip->active |= DAC1;
582 break;
583 case SNDRV_PCM_TRIGGER_STOP:
584 case SNDRV_PCM_TRIGGER_SUSPEND:
585 val = 0;
586 chip->active &= ~DAC1;
587 break;
588 default:
589 return -EINVAL;
590 }
591 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
592 return 0;
593}
594
595static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
596 int cmd)
597{
598 switch (substream->number) {
599 case 0:
600 return snd_es1938_playback1_trigger(substream, cmd);
601 case 1:
602 return snd_es1938_playback2_trigger(substream, cmd);
603 }
604 snd_BUG();
605 return -EINVAL;
606}
607
608/* --------------------------------------------------------------------
609 * First channel for Extended Mode Audio 1 ADC Operation
610 * --------------------------------------------------------------------*/
611static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
612{
613 struct es1938 *chip = snd_pcm_substream_chip(substream);
614 struct snd_pcm_runtime *runtime = substream->runtime;
615 int u, is8, mono;
616 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
617 unsigned int count = snd_pcm_lib_period_bytes(substream);
618
619 chip->dma1_size = size;
620 chip->dma1_start = runtime->dma_addr;
621
622 mono = (runtime->channels > 1) ? 0 : 1;
623 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
624 u = snd_pcm_format_unsigned(runtime->format);
625
626 chip->dma1_shift = 2 - mono - is8;
627
628 snd_es1938_reset_fifo(chip);
629
630 /* program type */
631 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
632
633 /* set clock and counters */
634 snd_es1938_rate_set(chip, substream, ADC1);
635
636 count = 0x10000 - count;
637 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
638 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
639
640 /* initialize and configure ADC */
641 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
642 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
643 (u ? 0x00 : 0x20) |
644 (is8 ? 0x00 : 0x04) |
645 (mono ? 0x40 : 0x08));
646
647 // snd_es1938_reset_fifo(chip);
648
649 /* 11. configure system interrupt controller and DMA controller */
650 snd_es1938_capture_setdma(chip);
651
652 return 0;
653}
654
655
656/* ------------------------------------------------------------------------------
657 * Second Audio channel DAC Operation
658 * ------------------------------------------------------------------------------*/
659static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
660{
661 struct es1938 *chip = snd_pcm_substream_chip(substream);
662 struct snd_pcm_runtime *runtime = substream->runtime;
663 int u, is8, mono;
664 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
665 unsigned int count = snd_pcm_lib_period_bytes(substream);
666
667 chip->dma2_size = size;
668 chip->dma2_start = runtime->dma_addr;
669
670 mono = (runtime->channels > 1) ? 0 : 1;
671 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
672 u = snd_pcm_format_unsigned(runtime->format);
673
674 chip->dma2_shift = 2 - mono - is8;
675
676 snd_es1938_reset_fifo(chip);
677
678 /* set clock and counters */
679 snd_es1938_rate_set(chip, substream, DAC2);
680
681 count >>= 1;
682 count = 0x10000 - count;
683 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
684 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
685
686 /* initialize and configure Audio 2 DAC */
687 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
688 (mono ? 0 : 2) | (is8 ? 0 : 1));
689
690 /* program DMA */
691 snd_es1938_playback1_setdma(chip);
692
693 return 0;
694}
695
696static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
697{
698 struct es1938 *chip = snd_pcm_substream_chip(substream);
699 struct snd_pcm_runtime *runtime = substream->runtime;
700 int u, is8, mono;
701 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
702 unsigned int count = snd_pcm_lib_period_bytes(substream);
703
704 chip->dma1_size = size;
705 chip->dma1_start = runtime->dma_addr;
706
707 mono = (runtime->channels > 1) ? 0 : 1;
708 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
709 u = snd_pcm_format_unsigned(runtime->format);
710
711 chip->dma1_shift = 2 - mono - is8;
712
713 count = 0x10000 - count;
714
715 /* reset */
716 snd_es1938_reset_fifo(chip);
717
718 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
719
720 /* set clock and counters */
721 snd_es1938_rate_set(chip, substream, DAC1);
722 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
723 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
724
725 /* initialized and configure DAC */
726 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
727 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
728 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
729 0x90 | (mono ? 0x40 : 0x08) |
730 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
731
732 /* program DMA */
733 snd_es1938_playback2_setdma(chip);
734
735 return 0;
736}
737
738static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
739{
740 switch (substream->number) {
741 case 0:
742 return snd_es1938_playback1_prepare(substream);
743 case 1:
744 return snd_es1938_playback2_prepare(substream);
745 }
746 snd_BUG();
747 return -EINVAL;
748}
749
750/* during the incrementing of dma counters the DMA register reads sometimes
751 returns garbage. To ensure a valid hw pointer, the following checks which
752 should be very unlikely to fail are used:
753 - is the current DMA address in the valid DMA range ?
754 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
755 One can argue this could differ by one byte depending on which register is
756 updated first, so the implementation below allows for that.
757*/
758static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
759{
760 struct es1938 *chip = snd_pcm_substream_chip(substream);
761 size_t ptr;
762#if 0
763 size_t old, new;
764 /* This stuff is *needed*, don't ask why - AB */
765 old = inw(SLDM_REG(chip, DMACOUNT));
766 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
767 old = new;
768 ptr = chip->dma1_size - 1 - new;
769#else
770 size_t count;
771 unsigned int diff;
772
773 ptr = inl(SLDM_REG(chip, DMAADDR));
774 count = inw(SLDM_REG(chip, DMACOUNT));
775 diff = chip->dma1_start + chip->dma1_size - ptr - count;
776
777 if (diff > 3 || ptr < chip->dma1_start
778 || ptr >= chip->dma1_start+chip->dma1_size)
779 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
780 else
781 chip->last_capture_dmaaddr = ptr; /* good, remember it */
782
783 ptr -= chip->dma1_start;
784#endif
785 return ptr >> chip->dma1_shift;
786}
787
788static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
789{
790 struct es1938 *chip = snd_pcm_substream_chip(substream);
791 size_t ptr;
792#if 1
793 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
794#else
795 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
796#endif
797 return ptr >> chip->dma2_shift;
798}
799
800static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
801{
802 struct es1938 *chip = snd_pcm_substream_chip(substream);
803 size_t ptr;
804 size_t old, new;
805#if 1
806 /* This stuff is *needed*, don't ask why - AB */
807 old = inw(SLDM_REG(chip, DMACOUNT));
808 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
809 old = new;
810 ptr = chip->dma1_size - 1 - new;
811#else
812 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
813#endif
814 return ptr >> chip->dma1_shift;
815}
816
817static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
818{
819 switch (substream->number) {
820 case 0:
821 return snd_es1938_playback1_pointer(substream);
822 case 1:
823 return snd_es1938_playback2_pointer(substream);
824 }
825 snd_BUG();
826 return -EINVAL;
827}
828
829static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
830 int channel, unsigned long pos,
831 void __user *dst, unsigned long count)
832{
833 struct snd_pcm_runtime *runtime = substream->runtime;
834 struct es1938 *chip = snd_pcm_substream_chip(substream);
835
836 if (snd_BUG_ON(pos + count > chip->dma1_size))
837 return -EINVAL;
838 if (pos + count < chip->dma1_size) {
839 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
840 return -EFAULT;
841 } else {
842 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
843 return -EFAULT;
844 if (put_user(runtime->dma_area[0],
845 ((unsigned char __user *)dst) + count - 1))
846 return -EFAULT;
847 }
848 return 0;
849}
850
851static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
852 int channel, unsigned long pos,
853 void *dst, unsigned long count)
854{
855 struct snd_pcm_runtime *runtime = substream->runtime;
856 struct es1938 *chip = snd_pcm_substream_chip(substream);
857
858 if (snd_BUG_ON(pos + count > chip->dma1_size))
859 return -EINVAL;
860 if (pos + count < chip->dma1_size) {
861 memcpy(dst, runtime->dma_area + pos + 1, count);
862 } else {
863 memcpy(dst, runtime->dma_area + pos + 1, count - 1);
864 runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
865 }
866 return 0;
867}
868
869/* ----------------------------------------------------------------------
870 * Audio1 Capture (ADC)
871 * ----------------------------------------------------------------------*/
872static const struct snd_pcm_hardware snd_es1938_capture =
873{
874 .info = (SNDRV_PCM_INFO_INTERLEAVED |
875 SNDRV_PCM_INFO_BLOCK_TRANSFER),
876 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
877 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
878 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
879 .rate_min = 6000,
880 .rate_max = 48000,
881 .channels_min = 1,
882 .channels_max = 2,
883 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
884 .period_bytes_min = 64,
885 .period_bytes_max = 0x8000,
886 .periods_min = 1,
887 .periods_max = 1024,
888 .fifo_size = 256,
889};
890
891/* -----------------------------------------------------------------------
892 * Audio2 Playback (DAC)
893 * -----------------------------------------------------------------------*/
894static const struct snd_pcm_hardware snd_es1938_playback =
895{
896 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
897 SNDRV_PCM_INFO_BLOCK_TRANSFER |
898 SNDRV_PCM_INFO_MMAP_VALID),
899 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
900 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
901 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
902 .rate_min = 6000,
903 .rate_max = 48000,
904 .channels_min = 1,
905 .channels_max = 2,
906 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
907 .period_bytes_min = 64,
908 .period_bytes_max = 0x8000,
909 .periods_min = 1,
910 .periods_max = 1024,
911 .fifo_size = 256,
912};
913
914static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
915{
916 struct es1938 *chip = snd_pcm_substream_chip(substream);
917 struct snd_pcm_runtime *runtime = substream->runtime;
918
919 if (chip->playback2_substream)
920 return -EAGAIN;
921 chip->capture_substream = substream;
922 runtime->hw = snd_es1938_capture;
923 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
924 &hw_constraints_clocks);
925 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
926 return 0;
927}
928
929static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
930{
931 struct es1938 *chip = snd_pcm_substream_chip(substream);
932 struct snd_pcm_runtime *runtime = substream->runtime;
933
934 switch (substream->number) {
935 case 0:
936 chip->playback1_substream = substream;
937 break;
938 case 1:
939 if (chip->capture_substream)
940 return -EAGAIN;
941 chip->playback2_substream = substream;
942 break;
943 default:
944 snd_BUG();
945 return -EINVAL;
946 }
947 runtime->hw = snd_es1938_playback;
948 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
949 &hw_constraints_clocks);
950 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
951 return 0;
952}
953
954static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
955{
956 struct es1938 *chip = snd_pcm_substream_chip(substream);
957
958 chip->capture_substream = NULL;
959 return 0;
960}
961
962static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
963{
964 struct es1938 *chip = snd_pcm_substream_chip(substream);
965
966 switch (substream->number) {
967 case 0:
968 chip->playback1_substream = NULL;
969 break;
970 case 1:
971 chip->playback2_substream = NULL;
972 break;
973 default:
974 snd_BUG();
975 return -EINVAL;
976 }
977 return 0;
978}
979
980static const struct snd_pcm_ops snd_es1938_playback_ops = {
981 .open = snd_es1938_playback_open,
982 .close = snd_es1938_playback_close,
983 .prepare = snd_es1938_playback_prepare,
984 .trigger = snd_es1938_playback_trigger,
985 .pointer = snd_es1938_playback_pointer,
986};
987
988static const struct snd_pcm_ops snd_es1938_capture_ops = {
989 .open = snd_es1938_capture_open,
990 .close = snd_es1938_capture_close,
991 .prepare = snd_es1938_capture_prepare,
992 .trigger = snd_es1938_capture_trigger,
993 .pointer = snd_es1938_capture_pointer,
994 .copy_user = snd_es1938_capture_copy,
995 .copy_kernel = snd_es1938_capture_copy_kernel,
996};
997
998static int snd_es1938_new_pcm(struct es1938 *chip, int device)
999{
1000 struct snd_pcm *pcm;
1001 int err;
1002
1003 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1004 return err;
1005 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1006 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1007
1008 pcm->private_data = chip;
1009 pcm->info_flags = 0;
1010 strcpy(pcm->name, "ESS Solo-1");
1011
1012 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1013 &chip->pci->dev, 64*1024, 64*1024);
1014
1015 chip->pcm = pcm;
1016 return 0;
1017}
1018
1019/* -------------------------------------------------------------------
1020 *
1021 * *** Mixer part ***
1022 */
1023
1024static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_info *uinfo)
1026{
1027 static const char * const texts[8] = {
1028 "Mic", "Mic Master", "CD", "AOUT",
1029 "Mic1", "Mix", "Line", "Master"
1030 };
1031
1032 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1033}
1034
1035static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1036 struct snd_ctl_elem_value *ucontrol)
1037{
1038 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1039 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1040 return 0;
1041}
1042
1043static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1047 unsigned char val = ucontrol->value.enumerated.item[0];
1048
1049 if (val > 7)
1050 return -EINVAL;
1051 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1052}
1053
1054#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1055
1056static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_value *ucontrol)
1058{
1059 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1060 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1061 ucontrol->value.integer.value[0] = !!(val & 8);
1062 return 0;
1063}
1064
1065static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1066 struct snd_ctl_elem_value *ucontrol)
1067{
1068 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1069 unsigned char oval, nval;
1070 int change;
1071 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1072 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1073 change = nval != oval;
1074 if (change) {
1075 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1076 snd_es1938_mixer_write(chip, 0x50, nval);
1077 }
1078 return change;
1079}
1080
1081static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1082 struct snd_ctl_elem_info *uinfo)
1083{
1084 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1085 uinfo->count = 2;
1086 uinfo->value.integer.min = 0;
1087 uinfo->value.integer.max = 63;
1088 return 0;
1089}
1090
1091static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1092 struct snd_ctl_elem_value *ucontrol)
1093{
1094 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1095 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1096 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1097 return 0;
1098}
1099
1100#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1101
1102static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1106 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1107 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1108 return 0;
1109}
1110
1111static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1112{
1113 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1114 chip->master_volume = NULL;
1115 chip->master_switch = NULL;
1116 chip->hw_volume = NULL;
1117 chip->hw_switch = NULL;
1118}
1119
1120static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1121 unsigned char mask, unsigned char val)
1122{
1123 if (reg < 0xa0)
1124 return snd_es1938_mixer_bits(chip, reg, mask, val);
1125 else
1126 return snd_es1938_bits(chip, reg, mask, val);
1127}
1128
1129static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1130{
1131 if (reg < 0xa0)
1132 return snd_es1938_mixer_read(chip, reg);
1133 else
1134 return snd_es1938_read(chip, reg);
1135}
1136
1137#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1138{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1139 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1140 .name = xname, .index = xindex, \
1141 .info = snd_es1938_info_single, \
1142 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1143 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1144 .tlv = { .p = xtlv } }
1145#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1146{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1147 .info = snd_es1938_info_single, \
1148 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1149 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1150
1151static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1152 struct snd_ctl_elem_info *uinfo)
1153{
1154 int mask = (kcontrol->private_value >> 16) & 0xff;
1155
1156 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1157 uinfo->count = 1;
1158 uinfo->value.integer.min = 0;
1159 uinfo->value.integer.max = mask;
1160 return 0;
1161}
1162
1163static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1164 struct snd_ctl_elem_value *ucontrol)
1165{
1166 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1167 int reg = kcontrol->private_value & 0xff;
1168 int shift = (kcontrol->private_value >> 8) & 0xff;
1169 int mask = (kcontrol->private_value >> 16) & 0xff;
1170 int invert = (kcontrol->private_value >> 24) & 0xff;
1171 int val;
1172
1173 val = snd_es1938_reg_read(chip, reg);
1174 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1175 if (invert)
1176 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1177 return 0;
1178}
1179
1180static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1181 struct snd_ctl_elem_value *ucontrol)
1182{
1183 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1184 int reg = kcontrol->private_value & 0xff;
1185 int shift = (kcontrol->private_value >> 8) & 0xff;
1186 int mask = (kcontrol->private_value >> 16) & 0xff;
1187 int invert = (kcontrol->private_value >> 24) & 0xff;
1188 unsigned char val;
1189
1190 val = (ucontrol->value.integer.value[0] & mask);
1191 if (invert)
1192 val = mask - val;
1193 mask <<= shift;
1194 val <<= shift;
1195 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1196}
1197
1198#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1199{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1200 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1201 .name = xname, .index = xindex, \
1202 .info = snd_es1938_info_double, \
1203 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1204 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1205 .tlv = { .p = xtlv } }
1206#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1207{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1208 .info = snd_es1938_info_double, \
1209 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1210 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1211
1212static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1213 struct snd_ctl_elem_info *uinfo)
1214{
1215 int mask = (kcontrol->private_value >> 24) & 0xff;
1216
1217 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1218 uinfo->count = 2;
1219 uinfo->value.integer.min = 0;
1220 uinfo->value.integer.max = mask;
1221 return 0;
1222}
1223
1224static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1225 struct snd_ctl_elem_value *ucontrol)
1226{
1227 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1228 int left_reg = kcontrol->private_value & 0xff;
1229 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1230 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1231 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1232 int mask = (kcontrol->private_value >> 24) & 0xff;
1233 int invert = (kcontrol->private_value >> 22) & 1;
1234 unsigned char left, right;
1235
1236 left = snd_es1938_reg_read(chip, left_reg);
1237 if (left_reg != right_reg)
1238 right = snd_es1938_reg_read(chip, right_reg);
1239 else
1240 right = left;
1241 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1242 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1243 if (invert) {
1244 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1245 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1246 }
1247 return 0;
1248}
1249
1250static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1251 struct snd_ctl_elem_value *ucontrol)
1252{
1253 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1254 int left_reg = kcontrol->private_value & 0xff;
1255 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1256 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1257 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1258 int mask = (kcontrol->private_value >> 24) & 0xff;
1259 int invert = (kcontrol->private_value >> 22) & 1;
1260 int change;
1261 unsigned char val1, val2, mask1, mask2;
1262
1263 val1 = ucontrol->value.integer.value[0] & mask;
1264 val2 = ucontrol->value.integer.value[1] & mask;
1265 if (invert) {
1266 val1 = mask - val1;
1267 val2 = mask - val2;
1268 }
1269 val1 <<= shift_left;
1270 val2 <<= shift_right;
1271 mask1 = mask << shift_left;
1272 mask2 = mask << shift_right;
1273 if (left_reg != right_reg) {
1274 change = 0;
1275 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1276 change = 1;
1277 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1278 change = 1;
1279 } else {
1280 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1281 val1 | val2) != (val1 | val2));
1282 }
1283 return change;
1284}
1285
1286#ifndef TARGET_OS2
1287static const DECLARE_TLV_DB_RANGE(db_scale_master,
1288 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1289 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1290);
1291
1292static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1293 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1294 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1295);
1296
1297static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1298 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1299 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1300);
1301
1302static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1303 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1304 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1305);
1306
1307static const DECLARE_TLV_DB_RANGE(db_scale_line,
1308 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1309 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1310);
1311#else
1312static unsigned int db_scale_master[] = {
1313 TLV_DB_RANGE_HEAD(2),
1314 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1315 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1316};
1317
1318static unsigned int db_scale_audio1[] = {
1319 TLV_DB_RANGE_HEAD(2),
1320 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1321 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1322};
1323
1324static unsigned int db_scale_audio2[] = {
1325 TLV_DB_RANGE_HEAD(2),
1326 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1327 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1328};
1329
1330static unsigned int db_scale_mic[] = {
1331 TLV_DB_RANGE_HEAD(2),
1332 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1333 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1334};
1335
1336static unsigned int db_scale_line[] = {
1337 TLV_DB_RANGE_HEAD(2),
1338 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1339 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1340};
1341#endif
1342
1343static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1344
1345static const struct snd_kcontrol_new snd_es1938_controls[] = {
1346ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1347 db_scale_master),
1348ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1349{
1350 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1351 .name = "Hardware Master Playback Volume",
1352 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1353 .info = snd_es1938_info_hw_volume,
1354 .get = snd_es1938_get_hw_volume,
1355},
1356{
1357 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1358 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1359 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1360 .name = "Hardware Master Playback Switch",
1361 .info = snd_es1938_info_hw_switch,
1362 .get = snd_es1938_get_hw_switch,
1363 .tlv = { .p = db_scale_master },
1364},
1365ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1366ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1367 db_scale_line),
1368ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1369ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1370 db_scale_mic),
1371ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1372 db_scale_line),
1373ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1374 db_scale_mic),
1375ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1376 db_scale_line),
1377ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1378 db_scale_capture),
1379ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1380ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1381ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1382{
1383 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1384 .name = "Capture Source",
1385 .info = snd_es1938_info_mux,
1386 .get = snd_es1938_get_mux,
1387 .put = snd_es1938_put_mux,
1388},
1389ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1390 db_scale_line),
1391ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1392 db_scale_audio2),
1393ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1394 db_scale_mic),
1395ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1396 db_scale_line),
1397ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1398 db_scale_mic),
1399ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1400 db_scale_line),
1401ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1402 db_scale_line),
1403ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1404 db_scale_line),
1405ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1406 db_scale_audio2),
1407ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1408 db_scale_audio1),
1409ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1410{
1411 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1412 .name = "3D Control - Switch",
1413 .info = snd_es1938_info_spatializer_enable,
1414 .get = snd_es1938_get_spatializer_enable,
1415 .put = snd_es1938_put_spatializer_enable,
1416},
1417ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1418};
1419
1420
1421/* ---------------------------------------------------------------------------- */
1422/* ---------------------------------------------------------------------------- */
1423
1424/*
1425 * initialize the chip - used by resume callback, too
1426 */
1427static void snd_es1938_chip_init(struct es1938 *chip)
1428{
1429 /* reset chip */
1430 snd_es1938_reset(chip);
1431
1432 /* configure native mode */
1433
1434 /* enable bus master */
1435 pci_set_master(chip->pci);
1436
1437 /* disable legacy audio */
1438 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1439
1440 /* set DDMA base */
1441 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1442
1443 /* set DMA/IRQ policy */
1444 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1445
1446 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1447 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1448
1449 /* reset DMA */
1450 outb(0, SLDM_REG(chip, DMACLEAR));
1451}
1452
1453#ifdef CONFIG_PM_SLEEP
1454/*
1455 * PM support
1456 */
1457
1458static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1459 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1460 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1461 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1462 0xa8, 0xb4,
1463};
1464
1465
1466static int es1938_suspend(struct device *dev)
1467{
1468 struct snd_card *card = dev_get_drvdata(dev);
1469 struct es1938 *chip = card->private_data;
1470 const unsigned char *s;
1471 unsigned char *d;
1472
1473 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1474
1475 /* save mixer-related registers */
1476 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1477 *d = snd_es1938_reg_read(chip, *s);
1478
1479 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1480 if (chip->irq >= 0) {
1481 free_irq(chip->irq, chip);
1482 chip->irq = -1;
1483 card->sync_irq = -1;
1484 }
1485 return 0;
1486}
1487
1488static int es1938_resume(struct device *dev)
1489{
1490 struct pci_dev *pci = to_pci_dev(dev);
1491 struct snd_card *card = dev_get_drvdata(dev);
1492 struct es1938 *chip = card->private_data;
1493 const unsigned char *s;
1494 unsigned char *d;
1495
1496 if (request_irq(pci->irq, snd_es1938_interrupt,
1497 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1498 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1499 pci->irq);
1500 snd_card_disconnect(card);
1501 return -EIO;
1502 }
1503 chip->irq = pci->irq;
1504 card->sync_irq = chip->irq;
1505 snd_es1938_chip_init(chip);
1506
1507 /* restore mixer-related registers */
1508 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1509 if (*s < 0xa0)
1510 snd_es1938_mixer_write(chip, *s, *d);
1511 else
1512 snd_es1938_write(chip, *s, *d);
1513 }
1514
1515 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1516 return 0;
1517}
1518
1519static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1520#define ES1938_PM_OPS &es1938_pm
1521#else
1522#define ES1938_PM_OPS NULL
1523#endif /* CONFIG_PM_SLEEP */
1524
1525#ifdef SUPPORT_JOYSTICK
1526static int snd_es1938_create_gameport(struct es1938 *chip)
1527{
1528 struct gameport *gp;
1529
1530 chip->gameport = gp = gameport_allocate_port();
1531 if (!gp) {
1532 dev_err(chip->card->dev,
1533 "cannot allocate memory for gameport\n");
1534 return -ENOMEM;
1535 }
1536
1537 gameport_set_name(gp, "ES1938");
1538 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1539 gameport_set_dev_parent(gp, &chip->pci->dev);
1540 gp->io = chip->game_port;
1541
1542 gameport_register_port(gp);
1543
1544 return 0;
1545}
1546
1547static void snd_es1938_free_gameport(struct es1938 *chip)
1548{
1549 if (chip->gameport) {
1550 gameport_unregister_port(chip->gameport);
1551 chip->gameport = NULL;
1552 }
1553}
1554#else
1555static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1556static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1557#endif /* SUPPORT_JOYSTICK */
1558
1559static int snd_es1938_free(struct es1938 *chip)
1560{
1561 /* disable irqs */
1562 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1563 if (chip->rmidi)
1564 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1565
1566 snd_es1938_free_gameport(chip);
1567
1568 if (chip->irq >= 0)
1569 free_irq(chip->irq, chip);
1570 pci_release_regions(chip->pci);
1571 pci_disable_device(chip->pci);
1572 kfree(chip);
1573 return 0;
1574}
1575
1576static int snd_es1938_dev_free(struct snd_device *device)
1577{
1578 struct es1938 *chip = device->device_data;
1579 return snd_es1938_free(chip);
1580}
1581
1582static int snd_es1938_create(struct snd_card *card,
1583 struct pci_dev *pci,
1584 struct es1938 **rchip)
1585{
1586 struct es1938 *chip;
1587 int err;
1588 static const struct snd_device_ops ops = {
1589 .dev_free = snd_es1938_dev_free,
1590 };
1591
1592 *rchip = NULL;
1593
1594 /* enable PCI device */
1595 if ((err = pci_enable_device(pci)) < 0)
1596 return err;
1597 /* check, if we can restrict PCI DMA transfers to 24 bits */
1598 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
1599 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
1600 dev_err(card->dev,
1601 "architecture does not support 24bit PCI busmaster DMA\n");
1602 pci_disable_device(pci);
1603 return -ENXIO;
1604 }
1605
1606 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1607 if (chip == NULL) {
1608 pci_disable_device(pci);
1609 return -ENOMEM;
1610 }
1611 spin_lock_init(&chip->reg_lock);
1612 spin_lock_init(&chip->mixer_lock);
1613 chip->card = card;
1614 chip->pci = pci;
1615 chip->irq = -1;
1616 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1617 kfree(chip);
1618 pci_disable_device(pci);
1619 return err;
1620 }
1621 chip->io_port = pci_resource_start(pci, 0);
1622 chip->sb_port = pci_resource_start(pci, 1);
1623 chip->vc_port = pci_resource_start(pci, 2);
1624 chip->mpu_port = pci_resource_start(pci, 3);
1625 chip->game_port = pci_resource_start(pci, 4);
1626 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1627 KBUILD_MODNAME, chip)) {
1628 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1629 snd_es1938_free(chip);
1630 return -EBUSY;
1631 }
1632 chip->irq = pci->irq;
1633 card->sync_irq = chip->irq;
1634 dev_dbg(card->dev,
1635 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1636 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1637
1638 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1639
1640 snd_es1938_chip_init(chip);
1641
1642 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1643 snd_es1938_free(chip);
1644 return err;
1645 }
1646
1647 *rchip = chip;
1648 return 0;
1649}
1650
1651/* --------------------------------------------------------------------
1652 * Interrupt handler
1653 * -------------------------------------------------------------------- */
1654static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1655{
1656 struct es1938 *chip = dev_id;
1657 unsigned char status;
1658 __always_unused unsigned char audiostatus;
1659 int handled = 0;
1660
1661 status = inb(SLIO_REG(chip, IRQCONTROL));
1662#if 0
1663 dev_dbg(chip->card->dev,
1664 "Es1938debug - interrupt status: =0x%x\n", status);
1665#endif
1666
1667 /* AUDIO 1 */
1668 if (status & 0x10) {
1669#if 0
1670 dev_dbg(chip->card->dev,
1671 "Es1938debug - AUDIO channel 1 interrupt\n");
1672 dev_dbg(chip->card->dev,
1673 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1674 inw(SLDM_REG(chip, DMACOUNT)));
1675 dev_dbg(chip->card->dev,
1676 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1677 inl(SLDM_REG(chip, DMAADDR)));
1678 dev_dbg(chip->card->dev,
1679 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1680 inl(SLDM_REG(chip, DMASTATUS)));
1681#endif
1682 /* clear irq */
1683 handled = 1;
1684 audiostatus = inb(SLSB_REG(chip, STATUS));
1685 if (chip->active & ADC1)
1686 snd_pcm_period_elapsed(chip->capture_substream);
1687 else if (chip->active & DAC1)
1688 snd_pcm_period_elapsed(chip->playback2_substream);
1689 }
1690
1691 /* AUDIO 2 */
1692 if (status & 0x20) {
1693#if 0
1694 dev_dbg(chip->card->dev,
1695 "Es1938debug - AUDIO channel 2 interrupt\n");
1696 dev_dbg(chip->card->dev,
1697 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1698 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1699 dev_dbg(chip->card->dev,
1700 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1701 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1702
1703#endif
1704 /* clear irq */
1705 handled = 1;
1706 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1707 if (chip->active & DAC2)
1708 snd_pcm_period_elapsed(chip->playback1_substream);
1709 }
1710
1711 /* Hardware volume */
1712 if (status & 0x40) {
1713 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1714 handled = 1;
1715 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1716 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1717 if (!split) {
1718 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1719 &chip->master_switch->id);
1720 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1721 &chip->master_volume->id);
1722 }
1723 /* ack interrupt */
1724 snd_es1938_mixer_write(chip, 0x66, 0x00);
1725 }
1726
1727 /* MPU401 */
1728 if (status & 0x80) {
1729 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1730 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1731 // andreas@flying-snail.de
1732 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1733 if (chip->rmidi) {
1734 handled = 1;
1735 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1736 }
1737 }
1738 return IRQ_RETVAL(handled);
1739}
1740
1741#define ES1938_DMA_SIZE 64
1742
1743static int snd_es1938_mixer(struct es1938 *chip)
1744{
1745 struct snd_card *card;
1746 unsigned int idx;
1747 int err;
1748
1749 card = chip->card;
1750
1751 strcpy(card->mixername, "ESS Solo-1");
1752
1753 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1754 struct snd_kcontrol *kctl;
1755 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1756 switch (idx) {
1757 case 0:
1758 chip->master_volume = kctl;
1759 kctl->private_free = snd_es1938_hwv_free;
1760 break;
1761 case 1:
1762 chip->master_switch = kctl;
1763 kctl->private_free = snd_es1938_hwv_free;
1764 break;
1765 case 2:
1766 chip->hw_volume = kctl;
1767 kctl->private_free = snd_es1938_hwv_free;
1768 break;
1769 case 3:
1770 chip->hw_switch = kctl;
1771 kctl->private_free = snd_es1938_hwv_free;
1772 break;
1773 }
1774 if ((err = snd_ctl_add(card, kctl)) < 0)
1775 return err;
1776 }
1777 return 0;
1778}
1779
1780
1781static int snd_es1938_probe(struct pci_dev *pci,
1782 const struct pci_device_id *pci_id)
1783{
1784 static int dev;
1785 struct snd_card *card;
1786 struct es1938 *chip;
1787 struct snd_opl3 *opl3;
1788 int idx, err;
1789
1790 if (dev >= SNDRV_CARDS)
1791 return -ENODEV;
1792 if (!enable[dev]) {
1793 dev++;
1794 return -ENOENT;
1795 }
1796
1797 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1798 0, &card);
1799 if (err < 0)
1800 return err;
1801 for (idx = 0; idx < 5; idx++) {
1802 if (pci_resource_start(pci, idx) == 0 ||
1803 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1804 snd_card_free(card);
1805 return -ENODEV;
1806 }
1807 }
1808 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1809 snd_card_free(card);
1810 return err;
1811 }
1812 card->private_data = chip;
1813
1814 strcpy(card->driver, "ES1938");
1815 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1816 sprintf(card->longname, "%s rev %i, irq %i",
1817 card->shortname,
1818 chip->revision,
1819 chip->irq);
1820
1821 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1822 snd_card_free(card);
1823 return err;
1824 }
1825 if ((err = snd_es1938_mixer(chip)) < 0) {
1826 snd_card_free(card);
1827 return err;
1828 }
1829 if (snd_opl3_create(card,
1830 SLSB_REG(chip, FMLOWADDR),
1831 SLSB_REG(chip, FMHIGHADDR),
1832 OPL3_HW_OPL3, 1, &opl3) < 0) {
1833 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1834 SLSB_REG(chip, FMLOWADDR));
1835 } else {
1836 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1837 snd_card_free(card);
1838 return err;
1839 }
1840 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1841 snd_card_free(card);
1842 return err;
1843 }
1844 }
1845 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1846 chip->mpu_port,
1847 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1848 -1, &chip->rmidi) < 0) {
1849 dev_err(card->dev, "unable to initialize MPU-401\n");
1850 } else {
1851 // this line is vital for MIDI interrupt handling on ess-solo1
1852 // andreas@flying-snail.de
1853 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1854 }
1855
1856 snd_es1938_create_gameport(chip);
1857
1858 if ((err = snd_card_register(card)) < 0) {
1859 snd_card_free(card);
1860 return err;
1861 }
1862
1863 pci_set_drvdata(pci, card);
1864 dev++;
1865 return 0;
1866}
1867
1868static void snd_es1938_remove(struct pci_dev *pci)
1869{
1870 snd_card_free(pci_get_drvdata(pci));
1871}
1872
1873static struct pci_driver es1938_driver = {
1874 .name = KBUILD_MODNAME,
1875 .id_table = snd_es1938_ids,
1876 .probe = snd_es1938_probe,
1877 .remove = snd_es1938_remove,
1878 .driver = {
1879 .pm = ES1938_PM_OPS,
1880 },
1881};
1882
1883module_pci_driver(es1938_driver);
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