source: GPL/trunk/alsa-kernel/pci/atiixp.c@ 522

Last change on this file since 522 was 522, checked in by David Azarewicz, 15 years ago

flush_workqueue hack, compiler warnings
File size: 47.4 KB
Line 
1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <asm/io.h>
23#include <linux/delay.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/pci.h>
27#include <linux/slab.h>
28#include <linux/moduleparam.h>
29#include <linux/mutex.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP AC97 controller");
39MODULE_LICENSE("GPL");
40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}");
41
42static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
45static char *ac97_quirk;
46static int spdif_aclink = 1;
47static int ac97_codec = -1;
48
49module_param(index, int, 0444);
50MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
51module_param(id, charp, 0444);
52MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
53module_param(ac97_clock, int, 0444);
54MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55module_param(ac97_quirk, charp, 0444);
56MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
57module_param(ac97_codec, int, 0444);
58MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
59module_param(spdif_aclink, bool, 0444);
60MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
61
62/* just for backward compatibility */
63static int enable;
64module_param(enable, bool, 0444);
65
66
67/*
68 */
69
70#define ATI_REG_ISR 0x00 /* interrupt source */
71#define ATI_REG_ISR_IN_XRUN (1U<<0)
72#define ATI_REG_ISR_IN_STATUS (1U<<1)
73#define ATI_REG_ISR_OUT_XRUN (1U<<2)
74#define ATI_REG_ISR_OUT_STATUS (1U<<3)
75#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
76#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
77#define ATI_REG_ISR_PHYS_INTR (1U<<8)
78#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
79#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
80#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
81#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
82#define ATI_REG_ISR_NEW_FRAME (1U<<13)
83
84#define ATI_REG_IER 0x04 /* interrupt enable */
85#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
86#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
87#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
88#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
89#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
90#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
91#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
92#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
93#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
94#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
95#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
96#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
97#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
98
99#define ATI_REG_CMD 0x08 /* command */
100#define ATI_REG_CMD_POWERDOWN (1U<<0)
101#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
102#define ATI_REG_CMD_SEND_EN (1U<<2)
103#define ATI_REG_CMD_STATUS_MEM (1U<<3)
104#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
105#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
106#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
107#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
108#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
109#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
110#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
111#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
112#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
113#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
114#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
115#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
116#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
117#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
118#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
119#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
120#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
121#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
122#define ATI_REG_CMD_PACKED_DIS (1U<<24)
123#define ATI_REG_CMD_BURST_EN (1U<<25)
124#define ATI_REG_CMD_PANIC_EN (1U<<26)
125#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
126#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
127#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
128#define ATI_REG_CMD_AC_SYNC (1U<<30)
129#define ATI_REG_CMD_AC_RESET (1U<<31)
130
131#define ATI_REG_PHYS_OUT_ADDR 0x0c
132#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
133#define ATI_REG_PHYS_OUT_RW (1U<<2)
134#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
135#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
136#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
137
138#define ATI_REG_PHYS_IN_ADDR 0x10
139#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
140#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
141#define ATI_REG_PHYS_IN_DATA_SHIFT 16
142
143#define ATI_REG_SLOTREQ 0x14
144
145#define ATI_REG_COUNTER 0x18
146#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
147#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
148
149#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
150
151#define ATI_REG_IN_DMA_LINKPTR 0x20
152#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
153#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
154#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
155#define ATI_REG_IN_DMA_DT_SIZE 0x30
156
157#define ATI_REG_OUT_DMA_SLOT 0x34
158#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
159#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
160#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
161#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
162
163#define ATI_REG_OUT_DMA_LINKPTR 0x38
164#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
165#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
166#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
167#define ATI_REG_OUT_DMA_DT_SIZE 0x48
168
169#define ATI_REG_SPDF_CMD 0x4c
170#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
171#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
172#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
173
174#define ATI_REG_SPDF_DMA_LINKPTR 0x50
175#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
176#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
177#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
178#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
179
180#define ATI_REG_MODEM_MIRROR 0x7c
181#define ATI_REG_AUDIO_MIRROR 0x80
182
183#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
184#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
185
186#define ATI_REG_FIFO_FLUSH 0x88
187#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
188#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
189
190/* LINKPTR */
191#define ATI_REG_LINKPTR_EN (1U<<0)
192
193/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
194#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
195#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
196#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
197#define ATI_REG_DMA_STATE (7U<<26)
198
199
200#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
201
202
203struct atiixp;
204
205/*
206 * DMA packate descriptor
207 */
208
209struct atiixp_dma_desc {
210 u32 addr; /* DMA buffer address */
211 u16 status; /* status bits */
212 u16 size; /* size of the packet in dwords */
213 u32 next; /* address of the next packet descriptor */
214};
215
216/*
217 * stream enum
218 */
219enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
220enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
221enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
222
223#define NUM_ATI_CODECS 3
224
225
226/*
227 * constants and callbacks for each DMA type
228 */
229struct atiixp_dma_ops {
230 int type; /* ATI_DMA_XXX */
231 unsigned int llp_offset; /* LINKPTR offset */
232 unsigned int dt_cur; /* DT_CUR offset */
233 /* called from open callback */
234 void (*enable_dma)(struct atiixp *chip, int on);
235 /* called from trigger (START/STOP) */
236 void (*enable_transfer)(struct atiixp *chip, int on);
237 /* called from trigger (STOP only) */
238 void (*flush_dma)(struct atiixp *chip);
239};
240
241/*
242 * DMA stream
243 */
244struct atiixp_dma {
245 const struct atiixp_dma_ops *ops;
246 struct snd_dma_buffer desc_buf;
247 struct snd_pcm_substream *substream; /* assigned PCM substream */
248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
249 unsigned int period_bytes, periods;
250 int opened;
251 int running;
252 int suspended;
253 int pcm_open_flag;
254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
255 unsigned int saved_curptr;
256};
257
258/*
259 * ATI IXP chip
260 */
261struct atiixp {
262 struct snd_card *card;
263 struct pci_dev *pci;
264
265 unsigned long addr;
266 void __iomem *remap_addr;
267 int irq;
268
269 struct snd_ac97_bus *ac97_bus;
270 struct snd_ac97 *ac97[NUM_ATI_CODECS];
271
272 spinlock_t reg_lock;
273
274 struct atiixp_dma dmas[NUM_ATI_DMAS];
275 struct ac97_pcm *pcms[NUM_ATI_PCMS];
276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
277
278 int max_channels; /* max. channels for PCM out */
279
280 unsigned int codec_not_ready_bits; /* for codec detection */
281
282 int spdif_over_aclink; /* passed from the module option */
283 struct mutex open_mutex; /* playback open mutex */
284};
285
286
287/*
288 */
289static struct pci_device_id snd_atiixp_ids[] = {
290 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */
291 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */
292 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */
293 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */
294 { 0, }
295};
296
297MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
298
299static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
300 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
301 {0} /* terminator */
302};
303
304/*
305 * lowlevel functions
306 */
307
308/*
309 * update the bits of the given register.
310 * return 1 if the bits changed.
311 */
312static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
313 unsigned int mask, unsigned int value)
314{
315 void __iomem *addr = chip->remap_addr + reg;
316 unsigned int data, old_data;
317 old_data = data = readl(addr);
318 data &= ~mask;
319 data |= value;
320 if (old_data == data)
321 return 0;
322 writel(data, addr);
323 return 1;
324}
325
326/*
327 * macros for easy use
328 */
329#define atiixp_write(chip,reg,value) \
330 writel(value, chip->remap_addr + ATI_REG_##reg)
331#define atiixp_read(chip,reg) \
332 readl(chip->remap_addr + ATI_REG_##reg)
333#define atiixp_update(chip,reg,mask,val) \
334 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
335
336/*
337 * handling DMA packets
338 *
339 * we allocate a linear buffer for the DMA, and split it to each packet.
340 * in a future version, a scatter-gather buffer should be implemented.
341 */
342
343#define ATI_DESC_LIST_SIZE \
344 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
345
346/*
347 * build packets ring for the given buffer size.
348 *
349 * IXP handles the buffer descriptors, which are connected as a linked
350 * list. although we can change the list dynamically, in this version,
351 * a static RING of buffer descriptors is used.
352 *
353 * the ring is built in this function, and is set up to the hardware.
354 */
355static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
356 struct snd_pcm_substream *substream,
357 unsigned int periods,
358 unsigned int period_bytes)
359{
360 unsigned int i;
361 u32 addr, desc_addr;
362 unsigned long flags;
363
364 if (periods > ATI_MAX_DESCRIPTORS)
365 return -ENOMEM;
366
367 if (dma->desc_buf.area == NULL) {
368 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
369 snd_dma_pci_data(chip->pci),
370 ATI_DESC_LIST_SIZE,
371 &dma->desc_buf) < 0)
372 return -ENOMEM;
373 dma->period_bytes = dma->periods = 0; /* clear */
374 }
375
376 if (dma->periods == periods && dma->period_bytes == period_bytes) {
377 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
378 (char*)chip->remap_addr + dma->ops->llp_offset);
379 return 0;
380 }
381
382 /* reset DMA before changing the descriptor table */
383 spin_lock_irqsave(&chip->reg_lock, flags);
384 writel(0, chip->remap_addr + dma->ops->llp_offset);
385 dma->ops->enable_dma(chip, 0);
386 dma->ops->enable_dma(chip, 1);
387 spin_unlock_irqrestore(&chip->reg_lock, flags);
388
389 /* fill the entries */
390 addr = (u32)substream->runtime->dma_addr;
391 desc_addr = (u32)dma->desc_buf.addr;
392 for (i = 0; i < periods; i++) {
393 struct atiixp_dma_desc *desc;
394 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
395 desc->addr = cpu_to_le32(addr);
396 desc->status = 0;
397 desc->size = period_bytes >> 2; /* in dwords */
398 desc_addr += sizeof(struct atiixp_dma_desc);
399 if (i == periods - 1)
400 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
401 else
402 desc->next = cpu_to_le32(desc_addr);
403 addr += period_bytes;
404 }
405
406 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
407 chip->remap_addr + dma->ops->llp_offset);
408
409 dma->period_bytes = period_bytes;
410 dma->periods = periods;
411
412 return 0;
413}
414
415/*
416 * remove the ring buffer and release it if assigned
417 */
418static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
419 struct snd_pcm_substream *substream)
420{
421 if (dma->desc_buf.area) {
422 writel(0, chip->remap_addr + dma->ops->llp_offset);
423 snd_dma_free_pages(&dma->desc_buf);
424 dma->desc_buf.area = NULL;
425 }
426}
427
428/*
429 * AC97 interface
430 */
431static int snd_atiixp_acquire_codec(struct atiixp *chip)
432{
433 int timeout = 1000;
434
435 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
436 if (! timeout--) {
437 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
438 return -EBUSY;
439 }
440 udelay(1);
441 }
442 return 0;
443}
444
445static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
446{
447 unsigned int data;
448 int timeout;
449
450 if (snd_atiixp_acquire_codec(chip) < 0)
451 return 0xffff;
452 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
453 ATI_REG_PHYS_OUT_ADDR_EN |
454 ATI_REG_PHYS_OUT_RW |
455 codec;
456 atiixp_write(chip, PHYS_OUT_ADDR, data);
457 if (snd_atiixp_acquire_codec(chip) < 0)
458 return 0xffff;
459 timeout = 1000;
460 do {
461 data = atiixp_read(chip, PHYS_IN_ADDR);
462 if (data & ATI_REG_PHYS_IN_READ_FLAG)
463 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
464 udelay(1);
465 } while (--timeout);
466 /* time out may happen during reset */
467 if (reg < 0x7c)
468 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
469 return 0xffff;
470}
471
472
473static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
474 unsigned short reg, unsigned short val)
475{
476 unsigned int data;
477
478 if (snd_atiixp_acquire_codec(chip) < 0)
479 return;
480 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
481 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
482 ATI_REG_PHYS_OUT_ADDR_EN | codec;
483 atiixp_write(chip, PHYS_OUT_ADDR, data);
484}
485
486
487static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
488 unsigned short reg)
489{
490 struct atiixp *chip = ac97->private_data;
491 return snd_atiixp_codec_read(chip, ac97->num, reg);
492
493}
494
495static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
496 unsigned short val)
497{
498 struct atiixp *chip = ac97->private_data;
499 snd_atiixp_codec_write(chip, ac97->num, reg, val);
500}
501
502/*
503 * reset AC link
504 */
505static int snd_atiixp_aclink_reset(struct atiixp *chip)
506{
507 int timeout;
508
509 /* reset powerdoewn */
510 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
511 udelay(10);
512
513 /* perform a software reset */
514 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
515#pragma disable_message (302)
516 atiixp_read(chip, CMD);
517 udelay(10);
518 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
519
520 timeout = 10;
521 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
522 /* do a hard reset */
523 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
524 ATI_REG_CMD_AC_SYNC);
525 atiixp_read(chip, CMD);
526 mdelay(1);
527 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
528 if (--timeout) {
529 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
530 break;
531 }
532 }
533#pragma enable_message (302)
534
535 /* deassert RESET and assert SYNC to make sure */
536 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
537 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
538
539 return 0;
540}
541
542#ifdef CONFIG_PM
543static int snd_atiixp_aclink_down(struct atiixp *chip)
544{
545 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
546 // return -EBUSY;
547 atiixp_update(chip, CMD,
548 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
549 ATI_REG_CMD_POWERDOWN);
550 return 0;
551}
552#endif
553
554/*
555 * auto-detection of codecs
556 *
557 * the IXP chip can generate interrupts for the non-existing codecs.
558 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
559 * even if all three codecs are connected.
560 */
561
562#define ALL_CODEC_NOT_READY \
563 (ATI_REG_ISR_CODEC0_NOT_READY |\
564 ATI_REG_ISR_CODEC1_NOT_READY |\
565 ATI_REG_ISR_CODEC2_NOT_READY)
566#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
567
568static int __devinit ac97_probing_bugs(struct pci_dev *pci)
569{
570 const struct snd_pci_quirk *q;
571
572 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
573 if (q) {
574#ifndef TARGET_OS2
575 snd_printdd(KERN_INFO "Atiixp quirk for %s. "
576 "Forcing codec %d\n", q->name, q->value);
577#endif
578 return q->value;
579 }
580 /* this hardware doesn't need workarounds. Probe for codec */
581 return -1;
582}
583
584static int __devinit snd_atiixp_codec_detect(struct atiixp *chip)
585{
586 int timeout;
587
588 chip->codec_not_ready_bits = 0;
589 if (ac97_codec == -1)
590 ac97_codec = ac97_probing_bugs(chip->pci);
591 if (ac97_codec >= 0) {
592 chip->codec_not_ready_bits |=
593 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
594 return 0;
595 }
596
597 atiixp_write(chip, IER, CODEC_CHECK_BITS);
598 /* wait for the interrupts */
599 timeout = 50;
600 while (timeout-- > 0) {
601 mdelay(1);
602 if (chip->codec_not_ready_bits)
603 break;
604 }
605 atiixp_write(chip, IER, 0); /* disable irqs */
606
607 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
608 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
609 return -ENXIO;
610 }
611 return 0;
612}
613
614
615/*
616 * enable DMA and irqs
617 */
618static int snd_atiixp_chip_start(struct atiixp *chip)
619{
620 unsigned int reg;
621
622 /* set up spdif, enable burst mode */
623 reg = atiixp_read(chip, CMD);
624 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
625 reg |= ATI_REG_CMD_BURST_EN;
626 atiixp_write(chip, CMD, reg);
627
628 reg = atiixp_read(chip, SPDF_CMD);
629 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
630 atiixp_write(chip, SPDF_CMD, reg);
631
632 /* clear all interrupt source */
633 atiixp_write(chip, ISR, 0xffffffff);
634 /* enable irqs */
635 atiixp_write(chip, IER,
636 ATI_REG_IER_IO_STATUS_EN |
637 ATI_REG_IER_IN_XRUN_EN |
638 ATI_REG_IER_OUT_XRUN_EN |
639 ATI_REG_IER_SPDF_XRUN_EN |
640 ATI_REG_IER_SPDF_STATUS_EN);
641 return 0;
642}
643
644
645/*
646 * disable DMA and IRQs
647 */
648static int snd_atiixp_chip_stop(struct atiixp *chip)
649{
650 /* clear interrupt source */
651 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
652 /* disable irqs */
653 atiixp_write(chip, IER, 0);
654 return 0;
655}
656
657
658/*
659 * PCM section
660 */
661
662/*
663 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
664 * position. when SG-buffer is implemented, the offset must be calculated
665 * correctly...
666 */
667static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
668{
669 struct atiixp *chip = snd_pcm_substream_chip(substream);
670 struct snd_pcm_runtime *runtime = substream->runtime;
671 struct atiixp_dma *dma = runtime->private_data;
672 unsigned int curptr;
673 int timeout = 1000;
674
675 while (timeout--) {
676 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
677 if (curptr < dma->buf_addr)
678 continue;
679 curptr -= dma->buf_addr;
680 if (curptr >= dma->buf_bytes)
681 continue;
682 return bytes_to_frames(runtime, curptr);
683 }
684 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
685 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
686 return 0;
687}
688
689/*
690 * XRUN detected, and stop the PCM substream
691 */
692static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
693{
694 if (! dma->substream || ! dma->running)
695 return;
696 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
697 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
698}
699
700/*
701 * the period ack. update the substream.
702 */
703static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
704{
705 if (! dma->substream || ! dma->running)
706 return;
707 snd_pcm_period_elapsed(dma->substream);
708}
709
710/* set BUS_BUSY interrupt bit if any DMA is running */
711/* call with spinlock held */
712static void snd_atiixp_check_bus_busy(struct atiixp *chip)
713{
714 unsigned int bus_busy;
715 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
716 ATI_REG_CMD_RECEIVE_EN |
717 ATI_REG_CMD_SPDF_OUT_EN))
718 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
719 else
720 bus_busy = 0;
721 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
722}
723
724/* common trigger callback
725 * calling the lowlevel callbacks in it
726 */
727static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
728{
729 struct atiixp *chip = snd_pcm_substream_chip(substream);
730 struct atiixp_dma *dma = substream->runtime->private_data;
731 int err = 0;
732
733 if (snd_BUG_ON(!dma->ops->enable_transfer ||
734 !dma->ops->flush_dma))
735 return -EINVAL;
736
737 spin_lock(&chip->reg_lock);
738 switch (cmd) {
739 case SNDRV_PCM_TRIGGER_START:
740 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
741 case SNDRV_PCM_TRIGGER_RESUME:
742 dma->ops->enable_transfer(chip, 1);
743 dma->running = 1;
744 dma->suspended = 0;
745 break;
746 case SNDRV_PCM_TRIGGER_STOP:
747 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
748 case SNDRV_PCM_TRIGGER_SUSPEND:
749 dma->ops->enable_transfer(chip, 0);
750 dma->running = 0;
751 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
752 break;
753 default:
754 err = -EINVAL;
755 break;
756 }
757 if (! err) {
758 snd_atiixp_check_bus_busy(chip);
759 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
760 dma->ops->flush_dma(chip);
761 snd_atiixp_check_bus_busy(chip);
762 }
763 }
764 spin_unlock(&chip->reg_lock);
765 return err;
766}
767
768
769/*
770 * lowlevel callbacks for each DMA type
771 *
772 * every callback is supposed to be called in chip->reg_lock spinlock
773 */
774
775/* flush FIFO of analog OUT DMA */
776static void atiixp_out_flush_dma(struct atiixp *chip)
777{
778 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
779}
780
781/* enable/disable analog OUT DMA */
782static void atiixp_out_enable_dma(struct atiixp *chip, int on)
783{
784 unsigned int data;
785 data = atiixp_read(chip, CMD);
786 if (on) {
787 if (data & ATI_REG_CMD_OUT_DMA_EN)
788 return;
789 atiixp_out_flush_dma(chip);
790 data |= ATI_REG_CMD_OUT_DMA_EN;
791 } else
792 data &= ~ATI_REG_CMD_OUT_DMA_EN;
793 atiixp_write(chip, CMD, data);
794}
795
796/* start/stop transfer over OUT DMA */
797static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
798{
799 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
800 on ? ATI_REG_CMD_SEND_EN : 0);
801}
802
803/* enable/disable analog IN DMA */
804static void atiixp_in_enable_dma(struct atiixp *chip, int on)
805{
806 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
807 on ? ATI_REG_CMD_IN_DMA_EN : 0);
808}
809
810/* start/stop analog IN DMA */
811static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
812{
813 if (on) {
814 unsigned int data = atiixp_read(chip, CMD);
815 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
816 data |= ATI_REG_CMD_RECEIVE_EN;
817#if 0 /* FIXME: this causes the endless loop */
818 /* wait until slot 3/4 are finished */
819 while ((atiixp_read(chip, COUNTER) &
820 ATI_REG_COUNTER_SLOT) != 5)
821 ;
822#endif
823 atiixp_write(chip, CMD, data);
824 }
825 } else
826 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
827}
828
829/* flush FIFO of analog IN DMA */
830static void atiixp_in_flush_dma(struct atiixp *chip)
831{
832 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
833}
834
835/* enable/disable SPDIF OUT DMA */
836static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
837{
838 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
839 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
840}
841
842/* start/stop SPDIF OUT DMA */
843static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
844{
845 unsigned int data;
846 data = atiixp_read(chip, CMD);
847 if (on)
848 data |= ATI_REG_CMD_SPDF_OUT_EN;
849 else
850 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
851 atiixp_write(chip, CMD, data);
852}
853
854/* flush FIFO of SPDIF OUT DMA */
855static void atiixp_spdif_flush_dma(struct atiixp *chip)
856{
857 int timeout;
858
859 /* DMA off, transfer on */
860 atiixp_spdif_enable_dma(chip, 0);
861 atiixp_spdif_enable_transfer(chip, 1);
862
863 timeout = 100;
864 do {
865 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
866 break;
867 udelay(1);
868 } while (timeout-- > 0);
869
870 atiixp_spdif_enable_transfer(chip, 0);
871}
872
873/* set up slots and formats for SPDIF OUT */
874static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
875{
876 struct atiixp *chip = snd_pcm_substream_chip(substream);
877
878 spin_lock_irq(&chip->reg_lock);
879 if (chip->spdif_over_aclink) {
880 unsigned int data;
881 /* enable slots 10/11 */
882 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
883 ATI_REG_CMD_SPDF_CONFIG_01);
884 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
885 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
886 ATI_REG_OUT_DMA_SLOT_BIT(11);
887 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
888 atiixp_write(chip, OUT_DMA_SLOT, data);
889 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
890 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
891 ATI_REG_CMD_INTERLEAVE_OUT : 0);
892 } else {
893 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
894 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
895 }
896 spin_unlock_irq(&chip->reg_lock);
897 return 0;
898}
899
900/* set up slots and formats for analog OUT */
901static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
902{
903 struct atiixp *chip = snd_pcm_substream_chip(substream);
904 unsigned int data;
905
906 spin_lock_irq(&chip->reg_lock);
907 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
908 switch (substream->runtime->channels) {
909 case 8:
910 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
911 ATI_REG_OUT_DMA_SLOT_BIT(11);
912 /* fallthru */
913 case 6:
914 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
915 ATI_REG_OUT_DMA_SLOT_BIT(8);
916 /* fallthru */
917 case 4:
918 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
919 ATI_REG_OUT_DMA_SLOT_BIT(9);
920 /* fallthru */
921 default:
922 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
923 ATI_REG_OUT_DMA_SLOT_BIT(4);
924 break;
925 }
926
927 /* set output threshold */
928 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
929 atiixp_write(chip, OUT_DMA_SLOT, data);
930
931 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
932 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
933 ATI_REG_CMD_INTERLEAVE_OUT : 0);
934
935 /*
936 * enable 6 channel re-ordering bit if needed
937 */
938 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
939 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
940
941 spin_unlock_irq(&chip->reg_lock);
942 return 0;
943}
944
945/* set up slots and formats for analog IN */
946static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
947{
948 struct atiixp *chip = snd_pcm_substream_chip(substream);
949
950 spin_lock_irq(&chip->reg_lock);
951 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
952 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
953 ATI_REG_CMD_INTERLEAVE_IN : 0);
954 spin_unlock_irq(&chip->reg_lock);
955 return 0;
956}
957
958/*
959 * hw_params - allocate the buffer and set up buffer descriptors
960 */
961static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
962 struct snd_pcm_hw_params *hw_params)
963{
964 struct atiixp *chip = snd_pcm_substream_chip(substream);
965 struct atiixp_dma *dma = substream->runtime->private_data;
966 int err;
967
968 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
969 if (err < 0)
970 return err;
971 dma->buf_addr = substream->runtime->dma_addr;
972 dma->buf_bytes = params_buffer_bytes(hw_params);
973
974 err = atiixp_build_dma_packets(chip, dma, substream,
975 params_periods(hw_params),
976 params_period_bytes(hw_params));
977 if (err < 0)
978 return err;
979
980 if (dma->ac97_pcm_type >= 0) {
981 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
982 /* PCM is bound to AC97 codec(s)
983 * set up the AC97 codecs
984 */
985 if (dma->pcm_open_flag) {
986 snd_ac97_pcm_close(pcm);
987 dma->pcm_open_flag = 0;
988 }
989 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
990 params_channels(hw_params),
991 pcm->r[0].slots);
992 if (err >= 0)
993 dma->pcm_open_flag = 1;
994 }
995
996 return err;
997}
998
999static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
1000{
1001 struct atiixp *chip = snd_pcm_substream_chip(substream);
1002 struct atiixp_dma *dma = substream->runtime->private_data;
1003
1004 if (dma->pcm_open_flag) {
1005 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
1006 snd_ac97_pcm_close(pcm);
1007 dma->pcm_open_flag = 0;
1008 }
1009 atiixp_clear_dma_packets(chip, dma, substream);
1010 snd_pcm_lib_free_pages(substream);
1011 return 0;
1012}
1013
1014
1015/*
1016 * pcm hardware definition, identical for all DMA types
1017 */
1018static struct snd_pcm_hardware snd_atiixp_pcm_hw =
1019{
1020 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1021 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1022 SNDRV_PCM_INFO_PAUSE |
1023 SNDRV_PCM_INFO_RESUME |
1024 SNDRV_PCM_INFO_MMAP_VALID),
1025 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1026 .rates = SNDRV_PCM_RATE_48000,
1027 .rate_min = 48000,
1028 .rate_max = 48000,
1029 .channels_min = 2,
1030 .channels_max = 2,
1031 .buffer_bytes_max = 256 * 1024,
1032 .period_bytes_min = 32,
1033 .period_bytes_max = 128 * 1024,
1034 .periods_min = 2,
1035 .periods_max = ATI_MAX_DESCRIPTORS,
1036};
1037
1038static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1039 struct atiixp_dma *dma, int pcm_type)
1040{
1041 struct atiixp *chip = snd_pcm_substream_chip(substream);
1042 struct snd_pcm_runtime *runtime = substream->runtime;
1043 int err;
1044
1045 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1046 return -EINVAL;
1047
1048 if (dma->opened)
1049 return -EBUSY;
1050 dma->substream = substream;
1051 runtime->hw = snd_atiixp_pcm_hw;
1052 dma->ac97_pcm_type = pcm_type;
1053 if (pcm_type >= 0) {
1054 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1055 snd_pcm_limit_hw_rates(runtime);
1056 } else {
1057 /* direct SPDIF */
1058 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1059 }
1060 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1061 return err;
1062 runtime->private_data = dma;
1063
1064 /* enable DMA bits */
1065 spin_lock_irq(&chip->reg_lock);
1066 dma->ops->enable_dma(chip, 1);
1067 spin_unlock_irq(&chip->reg_lock);
1068 dma->opened = 1;
1069
1070 return 0;
1071}
1072
1073static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1074 struct atiixp_dma *dma)
1075{
1076 struct atiixp *chip = snd_pcm_substream_chip(substream);
1077 /* disable DMA bits */
1078 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1079 return -EINVAL;
1080 spin_lock_irq(&chip->reg_lock);
1081 dma->ops->enable_dma(chip, 0);
1082 spin_unlock_irq(&chip->reg_lock);
1083 dma->substream = NULL;
1084 dma->opened = 0;
1085 return 0;
1086}
1087
1088/*
1089 */
1090static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1091{
1092 struct atiixp *chip = snd_pcm_substream_chip(substream);
1093 int err;
1094
1095 mutex_lock(&chip->open_mutex);
1096 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1097 mutex_unlock(&chip->open_mutex);
1098 if (err < 0)
1099 return err;
1100 substream->runtime->hw.channels_max = chip->max_channels;
1101 if (chip->max_channels > 2)
1102 /* channels must be even */
1103 snd_pcm_hw_constraint_step(substream->runtime, 0,
1104 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1105 return 0;
1106}
1107
1108static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1109{
1110 struct atiixp *chip = snd_pcm_substream_chip(substream);
1111 int err;
1112 mutex_lock(&chip->open_mutex);
1113 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1114 mutex_unlock(&chip->open_mutex);
1115 return err;
1116}
1117
1118static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1119{
1120 struct atiixp *chip = snd_pcm_substream_chip(substream);
1121 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1122}
1123
1124static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1125{
1126 struct atiixp *chip = snd_pcm_substream_chip(substream);
1127 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1128}
1129
1130static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1131{
1132 struct atiixp *chip = snd_pcm_substream_chip(substream);
1133 int err;
1134 mutex_lock(&chip->open_mutex);
1135 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1136 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1137 else
1138 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1139 mutex_unlock(&chip->open_mutex);
1140 return err;
1141}
1142
1143static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1144{
1145 struct atiixp *chip = snd_pcm_substream_chip(substream);
1146 int err;
1147 mutex_lock(&chip->open_mutex);
1148 if (chip->spdif_over_aclink)
1149 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1150 else
1151 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1152 mutex_unlock(&chip->open_mutex);
1153 return err;
1154}
1155
1156/* AC97 playback */
1157static struct snd_pcm_ops snd_atiixp_playback_ops = {
1158 .open = snd_atiixp_playback_open,
1159 .close = snd_atiixp_playback_close,
1160 .ioctl = snd_pcm_lib_ioctl,
1161 .hw_params = snd_atiixp_pcm_hw_params,
1162 .hw_free = snd_atiixp_pcm_hw_free,
1163 .prepare = snd_atiixp_playback_prepare,
1164 .trigger = snd_atiixp_pcm_trigger,
1165 .pointer = snd_atiixp_pcm_pointer,
1166};
1167
1168/* AC97 capture */
1169static struct snd_pcm_ops snd_atiixp_capture_ops = {
1170 .open = snd_atiixp_capture_open,
1171 .close = snd_atiixp_capture_close,
1172 .ioctl = snd_pcm_lib_ioctl,
1173 .hw_params = snd_atiixp_pcm_hw_params,
1174 .hw_free = snd_atiixp_pcm_hw_free,
1175 .prepare = snd_atiixp_capture_prepare,
1176 .trigger = snd_atiixp_pcm_trigger,
1177 .pointer = snd_atiixp_pcm_pointer,
1178};
1179
1180/* SPDIF playback */
1181static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1182 .open = snd_atiixp_spdif_open,
1183 .close = snd_atiixp_spdif_close,
1184 .ioctl = snd_pcm_lib_ioctl,
1185 .hw_params = snd_atiixp_pcm_hw_params,
1186 .hw_free = snd_atiixp_pcm_hw_free,
1187 .prepare = snd_atiixp_spdif_prepare,
1188 .trigger = snd_atiixp_pcm_trigger,
1189 .pointer = snd_atiixp_pcm_pointer,
1190};
1191
1192static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1193 /* front PCM */
1194 {
1195 .exclusive = 1,
1196 .r = { {
1197 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1198 (1 << AC97_SLOT_PCM_RIGHT) |
1199 (1 << AC97_SLOT_PCM_CENTER) |
1200 (1 << AC97_SLOT_PCM_SLEFT) |
1201 (1 << AC97_SLOT_PCM_SRIGHT) |
1202 (1 << AC97_SLOT_LFE)
1203 }
1204 }
1205 },
1206 /* PCM IN #1 */
1207 {
1208 .stream = 1,
1209 .exclusive = 1,
1210 .r = { {
1211 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1212 (1 << AC97_SLOT_PCM_RIGHT)
1213 }
1214 }
1215 },
1216 /* S/PDIF OUT (optional) */
1217 {
1218 .exclusive = 1,
1219 .spdif = 1,
1220 .r = { {
1221 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1222 (1 << AC97_SLOT_SPDIF_RIGHT2)
1223 }
1224 }
1225 },
1226};
1227
1228static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1229 .type = ATI_DMA_PLAYBACK,
1230 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1231 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1232 .enable_dma = atiixp_out_enable_dma,
1233 .enable_transfer = atiixp_out_enable_transfer,
1234 .flush_dma = atiixp_out_flush_dma,
1235};
1236
1237static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1238 .type = ATI_DMA_CAPTURE,
1239 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1240 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1241 .enable_dma = atiixp_in_enable_dma,
1242 .enable_transfer = atiixp_in_enable_transfer,
1243 .flush_dma = atiixp_in_flush_dma,
1244};
1245
1246static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1247 .type = ATI_DMA_SPDIF,
1248 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1249 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1250 .enable_dma = atiixp_spdif_enable_dma,
1251 .enable_transfer = atiixp_spdif_enable_transfer,
1252 .flush_dma = atiixp_spdif_flush_dma,
1253};
1254
1255
1256static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
1257{
1258 struct snd_pcm *pcm;
1259 struct snd_ac97_bus *pbus = chip->ac97_bus;
1260 int err, i, num_pcms;
1261
1262 /* initialize constants */
1263 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1264 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1265 if (! chip->spdif_over_aclink)
1266 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1267
1268 /* assign AC97 pcm */
1269 if (chip->spdif_over_aclink)
1270 num_pcms = 3;
1271 else
1272 num_pcms = 2;
1273 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1274 if (err < 0)
1275 return err;
1276 for (i = 0; i < num_pcms; i++)
1277 chip->pcms[i] = &pbus->pcms[i];
1278
1279 chip->max_channels = 2;
1280 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1281 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1282 chip->max_channels = 6;
1283 else
1284 chip->max_channels = 4;
1285 }
1286
1287 /* PCM #0: analog I/O */
1288 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1289 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1290 if (err < 0)
1291 return err;
1292 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1293 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1294 pcm->private_data = chip;
1295 strcpy(pcm->name, "ATI IXP AC97");
1296 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1297
1298 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1299 snd_dma_pci_data(chip->pci),
1300 64*1024, 128*1024);
1301
1302 /* no SPDIF support on codec? */
1303 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1304 return 0;
1305
1306 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1307 if (chip->pcms[ATI_PCM_SPDIF])
1308 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1309
1310 /* PCM #1: spdif playback */
1311 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1312 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1313 if (err < 0)
1314 return err;
1315 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1316 pcm->private_data = chip;
1317 if (chip->spdif_over_aclink)
1318 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1319 else
1320 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1321 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1322
1323 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1324 snd_dma_pci_data(chip->pci),
1325 64*1024, 128*1024);
1326
1327 /* pre-select AC97 SPDIF slots 10/11 */
1328 for (i = 0; i < NUM_ATI_CODECS; i++) {
1329 if (chip->ac97[i])
1330 snd_ac97_update_bits(chip->ac97[i],
1331 AC97_EXTENDED_STATUS,
1332 0x03 << 4, 0x03 << 4);
1333 }
1334
1335 return 0;
1336}
1337
1338
1339
1340/*
1341 * interrupt handler
1342 */
1343static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1344{
1345 struct atiixp *chip = dev_id;
1346 unsigned int status;
1347
1348 status = atiixp_read(chip, ISR);
1349
1350 if (! status)
1351 return IRQ_NONE;
1352
1353 /* process audio DMA */
1354 if (status & ATI_REG_ISR_OUT_XRUN)
1355 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1356 else if (status & ATI_REG_ISR_OUT_STATUS)
1357 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1358 if (status & ATI_REG_ISR_IN_XRUN)
1359 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1360 else if (status & ATI_REG_ISR_IN_STATUS)
1361 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1362 if (! chip->spdif_over_aclink) {
1363 if (status & ATI_REG_ISR_SPDF_XRUN)
1364 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1365 else if (status & ATI_REG_ISR_SPDF_STATUS)
1366 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1367 }
1368
1369 /* for codec detection */
1370 if (status & CODEC_CHECK_BITS) {
1371 unsigned int detected;
1372 detected = status & CODEC_CHECK_BITS;
1373 spin_lock(&chip->reg_lock);
1374 chip->codec_not_ready_bits |= detected;
1375 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1376 spin_unlock(&chip->reg_lock);
1377 }
1378
1379 /* ack */
1380 atiixp_write(chip, ISR, status);
1381
1382 return IRQ_HANDLED;
1383}
1384
1385
1386/*
1387 * ac97 mixer section
1388 */
1389
1390static struct ac97_quirk ac97_quirks[] __devinitdata = {
1391 {
1392 .subvendor = 0x103c,
1393 .subdevice = 0x006b,
1394 .name = "HP Pavilion ZV5030US",
1395 .type = AC97_TUNE_MUTE_LED
1396 },
1397 {
1398 .subvendor = 0x103c,
1399 .subdevice = 0x308b,
1400 .name = "HP nx6125",
1401 .type = AC97_TUNE_MUTE_LED
1402 },
1403 {
1404 .subvendor = 0x103c,
1405 .subdevice = 0x3091,
1406 .name = "unknown HP",
1407 .type = AC97_TUNE_MUTE_LED
1408 },
1409 {0} /* terminator */
1410};
1411
1412static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1413 const char *quirk_override)
1414{
1415 struct snd_ac97_bus *pbus;
1416 struct snd_ac97_template ac97;
1417 int i, err;
1418 int codec_count;
1419 static struct snd_ac97_bus_ops ops = {
1420 .write = snd_atiixp_ac97_write,
1421 .read = snd_atiixp_ac97_read,
1422 };
1423 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1424 ATI_REG_ISR_CODEC0_NOT_READY,
1425 ATI_REG_ISR_CODEC1_NOT_READY,
1426 ATI_REG_ISR_CODEC2_NOT_READY,
1427 };
1428
1429 if (snd_atiixp_codec_detect(chip) < 0)
1430 return -ENXIO;
1431
1432 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1433 return err;
1434 pbus->clock = clock;
1435 chip->ac97_bus = pbus;
1436
1437 codec_count = 0;
1438 for (i = 0; i < NUM_ATI_CODECS; i++) {
1439 if (chip->codec_not_ready_bits & codec_skip[i])
1440 continue;
1441 memset(&ac97, 0, sizeof(ac97));
1442 ac97.private_data = chip;
1443 ac97.pci = chip->pci;
1444 ac97.num = i;
1445 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1446 if (! chip->spdif_over_aclink)
1447 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1448 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1449 chip->ac97[i] = NULL; /* to be sure */
1450 snd_printdd("atiixp: codec %d not available for audio\n", i);
1451 continue;
1452 }
1453 codec_count++;
1454 }
1455
1456 if (! codec_count) {
1457 snd_printk(KERN_ERR "atiixp: no codec available\n");
1458 return -ENODEV;
1459 }
1460
1461 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1462
1463 return 0;
1464}
1465
1466
1467#ifdef CONFIG_PM
1468/*
1469 * power management
1470 */
1471static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
1472{
1473 struct snd_card *card = pci_get_drvdata(pci);
1474 struct atiixp *chip = card->private_data;
1475 int i;
1476
1477 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1478 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1479 if (chip->pcmdevs[i]) {
1480 struct atiixp_dma *dma = &chip->dmas[i];
1481 if (dma->substream && dma->running)
1482 dma->saved_curptr = readl(chip->remap_addr +
1483 dma->ops->dt_cur);
1484 snd_pcm_suspend_all(chip->pcmdevs[i]);
1485 }
1486 for (i = 0; i < NUM_ATI_CODECS; i++)
1487 snd_ac97_suspend(chip->ac97[i]);
1488 snd_atiixp_aclink_down(chip);
1489 snd_atiixp_chip_stop(chip);
1490
1491 pci_disable_device(pci);
1492 pci_save_state(pci);
1493 pci_set_power_state(pci, pci_choose_state(pci, state));
1494 return 0;
1495}
1496
1497static int snd_atiixp_resume(struct pci_dev *pci)
1498{
1499 struct snd_card *card = pci_get_drvdata(pci);
1500 struct atiixp *chip = card->private_data;
1501 int i;
1502
1503 pci_set_power_state(pci, PCI_D0);
1504 pci_restore_state(pci);
1505 if (pci_enable_device(pci) < 0) {
1506 printk(KERN_ERR "atiixp: pci_enable_device failed, "
1507 "disabling device\n");
1508 snd_card_disconnect(card);
1509 return -EIO;
1510 }
1511 pci_set_master(pci);
1512
1513 snd_atiixp_aclink_reset(chip);
1514 snd_atiixp_chip_start(chip);
1515
1516 for (i = 0; i < NUM_ATI_CODECS; i++)
1517 snd_ac97_resume(chip->ac97[i]);
1518
1519 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1520 if (chip->pcmdevs[i]) {
1521 struct atiixp_dma *dma = &chip->dmas[i];
1522 if (dma->substream && dma->suspended) {
1523 dma->ops->enable_dma(chip, 1);
1524 dma->substream->ops->prepare(dma->substream);
1525 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1526 chip->remap_addr + dma->ops->llp_offset);
1527 writel(dma->saved_curptr, chip->remap_addr +
1528 dma->ops->dt_cur);
1529 }
1530 }
1531
1532 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1533 return 0;
1534}
1535#endif /* CONFIG_PM */
1536
1537
1538#ifdef CONFIG_PROC_FS
1539/*
1540 * proc interface for register dump
1541 */
1542
1543static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1544 struct snd_info_buffer *buffer)
1545{
1546 struct atiixp *chip = entry->private_data;
1547 int i;
1548
1549 for (i = 0; i < 256; i += 4)
1550 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1551}
1552
1553static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
1554{
1555 struct snd_info_entry *entry;
1556
1557 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1558 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
1559}
1560#else /* !CONFIG_PROC_FS */
1561#define snd_atiixp_proc_init(chip)
1562#endif
1563
1564
1565/*
1566 * destructor
1567 */
1568
1569static int snd_atiixp_free(struct atiixp *chip)
1570{
1571 if (chip->irq < 0)
1572 goto __hw_end;
1573 snd_atiixp_chip_stop(chip);
1574
1575 __hw_end:
1576 if (chip->irq >= 0)
1577 free_irq(chip->irq, chip);
1578 if (chip->remap_addr)
1579 iounmap(chip->remap_addr);
1580 pci_release_regions(chip->pci);
1581 pci_disable_device(chip->pci);
1582 kfree(chip);
1583 return 0;
1584}
1585
1586static int snd_atiixp_dev_free(struct snd_device *device)
1587{
1588 struct atiixp *chip = device->device_data;
1589 return snd_atiixp_free(chip);
1590}
1591
1592/*
1593 * constructor for chip instance
1594 */
1595static int __devinit snd_atiixp_create(struct snd_card *card,
1596 struct pci_dev *pci,
1597 struct atiixp **r_chip)
1598{
1599 static struct snd_device_ops ops = {
1600 .dev_free = snd_atiixp_dev_free,
1601 };
1602 struct atiixp *chip;
1603 int err;
1604
1605 if ((err = pci_enable_device(pci)) < 0)
1606 return err;
1607
1608 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1609 if (chip == NULL) {
1610 pci_disable_device(pci);
1611 return -ENOMEM;
1612 }
1613
1614 spin_lock_init(&chip->reg_lock);
1615 mutex_init(&chip->open_mutex);
1616 chip->card = card;
1617 chip->pci = pci;
1618 chip->irq = -1;
1619 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1620 pci_disable_device(pci);
1621 kfree(chip);
1622 return err;
1623 }
1624 chip->addr = pci_resource_start(pci, 0);
1625 chip->remap_addr = pci_ioremap_bar(pci, 0);
1626 if (chip->remap_addr == NULL) {
1627 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1628 snd_atiixp_free(chip);
1629 return -EIO;
1630 }
1631
1632 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1633 card->shortname, chip)) {
1634 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1635 snd_atiixp_free(chip);
1636 return -EBUSY;
1637 }
1638 chip->irq = pci->irq;
1639 pci_set_master(pci);
1640 synchronize_irq(chip->irq);
1641
1642 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1643 snd_atiixp_free(chip);
1644 return err;
1645 }
1646
1647 snd_card_set_dev(card, &pci->dev);
1648
1649 *r_chip = chip;
1650 return 0;
1651}
1652
1653
1654static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1655 const struct pci_device_id *pci_id)
1656{
1657 struct snd_card *card;
1658 struct atiixp *chip;
1659 int err;
1660
1661 err = snd_card_create(index, id, THIS_MODULE, 0, &card);
1662 if (err < 0)
1663 return err;
1664
1665 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1666 strcpy(card->shortname, "ATI IXP");
1667 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1668 goto __error;
1669 card->private_data = chip;
1670
1671 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1672 goto __error;
1673
1674 chip->spdif_over_aclink = spdif_aclink;
1675
1676 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1677 goto __error;
1678
1679 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1680 goto __error;
1681
1682 snd_atiixp_proc_init(chip);
1683
1684 snd_atiixp_chip_start(chip);
1685
1686 snprintf(card->longname, sizeof(card->longname),
1687 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1688#ifndef TARGET_OS2
1689 pci->revision,
1690#else
1691 snd_pci_revision(pci),
1692#endif
1693 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1694 chip->addr, chip->irq);
1695
1696 if ((err = snd_card_register(card)) < 0)
1697 goto __error;
1698
1699 pci_set_drvdata(pci, card);
1700 return 0;
1701
1702 __error:
1703 snd_card_free(card);
1704 return err;
1705}
1706
1707static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1708{
1709 snd_card_free(pci_get_drvdata(pci));
1710 pci_set_drvdata(pci, NULL);
1711}
1712
1713static struct pci_driver driver = {
1714 .name = "ATI IXP AC97 controller",
1715 .id_table = snd_atiixp_ids,
1716 .probe = snd_atiixp_probe,
1717 .remove = __devexit_p(snd_atiixp_remove),
1718#ifdef CONFIG_PM
1719 .suspend = snd_atiixp_suspend,
1720 .resume = snd_atiixp_resume,
1721#endif
1722};
1723
1724
1725static int __init alsa_card_atiixp_init(void)
1726{
1727 return pci_register_driver(&driver);
1728}
1729
1730static void __exit alsa_card_atiixp_exit(void)
1731{
1732 pci_unregister_driver(&driver);
1733}
1734
1735module_init(alsa_card_atiixp_init)
1736module_exit(alsa_card_atiixp_exit)
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