source: GPL/trunk/alsa-kernel/pci/atiixp.c@ 488

Last change on this file since 488 was 488, checked in by David Azarewicz, 15 years ago

sound fragment fix
File size: 47.3 KB
Line 
1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <asm/io.h>
23#include <linux/delay.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/pci.h>
27#include <linux/slab.h>
28#include <linux/moduleparam.h>
29#include <linux/mutex.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP AC97 controller");
39MODULE_LICENSE("GPL");
40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}");
41
42static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
45static char *ac97_quirk;
46static int spdif_aclink = 1;
47static int ac97_codec = -1;
48
49module_param(index, int, 0444);
50MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
51module_param(id, charp, 0444);
52MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
53module_param(ac97_clock, int, 0444);
54MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55module_param(ac97_quirk, charp, 0444);
56MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
57module_param(ac97_codec, int, 0444);
58MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
59module_param(spdif_aclink, bool, 0444);
60MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
61
62/* just for backward compatibility */
63static int enable;
64module_param(enable, bool, 0444);
65
66
67/*
68 */
69
70#define ATI_REG_ISR 0x00 /* interrupt source */
71#define ATI_REG_ISR_IN_XRUN (1U<<0)
72#define ATI_REG_ISR_IN_STATUS (1U<<1)
73#define ATI_REG_ISR_OUT_XRUN (1U<<2)
74#define ATI_REG_ISR_OUT_STATUS (1U<<3)
75#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
76#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
77#define ATI_REG_ISR_PHYS_INTR (1U<<8)
78#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
79#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
80#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
81#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
82#define ATI_REG_ISR_NEW_FRAME (1U<<13)
83
84#define ATI_REG_IER 0x04 /* interrupt enable */
85#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
86#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
87#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
88#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
89#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
90#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
91#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
92#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
93#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
94#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
95#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
96#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
97#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
98
99#define ATI_REG_CMD 0x08 /* command */
100#define ATI_REG_CMD_POWERDOWN (1U<<0)
101#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
102#define ATI_REG_CMD_SEND_EN (1U<<2)
103#define ATI_REG_CMD_STATUS_MEM (1U<<3)
104#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
105#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
106#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
107#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
108#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
109#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
110#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
111#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
112#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
113#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
114#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
115#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
116#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
117#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
118#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
119#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
120#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
121#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
122#define ATI_REG_CMD_PACKED_DIS (1U<<24)
123#define ATI_REG_CMD_BURST_EN (1U<<25)
124#define ATI_REG_CMD_PANIC_EN (1U<<26)
125#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
126#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
127#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
128#define ATI_REG_CMD_AC_SYNC (1U<<30)
129#define ATI_REG_CMD_AC_RESET (1U<<31)
130
131#define ATI_REG_PHYS_OUT_ADDR 0x0c
132#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
133#define ATI_REG_PHYS_OUT_RW (1U<<2)
134#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
135#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
136#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
137
138#define ATI_REG_PHYS_IN_ADDR 0x10
139#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
140#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
141#define ATI_REG_PHYS_IN_DATA_SHIFT 16
142
143#define ATI_REG_SLOTREQ 0x14
144
145#define ATI_REG_COUNTER 0x18
146#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
147#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
148
149#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
150
151#define ATI_REG_IN_DMA_LINKPTR 0x20
152#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
153#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
154#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
155#define ATI_REG_IN_DMA_DT_SIZE 0x30
156
157#define ATI_REG_OUT_DMA_SLOT 0x34
158#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
159#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
160#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
161#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
162
163#define ATI_REG_OUT_DMA_LINKPTR 0x38
164#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
165#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
166#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
167#define ATI_REG_OUT_DMA_DT_SIZE 0x48
168
169#define ATI_REG_SPDF_CMD 0x4c
170#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
171#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
172#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
173
174#define ATI_REG_SPDF_DMA_LINKPTR 0x50
175#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
176#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
177#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
178#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
179
180#define ATI_REG_MODEM_MIRROR 0x7c
181#define ATI_REG_AUDIO_MIRROR 0x80
182
183#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
184#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
185
186#define ATI_REG_FIFO_FLUSH 0x88
187#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
188#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
189
190/* LINKPTR */
191#define ATI_REG_LINKPTR_EN (1U<<0)
192
193/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
194#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
195#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
196#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
197#define ATI_REG_DMA_STATE (7U<<26)
198
199
200#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
201
202
203struct atiixp;
204
205/*
206 * DMA packate descriptor
207 */
208
209struct atiixp_dma_desc {
210 u32 addr; /* DMA buffer address */
211 u16 status; /* status bits */
212 u16 size; /* size of the packet in dwords */
213 u32 next; /* address of the next packet descriptor */
214};
215
216/*
217 * stream enum
218 */
219enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
220enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
221enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
222
223#define NUM_ATI_CODECS 3
224
225
226/*
227 * constants and callbacks for each DMA type
228 */
229struct atiixp_dma_ops {
230 int type; /* ATI_DMA_XXX */
231 unsigned int llp_offset; /* LINKPTR offset */
232 unsigned int dt_cur; /* DT_CUR offset */
233 /* called from open callback */
234 void (*enable_dma)(struct atiixp *chip, int on);
235 /* called from trigger (START/STOP) */
236 void (*enable_transfer)(struct atiixp *chip, int on);
237 /* called from trigger (STOP only) */
238 void (*flush_dma)(struct atiixp *chip);
239};
240
241/*
242 * DMA stream
243 */
244struct atiixp_dma {
245 const struct atiixp_dma_ops *ops;
246 struct snd_dma_buffer desc_buf;
247 struct snd_pcm_substream *substream; /* assigned PCM substream */
248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
249 unsigned int period_bytes, periods;
250 int opened;
251 int running;
252 int suspended;
253 int pcm_open_flag;
254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
255 unsigned int saved_curptr;
256};
257
258/*
259 * ATI IXP chip
260 */
261struct atiixp {
262 struct snd_card *card;
263 struct pci_dev *pci;
264
265 unsigned long addr;
266 void __iomem *remap_addr;
267 int irq;
268
269 struct snd_ac97_bus *ac97_bus;
270 struct snd_ac97 *ac97[NUM_ATI_CODECS];
271
272 spinlock_t reg_lock;
273
274 struct atiixp_dma dmas[NUM_ATI_DMAS];
275 struct ac97_pcm *pcms[NUM_ATI_PCMS];
276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
277
278 int max_channels; /* max. channels for PCM out */
279
280 unsigned int codec_not_ready_bits; /* for codec detection */
281
282 int spdif_over_aclink; /* passed from the module option */
283 struct mutex open_mutex; /* playback open mutex */
284};
285
286
287/*
288 */
289static struct pci_device_id snd_atiixp_ids[] = {
290 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */
291 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */
292 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */
293 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */
294 { 0, }
295};
296
297MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
298
299static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
300 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
301 {0} /* terminator */
302};
303
304/*
305 * lowlevel functions
306 */
307
308/*
309 * update the bits of the given register.
310 * return 1 if the bits changed.
311 */
312static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
313 unsigned int mask, unsigned int value)
314{
315 void __iomem *addr = chip->remap_addr + reg;
316 unsigned int data, old_data;
317 old_data = data = readl(addr);
318 data &= ~mask;
319 data |= value;
320 if (old_data == data)
321 return 0;
322 writel(data, addr);
323 return 1;
324}
325
326/*
327 * macros for easy use
328 */
329#define atiixp_write(chip,reg,value) \
330 writel(value, chip->remap_addr + ATI_REG_##reg)
331#define atiixp_read(chip,reg) \
332 readl(chip->remap_addr + ATI_REG_##reg)
333#define atiixp_update(chip,reg,mask,val) \
334 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
335
336/*
337 * handling DMA packets
338 *
339 * we allocate a linear buffer for the DMA, and split it to each packet.
340 * in a future version, a scatter-gather buffer should be implemented.
341 */
342
343#define ATI_DESC_LIST_SIZE \
344 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
345
346/*
347 * build packets ring for the given buffer size.
348 *
349 * IXP handles the buffer descriptors, which are connected as a linked
350 * list. although we can change the list dynamically, in this version,
351 * a static RING of buffer descriptors is used.
352 *
353 * the ring is built in this function, and is set up to the hardware.
354 */
355static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
356 struct snd_pcm_substream *substream,
357 unsigned int periods,
358 unsigned int period_bytes)
359{
360 unsigned int i;
361 u32 addr, desc_addr;
362 unsigned long flags;
363
364 if (periods > ATI_MAX_DESCRIPTORS)
365 return -ENOMEM;
366
367 if (dma->desc_buf.area == NULL) {
368 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
369 snd_dma_pci_data(chip->pci),
370 ATI_DESC_LIST_SIZE,
371 &dma->desc_buf) < 0)
372 return -ENOMEM;
373 dma->period_bytes = dma->periods = 0; /* clear */
374 }
375
376 if (dma->periods == periods && dma->period_bytes == period_bytes) {
377 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
378 (char*)chip->remap_addr + dma->ops->llp_offset);
379 return 0;
380 }
381
382 /* reset DMA before changing the descriptor table */
383 spin_lock_irqsave(&chip->reg_lock, flags);
384 writel(0, chip->remap_addr + dma->ops->llp_offset);
385 dma->ops->enable_dma(chip, 0);
386 dma->ops->enable_dma(chip, 1);
387 spin_unlock_irqrestore(&chip->reg_lock, flags);
388
389 /* fill the entries */
390 addr = (u32)substream->runtime->dma_addr;
391 desc_addr = (u32)dma->desc_buf.addr;
392 for (i = 0; i < periods; i++) {
393 struct atiixp_dma_desc *desc;
394 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
395 desc->addr = cpu_to_le32(addr);
396 desc->status = 0;
397 desc->size = period_bytes >> 2; /* in dwords */
398 desc_addr += sizeof(struct atiixp_dma_desc);
399 if (i == periods - 1)
400 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
401 else
402 desc->next = cpu_to_le32(desc_addr);
403 addr += period_bytes;
404 }
405
406 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
407 chip->remap_addr + dma->ops->llp_offset);
408
409 dma->period_bytes = period_bytes;
410 dma->periods = periods;
411
412 return 0;
413}
414
415/*
416 * remove the ring buffer and release it if assigned
417 */
418static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
419 struct snd_pcm_substream *substream)
420{
421 if (dma->desc_buf.area) {
422 writel(0, chip->remap_addr + dma->ops->llp_offset);
423 snd_dma_free_pages(&dma->desc_buf);
424 dma->desc_buf.area = NULL;
425 }
426}
427
428/*
429 * AC97 interface
430 */
431static int snd_atiixp_acquire_codec(struct atiixp *chip)
432{
433 int timeout = 1000;
434
435 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
436 if (! timeout--) {
437 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
438 return -EBUSY;
439 }
440 udelay(1);
441 }
442 return 0;
443}
444
445static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
446{
447 unsigned int data;
448 int timeout;
449
450 if (snd_atiixp_acquire_codec(chip) < 0)
451 return 0xffff;
452 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
453 ATI_REG_PHYS_OUT_ADDR_EN |
454 ATI_REG_PHYS_OUT_RW |
455 codec;
456 atiixp_write(chip, PHYS_OUT_ADDR, data);
457 if (snd_atiixp_acquire_codec(chip) < 0)
458 return 0xffff;
459 timeout = 1000;
460 do {
461 data = atiixp_read(chip, PHYS_IN_ADDR);
462 if (data & ATI_REG_PHYS_IN_READ_FLAG)
463 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
464 udelay(1);
465 } while (--timeout);
466 /* time out may happen during reset */
467 if (reg < 0x7c)
468 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
469 return 0xffff;
470}
471
472
473static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
474 unsigned short reg, unsigned short val)
475{
476 unsigned int data;
477
478 if (snd_atiixp_acquire_codec(chip) < 0)
479 return;
480 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
481 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
482 ATI_REG_PHYS_OUT_ADDR_EN | codec;
483 atiixp_write(chip, PHYS_OUT_ADDR, data);
484}
485
486
487static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
488 unsigned short reg)
489{
490 struct atiixp *chip = ac97->private_data;
491 return snd_atiixp_codec_read(chip, ac97->num, reg);
492
493}
494
495static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
496 unsigned short val)
497{
498 struct atiixp *chip = ac97->private_data;
499 snd_atiixp_codec_write(chip, ac97->num, reg, val);
500}
501
502/*
503 * reset AC link
504 */
505static int snd_atiixp_aclink_reset(struct atiixp *chip)
506{
507 int timeout;
508
509 /* reset powerdoewn */
510 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
511 udelay(10);
512
513 /* perform a software reset */
514 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
515 atiixp_read(chip, CMD);
516 udelay(10);
517 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
518
519 timeout = 10;
520 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
521 /* do a hard reset */
522 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
523 ATI_REG_CMD_AC_SYNC);
524 atiixp_read(chip, CMD);
525 mdelay(1);
526 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
527 if (--timeout) {
528 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
529 break;
530 }
531 }
532
533 /* deassert RESET and assert SYNC to make sure */
534 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
535 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
536
537 return 0;
538}
539
540#ifdef CONFIG_PM
541static int snd_atiixp_aclink_down(struct atiixp *chip)
542{
543 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
544 // return -EBUSY;
545 atiixp_update(chip, CMD,
546 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
547 ATI_REG_CMD_POWERDOWN);
548 return 0;
549}
550#endif
551
552/*
553 * auto-detection of codecs
554 *
555 * the IXP chip can generate interrupts for the non-existing codecs.
556 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
557 * even if all three codecs are connected.
558 */
559
560#define ALL_CODEC_NOT_READY \
561 (ATI_REG_ISR_CODEC0_NOT_READY |\
562 ATI_REG_ISR_CODEC1_NOT_READY |\
563 ATI_REG_ISR_CODEC2_NOT_READY)
564#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
565
566static int __devinit ac97_probing_bugs(struct pci_dev *pci)
567{
568 const struct snd_pci_quirk *q;
569
570 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
571 if (q) {
572#ifndef TARGET_OS2
573 snd_printdd(KERN_INFO "Atiixp quirk for %s. "
574 "Forcing codec %d\n", q->name, q->value);
575#endif
576 return q->value;
577 }
578 /* this hardware doesn't need workarounds. Probe for codec */
579 return -1;
580}
581
582static int __devinit snd_atiixp_codec_detect(struct atiixp *chip)
583{
584 int timeout;
585
586 chip->codec_not_ready_bits = 0;
587 if (ac97_codec == -1)
588 ac97_codec = ac97_probing_bugs(chip->pci);
589 if (ac97_codec >= 0) {
590 chip->codec_not_ready_bits |=
591 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
592 return 0;
593 }
594
595 atiixp_write(chip, IER, CODEC_CHECK_BITS);
596 /* wait for the interrupts */
597 timeout = 50;
598 while (timeout-- > 0) {
599 mdelay(1);
600 if (chip->codec_not_ready_bits)
601 break;
602 }
603 atiixp_write(chip, IER, 0); /* disable irqs */
604
605 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
606 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
607 return -ENXIO;
608 }
609 return 0;
610}
611
612
613/*
614 * enable DMA and irqs
615 */
616static int snd_atiixp_chip_start(struct atiixp *chip)
617{
618 unsigned int reg;
619
620 /* set up spdif, enable burst mode */
621 reg = atiixp_read(chip, CMD);
622 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
623 reg |= ATI_REG_CMD_BURST_EN;
624 atiixp_write(chip, CMD, reg);
625
626 reg = atiixp_read(chip, SPDF_CMD);
627 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
628 atiixp_write(chip, SPDF_CMD, reg);
629
630 /* clear all interrupt source */
631 atiixp_write(chip, ISR, 0xffffffff);
632 /* enable irqs */
633 atiixp_write(chip, IER,
634 ATI_REG_IER_IO_STATUS_EN |
635 ATI_REG_IER_IN_XRUN_EN |
636 ATI_REG_IER_OUT_XRUN_EN |
637 ATI_REG_IER_SPDF_XRUN_EN |
638 ATI_REG_IER_SPDF_STATUS_EN);
639 return 0;
640}
641
642
643/*
644 * disable DMA and IRQs
645 */
646static int snd_atiixp_chip_stop(struct atiixp *chip)
647{
648 /* clear interrupt source */
649 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
650 /* disable irqs */
651 atiixp_write(chip, IER, 0);
652 return 0;
653}
654
655
656/*
657 * PCM section
658 */
659
660/*
661 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
662 * position. when SG-buffer is implemented, the offset must be calculated
663 * correctly...
664 */
665static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
666{
667 struct atiixp *chip = snd_pcm_substream_chip(substream);
668 struct snd_pcm_runtime *runtime = substream->runtime;
669 struct atiixp_dma *dma = runtime->private_data;
670 unsigned int curptr;
671 int timeout = 1000;
672
673 while (timeout--) {
674 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
675 if (curptr < dma->buf_addr)
676 continue;
677 curptr -= dma->buf_addr;
678 if (curptr >= dma->buf_bytes)
679 continue;
680 return bytes_to_frames(runtime, curptr);
681 }
682 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
683 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
684 return 0;
685}
686
687/*
688 * XRUN detected, and stop the PCM substream
689 */
690static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
691{
692 if (! dma->substream || ! dma->running)
693 return;
694 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
695 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
696}
697
698/*
699 * the period ack. update the substream.
700 */
701static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
702{
703 if (! dma->substream || ! dma->running)
704 return;
705 snd_pcm_period_elapsed(dma->substream);
706}
707
708/* set BUS_BUSY interrupt bit if any DMA is running */
709/* call with spinlock held */
710static void snd_atiixp_check_bus_busy(struct atiixp *chip)
711{
712 unsigned int bus_busy;
713 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
714 ATI_REG_CMD_RECEIVE_EN |
715 ATI_REG_CMD_SPDF_OUT_EN))
716 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
717 else
718 bus_busy = 0;
719 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
720}
721
722/* common trigger callback
723 * calling the lowlevel callbacks in it
724 */
725static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
726{
727 struct atiixp *chip = snd_pcm_substream_chip(substream);
728 struct atiixp_dma *dma = substream->runtime->private_data;
729 int err = 0;
730
731 if (snd_BUG_ON(!dma->ops->enable_transfer ||
732 !dma->ops->flush_dma))
733 return -EINVAL;
734
735 spin_lock(&chip->reg_lock);
736 switch (cmd) {
737 case SNDRV_PCM_TRIGGER_START:
738 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
739 case SNDRV_PCM_TRIGGER_RESUME:
740 dma->ops->enable_transfer(chip, 1);
741 dma->running = 1;
742 dma->suspended = 0;
743 break;
744 case SNDRV_PCM_TRIGGER_STOP:
745 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
746 case SNDRV_PCM_TRIGGER_SUSPEND:
747 dma->ops->enable_transfer(chip, 0);
748 dma->running = 0;
749 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
750 break;
751 default:
752 err = -EINVAL;
753 break;
754 }
755 if (! err) {
756 snd_atiixp_check_bus_busy(chip);
757 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
758 dma->ops->flush_dma(chip);
759 snd_atiixp_check_bus_busy(chip);
760 }
761 }
762 spin_unlock(&chip->reg_lock);
763 return err;
764}
765
766
767/*
768 * lowlevel callbacks for each DMA type
769 *
770 * every callback is supposed to be called in chip->reg_lock spinlock
771 */
772
773/* flush FIFO of analog OUT DMA */
774static void atiixp_out_flush_dma(struct atiixp *chip)
775{
776 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
777}
778
779/* enable/disable analog OUT DMA */
780static void atiixp_out_enable_dma(struct atiixp *chip, int on)
781{
782 unsigned int data;
783 data = atiixp_read(chip, CMD);
784 if (on) {
785 if (data & ATI_REG_CMD_OUT_DMA_EN)
786 return;
787 atiixp_out_flush_dma(chip);
788 data |= ATI_REG_CMD_OUT_DMA_EN;
789 } else
790 data &= ~ATI_REG_CMD_OUT_DMA_EN;
791 atiixp_write(chip, CMD, data);
792}
793
794/* start/stop transfer over OUT DMA */
795static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
796{
797 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
798 on ? ATI_REG_CMD_SEND_EN : 0);
799}
800
801/* enable/disable analog IN DMA */
802static void atiixp_in_enable_dma(struct atiixp *chip, int on)
803{
804 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
805 on ? ATI_REG_CMD_IN_DMA_EN : 0);
806}
807
808/* start/stop analog IN DMA */
809static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
810{
811 if (on) {
812 unsigned int data = atiixp_read(chip, CMD);
813 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
814 data |= ATI_REG_CMD_RECEIVE_EN;
815#if 0 /* FIXME: this causes the endless loop */
816 /* wait until slot 3/4 are finished */
817 while ((atiixp_read(chip, COUNTER) &
818 ATI_REG_COUNTER_SLOT) != 5)
819 ;
820#endif
821 atiixp_write(chip, CMD, data);
822 }
823 } else
824 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
825}
826
827/* flush FIFO of analog IN DMA */
828static void atiixp_in_flush_dma(struct atiixp *chip)
829{
830 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
831}
832
833/* enable/disable SPDIF OUT DMA */
834static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
835{
836 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
837 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
838}
839
840/* start/stop SPDIF OUT DMA */
841static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
842{
843 unsigned int data;
844 data = atiixp_read(chip, CMD);
845 if (on)
846 data |= ATI_REG_CMD_SPDF_OUT_EN;
847 else
848 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
849 atiixp_write(chip, CMD, data);
850}
851
852/* flush FIFO of SPDIF OUT DMA */
853static void atiixp_spdif_flush_dma(struct atiixp *chip)
854{
855 int timeout;
856
857 /* DMA off, transfer on */
858 atiixp_spdif_enable_dma(chip, 0);
859 atiixp_spdif_enable_transfer(chip, 1);
860
861 timeout = 100;
862 do {
863 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
864 break;
865 udelay(1);
866 } while (timeout-- > 0);
867
868 atiixp_spdif_enable_transfer(chip, 0);
869}
870
871/* set up slots and formats for SPDIF OUT */
872static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
873{
874 struct atiixp *chip = snd_pcm_substream_chip(substream);
875
876 spin_lock_irq(&chip->reg_lock);
877 if (chip->spdif_over_aclink) {
878 unsigned int data;
879 /* enable slots 10/11 */
880 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
881 ATI_REG_CMD_SPDF_CONFIG_01);
882 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
883 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
884 ATI_REG_OUT_DMA_SLOT_BIT(11);
885 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
886 atiixp_write(chip, OUT_DMA_SLOT, data);
887 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
888 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
889 ATI_REG_CMD_INTERLEAVE_OUT : 0);
890 } else {
891 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
892 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
893 }
894 spin_unlock_irq(&chip->reg_lock);
895 return 0;
896}
897
898/* set up slots and formats for analog OUT */
899static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
900{
901 struct atiixp *chip = snd_pcm_substream_chip(substream);
902 unsigned int data;
903
904 spin_lock_irq(&chip->reg_lock);
905 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
906 switch (substream->runtime->channels) {
907 case 8:
908 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
909 ATI_REG_OUT_DMA_SLOT_BIT(11);
910 /* fallthru */
911 case 6:
912 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
913 ATI_REG_OUT_DMA_SLOT_BIT(8);
914 /* fallthru */
915 case 4:
916 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
917 ATI_REG_OUT_DMA_SLOT_BIT(9);
918 /* fallthru */
919 default:
920 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
921 ATI_REG_OUT_DMA_SLOT_BIT(4);
922 break;
923 }
924
925 /* set output threshold */
926 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
927 atiixp_write(chip, OUT_DMA_SLOT, data);
928
929 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
930 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
931 ATI_REG_CMD_INTERLEAVE_OUT : 0);
932
933 /*
934 * enable 6 channel re-ordering bit if needed
935 */
936 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
937 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
938
939 spin_unlock_irq(&chip->reg_lock);
940 return 0;
941}
942
943/* set up slots and formats for analog IN */
944static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
945{
946 struct atiixp *chip = snd_pcm_substream_chip(substream);
947
948 spin_lock_irq(&chip->reg_lock);
949 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
950 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
951 ATI_REG_CMD_INTERLEAVE_IN : 0);
952 spin_unlock_irq(&chip->reg_lock);
953 return 0;
954}
955
956/*
957 * hw_params - allocate the buffer and set up buffer descriptors
958 */
959static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
960 struct snd_pcm_hw_params *hw_params)
961{
962 struct atiixp *chip = snd_pcm_substream_chip(substream);
963 struct atiixp_dma *dma = substream->runtime->private_data;
964 int err;
965
966 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
967 if (err < 0)
968 return err;
969 dma->buf_addr = substream->runtime->dma_addr;
970 dma->buf_bytes = params_buffer_bytes(hw_params);
971
972 err = atiixp_build_dma_packets(chip, dma, substream,
973 params_periods(hw_params),
974 params_period_bytes(hw_params));
975 if (err < 0)
976 return err;
977
978 if (dma->ac97_pcm_type >= 0) {
979 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
980 /* PCM is bound to AC97 codec(s)
981 * set up the AC97 codecs
982 */
983 if (dma->pcm_open_flag) {
984 snd_ac97_pcm_close(pcm);
985 dma->pcm_open_flag = 0;
986 }
987 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
988 params_channels(hw_params),
989 pcm->r[0].slots);
990 if (err >= 0)
991 dma->pcm_open_flag = 1;
992 }
993
994 return err;
995}
996
997static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
998{
999 struct atiixp *chip = snd_pcm_substream_chip(substream);
1000 struct atiixp_dma *dma = substream->runtime->private_data;
1001
1002 if (dma->pcm_open_flag) {
1003 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
1004 snd_ac97_pcm_close(pcm);
1005 dma->pcm_open_flag = 0;
1006 }
1007 atiixp_clear_dma_packets(chip, dma, substream);
1008 snd_pcm_lib_free_pages(substream);
1009 return 0;
1010}
1011
1012
1013/*
1014 * pcm hardware definition, identical for all DMA types
1015 */
1016static struct snd_pcm_hardware snd_atiixp_pcm_hw =
1017{
1018 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1019 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1020 SNDRV_PCM_INFO_PAUSE |
1021 SNDRV_PCM_INFO_RESUME |
1022 SNDRV_PCM_INFO_MMAP_VALID),
1023 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1024 .rates = SNDRV_PCM_RATE_48000,
1025 .rate_min = 48000,
1026 .rate_max = 48000,
1027 .channels_min = 2,
1028 .channels_max = 2,
1029 .buffer_bytes_max = 256 * 1024,
1030 .period_bytes_min = 32,
1031 .period_bytes_max = 128 * 1024,
1032 .periods_min = 2,
1033 .periods_max = ATI_MAX_DESCRIPTORS,
1034};
1035
1036static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1037 struct atiixp_dma *dma, int pcm_type)
1038{
1039 struct atiixp *chip = snd_pcm_substream_chip(substream);
1040 struct snd_pcm_runtime *runtime = substream->runtime;
1041 int err;
1042
1043 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1044 return -EINVAL;
1045
1046 if (dma->opened)
1047 return -EBUSY;
1048 dma->substream = substream;
1049 runtime->hw = snd_atiixp_pcm_hw;
1050 dma->ac97_pcm_type = pcm_type;
1051 if (pcm_type >= 0) {
1052 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1053 snd_pcm_limit_hw_rates(runtime);
1054 } else {
1055 /* direct SPDIF */
1056 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1057 }
1058 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1059 return err;
1060 runtime->private_data = dma;
1061
1062 /* enable DMA bits */
1063 spin_lock_irq(&chip->reg_lock);
1064 dma->ops->enable_dma(chip, 1);
1065 spin_unlock_irq(&chip->reg_lock);
1066 dma->opened = 1;
1067
1068 return 0;
1069}
1070
1071static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1072 struct atiixp_dma *dma)
1073{
1074 struct atiixp *chip = snd_pcm_substream_chip(substream);
1075 /* disable DMA bits */
1076 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1077 return -EINVAL;
1078 spin_lock_irq(&chip->reg_lock);
1079 dma->ops->enable_dma(chip, 0);
1080 spin_unlock_irq(&chip->reg_lock);
1081 dma->substream = NULL;
1082 dma->opened = 0;
1083 return 0;
1084}
1085
1086/*
1087 */
1088static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1089{
1090 struct atiixp *chip = snd_pcm_substream_chip(substream);
1091 int err;
1092
1093 mutex_lock(&chip->open_mutex);
1094 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1095 mutex_unlock(&chip->open_mutex);
1096 if (err < 0)
1097 return err;
1098 substream->runtime->hw.channels_max = chip->max_channels;
1099 if (chip->max_channels > 2)
1100 /* channels must be even */
1101 snd_pcm_hw_constraint_step(substream->runtime, 0,
1102 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1103 return 0;
1104}
1105
1106static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1107{
1108 struct atiixp *chip = snd_pcm_substream_chip(substream);
1109 int err;
1110 mutex_lock(&chip->open_mutex);
1111 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1112 mutex_unlock(&chip->open_mutex);
1113 return err;
1114}
1115
1116static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1117{
1118 struct atiixp *chip = snd_pcm_substream_chip(substream);
1119 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1120}
1121
1122static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1123{
1124 struct atiixp *chip = snd_pcm_substream_chip(substream);
1125 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1126}
1127
1128static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1129{
1130 struct atiixp *chip = snd_pcm_substream_chip(substream);
1131 int err;
1132 mutex_lock(&chip->open_mutex);
1133 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1134 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1135 else
1136 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1137 mutex_unlock(&chip->open_mutex);
1138 return err;
1139}
1140
1141static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1142{
1143 struct atiixp *chip = snd_pcm_substream_chip(substream);
1144 int err;
1145 mutex_lock(&chip->open_mutex);
1146 if (chip->spdif_over_aclink)
1147 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1148 else
1149 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1150 mutex_unlock(&chip->open_mutex);
1151 return err;
1152}
1153
1154/* AC97 playback */
1155static struct snd_pcm_ops snd_atiixp_playback_ops = {
1156 .open = snd_atiixp_playback_open,
1157 .close = snd_atiixp_playback_close,
1158 .ioctl = snd_pcm_lib_ioctl,
1159 .hw_params = snd_atiixp_pcm_hw_params,
1160 .hw_free = snd_atiixp_pcm_hw_free,
1161 .prepare = snd_atiixp_playback_prepare,
1162 .trigger = snd_atiixp_pcm_trigger,
1163 .pointer = snd_atiixp_pcm_pointer,
1164};
1165
1166/* AC97 capture */
1167static struct snd_pcm_ops snd_atiixp_capture_ops = {
1168 .open = snd_atiixp_capture_open,
1169 .close = snd_atiixp_capture_close,
1170 .ioctl = snd_pcm_lib_ioctl,
1171 .hw_params = snd_atiixp_pcm_hw_params,
1172 .hw_free = snd_atiixp_pcm_hw_free,
1173 .prepare = snd_atiixp_capture_prepare,
1174 .trigger = snd_atiixp_pcm_trigger,
1175 .pointer = snd_atiixp_pcm_pointer,
1176};
1177
1178/* SPDIF playback */
1179static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1180 .open = snd_atiixp_spdif_open,
1181 .close = snd_atiixp_spdif_close,
1182 .ioctl = snd_pcm_lib_ioctl,
1183 .hw_params = snd_atiixp_pcm_hw_params,
1184 .hw_free = snd_atiixp_pcm_hw_free,
1185 .prepare = snd_atiixp_spdif_prepare,
1186 .trigger = snd_atiixp_pcm_trigger,
1187 .pointer = snd_atiixp_pcm_pointer,
1188};
1189
1190static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1191 /* front PCM */
1192 {
1193 .exclusive = 1,
1194 .r = { {
1195 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1196 (1 << AC97_SLOT_PCM_RIGHT) |
1197 (1 << AC97_SLOT_PCM_CENTER) |
1198 (1 << AC97_SLOT_PCM_SLEFT) |
1199 (1 << AC97_SLOT_PCM_SRIGHT) |
1200 (1 << AC97_SLOT_LFE)
1201 }
1202 }
1203 },
1204 /* PCM IN #1 */
1205 {
1206 .stream = 1,
1207 .exclusive = 1,
1208 .r = { {
1209 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1210 (1 << AC97_SLOT_PCM_RIGHT)
1211 }
1212 }
1213 },
1214 /* S/PDIF OUT (optional) */
1215 {
1216 .exclusive = 1,
1217 .spdif = 1,
1218 .r = { {
1219 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1220 (1 << AC97_SLOT_SPDIF_RIGHT2)
1221 }
1222 }
1223 },
1224};
1225
1226static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1227 .type = ATI_DMA_PLAYBACK,
1228 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1229 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1230 .enable_dma = atiixp_out_enable_dma,
1231 .enable_transfer = atiixp_out_enable_transfer,
1232 .flush_dma = atiixp_out_flush_dma,
1233};
1234
1235static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1236 .type = ATI_DMA_CAPTURE,
1237 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1238 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1239 .enable_dma = atiixp_in_enable_dma,
1240 .enable_transfer = atiixp_in_enable_transfer,
1241 .flush_dma = atiixp_in_flush_dma,
1242};
1243
1244static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1245 .type = ATI_DMA_SPDIF,
1246 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1247 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1248 .enable_dma = atiixp_spdif_enable_dma,
1249 .enable_transfer = atiixp_spdif_enable_transfer,
1250 .flush_dma = atiixp_spdif_flush_dma,
1251};
1252
1253
1254static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
1255{
1256 struct snd_pcm *pcm;
1257 struct snd_ac97_bus *pbus = chip->ac97_bus;
1258 int err, i, num_pcms;
1259
1260 /* initialize constants */
1261 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1262 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1263 if (! chip->spdif_over_aclink)
1264 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1265
1266 /* assign AC97 pcm */
1267 if (chip->spdif_over_aclink)
1268 num_pcms = 3;
1269 else
1270 num_pcms = 2;
1271 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1272 if (err < 0)
1273 return err;
1274 for (i = 0; i < num_pcms; i++)
1275 chip->pcms[i] = &pbus->pcms[i];
1276
1277 chip->max_channels = 2;
1278 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1279 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1280 chip->max_channels = 6;
1281 else
1282 chip->max_channels = 4;
1283 }
1284
1285 /* PCM #0: analog I/O */
1286 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1287 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1288 if (err < 0)
1289 return err;
1290 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1291 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1292 pcm->private_data = chip;
1293 strcpy(pcm->name, "ATI IXP AC97");
1294 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1295
1296 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1297 snd_dma_pci_data(chip->pci),
1298 64*1024, 128*1024);
1299
1300 /* no SPDIF support on codec? */
1301 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1302 return 0;
1303
1304 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1305 if (chip->pcms[ATI_PCM_SPDIF])
1306 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1307
1308 /* PCM #1: spdif playback */
1309 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1310 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1311 if (err < 0)
1312 return err;
1313 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1314 pcm->private_data = chip;
1315 if (chip->spdif_over_aclink)
1316 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1317 else
1318 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1319 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1320
1321 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1322 snd_dma_pci_data(chip->pci),
1323 64*1024, 128*1024);
1324
1325 /* pre-select AC97 SPDIF slots 10/11 */
1326 for (i = 0; i < NUM_ATI_CODECS; i++) {
1327 if (chip->ac97[i])
1328 snd_ac97_update_bits(chip->ac97[i],
1329 AC97_EXTENDED_STATUS,
1330 0x03 << 4, 0x03 << 4);
1331 }
1332
1333 return 0;
1334}
1335
1336
1337
1338/*
1339 * interrupt handler
1340 */
1341static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1342{
1343 struct atiixp *chip = dev_id;
1344 unsigned int status;
1345
1346 status = atiixp_read(chip, ISR);
1347
1348 if (! status)
1349 return IRQ_NONE;
1350
1351 /* process audio DMA */
1352 if (status & ATI_REG_ISR_OUT_XRUN)
1353 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1354 else if (status & ATI_REG_ISR_OUT_STATUS)
1355 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1356 if (status & ATI_REG_ISR_IN_XRUN)
1357 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1358 else if (status & ATI_REG_ISR_IN_STATUS)
1359 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1360 if (! chip->spdif_over_aclink) {
1361 if (status & ATI_REG_ISR_SPDF_XRUN)
1362 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1363 else if (status & ATI_REG_ISR_SPDF_STATUS)
1364 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1365 }
1366
1367 /* for codec detection */
1368 if (status & CODEC_CHECK_BITS) {
1369 unsigned int detected;
1370 detected = status & CODEC_CHECK_BITS;
1371 spin_lock(&chip->reg_lock);
1372 chip->codec_not_ready_bits |= detected;
1373 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1374 spin_unlock(&chip->reg_lock);
1375 }
1376
1377 /* ack */
1378 atiixp_write(chip, ISR, status);
1379
1380 return IRQ_HANDLED;
1381}
1382
1383
1384/*
1385 * ac97 mixer section
1386 */
1387
1388static struct ac97_quirk ac97_quirks[] __devinitdata = {
1389 {
1390 .subvendor = 0x103c,
1391 .subdevice = 0x006b,
1392 .name = "HP Pavilion ZV5030US",
1393 .type = AC97_TUNE_MUTE_LED
1394 },
1395 {
1396 .subvendor = 0x103c,
1397 .subdevice = 0x308b,
1398 .name = "HP nx6125",
1399 .type = AC97_TUNE_MUTE_LED
1400 },
1401 {
1402 .subvendor = 0x103c,
1403 .subdevice = 0x3091,
1404 .name = "unknown HP",
1405 .type = AC97_TUNE_MUTE_LED
1406 },
1407 {0} /* terminator */
1408};
1409
1410static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1411 const char *quirk_override)
1412{
1413 struct snd_ac97_bus *pbus;
1414 struct snd_ac97_template ac97;
1415 int i, err;
1416 int codec_count;
1417 static struct snd_ac97_bus_ops ops = {
1418 .write = snd_atiixp_ac97_write,
1419 .read = snd_atiixp_ac97_read,
1420 };
1421 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1422 ATI_REG_ISR_CODEC0_NOT_READY,
1423 ATI_REG_ISR_CODEC1_NOT_READY,
1424 ATI_REG_ISR_CODEC2_NOT_READY,
1425 };
1426
1427 if (snd_atiixp_codec_detect(chip) < 0)
1428 return -ENXIO;
1429
1430 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1431 return err;
1432 pbus->clock = clock;
1433 chip->ac97_bus = pbus;
1434
1435 codec_count = 0;
1436 for (i = 0; i < NUM_ATI_CODECS; i++) {
1437 if (chip->codec_not_ready_bits & codec_skip[i])
1438 continue;
1439 memset(&ac97, 0, sizeof(ac97));
1440 ac97.private_data = chip;
1441 ac97.pci = chip->pci;
1442 ac97.num = i;
1443 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1444 if (! chip->spdif_over_aclink)
1445 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1446 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1447 chip->ac97[i] = NULL; /* to be sure */
1448 snd_printdd("atiixp: codec %d not available for audio\n", i);
1449 continue;
1450 }
1451 codec_count++;
1452 }
1453
1454 if (! codec_count) {
1455 snd_printk(KERN_ERR "atiixp: no codec available\n");
1456 return -ENODEV;
1457 }
1458
1459 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1460
1461 return 0;
1462}
1463
1464
1465#ifdef CONFIG_PM
1466/*
1467 * power management
1468 */
1469static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
1470{
1471 struct snd_card *card = pci_get_drvdata(pci);
1472 struct atiixp *chip = card->private_data;
1473 int i;
1474
1475 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1476 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1477 if (chip->pcmdevs[i]) {
1478 struct atiixp_dma *dma = &chip->dmas[i];
1479 if (dma->substream && dma->running)
1480 dma->saved_curptr = readl(chip->remap_addr +
1481 dma->ops->dt_cur);
1482 snd_pcm_suspend_all(chip->pcmdevs[i]);
1483 }
1484 for (i = 0; i < NUM_ATI_CODECS; i++)
1485 snd_ac97_suspend(chip->ac97[i]);
1486 snd_atiixp_aclink_down(chip);
1487 snd_atiixp_chip_stop(chip);
1488
1489 pci_disable_device(pci);
1490 pci_save_state(pci);
1491 pci_set_power_state(pci, pci_choose_state(pci, state));
1492 return 0;
1493}
1494
1495static int snd_atiixp_resume(struct pci_dev *pci)
1496{
1497 struct snd_card *card = pci_get_drvdata(pci);
1498 struct atiixp *chip = card->private_data;
1499 int i;
1500
1501 pci_set_power_state(pci, PCI_D0);
1502 pci_restore_state(pci);
1503 if (pci_enable_device(pci) < 0) {
1504 printk(KERN_ERR "atiixp: pci_enable_device failed, "
1505 "disabling device\n");
1506 snd_card_disconnect(card);
1507 return -EIO;
1508 }
1509 pci_set_master(pci);
1510
1511 snd_atiixp_aclink_reset(chip);
1512 snd_atiixp_chip_start(chip);
1513
1514 for (i = 0; i < NUM_ATI_CODECS; i++)
1515 snd_ac97_resume(chip->ac97[i]);
1516
1517 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1518 if (chip->pcmdevs[i]) {
1519 struct atiixp_dma *dma = &chip->dmas[i];
1520 if (dma->substream && dma->suspended) {
1521 dma->ops->enable_dma(chip, 1);
1522 dma->substream->ops->prepare(dma->substream);
1523 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1524 chip->remap_addr + dma->ops->llp_offset);
1525 writel(dma->saved_curptr, chip->remap_addr +
1526 dma->ops->dt_cur);
1527 }
1528 }
1529
1530 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1531 return 0;
1532}
1533#endif /* CONFIG_PM */
1534
1535
1536#ifdef CONFIG_PROC_FS
1537/*
1538 * proc interface for register dump
1539 */
1540
1541static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1542 struct snd_info_buffer *buffer)
1543{
1544 struct atiixp *chip = entry->private_data;
1545 int i;
1546
1547 for (i = 0; i < 256; i += 4)
1548 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1549}
1550
1551static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
1552{
1553 struct snd_info_entry *entry;
1554
1555 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1556 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
1557}
1558#else /* !CONFIG_PROC_FS */
1559#define snd_atiixp_proc_init(chip)
1560#endif
1561
1562
1563/*
1564 * destructor
1565 */
1566
1567static int snd_atiixp_free(struct atiixp *chip)
1568{
1569 if (chip->irq < 0)
1570 goto __hw_end;
1571 snd_atiixp_chip_stop(chip);
1572
1573 __hw_end:
1574 if (chip->irq >= 0)
1575 free_irq(chip->irq, chip);
1576 if (chip->remap_addr)
1577 iounmap(chip->remap_addr);
1578 pci_release_regions(chip->pci);
1579 pci_disable_device(chip->pci);
1580 kfree(chip);
1581 return 0;
1582}
1583
1584static int snd_atiixp_dev_free(struct snd_device *device)
1585{
1586 struct atiixp *chip = device->device_data;
1587 return snd_atiixp_free(chip);
1588}
1589
1590/*
1591 * constructor for chip instance
1592 */
1593static int __devinit snd_atiixp_create(struct snd_card *card,
1594 struct pci_dev *pci,
1595 struct atiixp **r_chip)
1596{
1597 static struct snd_device_ops ops = {
1598 .dev_free = snd_atiixp_dev_free,
1599 };
1600 struct atiixp *chip;
1601 int err;
1602
1603 if ((err = pci_enable_device(pci)) < 0)
1604 return err;
1605
1606 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1607 if (chip == NULL) {
1608 pci_disable_device(pci);
1609 return -ENOMEM;
1610 }
1611
1612 spin_lock_init(&chip->reg_lock);
1613 mutex_init(&chip->open_mutex);
1614 chip->card = card;
1615 chip->pci = pci;
1616 chip->irq = -1;
1617 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1618 pci_disable_device(pci);
1619 kfree(chip);
1620 return err;
1621 }
1622 chip->addr = pci_resource_start(pci, 0);
1623 chip->remap_addr = pci_ioremap_bar(pci, 0);
1624 if (chip->remap_addr == NULL) {
1625 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1626 snd_atiixp_free(chip);
1627 return -EIO;
1628 }
1629
1630 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1631 card->shortname, chip)) {
1632 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1633 snd_atiixp_free(chip);
1634 return -EBUSY;
1635 }
1636 chip->irq = pci->irq;
1637 pci_set_master(pci);
1638 synchronize_irq(chip->irq);
1639
1640 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1641 snd_atiixp_free(chip);
1642 return err;
1643 }
1644
1645 snd_card_set_dev(card, &pci->dev);
1646
1647 *r_chip = chip;
1648 return 0;
1649}
1650
1651
1652static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1653 const struct pci_device_id *pci_id)
1654{
1655 struct snd_card *card;
1656 struct atiixp *chip;
1657 int err;
1658
1659 err = snd_card_create(index, id, THIS_MODULE, 0, &card);
1660 if (err < 0)
1661 return err;
1662
1663 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1664 strcpy(card->shortname, "ATI IXP");
1665 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1666 goto __error;
1667 card->private_data = chip;
1668
1669 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1670 goto __error;
1671
1672 chip->spdif_over_aclink = spdif_aclink;
1673
1674 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1675 goto __error;
1676
1677 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1678 goto __error;
1679
1680 snd_atiixp_proc_init(chip);
1681
1682 snd_atiixp_chip_start(chip);
1683
1684 snprintf(card->longname, sizeof(card->longname),
1685 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1686#ifndef TARGET_OS2
1687 pci->revision,
1688#else
1689 snd_pci_revision(pci),
1690#endif
1691 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1692 chip->addr, chip->irq);
1693
1694 if ((err = snd_card_register(card)) < 0)
1695 goto __error;
1696
1697 pci_set_drvdata(pci, card);
1698 return 0;
1699
1700 __error:
1701 snd_card_free(card);
1702 return err;
1703}
1704
1705static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1706{
1707 snd_card_free(pci_get_drvdata(pci));
1708 pci_set_drvdata(pci, NULL);
1709}
1710
1711static struct pci_driver driver = {
1712 .name = "ATI IXP AC97 controller",
1713 .id_table = snd_atiixp_ids,
1714 .probe = snd_atiixp_probe,
1715 .remove = __devexit_p(snd_atiixp_remove),
1716#ifdef CONFIG_PM
1717 .suspend = snd_atiixp_suspend,
1718 .resume = snd_atiixp_resume,
1719#endif
1720};
1721
1722
1723static int __init alsa_card_atiixp_init(void)
1724{
1725 return pci_register_driver(&driver);
1726}
1727
1728static void __exit alsa_card_atiixp_exit(void)
1729{
1730 pci_unregister_driver(&driver);
1731}
1732
1733module_init(alsa_card_atiixp_init)
1734module_exit(alsa_card_atiixp_exit)
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