Ignore:
Timestamp:
Dec 4, 2001, 1:07:59 AM (24 years ago)
Author:
phaller
Message:

Enabled parallel port hardware configuration table

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/kernel32/hmparport.cpp

    r7483 r7538  
    1 /* $Id: hmparport.cpp,v 1.13 2001-11-29 10:58:44 phaller Exp $ */
     1/* $Id: hmparport.cpp,v 1.14 2001-12-04 00:07:25 phaller Exp $ */
    22
    33/*
    … …  
    9090
    9191
    92 #if 0
    93 
    94 typedef struct _PARALLEL_PNP_INFORMATION {
    95   PHYSICAL_ADDRESS  OriginalEcpController;
    96   PUCHAR  EcpController;
    97   ULONG  SpanOfEcpController;
    98   ULONG  PortNumber;
    99   ULONG  HardwareCapabilities;
    100   PPARALLEL_SET_CHIP_MODE  TrySetChipMode;
    101   PPARALLEL_CLEAR_CHIP_MODE  ClearChipMode;
    102   ULONG  FifoDepth;
    103   ULONG  FifoWidth;
    104   PHYSICAL_ADDRESS  EppControllerPhysicalAddress;
    105   ULONG  SpanOfEppController;
    106   ULONG  Ieee1284_3DeviceCount;
    107   PPARALLEL_TRY_SELECT_ROUTINE  TrySelectDevice;
    108   PPARALLEL_DESELECT_ROUTINE  DeselectDevice;
    109   PVOID  Context;
    110   ULONG  CurrentMode;
    111   PWSTR  PortName;
    112 } PARALLEL_PNP_INFORMATION, *PPARALLEL_PNP_INFORMATION;
    113 #endif
    114 
     92// Hardwired parallel port configuration information.
     93// Yet unsure if it's beneficial to query Resource Manager
     94// for these values as direct port i/o is not allowed anyway.
     95typedef struct tagParallelPortConfiguration
     96{
     97  ULONG ulNumber;
     98  ULONG ulPortBase;
     99  ULONG ulPortSpan;
     100} PARALLELPORTCONFIGURATION, *PPARALLELPORTCONFIGURATION;
     101
     102#define NUM_PARALLELPORTS 3
     103static PARALLELPORTCONFIGURATION arrParallelPorts[NUM_PARALLELPORTS] = {
     104  {1, 0x378, 8},
     105  {2, 0x278, 8},
     106  {3, 0x3bc, 8}
     107};
    115108
    116109
    … …  
    118111{
    119112  ULONG ulMagic;
     113 
    120114  // Win32 Device Control Block
    121115  COMMCONFIG   CommCfg;
    122   //OS/2 Device Control Block
     116 
     117  // hardware configuration block
     118  PPARALLELPORTCONFIGURATION pHardwareConfiguration;
    123119} HMDEVPARPORTDATA, *PHMDEVPARPORTDATA;
    124120
    … …  
    149145 
    150146  // first, we determine the number of parallel port devices available
    151   BYTE  bParallelPorts = 9;
     147  BYTE  bParallelPorts = NUM_PARALLELPORTS;
    152148 
    153149#if 0
    … …  
    181177    // Note: \\.\LPTx: is invalid (NT4SP6)
    182178    PSZ pszLPT  = strdup("\\\\.\\LPTx");
    183     PSZ pszLPT2 = strdup("\\Device\\ParallelPort1");
     179    PSZ pszLPT2 = strdup("\\Device\\ParallelPort0");
    184180    for (char ch = '1'; ch <= '1' + (bParallelPorts - 1); ch++)
    185181    {
    186182      pszLPT[7] = ch;
    187       pszLPT2[20] = ch;
     183      pszLPT2[20] = ch - 1; // \DeviceParallelPort0 -> LPT1
    188184      HandleNamesAddSymbolicLink(pszLPT, pszLPT+4);
    189185      HandleNamesAddSymbolicLink(pszLPT2, pszLPT+4);
    … …  
    226222        return FALSE;
    227223    }
    228     switch(lpDeviceName[3]) {
    229     case '1':
    230     case '2':
    231     case '3':
    232         return TRUE;    //we support up to LPT3
     224 
     225    // can support up tp LPT9
     226    if ( (lpDeviceName[3] >= '1') &&
     227         (lpDeviceName[3] <= '1' + NUM_PARALLELPORTS) )
     228    {
     229      return TRUE;
    233230    }
     231 
    234232    return FALSE;
    235233}
    … …  
    265263  if (0 == pHMHandleData->hHMHandle)
    266264  {
    267     // @@@PH we need to get an OS/2 return code from OSLibDosOpen!
    268     // and translate it via error2WinError
    269265    return ERROR_ACCESS_DENIED; // signal failure
    270266  }
    271  
    272 #if 0
    273   if (pHMHandleData->hHMHandle != 0)
     267  else
    274268  {
    275269    ULONG ulLen;
    276270    APIRET rc;
    277271    pHMHandleData->lpHandlerData = new HMDEVPARPORTDATA();
     272   
    278273    // Init The handle instance with the default default device config
    279274    memcpy( pHMHandleData->lpHandlerData,
    … …  
    281276            sizeof(HMDEVPARPORTDATA));
    282277   
    283     ulLen = sizeof(DCBINFO);
    284 
    285     rc = OSLibDosDevIOCtl( pHMHandleData->hHMHandle,
    286                            IOCTL_ASYNC,
    287                            ASYNC_GETDCBINFO,
    288                            0,0,0,
    289                            &((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2,ulLen,&ulLen);
    290     dprintf(("DCB Of %s :\n"
    291              " WriteTimeout           : %d\n"
    292              " ReadTimeout            : %d\n"
    293              " CtlHandshake           : 0x%x\n"
    294              " FlowReplace            : 0x%x\n"
    295              " Timeout                : 0x%x\n"
    296              " Error replacement Char : 0x%x\n"
    297              " Break replacement Char : 0x%x\n"
    298              " XON Char               : 0x%x\n"
    299              " XOFF Char              : 0x%x\n",
    300              lptname,
    301              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.usWriteTimeout,
    302              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.usReadTimeout,
    303              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.fbCtlHndShake,
    304              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.fbFlowReplace,
    305              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.fbTimeOut,
    306              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.bErrorReplacementChar,
    307              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.bBreakReplacementChar,
    308              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.bXONChar,
    309              ((PHMDEVCOMDATA)pHMHandleData->lpHandlerData)->dcbOS2.bXOFFChar));
    310 
    311     if(rc)
     278    // determine which port was opened
     279    ULONG ulPortNo = lptname[3] - '1';
     280   
     281    // safety check (device no 0..8 -> LPT1..9)
     282    if (ulPortNo > 8)
    312283    {
    313       return -1;
     284      delete pHMHandleData->lpHandlerData;
     285      return ERROR_DEV_NOT_EXIST;
    314286    }
    315     rc = SetBaud(pHMHandleData,9600);
    316     dprintf(("Init Baud to 9600 rc = %d",rc));
    317     rc = SetLine(pHMHandleData,8,0,0);
    318     dprintf(("Set Line to 8/N/1 rc = %d",rc));
    319     return 0;
    320   }
    321   else
    322     return  -1;
    323 #endif
    324  
    325   return NO_ERROR;
     287   
     288    // and save the hardware information
     289    PHMDEVPARPORTDATA pPPD = (PHMDEVPARPORTDATA)pHMHandleData->lpHandlerData;
     290    pPPD->pHardwareConfiguration = &arrParallelPorts[ulPortNo];
     291 
     292    return NO_ERROR;
     293  }
    326294}
    327295
    … …  
    331299{
    332300  dprintf(("HMDeviceParPortClass: Parallel port close request(%08xh)\n",
    333           pHMHandleData));
     301           pHMHandleData));
     302 
    334303  delete pHMHandleData->lpHandlerData;
    335304  return OSLibDosClose(pHMHandleData->hHMHandle);
    … …  
    701670       
    702671        // fill in the data values
    703        
     672        PHMDEVPARPORTDATA pPPD = (PHMDEVPARPORTDATA)pHMHandleData->lpHandlerData;
     673       
     674        // @@@PH
    704675        // Specifies the bus relative base I/O address of the parallel port registers.
    705         pPPI->OriginalController.LowPart = 0;  // @@@PH
    706         pPPI->OriginalController.HighPart = 0;  // @@@PH
     676        pPPI->OriginalController.LowPart  = pPPD->pHardwareConfiguration->ulPortBase;
     677        pPPI->OriginalController.HighPart = 0;
    707678       
    708679        // Pointer to the system-mapped base I/O location of the parallel port registers.
    709         pPPI->Controller = 0;          // @@@PH
     680        pPPI->Controller = NULL;
    710681       
    711682        // Specifies the size, in bytes, of the I/O space, allocated to the parallel port.
    712         pPPI->SpanOfController = 0;    // @@@PH
     683        pPPI->SpanOfController = pPPD->pHardwareConfiguration->ulPortSpan;
    713684       
    714685        // Pointer to a callback routine that a kernel-mode driver can use to try to allocate the parallel port.
    … …  
    742713       
    743714        // fill in the data values
    744        
    745         // Specifies the base physical address that the system-supplied function driver for parallel ports uses to control the ECP operation of the parallel port.
    746         pPPI->OriginalEcpController.LowPart = 0;
     715        PHMDEVPARPORTDATA pPPD = (PHMDEVPARPORTDATA)pHMHandleData->lpHandlerData;
     716       
     717        // @@@PH
     718        // Specifies the base physical address that the system-supplied
     719        // function driver for parallel ports uses to control the ECP
     720        // operation of the parallel port.
     721        pPPI->OriginalEcpController.LowPart  = pPPD->pHardwareConfiguration->ulPortBase;
    747722        pPPI->OriginalEcpController.HighPart = 0;
    748723       
    749         // Pointer to the I/O port resource that is used to control the port in ECP mode.
    750         pPPI->EcpController = 0;
     724        // Pointer to the I/O port resource that is used to control the
     725        // port in ECP mode.
     726        pPPI->EcpController = NULL;
    751727       
    752728        // Specifies the size, in bytes, of the I/O port resource.
    753         pPPI->SpanOfEcpController = 0;
     729        pPPI->SpanOfEcpController = pPPD->pHardwareConfiguration->ulPortSpan;
    754730       
    755731        // Not used.
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