Changeset 609 for branches/GNU/src/binutils/opcodes/tic54x-dis.c
- Timestamp:
- Aug 16, 2003, 6:59:22 PM (22 years ago)
- File:
-
- 1 edited
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branches/GNU/src/binutils/opcodes/tic54x-dis.c
-
Property cvs2svn:cvs-rev
changed from
1.1
to1.1.1.2
r608 r609 1 1 /* Disassembly routines for TMS320C54X architecture 2 Copyright 1999, 2000 Free Software Foundation, Inc.2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc. 3 3 Contributed by Timothy Wall (twall@cygnus.com) 4 4 … … 26 26 #include "coff/tic54x.h" 27 27 28 typedef struct _instruction { 29 int parallel; 30 template *tm; 31 partemplate *ptm; 32 } instruction; 33 34 static int get_insn_size PARAMS ((unsigned short, instruction *)); 35 static int get_instruction PARAMS ((disassemble_info *, bfd_vma, 36 unsigned short, instruction *)); 37 static int print_instruction PARAMS ((disassemble_info *, bfd_vma, 38 unsigned short, char *, 39 enum optype [], int, int)); 40 static int print_parallel_instruction PARAMS ((disassemble_info *, bfd_vma, 41 unsigned short, partemplate *, 42 int)); 43 static int sprint_dual_address (disassemble_info *,char [], 28 static int has_lkaddr (unsigned short, const template *); 29 static int get_insn_size (unsigned short, const template *); 30 static int print_instruction (disassemble_info *, bfd_vma, 31 unsigned short, const char *, 32 const enum optype [], int, int); 33 static int print_parallel_instruction (disassemble_info *, bfd_vma, 34 unsigned short, 35 const template *, int); 36 static int sprint_dual_address (disassemble_info *,char [], 44 37 unsigned short); 45 static int sprint_indirect_address (disassemble_info *,char [], 38 static int sprint_indirect_address (disassemble_info *,char [], 46 39 unsigned short); 47 static int sprint_direct_address (disassemble_info *,char [], 40 static int sprint_direct_address (disassemble_info *,char [], 48 41 unsigned short); 49 42 static int sprint_mmr (disassemble_info *,char [],int); … … 52 45 53 46 int 54 print_insn_tic54x(memaddr, info) 55 bfd_vma memaddr; 56 disassemble_info *info; 57 { 58 bfd_byte opbuf[2]; 47 print_insn_tic54x (bfd_vma memaddr, disassemble_info *info) 48 { 49 bfd_byte opbuf[2]; 59 50 unsigned short opcode; 60 51 int status, size; 61 instruction insn;52 const template* tm; 62 53 63 54 status = (*info->read_memory_func) (memaddr, opbuf, 2, info); 64 55 if (status != 0) 65 56 { 66 (*info->memory_error_func) (status, memaddr, info);57 (*info->memory_error_func) (status, memaddr, info); 67 58 return -1; 68 59 } 69 60 70 opcode = bfd_getl16(opbuf); 71 if (!get_instruction (info, memaddr, opcode, &insn)) 72 return -1; 73 74 size = get_insn_size (opcode, &insn); 61 opcode = bfd_getl16 (opbuf); 62 tm = tic54x_get_insn (info, memaddr, opcode, &size); 63 75 64 info->bytes_per_line = 2; 76 65 info->bytes_per_chunk = 2; … … 78 67 info->display_endian = BFD_ENDIAN_LITTLE; 79 68 80 if ( insn.parallel)69 if (tm->flags & FL_PAR) 81 70 { 82 if (!print_parallel_instruction (info, memaddr, opcode, insn.ptm, size))71 if (!print_parallel_instruction (info, memaddr, opcode, tm, size)) 83 72 return -1; 84 73 } 85 74 else 86 75 { 87 if (!print_instruction (info, memaddr, opcode, 88 (char *) insn.tm->name,89 insn.tm->operand_types,90 size, ( insn.tm->flags & FL_EXT)))76 if (!print_instruction (info, memaddr, opcode, 77 (char *) tm->name, 78 tm->operand_types, 79 size, (tm->flags & FL_EXT))) 91 80 return -1; 92 81 } 93 82 94 return size *2;95 } 96 97 static int 98 has_lkaddr (opcode,tm)99 unsigned short opcode; 100 template *tm;101 { 102 return IS_LKADDR(opcode) && 103 (OPTYPE(tm->operand_types[0]) == OP_Smem || 104 OPTYPE(tm->operand_types[1]) == OP_Smem || 105 OPTYPE(tm->operand_types[2]) == OP_Smem ||106 OPTYPE(tm->operand_types[1]) == OP_Sind);83 return size * 2; 84 } 85 86 static int 87 has_lkaddr (unsigned short memdata, const template *tm) 88 { 89 return (IS_LKADDR (memdata) 90 && (OPTYPE (tm->operand_types[0]) == OP_Smem 91 || OPTYPE (tm->operand_types[1]) == OP_Smem 92 || OPTYPE (tm->operand_types[2]) == OP_Smem 93 || OPTYPE (tm->operand_types[1]) == OP_Sind 94 || OPTYPE (tm->operand_types[0]) == OP_Lmem 95 || OPTYPE (tm->operand_types[1]) == OP_Lmem)); 107 96 } 108 97 109 98 /* always returns 1 (whether an insn template was found) since we provide an 110 99 "unknown instruction" template */ 111 static int 112 get_instruction (info, addr, opcode, insn) 113 disassemble_info *info; 114 bfd_vma addr; 115 unsigned short opcode; 116 instruction *insn; 117 { 118 template * tm; 119 partemplate * ptm; 120 121 insn->parallel = 0; 122 for (tm = (template *)tic54x_optab; tm->name; tm++) 100 const template* 101 tic54x_get_insn (disassemble_info *info, bfd_vma addr, 102 unsigned short memdata, int *size) 103 { 104 const template *tm = NULL; 105 106 for (tm = tic54x_optab; tm->name; tm++) 123 107 { 124 if (tm->opcode == ( opcode& tm->mask))108 if (tm->opcode == (memdata & tm->mask)) 125 109 { 126 110 /* a few opcodes span two words */ … … 130 114 pushed one word later */ 131 115 bfd_byte opbuf[2]; 132 bfd_vma addr2 = addr + 1 + has_lkaddr(opcode, tm); 133 int status = (*info->read_memory_func)(addr2, opbuf, 2, info); 116 bfd_vma addr2 = addr + 1 + has_lkaddr (memdata, tm); 117 int status = (*info->read_memory_func) (addr2, opbuf, 2, info); 118 // FIXME handle errors 134 119 if (status == 0) 135 120 { 136 unsigned short opcode2 = bfd_getl16(opbuf);137 if (tm->opcode2 == ( opcode2 & tm->mask2))121 unsigned short data2 = bfd_getl16 (opbuf); 122 if (tm->opcode2 == (data2 & tm->mask2)) 138 123 { 139 i nsn->tm = tm;140 return 1;124 if (size) *size = get_insn_size (memdata, tm); 125 return tm; 141 126 } 142 127 } … … 144 129 else 145 130 { 146 i nsn->tm = tm;147 return 1;131 if (size) *size = get_insn_size (memdata, tm); 132 return tm; 148 133 } 149 134 } 150 135 } 151 for ( ptm = (partemplate *)tic54x_paroptab; ptm->name; ptm++)136 for (tm = (template *) tic54x_paroptab; tm->name; tm++) 152 137 { 153 if (ptm->opcode == (opcode & ptm->mask)) 154 { 155 insn->parallel = 1; 156 insn->ptm = ptm; 157 return 1; 138 if (tm->opcode == (memdata & tm->mask)) 139 { 140 if (size) *size = get_insn_size (memdata, tm); 141 return tm; 158 142 } 159 143 } 160 144 161 insn->tm = (template *)&tic54x_unknown_opcode; 162 return 1; 163 } 164 165 static int 166 get_insn_size (opcode, insn) 167 unsigned short opcode; 168 instruction *insn; 145 if (size) *size = 1; 146 return &tic54x_unknown_opcode; 147 } 148 149 static int 150 get_insn_size (unsigned short memdata, const template *insn) 169 151 { 170 152 int size; 171 153 172 if (insn-> parallel)154 if (insn->flags & FL_PAR) 173 155 { 174 156 /* only non-parallel instructions support lk addressing */ 175 size = insn-> ptm->words;157 size = insn->words; 176 158 } 177 159 else 178 160 { 179 size = insn-> tm->words + has_lkaddr(opcode, insn->tm);161 size = insn->words + has_lkaddr (memdata, insn); 180 162 } 181 163 … … 188 170 bfd_vma memaddr; 189 171 unsigned short opcode; 190 c har *tm_name;191 enum optype tm_operands[];172 const char *tm_name; 173 const enum optype tm_operands[]; 192 174 int size; 193 175 int ext; … … 197 179 char operand[4][64] = { {0},{0},{0},{0}, }; 198 180 bfd_byte buf[2]; 199 unsigned long opcode2, lkaddr; 181 unsigned long opcode2 = 0; 182 unsigned long lkaddr = 0; 200 183 enum optype src = OP_None; 201 184 enum optype dst = OP_None; … … 207 190 if (size > 1) 208 191 { 209 int status = (*info->read_memory_func) (memaddr +1, buf, 2, info);192 int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info); 210 193 if (status != 0) 211 194 return 0; 212 lkaddr = opcode2 = bfd_getl16 (buf);195 lkaddr = opcode2 = bfd_getl16 (buf); 213 196 if (size > 2) 214 197 { 215 status = (*info->read_memory_func) (memaddr +2, buf, 2, info);198 status = (*info->read_memory_func) (memaddr + 2, buf, 2, info); 216 199 if (status != 0) 217 200 return 0; 218 opcode2 = bfd_getl16 (buf);219 } 220 } 221 222 for (i =0;i < MAX_OPERANDS && OPTYPE(tm_operands[i]) != OP_None;i++)201 opcode2 = bfd_getl16 (buf); 202 } 203 } 204 205 for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++) 223 206 { 224 207 char *next_comma = ","; 225 208 int optional = (tm_operands[i] & OPT) != 0; 226 209 227 switch (OPTYPE (tm_operands[i]))210 switch (OPTYPE (tm_operands[i])) 228 211 { 229 212 case OP_Xmem: 230 sprint_dual_address (info, operand[i], XMEM (opcode));213 sprint_dual_address (info, operand[i], XMEM (opcode)); 231 214 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 232 215 break; 233 216 case OP_Ymem: 234 sprint_dual_address (info, operand[i], YMEM (opcode));217 sprint_dual_address (info, operand[i], YMEM (opcode)); 235 218 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 236 219 break; … … 239 222 case OP_Lmem: 240 223 info->fprintf_func (info->stream, "%s", comma); 241 if (INDIRECT (opcode))224 if (INDIRECT (opcode)) 242 225 { 243 if (MOD (opcode) >= 12)226 if (MOD (opcode) >= 12) 244 227 { 245 228 bfd_vma addr = lkaddr; 246 int arf = ARF (opcode);247 int mod = MOD (opcode);229 int arf = ARF (opcode); 230 int mod = MOD (opcode); 248 231 if (mod == 15) 249 232 info->fprintf_func (info->stream, "*("); 250 233 else 251 info->fprintf_func (info->stream, "*%sar%d(", 234 info->fprintf_func (info->stream, "*%sar%d(", 252 235 (mod == 13 || mod == 14 ? "+" : ""), 253 236 arf); 254 (*(info->print_address_func)) ((bfd_vma)addr, info);255 info->fprintf_func (info->stream, ")%s", 237 (*(info->print_address_func)) ((bfd_vma) addr, info); 238 info->fprintf_func (info->stream, ")%s", 256 239 mod == 14 ? "%" : ""); 257 240 } … … 272 255 case OP_dmad: 273 256 info->fprintf_func (info->stream, "%s", comma); 274 (*(info->print_address_func)) ((bfd_vma)opcode2, info);257 (*(info->print_address_func)) ((bfd_vma) opcode2, info); 275 258 break; 276 259 case OP_xpmad: 277 260 /* upper 7 bits of address are in the opcode */ 278 opcode2 += ((unsigned long) opcode & 0x7F) << 16;261 opcode2 += ((unsigned long) opcode & 0x7F) << 16; 279 262 /* fall through */ 280 263 case OP_pmad: 281 264 info->fprintf_func (info->stream, "%s", comma); 282 (*(info->print_address_func)) ((bfd_vma)opcode2, info);265 (*(info->print_address_func)) ((bfd_vma) opcode2, info); 283 266 break; 284 267 case OP_MMRX: 285 sprint_mmr (info, operand[i], MMRX (opcode));268 sprint_mmr (info, operand[i], MMRX (opcode)); 286 269 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 287 270 break; 288 271 case OP_MMRY: 289 sprint_mmr (info, operand[i], MMRY (opcode));272 sprint_mmr (info, operand[i], MMRY (opcode)); 290 273 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 291 274 break; 292 275 case OP_MMR: 293 sprint_mmr (info, operand[i], MMR (opcode));276 sprint_mmr (info, operand[i], MMR (opcode)); 294 277 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 295 278 break; 296 279 case OP_PA: 297 sprintf (operand[i], "pa%d", (unsigned) opcode2);280 sprintf (operand[i], "pa%d", (unsigned) opcode2); 298 281 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 299 282 break; 300 283 case OP_SRC: 301 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;284 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A; 302 285 sprintf (operand[i], (src == OP_B) ? "b" : "a"); 303 286 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 304 287 break; 305 288 case OP_SRC1: 306 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;289 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A; 307 290 sprintf (operand[i], (src == OP_B) ? "b" : "a"); 308 291 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 309 292 break; 310 293 case OP_RND: 311 dst = DST (opcode) ? OP_B : OP_A;294 dst = DST (opcode) ? OP_B : OP_A; 312 295 sprintf (operand[i], (dst == OP_B) ? "a" : "b"); 313 296 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 314 297 break; 315 298 case OP_DST: 316 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;299 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A; 317 300 if (!optional || dst != src) 318 301 { … … 332 315 break; 333 316 case OP_ARX: 334 sprintf (operand[i], "ar%d", (int)ARX(opcode));317 sprintf (operand[i], "ar%d", (int) ARX (opcode)); 335 318 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 336 319 break; 337 320 case OP_SHIFT: 338 shift = SHIFT (ext ? opcode2 : opcode);321 shift = SHIFT (ext ? opcode2 : opcode); 339 322 if (!optional || shift != 0) 340 323 { 341 sprintf (operand[i], "%d", shift);324 sprintf (operand[i], "%d", shift); 342 325 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 343 326 } … … 346 329 break; 347 330 case OP_SHFT: 348 shift = SHFT (opcode);331 shift = SHFT (opcode); 349 332 if (!optional || shift != 0) 350 333 { 351 sprintf (operand[i], "%d", (unsigned)shift);334 sprintf (operand[i], "%d", (unsigned) shift); 352 335 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 353 336 } … … 356 339 break; 357 340 case OP_lk: 358 sprintf (operand[i], "#%d", (int)(short)opcode2);341 sprintf (operand[i], "#%d", (int) (short) opcode2); 359 342 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 360 343 break; … … 368 351 break; 369 352 case OP_k8: 370 sprintf (operand[i], "%d", (int) ((signed char)(opcode & 0xFF)));353 sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF))); 371 354 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 372 355 break; … … 380 363 break; 381 364 case OP_BITC: 382 sprintf (operand[i], "%d", (int) (opcode & 0xF));365 sprintf (operand[i], "%d", (int) (opcode & 0xF)); 383 366 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 384 367 break; … … 396 379 { 397 380 const char *code[] = { "eq", "lt", "gt", "neq" }; 398 sprintf (operand[i], code[CC3 (opcode)]);381 sprintf (operand[i], code[CC3 (opcode)]); 399 382 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 400 383 break; … … 402 385 case OP_123: 403 386 { 404 int code = (opcode >>8) & 0x3;387 int code = (opcode >> 8) & 0x3; 405 388 sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3); 406 389 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); … … 408 391 } 409 392 case OP_k5: 410 sprintf (operand[i], "#%d", 411 (int) (((signed char)opcode & 0x1F) << 3)>>3);393 sprintf (operand[i], "#%d", 394 (int) (((signed char) opcode & 0x1F) << 3) >> 3); 412 395 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 413 396 break; 414 397 case OP_k8u: 415 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));398 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF)); 416 399 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 417 400 break; 418 401 case OP_k3: 419 sprintf (operand[i], "#%d", (int) (opcode & 0x7));402 sprintf (operand[i], "#%d", (int) (opcode & 0x7)); 420 403 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 421 404 break; 422 405 case OP_lku: 423 sprintf (operand[i], "#%d", (unsigned) opcode2);406 sprintf (operand[i], "#%d", (unsigned) opcode2); 424 407 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 425 408 break; … … 432 415 { 433 416 const char *status0[] = { 434 "0", "1", "2", "3", "4", "5", "6", "7", "8", 417 "0", "1", "2", "3", "4", "5", "6", "7", "8", 435 418 "ovb", "ova", "c", "tc", "13", "14", "15" 436 419 }; 437 420 const char *status1[] = { 438 "0", "1", "2", "3", "4", 421 "0", "1", "2", "3", "4", 439 422 "cmpt", "frct", "c16", "sxm", "ovm", "10", 440 423 "intm", "hm", "xf", "cpl", "braf" 441 424 }; 442 sprintf (operand[i], "%s", 443 n ? status1[SBIT (opcode)] : status0[SBIT(opcode)]);425 sprintf (operand[i], "%s", 426 n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]); 444 427 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 445 428 break; 446 429 } 447 430 case OP_12: 448 sprintf (operand[i], "%d", (int) ((opcode >> 9)&1) + 1);431 sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1); 449 432 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 450 433 break; … … 459 442 case OP_k9: 460 443 /* FIXME-- this is DP, print the original address? */ 461 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));444 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF)); 462 445 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 463 446 break; … … 467 450 break; 468 451 case OP_031: 469 sprintf (operand[i], "%d", (int) (opcode & 0x1F));452 sprintf (operand[i], "%d", (int) (opcode & 0x1F)); 470 453 info->fprintf_func (info->stream, "%s%s", comma, operand[i]); 471 454 break; … … 485 468 bfd_vma memaddr; 486 469 unsigned short opcode; 487 partemplate *ptm;470 const template *ptm; 488 471 int size; 489 472 { 490 print_instruction (info, memaddr, opcode, 473 print_instruction (info, memaddr, opcode, 491 474 ptm->name, ptm->operand_types, size, 0); 492 475 info->fprintf_func (info->stream, " || "); 493 return print_instruction (info, memaddr, opcode, 476 return print_instruction (info, memaddr, opcode, 494 477 ptm->parname, ptm->paroperand_types, size, 0); 495 478 } … … 497 480 static int 498 481 sprint_dual_address (info, buf, code) 499 disassemble_info *info ;482 disassemble_info *info ATTRIBUTE_UNUSED; 500 483 char buf[]; 501 484 unsigned short code; … … 507 490 "*ar%d+0%%", 508 491 }; 509 return sprintf (buf, formats[XMOD (code)], XARX(code));492 return sprintf (buf, formats[XMOD (code)], XARX (code)); 510 493 } 511 494 512 495 static int 513 496 sprint_indirect_address (info, buf, opcode) 514 disassemble_info *info ;497 disassemble_info *info ATTRIBUTE_UNUSED; 515 498 char buf[]; 516 499 unsigned short opcode; … … 530 513 "*ar%d+0%%", 531 514 }; 532 return sprintf (buf, formats[MOD (opcode)], ARF(opcode));515 return sprintf (buf, formats[MOD (opcode)], ARF (opcode)); 533 516 } 534 517 535 518 static int 536 519 sprint_direct_address (info, buf, opcode) 537 disassemble_info *info ;520 disassemble_info *info ATTRIBUTE_UNUSED; 538 521 char buf[]; 539 522 unsigned short opcode; 540 523 { 541 524 /* FIXME -- look up relocation if available */ 542 return sprintf (buf, " 0x??%02x", (int)(opcode & 0x7F));525 return sprintf (buf, "DP+0x%02x", (int) (opcode & 0x7F)); 543 526 } 544 527 545 528 static int 546 529 sprint_mmr (info, buf, mmr) 547 disassemble_info *info ;530 disassemble_info *info ATTRIBUTE_UNUSED; 548 531 char buf[]; 549 532 int mmr; 550 533 { 551 symbol *reg = (symbol *) mmregs;534 symbol *reg = (symbol *) mmregs; 552 535 while (reg->name != NULL) 553 536 { 554 537 if (mmr == reg->value) 555 538 { 556 sprintf (buf, "%s", (reg +1)->name);539 sprintf (buf, "%s", (reg + 1)->name); 557 540 return 1; 558 541 } … … 565 548 static int 566 549 sprint_cc2 (info, buf, opcode) 567 disassemble_info *info ;550 disassemble_info *info ATTRIBUTE_UNUSED; 568 551 char *buf; 569 552 unsigned short opcode; … … 578 561 static int 579 562 sprint_condition (info, buf, opcode) 580 disassemble_info *info ;563 disassemble_info *info ATTRIBUTE_UNUSED; 581 564 char *buf; 582 565 unsigned short opcode; … … 590 573 char acc = (opcode & 0x8) ? 'b' : 'a'; 591 574 if (opcode & 0x7) 592 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode &0x7)],593 (opcode &0x20) ? ", " : "");575 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)], 576 (opcode & 0x20) ? ", " : ""); 594 577 if (opcode & 0x20) 595 buf += sprintf (buf, "%c%s", acc, (opcode &0x10) ? "ov" : "nov");578 buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov"); 596 579 } 597 580 else if (opcode & 0x3F) 598 581 { 599 582 if (opcode & 0x30) 600 buf += sprintf (buf, "%s%s", 583 buf += sprintf (buf, "%s%s", 601 584 ((opcode & 0x30) == 0x30) ? "tc" : "ntc", 602 585 (opcode & 0x0F) ? ", " : ""); 603 586 if (opcode & 0x0C) 604 buf += sprintf (buf, "%s%s", 587 buf += sprintf (buf, "%s%s", 605 588 ((opcode & 0x0C) == 0x0C) ? "c" : "nc", 606 589 (opcode & 0x03) ? ", " : ""); 607 590 if (opcode & 0x03) 608 buf += sprintf (buf, "%s", 591 buf += sprintf (buf, "%s", 609 592 ((opcode & 0x03) == 0x03) ? "bio" : "nbio"); 610 593 } -
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