Changeset 609 for branches/GNU/src/binutils/opcodes/sparc-dis.c

Timestamp:

Aug 16, 2003, 6:59:22 PM (22 years ago)

Author:

bird

Message:

binutils v2.14 - offical sources.

File:

• branches/GNU/src/binutils/opcodes/sparc-dis.c (modified) (12 diffs, 1 prop)

branches/GNU/src/binutils/opcodes/sparc-dis.c

@@ -1 +1 @@
 /* Print SPARC instructions.
    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000 Free Software Foundation, Inc.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+   2000, 2002, 2003 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #include <stdio.h>
@@ -47 +47 @@
 #define HASH_INSN(INSN) \
   ((((INSN) >> 24) & 0xc0) | (((INSN) & opcode_bits[((INSN) >> 30) & 3]) >> 19))
-struct opcode_hash {
+struct opcode_hash
+{
   struct opcode_hash *next;
   const struct sparc_opcode *opcode;
@@ -189 +190 @@
   for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
     {
-      CONST struct sparc_opcode *opcode = op->opcode;
+      const struct sparc_opcode *opcode = op->opcode;
       if ((opcode->match & insn) == opcode->match
           && (opcode->lose & insn) == 0)
@@ -258 +259 @@
 
   /* On SPARClite variants such as DANlite (sparc86x), instructions
-     are always big-endian even when the machine is in little-endian mode. */
+     are always big-endian even when the machine is in little-endian mode.  */
   if (info->endian == BFD_ENDIAN_BIG || info->mach == bfd_mach_sparc_sparclite)
     getword = bfd_getb32;
@@ -266 +267 @@
   insn = getword (buffer);
 
-  info->insn_info_valid = 1;                    /* We do return this info */
-  info->insn_type = dis_nonbranch;              /* Assume non branch insn */
-  info->branch_delay_insns = 0;                 /* Assume no delay */
-  info->target = 0;                             /* Assume no target known */
+  info->insn_info_valid = 1;                    /* We do return this info.  */
+  info->insn_type = dis_nonbranch;              /* Assume non branch insn.  */
+  info->branch_delay_insns = 0;                 /* Assume no delay.  */
+  info->target = 0;                             /* Assume no target known.  */
 
   for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
     {
-      CONST struct sparc_opcode *opcode = op->opcode;
+      const struct sparc_opcode *opcode = op->opcode;
 
       /* If the insn isn't supported by the current architecture, skip it.  */
@@ -313 +314 @@
 
           {
-            register CONST char *s;
+            register const char *s;
 
             if (opcode->args[0] != ',')
               (*info->fprintf_func) (stream, " ");
+
             for (s = opcode->args; *s != '\0'; ++s)
               {
@@ -323 +325 @@
                     (*info->fprintf_func) (stream, ",");
                     ++s;
-                    switch (*s) {
-                    case 'a':
-                      (*info->fprintf_func) (stream, "a");
-                      is_annulled = 1;
-                      ++s;
-                      continue;
-                    case 'N':
-                      (*info->fprintf_func) (stream, "pn");
-                      ++s;
-                      continue;
-
-                    case 'T':
-                      (*info->fprintf_func) (stream, "pt");
-                      ++s;
-                      continue;
-
-                    default:
-                      break;
-                    }           /* switch on arg */
-                  }             /* while there are comma started args */
+                    switch (*s)
+                      {
+                      case 'a':
+                        (*info->fprintf_func) (stream, "a");
+                        is_annulled = 1;
+                        ++s;
+                        continue;
+                      case 'N':
+                        (*info->fprintf_func) (stream, "pn");
+                        ++s;
+                        continue;
+
+                      case 'T':
+                        (*info->fprintf_func) (stream, "pt");
+                        ++s;
+                        continue;
+
+                      default:
+                        break;
+                      }
+                  }
 
                 (*info->fprintf_func) (stream, " ");
@@ -420 +423 @@
                   case 'h':
                     (*info->fprintf_func) (stream, "%%hi(%#x)",
-                                           (0xFFFFFFFF
+                                           ((unsigned) 0xFFFFFFFF
                                             & ((int) X_IMM22 (insn) << 10)));
                     break;
@@ -683 +686 @@
               int errcode;
 
-              errcode =
-                (*info->read_memory_func)
+              if (memaddr >= 4)
+                errcode =
+                  (*info->read_memory_func)
                   (memaddr - 4, buffer, sizeof (buffer), info);
+              else
+                errcode = 1;
+
               prev_insn = getword (buffer);
 
@@ -692 +699 @@
                   /* If it is a delayed branch, we need to look at the
                      instruction before the delayed branch.  This handles
-                     sequences such as
+                     sequences such as:
 
                      sethi %o1, %hi(_foo), %o1
                      call _printf
-                     or %o1, %lo(_foo), %o1
-                     */
+                     or %o1, %lo(_foo), %o1  */
 
                   if (is_delayed_branch (prev_insn))
                     {
-                      errcode = (*info->read_memory_func)
-                        (memaddr - 8, buffer, sizeof (buffer), info);
+                      if (memaddr >= 8)
+                        errcode = (*info->read_memory_func)
+                          (memaddr - 8, buffer, sizeof (buffer), info);
+                      else
+                        errcode = 1;
+
                       prev_insn = getword (buffer);
                     }
@@ -717 +727 @@
                       (*info->fprintf_func) (stream, "\t! ");
                       info->target = 
-                        (0xFFFFFFFF & (int) X_IMM22 (prev_insn) << 10);
+                        ((unsigned) 0xFFFFFFFF
+                         & ((int) X_IMM22 (prev_insn) << 10));
                       if (imm_added_to_rs1)
                         info->target += X_SIMM (insn, 13);
@@ -746 +757 @@
     }
 
-  info->insn_type = dis_noninsn;        /* Mark as non-valid instruction */
+  info->insn_type = dis_noninsn;        /* Mark as non-valid instruction.  */
   (*info->fprintf_func) (stream, _("unknown"));
   return sizeof (buffer);