Changeset 609 for branches/GNU/src/binutils/opcodes/m32r-dis.c

Timestamp:

Aug 16, 2003, 6:59:22 PM (22 years ago)

Author:

bird

Message:

binutils v2.14 - offical sources.

File:

• branches/GNU/src/binutils/opcodes/m32r-dis.c (modified) (22 diffs, 1 prop)

branches/GNU/src/binutils/opcodes/m32r-dis.c

@@ -5 +5 @@
 - the resultant file is machine generated, cgen-dis.in isn't
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
+Free Software Foundation, Inc.
 
 This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -32 +33 @@
 #include "bfd.h"
 #include "symcat.h"
+#include "libiberty.h"
 #include "m32r-desc.h"
 #include "m32r-opc.h"
@@ -48 +50 @@
      PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
               bfd_vma, int));
-static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma,
-                               disassemble_info *, char *, int));
+static int print_insn
+     PARAMS ((CGEN_CPU_DESC, bfd_vma,  disassemble_info *, char *, unsigned));
 static int default_print_insn
      PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
+static int read_insn
+     PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
+              CGEN_EXTRACT_INFO *, unsigned long *));
 
 
@@ -57 +62 @@
 
 /* -- dis.c */
+static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
+static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
 
 /* Immediate values are prefixed with '#'.  */
 
-#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
-do { \
-  if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
-    (*info->fprintf_func) (info->stream, "#"); \
-} while (0)
+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length)   \
+  do                                                            \
+    {                                                           \
+      if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX))   \
+        (*info->fprintf_func) (info->stream, "#");              \
+    }                                                           \
+  while (0)
 
 /* Handle '#' prefixes as operands.  */
@@ -81 +90 @@
 }
 
-#undef CGEN_PRINT_INSN
+#undef  CGEN_PRINT_INSN
 #define CGEN_PRINT_INSN my_print_insn
 
@@ -135 +144 @@
 
 /* -- */
+
+void m32r_cgen_print_operand
+  PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
+           void const *, bfd_vma, int));
 
 /* Main entry point for printing operands.
@@ -149 +162 @@
    This function could be moved into `print_insn_normal', but keeping it
    separate makes clear the interface between `print_insn_normal' and each of
-   the handlers.
-*/
+   the handlers.  */
 
 void
@@ -355 +367 @@
   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
   disassemble_info *info = (disassemble_info *) dis_info;
-  const unsigned char *syn;
+  const CGEN_SYNTAX_CHAR_TYPE *syn;
 
   CGEN_INIT_PRINT (cd);
@@ -382 +394 @@
    the extract info.
    Returns 0 if all is well, non-zero otherwise.  */
+
 static int
 read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
@@ -403 +416 @@
   ex_info->insn_bytes = buf;
 
-  switch (buflen)
-    {
-    case 1:
-      *insn_value = buf[0];
-      break;
-    case 2:
-      *insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf);
-      break;
-    case 4:
-      *insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf);
-      break;
-    default:
-      abort ();
-    }
-
+  *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
   return 0;
 }
@@ -433 +432 @@
      disassemble_info *info;
      char *buf;
-     int buflen;
-{
-  unsigned long insn_value;
+     unsigned int buflen;
+{
+  CGEN_INSN_INT insn_value;
   const CGEN_INSN_LIST *insn_list;
   CGEN_EXTRACT_INFO ex_info;
-#if 0
-  int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value);
-  if (rc != 0)
-    return rc;
-#else
+  int basesize;
+
+  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
+  basesize = cd->base_insn_bitsize < buflen * 8 ?
+                                     cd->base_insn_bitsize : buflen * 8;
+  insn_value = cgen_get_insn_value (cd, buf, basesize);
+
+
+  /* Fill in ex_info fields like read_insn would.  Don't actually call
+     read_insn, since the incoming buffer is already read (and possibly
+     modified a la m32r).  */
+  ex_info.valid = (1 << buflen) - 1;
   ex_info.dis_info = info;
-  ex_info.valid = (1 << buflen) - 1;
   ex_info.insn_bytes = buf;
 
-  switch (buflen)
-    {
-    case 1:
-      insn_value = buf[0];
-      break;
-    case 2:
-      insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf);
-      break;
-    case 4:
-      insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf);
-      break;
-    default:
-      abort ();
-    }
-#endif
   /* The instructions are stored in hash lists.
      Pick the first one and keep trying until we find the right one.  */
@@ -471 +461 @@
       CGEN_FIELDS fields;
       int length;
+      unsigned long insn_value_cropped;
 
 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 
-      /* not needed as insn shouldn't be in hash lists if not supported */
+      /* Not needed as insn shouldn't be in hash lists if not supported.  */
       /* Supported by this cpu?  */
       if (! m32r_cgen_insn_supported (cd, insn))
@@ -485 +476 @@
       /* ??? May wish to allow target to defer this check until the extract
          handler.  */
-      if ((insn_value & CGEN_INSN_BASE_MASK (insn))
+
+      /* Base size may exceed this instruction's size.  Extract the
+         relevant part from the buffer. */
+      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
+          (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+        insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 
+                                           info->endian == BFD_ENDIAN_BIG);
+      else
+        insn_value_cropped = insn_value;
+
+      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
           == CGEN_INSN_BASE_VALUE (insn))
         {
@@ -494 +495 @@
           /* Make sure the entire insn is loaded into insn_value, if it
              can fit.  */
-          if ((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize &&
+          if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
             {
@@ -508 +509 @@
           else
             length = CGEN_EXTRACT_FN (cd, insn)
-              (cd, insn, &ex_info, insn_value, &fields, pc);
+              (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
+
           /* length < 0 -> error */
           if (length < 0)
@@ -532 +534 @@
 #ifndef CGEN_PRINT_INSN
 #define CGEN_PRINT_INSN default_print_insn
+#endif
 
 static int
@@ -540 +543 @@
 {
   char buf[CGEN_MAX_INSN_SIZE];
+  int buflen;
   int status;
 
-  /* Read the base part of the insn.  */
-
-  status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info);
+  /* Attempt to read the base part of the insn.  */
+  buflen = cd->base_insn_bitsize / 8;
+  status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+  /* Try again with the minimum part, if min < base.  */
+  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
+    {
+      buflen = cd->min_insn_bitsize / 8;
+      status = (*info->read_memory_func) (pc, buf, buflen, info);
+    }
+
   if (status != 0)
     {
@@ -551 +563 @@
     }
 
-  return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8);
-}
-#endif
+  return print_insn (cd, pc, info, buf, buflen);
+}
 
 /* Main entry point.
    Print one instruction from PC on INFO->STREAM.
    Return the size of the instruction (in bytes).  */
+
+typedef struct cpu_desc_list {
+  struct cpu_desc_list *next;
+  int isa;
+  int mach;
+  int endian;
+  CGEN_CPU_DESC cd;
+} cpu_desc_list;
 
 int
@@ -564 +583 @@
      disassemble_info *info;
 {
+  static cpu_desc_list *cd_list = 0;
+  cpu_desc_list *cl = 0;
   static CGEN_CPU_DESC cd = 0;
   static int prev_isa;
@@ -582 +603 @@
   if (arch == bfd_arch_unknown)
     arch = CGEN_BFD_ARCH;
-      
-  /* There's no standard way to compute the isa number (e.g. for arm thumb)
+   
+  /* There's no standard way to compute the machine or isa number
      so we leave it to the target.  */
+#ifdef CGEN_COMPUTE_MACH
+  mach = CGEN_COMPUTE_MACH (info);
+#else
+  mach = info->mach;
+#endif
+
 #ifdef CGEN_COMPUTE_ISA
   isa = CGEN_COMPUTE_ISA (info);
 #else
-  isa = 0;
+  isa = info->insn_sets;
 #endif
 
-  mach = info->mach;
-
-  /* If we've switched cpu's, close the current table and open a new one.  */
+  /* If we've switched cpu's, try to find a handle we've used before */
   if (cd
       && (isa != prev_isa
@@ -599 +624 @@
           || endian != prev_endian))
     {
-      m32r_cgen_cpu_close (cd);
       cd = 0;
-    }
+      for (cl = cd_list; cl; cl = cl->next)
+        {
+          if (cl->isa == isa &&
+              cl->mach == mach &&
+              cl->endian == endian)
+            {
+              cd = cl->cd;
+              break;
+            }
+        }
+    } 
 
   /* If we haven't initialized yet, initialize the opcode table.  */
@@ -622 +656 @@
       if (!cd)
         abort ();
+
+      /* save this away for future reference */
+      cl = xmalloc (sizeof (struct cpu_desc_list));
+      cl->cd = cd;
+      cl->isa = isa;
+      cl->mach = mach;
+      cl->endian = endian;
+      cl->next = cd_list;
+      cd_list = cl;
+
       m32r_cgen_init_dis (cd);
     }