Changeset 609 for branches/GNU/src/binutils/opcodes/cgen-dis.in
- Timestamp:
- Aug 16, 2003, 6:59:22 PM (22 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/GNU/src/binutils/opcodes/cgen-dis.in
-
Property cvs2svn:cvs-rev
changed from
1.1
to1.1.1.2
r608 r609 5 5 - the resultant file is machine generated, cgen-dis.in isn't 6 6 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 8 Free Software Foundation, Inc. 8 9 9 10 This file is part of the GNU Binutils and GDB, the GNU debugger. … … 32 33 #include "bfd.h" 33 34 #include "symcat.h" 35 #include "libiberty.h" 34 36 #include "@prefix@-desc.h" 35 37 #include "@prefix@-opc.h" … … 48 50 PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, 49 51 bfd_vma, int)); 50 static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma,51 disassemble_info *, char *, int));52 static int print_insn 53 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned)); 52 54 static int default_print_insn 53 55 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); 56 static int read_insn 57 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, 58 CGEN_EXTRACT_INFO *, unsigned long *)); 54 59 55 60 … … 61 66 static void 62 67 print_normal (cd, dis_info, value, attrs, pc, length) 63 #ifdef CGEN_PRINT_NORMAL64 CGEN_CPU_DESC cd;65 #else66 68 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 67 #endif68 69 PTR dis_info; 69 70 long value; 70 71 unsigned int attrs; 71 #ifdef CGEN_PRINT_NORMAL72 bfd_vma pc;73 int length;74 #else75 72 bfd_vma pc ATTRIBUTE_UNUSED; 76 73 int length ATTRIBUTE_UNUSED; 77 #endif78 74 { 79 75 disassemble_info *info = (disassemble_info *) dis_info; … … 96 92 static void 97 93 print_address (cd, dis_info, value, attrs, pc, length) 98 #ifdef CGEN_PRINT_NORMAL99 CGEN_CPU_DESC cd;100 #else101 94 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 102 #endif103 95 PTR dis_info; 104 96 bfd_vma value; 105 97 unsigned int attrs; 106 #ifdef CGEN_PRINT_NORMAL107 bfd_vma pc;108 int length;109 #else110 98 bfd_vma pc ATTRIBUTE_UNUSED; 111 99 int length ATTRIBUTE_UNUSED; 112 #endif113 100 { 114 101 disassemble_info *info = (disassemble_info *) dis_info; … … 195 182 the extract info. 196 183 Returns 0 if all is well, non-zero otherwise. */ 184 197 185 static int 198 186 read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) 199 CGEN_CPU_DESC cd ;187 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 200 188 bfd_vma pc; 201 189 disassemble_info *info; … … 232 220 disassemble_info *info; 233 221 char *buf; 234 int buflen;235 { 236 unsigned longinsn_value;222 unsigned int buflen; 223 { 224 CGEN_INSN_INT insn_value; 237 225 const CGEN_INSN_LIST *insn_list; 238 226 CGEN_EXTRACT_INFO ex_info; 239 240 int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); 241 if (rc != 0) 242 return rc; 227 int basesize; 228 229 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ 230 basesize = cd->base_insn_bitsize < buflen * 8 ? 231 cd->base_insn_bitsize : buflen * 8; 232 insn_value = cgen_get_insn_value (cd, buf, basesize); 233 234 235 /* Fill in ex_info fields like read_insn would. Don't actually call 236 read_insn, since the incoming buffer is already read (and possibly 237 modified a la m32r). */ 238 ex_info.valid = (1 << buflen) - 1; 239 ex_info.dis_info = info; 240 ex_info.insn_bytes = buf; 243 241 244 242 /* The instructions are stored in hash lists. … … 251 249 CGEN_FIELDS fields; 252 250 int length; 251 unsigned long insn_value_cropped; 253 252 254 253 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 255 /* not needed as insn shouldn't be in hash lists if not supported*/254 /* Not needed as insn shouldn't be in hash lists if not supported. */ 256 255 /* Supported by this cpu? */ 257 256 if (! @arch@_cgen_insn_supported (cd, insn)) … … 265 264 /* ??? May wish to allow target to defer this check until the extract 266 265 handler. */ 267 if ((insn_value & CGEN_INSN_BASE_MASK (insn)) 266 267 /* Base size may exceed this instruction's size. Extract the 268 relevant part from the buffer. */ 269 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && 270 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 271 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 272 info->endian == BFD_ENDIAN_BIG); 273 else 274 insn_value_cropped = insn_value; 275 276 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) 268 277 == CGEN_INSN_BASE_VALUE (insn)) 269 278 { … … 274 283 /* Make sure the entire insn is loaded into insn_value, if it 275 284 can fit. */ 276 if ( CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize&&277 ( CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))285 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && 286 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 278 287 { 279 288 unsigned long full_insn_value; … … 288 297 else 289 298 length = CGEN_EXTRACT_FN (cd, insn) 290 (cd, insn, &ex_info, insn_value , &fields, pc);299 (cd, insn, &ex_info, insn_value_cropped, &fields, pc); 291 300 292 301 /* length < 0 -> error */ … … 322 331 { 323 332 char buf[CGEN_MAX_INSN_SIZE]; 333 int buflen; 324 334 int status; 325 335 326 /* Read the base part of the insn. */ 327 328 status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); 336 /* Attempt to read the base part of the insn. */ 337 buflen = cd->base_insn_bitsize / 8; 338 status = (*info->read_memory_func) (pc, buf, buflen, info); 339 340 /* Try again with the minimum part, if min < base. */ 341 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) 342 { 343 buflen = cd->min_insn_bitsize / 8; 344 status = (*info->read_memory_func) (pc, buf, buflen, info); 345 } 346 329 347 if (status != 0) 330 348 { … … 333 351 } 334 352 335 return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8);353 return print_insn (cd, pc, info, buf, buflen); 336 354 } 337 355 … … 339 357 Print one instruction from PC on INFO->STREAM. 340 358 Return the size of the instruction (in bytes). */ 359 360 typedef struct cpu_desc_list { 361 struct cpu_desc_list *next; 362 int isa; 363 int mach; 364 int endian; 365 CGEN_CPU_DESC cd; 366 } cpu_desc_list; 341 367 342 368 int … … 345 371 disassemble_info *info; 346 372 { 373 static cpu_desc_list *cd_list = 0; 374 cpu_desc_list *cl = 0; 347 375 static CGEN_CPU_DESC cd = 0; 348 376 static int prev_isa; … … 363 391 if (arch == bfd_arch_unknown) 364 392 arch = CGEN_BFD_ARCH; 365 366 /* There's no standard way to compute the isa number (e.g. for arm thumb)393 394 /* There's no standard way to compute the machine or isa number 367 395 so we leave it to the target. */ 396 #ifdef CGEN_COMPUTE_MACH 397 mach = CGEN_COMPUTE_MACH (info); 398 #else 399 mach = info->mach; 400 #endif 401 368 402 #ifdef CGEN_COMPUTE_ISA 369 403 isa = CGEN_COMPUTE_ISA (info); 370 404 #else 371 isa = 0; 372 #endif 373 374 mach = info->mach; 375 376 /* If we've switched cpu's, close the current table and open a new one. */ 405 isa = info->insn_sets; 406 #endif 407 408 /* If we've switched cpu's, try to find a handle we've used before */ 377 409 if (cd 378 410 && (isa != prev_isa … … 380 412 || endian != prev_endian)) 381 413 { 382 @arch@_cgen_cpu_close (cd);383 414 cd = 0; 384 } 415 for (cl = cd_list; cl; cl = cl->next) 416 { 417 if (cl->isa == isa && 418 cl->mach == mach && 419 cl->endian == endian) 420 { 421 cd = cl->cd; 422 break; 423 } 424 } 425 } 385 426 386 427 /* If we haven't initialized yet, initialize the opcode table. */ … … 403 444 if (!cd) 404 445 abort (); 446 447 /* save this away for future reference */ 448 cl = xmalloc (sizeof (struct cpu_desc_list)); 449 cl->cd = cd; 450 cl->isa = isa; 451 cl->mach = mach; 452 cl->endian = endian; 453 cl->next = cd_list; 454 cd_list = cl; 455 405 456 @arch@_cgen_init_dis (cd); 406 457 } -
Property cvs2svn:cvs-rev
changed from
Note:
See TracChangeset
for help on using the changeset viewer.