Changeset 80 for trunk/src/os2ahci/os2ahci.h

Timestamp:

Mar 1, 2011, 10:10:11 AM (14 years ago)

Author:

chris

Message:

Version 1.06
============

• Finally came across a BIOS which accesses the ICH7/8 controller via SATA registers (i.e. not AHCI mode). This required a few changes to the code at boot time because it turned out that COMRESETs are required whenever switching to/from AHCI mode to allow the AHCI or SATA controller to re-discover the attached devices:

• 'init_reset' will now be forced on when finding a controller in non-AHCI mode at boot time.
• A COMRESET is initiated for each implemented port after turning off AHCI mode when restoring the BIOS configuration; this is done only for Intel controllers at this point because they map the AHCI port SCR MMIO registers even when not in AHCI mode.
• apm_suspend() has been adjusted to restore the BIOS configuration to prevent needless timeouts when the BIOS takes over during suspend or power-off operations.
• Small changes to the functions which save/restore BIOS/port settings to avoid pitfalls; among others, the port save/restore code now also saves and restores the port's engine status.

• Improvements to debug logging around port resets.

• Moved code to clear pending interrupts from ahci_reset_port() to ahci_stop_port() because both need it and resetting a port involves stopping it, first.

• NCQ mode has found to cause problems on a Dell D630. This may be related to the hard disk used for the test but since I've never seen more than one queued command regardless of the I/O load (even during simulaneous xcopy operations), NCQ mode is now off by default and needs to be turned on via the /N switch (i.e. the the /N switch now has a reversed meaning).

• Removed the code which attempts to establish another MMIO base address in case the one assigned by the BIOS can't be reserved via resource manager; if there's a conflict, it's extremely unlikely we would ever be able to restore the BIOS MMIO address at boot time without the BIOS clashing with whatever conflicts with the MMIO address, thus there's no point trying to do any of this.

• Implemented a reset context hook watchdog; in the early boot phase, some components apparently don't yield the CPU so the context hook will never execute without the watchdog. Now we'll give the context hook 10 seconds to execute, otherwise the watchdog will expire and we'll call the context hook directly from the corresponding timer callback.

File:

• trunk/src/os2ahci/os2ahci.h (modified) (3 diffs)

trunk/src/os2ahci/os2ahci.h

@@ -383 +383 @@
 extern void    unlock_adapter         (AD_INFO *ai);
 extern void _cdecl _far timeout_callback    (ULONG timer_handle, ULONG p1, ULONG p2);
+extern void _cdecl _far reset_watchdog      (ULONG timer_handle, ULONG p1, ULONG p2);
 
 /* ahci.c */
@@ -499 +500 @@
 /* port reset context hook and input data */
 extern ULONG         reset_ctxhook_h;
+extern ULONG         th_reset_watchdog;
 extern volatile u32  ports_to_reset[MAX_AD];
 extern IORB_QUEUE    abort_queue;
@@ -507 +509 @@
 /* apapter/port-specific options saved when parsing the command line */
 extern u8            emulate_scsi[MAX_AD][AHCI_MAX_PORTS];
-extern u8            disable_ncq[MAX_AD][AHCI_MAX_PORTS];
+extern u8            enable_ncq[MAX_AD][AHCI_MAX_PORTS];
 extern u8            link_speed[MAX_AD][AHCI_MAX_PORTS];
 extern u8            link_power[MAX_AD][AHCI_MAX_PORTS];