Ignore:
Timestamp:
Jul 24, 2023, 5:51:46 PM (2 years ago)
Author:
David Azarewicz
Message:

Added workaround to help with VirtualBox issues.
Improved diagnostic messages.
Changed how timeouts are reset and how ctx hooks are triggered.
Added quirk for devices with issues executing some standard commands.
Changed to make /N the default.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/os2ahci/pci.c

    r209 r211  
    44 * Copyright (c) 2011 thi.guten Software Development
    55 * Copyright (c) 2011 Mensys B.V.
    6  * Copyright (c) 2013-2021 David Azarewicz <david@88watts.net>
     6 * Copyright (c) 2013-2023 David Azarewicz <david@88watts.net>
    77 *
    88 * Authors: Christian Mueller, Markus Thielen
    … …  
    2727
    2828#include "os2ahci.h"
     29#include "pci_regs.h"
    2930
    3031/* offset of PCI base address register (BAR) in the PCI config space */
    … …  
    3637
    3738/******************************************************************************
    38  * chipset/controller name strings
    39  */
    40 static char chip_esb2[]    = "ESB2";
    41 static char chip_ich8[]    = "ICH8";
    42 static char chip_ich8m[]   = "ICH8M";
    43 static char chip_ich9[]    = "ICH9";
    44 static char chip_ich9m[]   = "ICH9M";
    45 static char chip_ich10[]   = "ICH10";
    46 static char chip_pchahci[] = "PCH AHCI";
    47 static char chip_pchraid[] = "PCH RAID";
    48 static char chip_tolapai[] = "Tolapai";
    49 static char chip_sb600[]   = "SB600";
    50 static char chip_sb700[]   = "SB700/800";
    51 static char chip_vt8251[]  = "VT8251";
    52 static char chip_mcp65[]   = "MCP65";
    53 static char chip_mcp67[]   = "MCP67";
    54 static char chip_mcp73[]   = "MCP73";
    55 static char chip_mcp77[]   = "MCP77";
    56 static char chip_mcp79[]   = "MCP79";
    57 static char chip_mcp89[]   = "MCP689";
    58 static char chip_sis968[]  = "968";
    59 
    60 static char s_generic[]    = "Generic";
    61 
    62 
    63 /******************************************************************************
    6439 * PCI vendor and device IDs for known AHCI adapters. Copied from the Linux
    6540 * AHCI driver.
    … …  
    6944{
    7045  /* Intel
    71    * NOTE: ICH5 controller does NOT support AHCI, so we do
    72    *       not add it here! */
    73   { PCI_VDEVICE(INTEL, 0x2652), board_ahci,            "ICH6"       }, /* ICH6 */
    74   { PCI_VDEVICE(INTEL, 0x2653), board_ahci,            "ICH6M"      }, /* ICH6M */
    75   { PCI_VDEVICE(INTEL, 0x27c1), board_ahci,            "ICH7"       }, /* ICH7 */
    76   { PCI_VDEVICE(INTEL, 0x27c5), board_ahci,            "ICH7M"      }, /* ICH7M */
    77   { PCI_VDEVICE(INTEL, 0x27c3), board_ahci,            "ICH7R"      }, /* ICH7R */
    78   { PCI_VDEVICE(AL,    0x5288), board_ahci_ign_iferr,  "ULiM5288"   }, /* ULi M5288 */
    79   { PCI_VDEVICE(INTEL, 0x2681), board_ahci,            chip_esb2    }, /* ESB2 */
    80   { PCI_VDEVICE(INTEL, 0x2682), board_ahci,            chip_esb2    }, /* ESB2 */
    81   { PCI_VDEVICE(INTEL, 0x2683), board_ahci,            chip_esb2    }, /* ESB2 */
    82   { PCI_VDEVICE(INTEL, 0x27c6), board_ahci,            "ICH7MDH"    }, /* ICH7-M DH */
    83   { PCI_VDEVICE(INTEL, 0x2821), board_ahci,            chip_ich8    }, /* ICH8 */
    84   { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf,     chip_ich8    }, /* ICH8 */
    85   { PCI_VDEVICE(INTEL, 0x2824), board_ahci,            chip_ich8    }, /* ICH8 */
    86   { PCI_VDEVICE(INTEL, 0x2829), board_ahci,            chip_ich8m   }, /* ICH8M */
    87   { PCI_VDEVICE(INTEL, 0x282a), board_ahci,            chip_ich8m   }, /* ICH8M */
    88   { PCI_VDEVICE(INTEL, 0x2922), board_ahci,            chip_ich9    }, /* ICH9 */
    89   { PCI_VDEVICE(INTEL, 0x2923), board_ahci,            chip_ich9    }, /* ICH9 */
    90   { PCI_VDEVICE(INTEL, 0x2924), board_ahci,            chip_ich9    }, /* ICH9 */
    91   { PCI_VDEVICE(INTEL, 0x2925), board_ahci,            chip_ich9    }, /* ICH9 */
    92   { PCI_VDEVICE(INTEL, 0x2927), board_ahci,            chip_ich9    }, /* ICH9 */
    93   { PCI_VDEVICE(INTEL, 0x2929), board_ahci,            chip_ich9m   }, /* ICH9M */
    94   { PCI_VDEVICE(INTEL, 0x292a), board_ahci,            chip_ich9m   }, /* ICH9M */
    95   { PCI_VDEVICE(INTEL, 0x292b), board_ahci,            chip_ich9m   }, /* ICH9M */
    96   { PCI_VDEVICE(INTEL, 0x292c), board_ahci,            chip_ich9m   }, /* ICH9M */
    97   { PCI_VDEVICE(INTEL, 0x292f), board_ahci,            chip_ich9m   }, /* ICH9M */
    98   { PCI_VDEVICE(INTEL, 0x294d), board_ahci,            chip_ich9    }, /* ICH9 */
    99   { PCI_VDEVICE(INTEL, 0x294e), board_ahci,            chip_ich9m   }, /* ICH9M */
    100   { PCI_VDEVICE(INTEL, 0x502a), board_ahci,            chip_tolapai }, /* Tolapai */
    101   { PCI_VDEVICE(INTEL, 0x502b), board_ahci,            chip_tolapai }, /* Tolapai */
    102   { PCI_VDEVICE(INTEL, 0x3a05), board_ahci,            chip_ich10   }, /* ICH10 */
    103   { PCI_VDEVICE(INTEL, 0x3a22), board_ahci,            chip_ich10   }, /* ICH10 */
    104   { PCI_VDEVICE(INTEL, 0x3a25), board_ahci,            chip_ich10   }, /* ICH10 */
    105   { PCI_VDEVICE(INTEL, 0x3b22), board_ahci,            chip_pchahci }, /* PCH AHCI */
    106   { PCI_VDEVICE(INTEL, 0x3b23), board_ahci,            chip_pchahci }, /* PCH AHCI */
    107   { PCI_VDEVICE(INTEL, 0x3b24), board_ahci,            chip_pchraid }, /* PCH RAID */
    108   { PCI_VDEVICE(INTEL, 0x3b25), board_ahci,            chip_pchraid }, /* PCH RAID */
    109   { PCI_VDEVICE(INTEL, 0x3b29), board_ahci,            chip_pchahci }, /* PCH AHCI */
    110   { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci,            chip_pchraid }, /* PCH RAID */
    111   { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci,            chip_pchraid }, /* PCH RAID */
    112   { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci,            chip_pchahci }, /* PCH AHCI */
     46   * NOTE: ICH5 controller does NOT support AHCI, so we do not add it here! */
     47  { PCI_VDEVICE(INTEL, 0x2652), "ICH6" , 0 }, /* ICH6 */
     48  { PCI_VDEVICE(INTEL, 0x2653), "ICH6M", 0 }, /* ICH6M */
     49  { PCI_VDEVICE(INTEL, 0x27c1), "ICH7" , 0 }, /* ICH7 */
     50  { PCI_VDEVICE(INTEL, 0x27c5), "ICH7M", 0 }, /* ICH7M */
     51  { PCI_VDEVICE(INTEL, 0x27c3), "ICH7R", 0 }, /* ICH7R */
     52  { PCI_VDEVICE(AL,    0x5288), "ULiM5288", AHCI_HFLAG_IGN_IRQ_IF_ERR }, /* ULi M5288 */
     53  { PCI_VDEVICE(INTEL, 0x2681), "ESB2"   , 0 }, /* ESB2 */
     54  { PCI_VDEVICE(INTEL, 0x2682), "ESB2"   , 0 }, /* ESB2 */
     55  { PCI_VDEVICE(INTEL, 0x2683), "ESB2"   , 0 }, /* ESB2 */
     56  { PCI_VDEVICE(INTEL, 0x27c6), "ICH7MDH", 0 }, /* ICH7-M DH */
     57  { PCI_VDEVICE(INTEL, 0x2821), "ICH8"   , 0 }, /* ICH8 */
     58  { PCI_VDEVICE(INTEL, 0x2822), "ICH8", AHCI_HFLAG_NO_SNTF }, /* ICH8 */
     59  { PCI_VDEVICE(INTEL, 0x2824), "ICH8"    , 0 }, /* ICH8 */
     60  { PCI_VDEVICE(INTEL, 0x2829), "ICH8M"   , 0 }, /* ICH8M */
     61  { PCI_VDEVICE(INTEL, 0x282a), "ICH8M"   , 0 }, /* ICH8M */
     62  { PCI_VDEVICE(INTEL, 0x2922), "ICH9"    , 0 }, /* ICH9 */
     63  { PCI_VDEVICE(INTEL, 0x2923), "ICH9"    , 0 }, /* ICH9 */
     64  { PCI_VDEVICE(INTEL, 0x2924), "ICH9"    , 0 }, /* ICH9 */
     65  { PCI_VDEVICE(INTEL, 0x2925), "ICH9"    , 0 }, /* ICH9 */
     66  { PCI_VDEVICE(INTEL, 0x2927), "ICH9"    , 0 }, /* ICH9 */
     67  { PCI_VDEVICE(INTEL, 0x2929), "ICH9M"   , 0 }, /* ICH9M */
     68  { PCI_VDEVICE(INTEL, 0x292a), "ICH9M"   , 0 }, /* ICH9M */
     69  { PCI_VDEVICE(INTEL, 0x292b), "ICH9M"   , 0 }, /* ICH9M */
     70  { PCI_VDEVICE(INTEL, 0x292c), "ICH9M"   , 0 }, /* ICH9M */
     71  { PCI_VDEVICE(INTEL, 0x292f), "ICH9M"   , 0 }, /* ICH9M */
     72  { PCI_VDEVICE(INTEL, 0x294d), "ICH9"    , 0 }, /* ICH9 */
     73  { PCI_VDEVICE(INTEL, 0x294e), "ICH9M"   , 0 }, /* ICH9M */
     74  { PCI_VDEVICE(INTEL, 0x502a), "Tolapai" , 0 }, /* Tolapai */
     75  { PCI_VDEVICE(INTEL, 0x502b), "Tolapai" , 0 }, /* Tolapai */
     76  { PCI_VDEVICE(INTEL, 0x3a05), "ICH10"   , 0 }, /* ICH10 */
     77  { PCI_VDEVICE(INTEL, 0x3a22), "ICH10"   , 0 }, /* ICH10 */
     78  { PCI_VDEVICE(INTEL, 0x3a25), "ICH10"   , 0 }, /* ICH10 */
     79  { PCI_VDEVICE(INTEL, 0x3b22), "PCH AHCI", 0 }, /* PCH AHCI */
     80  { PCI_VDEVICE(INTEL, 0x3b23), "PCH AHCI", 0 }, /* PCH AHCI */
     81  { PCI_VDEVICE(INTEL, 0x3b24), "PCH RAID", 0 }, /* PCH RAID */
     82  { PCI_VDEVICE(INTEL, 0x3b25), "PCH RAID", 0 }, /* PCH RAID */
     83  { PCI_VDEVICE(INTEL, 0x3b29), "PCH AHCI", 0 }, /* PCH AHCI */
     84  { PCI_VDEVICE(INTEL, 0x3b2b), "PCH RAID", 0 }, /* PCH RAID */
     85  { PCI_VDEVICE(INTEL, 0x3b2c), "PCH RAID", 0 }, /* PCH RAID */
     86  { PCI_VDEVICE(INTEL, 0x3b2f), "PCH AHCI", 0 }, /* PCH AHCI */
    11387
    11488  /* JMicron 360/1/3/5/6, match class to avoid IDE function */
    11589  { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
    116     PCI_CLASS_STORAGE_SATA_AHCI, 0xffffffL, board_ahci_ign_iferr, "360" },
     90    PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, "360", AHCI_HFLAG_IGN_IRQ_IF_ERR },
    11791
    11892  /* ATI */
    119   { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600,        chip_sb600  }, /* ATI SB600 */
    120   { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb700,        chip_sb700  }, /* ATI SB700/800 */
    121   { PCI_VDEVICE(ATI, 0x4391), board_ahci_sb700,        chip_sb700  }, /* ATI SB700/800 */
    122   { PCI_VDEVICE(ATI, 0x4392), board_ahci_sb700,        chip_sb700  }, /* ATI SB700/800 */
    123   { PCI_VDEVICE(ATI, 0x4393), board_ahci_sb700,        chip_sb700  }, /* ATI SB700/800 */
    124   { PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700,        chip_sb700  }, /* ATI SB700/800 */
    125   { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700,        chip_sb700  }, /* ATI SB700/800 */
     93  { PCI_VDEVICE(ATI, 0x4380), "SB600", AHCI_HFLAG_IGN_SERR_INTERNAL | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 | AHCI_HFLAG_32BIT_ONLY }, /* ATI SB600 */
     94  { PCI_VDEVICE(ATI, 0x4390), "SB700/800", AHCI_HFLAG_IGN_SERR_INTERNAL }, /* ATI SB700/800 */
     95  { PCI_VDEVICE(ATI, 0x4391), "SB700/800", AHCI_HFLAG_IGN_SERR_INTERNAL }, /* ATI SB700/800 */
     96  { PCI_VDEVICE(ATI, 0x4392), "SB700/800", AHCI_HFLAG_IGN_SERR_INTERNAL }, /* ATI SB700/800 */
     97  { PCI_VDEVICE(ATI, 0x4393), "SB700/800", AHCI_HFLAG_IGN_SERR_INTERNAL }, /* ATI SB700/800 */
     98  { PCI_VDEVICE(ATI, 0x4394), "SB700/800", AHCI_HFLAG_IGN_SERR_INTERNAL }, /* ATI SB700/800 */
     99  { PCI_VDEVICE(ATI, 0x4395), "SB700/800", AHCI_HFLAG_IGN_SERR_INTERNAL }, /* ATI SB700/800 */
    126100
    127101  /* AMD */
    128   { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
     102  { PCI_VDEVICE(AMD, 0x7800), "Hudson-2", 0 }, /* AMD Hudson-2 */
    129103  /* AMD is using RAID class only for ahci controllers */
    130104  { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
    131     PCI_CLASS_STORAGE_RAID << 8, 0xffffffL, board_ahci, "Hudson2" },
     105    PCI_CLASS_STORAGE_RAID << 8, 0xffffff, "Hudson2", 0 },
    132106
    133107  /* VIA */
    134   { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251,       chip_vt8251 }, /* VIA VT8251 */
    135   { PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251,       chip_vt8251 }, /* VIA VT8251 */
     108  { PCI_VDEVICE(VIA, 0x3349), "VT8251", AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP }, /* VIA VT8251 */
     109  { PCI_VDEVICE(VIA, 0x6287), "VT8251", AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP }, /* VIA VT8251 */
    136110
    137111  /* NVIDIA */
    138   { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    139   { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    140   { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    141   { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    142   { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    143   { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    144   { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    145   { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
    146   { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    147   { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    148   { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    149   { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    150   { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    151   { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    152   { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    153   { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    154   { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    155   { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    156   { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    157   { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq,    chip_mcp67  }, /* MCP67 */
    158   { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq,    chip_mcp67  }, /* Linux ID */
    159   { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    160   { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    161   { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    162   { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    163   { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    164   { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    165   { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    166   { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    167   { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    168   { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    169   { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    170   { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_yesncq,    chip_mcp73  }, /* MCP73 */
    171   { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci,           chip_mcp77  }, /* MCP77 */
    172   { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci,           chip_mcp77  }, /* MCP77 */
    173   { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci,           chip_mcp77  }, /* MCP77 */
    174   { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci,           chip_mcp77  }, /* MCP77 */
    175   { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci,           chip_mcp77  }, /* MCP77 */
    176   { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci,           chip_mcp77  }, /* MCP77 */
    177   { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci,           chip_mcp77  }, /* MCP77 */
    178   { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci,           chip_mcp77  }, /* MCP77 */
    179   { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci,           chip_mcp77  }, /* MCP77 */
    180   { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci,           chip_mcp77  }, /* MCP77 */
    181   { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci,           chip_mcp77  }, /* MCP77 */
    182   { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci,           chip_mcp77  }, /* MCP77 */
    183   { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci,           chip_mcp79  }, /* MCP79 */
    184   { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci,           chip_mcp79  }, /* MCP79 */
    185   { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci,           chip_mcp79  }, /* MCP79 */
    186   { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci,           chip_mcp79  }, /* MCP79 */
    187   { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci,           chip_mcp79  }, /* MCP79 */
    188   { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci,           chip_mcp79  }, /* MCP79 */
    189   { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci,           chip_mcp79  }, /* MCP79 */
    190   { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci,           chip_mcp79  }, /* MCP79 */
    191   { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci,           chip_mcp79  }, /* MCP79 */
    192   { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci,           chip_mcp79  }, /* MCP79 */
    193   { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci,           chip_mcp79  }, /* MCP79 */
    194   { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci,           chip_mcp79  }, /* MCP79 */
    195   { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci,           chip_mcp89  }, /* MCP89 */
    196   { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci,           chip_mcp89  }, /* MCP89 */
    197   { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci,           chip_mcp89  }, /* MCP89 */
    198   { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci,           chip_mcp89  }, /* MCP89 */
    199   { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci,           chip_mcp89  }, /* MCP89 */
    200   { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci,           chip_mcp89  }, /* MCP89 */
    201   { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci,           chip_mcp89  }, /* MCP89 */
    202   { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci,           chip_mcp89  }, /* MCP89 */
    203   { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci,           chip_mcp89  }, /* MCP89 */
    204   { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci,           chip_mcp89  }, /* MCP89 */
    205   { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci,           chip_mcp89  }, /* MCP89 */
    206   { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci,           chip_mcp89  }, /* MCP89 */
     112  { PCI_VDEVICE(NVIDIA, 0x044c), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     113  { PCI_VDEVICE(NVIDIA, 0x044d), "MCB65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     114  { PCI_VDEVICE(NVIDIA, 0x044e), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     115  { PCI_VDEVICE(NVIDIA, 0x044f), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     116  { PCI_VDEVICE(NVIDIA, 0x045c), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     117  { PCI_VDEVICE(NVIDIA, 0x045d), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     118  { PCI_VDEVICE(NVIDIA, 0x045e), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     119  { PCI_VDEVICE(NVIDIA, 0x045f), "MCP65", AHCI_HFLAG_YES_NCQ  }, /* MCP65 */
     120  { PCI_VDEVICE(NVIDIA, 0x0550), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     121  { PCI_VDEVICE(NVIDIA, 0x0551), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     122  { PCI_VDEVICE(NVIDIA, 0x0552), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     123  { PCI_VDEVICE(NVIDIA, 0x0553), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     124  { PCI_VDEVICE(NVIDIA, 0x0554), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     125  { PCI_VDEVICE(NVIDIA, 0x0555), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     126  { PCI_VDEVICE(NVIDIA, 0x0556), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     127  { PCI_VDEVICE(NVIDIA, 0x0557), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     128  { PCI_VDEVICE(NVIDIA, 0x0558), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     129  { PCI_VDEVICE(NVIDIA, 0x0559), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     130  { PCI_VDEVICE(NVIDIA, 0x055a), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     131  { PCI_VDEVICE(NVIDIA, 0x055b), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* MCP67 */
     132  { PCI_VDEVICE(NVIDIA, 0x0580), "MCP67" , AHCI_HFLAG_YES_NCQ }, /* Linux ID */
     133  { PCI_VDEVICE(NVIDIA, 0x07f0), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     134  { PCI_VDEVICE(NVIDIA, 0x07f1), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     135  { PCI_VDEVICE(NVIDIA, 0x07f2), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     136  { PCI_VDEVICE(NVIDIA, 0x07f3), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     137  { PCI_VDEVICE(NVIDIA, 0x07f4), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     138  { PCI_VDEVICE(NVIDIA, 0x07f5), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     139  { PCI_VDEVICE(NVIDIA, 0x07f6), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     140  { PCI_VDEVICE(NVIDIA, 0x07f7), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     141  { PCI_VDEVICE(NVIDIA, 0x07f8), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     142  { PCI_VDEVICE(NVIDIA, 0x07f9), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     143  { PCI_VDEVICE(NVIDIA, 0x07fa), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     144  { PCI_VDEVICE(NVIDIA, 0x07fb), "MCP73" , AHCI_HFLAG_YES_NCQ }, /* MCP73 */
     145  { PCI_VDEVICE(NVIDIA, 0x0ad0), "MCP77", 0 }, /* MCP77 */
     146  { PCI_VDEVICE(NVIDIA, 0x0ad1), "MCP77", 0 }, /* MCP77 */
     147  { PCI_VDEVICE(NVIDIA, 0x0ad2), "MCP77", 0 }, /* MCP77 */
     148  { PCI_VDEVICE(NVIDIA, 0x0ad3), "MCP77", 0 }, /* MCP77 */
     149  { PCI_VDEVICE(NVIDIA, 0x0ad4), "MCP77", 0 }, /* MCP77 */
     150  { PCI_VDEVICE(NVIDIA, 0x0ad5), "MCP77", 0 }, /* MCP77 */
     151  { PCI_VDEVICE(NVIDIA, 0x0ad6), "MCP77", 0 }, /* MCP77 */
     152  { PCI_VDEVICE(NVIDIA, 0x0ad7), "MCP77", 0 }, /* MCP77 */
     153  { PCI_VDEVICE(NVIDIA, 0x0ad8), "MCP77", 0 }, /* MCP77 */
     154  { PCI_VDEVICE(NVIDIA, 0x0ad9), "MCP77", 0 }, /* MCP77 */
     155  { PCI_VDEVICE(NVIDIA, 0x0ada), "MCP77", 0 }, /* MCP77 */
     156  { PCI_VDEVICE(NVIDIA, 0x0adb), "MCP77", 0 }, /* MCP77 */
     157  { PCI_VDEVICE(NVIDIA, 0x0ab4), "MCP79", 0 }, /* MCP79 */
     158  { PCI_VDEVICE(NVIDIA, 0x0ab5), "MCP79", 0 }, /* MCP79 */
     159  { PCI_VDEVICE(NVIDIA, 0x0ab6), "MCP79", 0 }, /* MCP79 */
     160  { PCI_VDEVICE(NVIDIA, 0x0ab7), "MCP79", 0 }, /* MCP79 */
     161  { PCI_VDEVICE(NVIDIA, 0x0ab8), "MCP79", 0 }, /* MCP79 */
     162  { PCI_VDEVICE(NVIDIA, 0x0ab9), "MCP79", 0 }, /* MCP79 */
     163  { PCI_VDEVICE(NVIDIA, 0x0aba), "MCP79", 0 }, /* MCP79 */
     164  { PCI_VDEVICE(NVIDIA, 0x0abb), "MCP79", 0 }, /* MCP79 */
     165  { PCI_VDEVICE(NVIDIA, 0x0abc), "MCP79", 0 }, /* MCP79 */
     166  { PCI_VDEVICE(NVIDIA, 0x0abd), "MCP79", 0 }, /* MCP79 */
     167  { PCI_VDEVICE(NVIDIA, 0x0abe), "MCP79", 0 }, /* MCP79 */
     168  { PCI_VDEVICE(NVIDIA, 0x0abf), "MCP79", 0 }, /* MCP79 */
     169  { PCI_VDEVICE(NVIDIA, 0x0d84), "MCP89", 0 }, /* MCP89 */
     170  { PCI_VDEVICE(NVIDIA, 0x0d85), "MCP89", 0 }, /* MCP89 */
     171  { PCI_VDEVICE(NVIDIA, 0x0d86), "MCP89", 0 }, /* MCP89 */
     172  { PCI_VDEVICE(NVIDIA, 0x0d87), "MCP89", 0 }, /* MCP89 */
     173  { PCI_VDEVICE(NVIDIA, 0x0d88), "MCP89", 0 }, /* MCP89 */
     174  { PCI_VDEVICE(NVIDIA, 0x0d89), "MCP89", 0 }, /* MCP89 */
     175  { PCI_VDEVICE(NVIDIA, 0x0d8a), "MCP89", 0 }, /* MCP89 */
     176  { PCI_VDEVICE(NVIDIA, 0x0d8b), "MCP89", 0 }, /* MCP89 */
     177  { PCI_VDEVICE(NVIDIA, 0x0d8c), "MCP89", 0 }, /* MCP89 */
     178  { PCI_VDEVICE(NVIDIA, 0x0d8d), "MCP89", 0 }, /* MCP89 */
     179  { PCI_VDEVICE(NVIDIA, 0x0d8e), "MCP89", 0 }, /* MCP89 */
     180  { PCI_VDEVICE(NVIDIA, 0x0d8f), "MCP89", 0 }, /* MCP89 */
    207181
    208182  /* SiS */
    209   { PCI_VDEVICE(SI, 0x1184), board_ahci,               "966"        }, /* SiS 966 */
    210   { PCI_VDEVICE(SI, 0x1185), board_ahci,               chip_sis968 }, /* SiS 968 */
    211   { PCI_VDEVICE(SI, 0x0186), board_ahci,               chip_sis968 }, /* SiS 968 */
     183  { PCI_VDEVICE(SI, 0x1184), "966", 0 }, /* SiS 966 */
     184  { PCI_VDEVICE(SI, 0x1185), "968", 0 }, /* SiS 968 */
     185  { PCI_VDEVICE(SI, 0x0186), "968", 0 }, /* SiS 968 */
    212186
    213187  /* Marvell */
    214   { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv,       "6145"      }, /* 6145 */
    215   { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv,       "6121"      }, /* 6121 */
     188  { PCI_VDEVICE(MARVELL, 0x6145), "6145", AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP }, /* 6145 */
     189  { PCI_VDEVICE(MARVELL, 0x6121), "6121", AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP }, /* 6121 */
    216190
    217191  /* Promise */
    218   { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci,          "PDC42819"  }, /* PDC42819 */
     192  { PCI_VDEVICE(PROMISE, 0x3f20), "PDC42819", 0 }, /* PDC42819 */
    219193
    220194  /* Generic, PCI class code for AHCI */
    221195  { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
    222     PCI_CLASS_STORAGE_SATA_AHCI, 0xffffffL, board_ahci, s_generic  },
     196    PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, "Generic", 0 },
    223197
    224198  /* end of list, including a few slots to define custom adapters (10) */
    225   { 0, 0, 0, 0, 0, 0, 0, NULL },
    226   { 0, 0, 0, 0, 0, 0, 0, NULL },
    227   { 0, 0, 0, 0, 0, 0, 0, NULL },
    228   { 0, 0, 0, 0, 0, 0, 0, NULL },
    229   { 0, 0, 0, 0, 0, 0, 0, NULL },
    230   { 0, 0, 0, 0, 0, 0, 0, NULL },
    231   { 0, 0, 0, 0, 0, 0, 0, NULL },
    232   { 0, 0, 0, 0, 0, 0, 0, NULL },
    233   { 0, 0, 0, 0, 0, 0, 0, NULL },
    234   { 0, 0, 0, 0, 0, 0, 0, NULL },
    235 
    236   { 0, 0, 0, 0, 0, 0, 0, NULL }
     199  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     200  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     201  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     202  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     203  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     204  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     205  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     206  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     207  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     208  { 0, 0, 0, 0, 0, 0, NULL, 0 },
     209
     210  { 0, 0, 0, 0, 0, 0, NULL, 0 }
    237211};
    238212
    … …  
    255229  pci_ids[i].vendor = vendor;
    256230  pci_ids[i].device = device;
    257   pci_ids[i].board = board_ahci;
    258   pci_ids[i].chipname = s_generic;
     231  pci_ids[i].pChipName = "Specified";
     232  pci_ids[i].quirks = 0;
    259233  return(0);
    260234}
    … …  
    321295        for (n = 0; n < ad_info_cnt; n++)
    322296        {
    323           if (ad_infos[n].bus_dev_func == BusDevFunc)
     297          if (ad_infos[n].BusDevFunc == BusDevFunc)
    324298          {
    325299            /* this device has already been found (e.g. via thorough scan) */
    … …  
    343317    } while (BusDevFunc != 0xffff);
    344318  }
    345 }
    346 
    347 /******************************************************************************
    348  * Enable interrupt generation. PCI 2.3 added a bit which allows disabling
    349  * interrupt generation for a device. This function clears the corresponding
    350  * bit in the configuration space command register.
    351  */
    352 int pci_enable_int(USHORT BusDevFunc)
    353 {
    354   ULONG tmp;
    355 
    356   if (PciReadConfig(BusDevFunc, 4, sizeof(tmp), &tmp) ||
    357       PciWriteConfig(BusDevFunc, 4, sizeof(tmp), tmp & ~(1UL << 10)))
    358   {
    359     return(-1);
    360   }
    361   return(0);
    362319}
    363320
    … …  
    559516   * itself with the OS/2 resource manager
    560517   */
    561   ad_info->pci = pci_id;
    562   ad_info->pci_vendor = vendor;
    563   ad_info->pci_device = device;
    564   ad_info->bus_dev_func = BusDevFunc;
     518  ad_info->pChipName = pci_id->pChipName;
     519  ad_info->quirks = pci_id->quirks;
     520  ad_info->PciVendor = vendor;
     521  ad_info->PciDevice = device;
     522  ad_info->BusDevFunc = BusDevFunc;
    565523  ad_info->irq = irq;
    566524  ad_info->irq_pin = pin;
    … …  
    594552  }
    595553
     554  if (!PciReadConfig(BusDevFunc, PCI_COMMAND, 2, &val))
     555  {
     556    val |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
     557    val &= ~PCI_COMMAND_INTX_DISABLE;
     558    PciWriteConfig(BusDevFunc, PCI_COMMAND, 2, val);
     559  }
    596560  if (ahci_config_caps(ad_info)) goto add_pci_fail;
    597561
    … …  
    738702    }
    739703
    740   return "Generic";
    741 }
    742 
    743 /******************************************************************************
    744  * return a device name for a PCI device id
    745  * NOTE: this is as simple as can be, so don't call it twice in one statement.
    746  */
    747 char *device_from_id(u16 device)
    748 {
    749   int i;
    750 
    751   for (i = 0; pci_ids[i].vendor != 0; i++)
    752   {
    753     if (pci_ids[i].device == device)
    754     {
    755       return pci_ids[i].chipname;
    756     }
    757   }
    758 
    759   return s_generic;
     704  return "";
    760705}
    761706
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