Changeset 184 for trunk/src/os2ahci/ahci.c
- Timestamp:
- Dec 15, 2016, 12:31:51 AM (9 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/os2ahci/ahci.c
r183 r184 148 148 if (i == HOST_VERSION) version = val; 149 149 150 NTPRINTF(" %02x: %08lx", i, val);150 dprintf(0," %02x: %08lx", i, val); 151 151 152 152 if (i == HOST_CAP) { 153 NTPRINTF(" -");154 if (val & HOST_CAP_64) NTPRINTF(" 64bit");155 if (val & HOST_CAP_NCQ) NTPRINTF(" ncq");156 if (val & HOST_CAP_SNTF) NTPRINTF(" sntf");157 if (val & HOST_CAP_MPS) NTPRINTF(" mps");158 if (val & HOST_CAP_SSS) NTPRINTF(" sss");159 if (val & HOST_CAP_ALPM) NTPRINTF(" alpm");160 if (val & HOST_CAP_LED) NTPRINTF(" led");161 if (val & HOST_CAP_CLO) NTPRINTF(" clo");162 if (val & HOST_CAP_ONLY) NTPRINTF(" ahci_only");163 if (val & HOST_CAP_PMP) NTPRINTF(" pmp");164 if (val & HOST_CAP_FBS) NTPRINTF(" fbs");165 if (val & HOST_CAP_PIO_MULTI) NTPRINTF(" pio_multi");166 if (val & HOST_CAP_SSC) NTPRINTF(" ssc");167 if (val & HOST_CAP_PART) NTPRINTF(" part");168 if (val & HOST_CAP_CCC) NTPRINTF(" ccc");169 if (val & HOST_CAP_EMS) NTPRINTF(" ems");170 if (val & HOST_CAP_SXS) NTPRINTF(" sxs");171 NTPRINTF(" cmd_slots:%d", ((val >> 8) & 0x1f) + 1);172 NTPRINTF(" ports:%d", (val & 0x1f) + 1);153 dprintf(0," -"); 154 if (val & HOST_CAP_64) dprintf(0," 64bit"); 155 if (val & HOST_CAP_NCQ) dprintf(0," ncq"); 156 if (val & HOST_CAP_SNTF) dprintf(0," sntf"); 157 if (val & HOST_CAP_MPS) dprintf(0," mps"); 158 if (val & HOST_CAP_SSS) dprintf(0," sss"); 159 if (val & HOST_CAP_ALPM) dprintf(0," alpm"); 160 if (val & HOST_CAP_LED) dprintf(0," led"); 161 if (val & HOST_CAP_CLO) dprintf(0," clo"); 162 if (val & HOST_CAP_ONLY) dprintf(0," ahci_only"); 163 if (val & HOST_CAP_PMP) dprintf(0," pmp"); 164 if (val & HOST_CAP_FBS) dprintf(0," fbs"); 165 if (val & HOST_CAP_PIO_MULTI) dprintf(0," pio_multi"); 166 if (val & HOST_CAP_SSC) dprintf(0," ssc"); 167 if (val & HOST_CAP_PART) dprintf(0," part"); 168 if (val & HOST_CAP_CCC) dprintf(0," ccc"); 169 if (val & HOST_CAP_EMS) dprintf(0," ems"); 170 if (val & HOST_CAP_SXS) dprintf(0," sxs"); 171 dprintf(0," cmd_slots:%d", ((val >> 8) & 0x1f) + 1); 172 dprintf(0," ports:%d", (val & 0x1f) + 1); 173 173 } else if (i == HOST_CTL) { 174 NTPRINTF(" -");175 if (val & HOST_AHCI_EN) NTPRINTF(" ahci_enabled");176 if (val & HOST_IRQ_EN) NTPRINTF(" irq_enabled");177 if (val & HOST_RESET) NTPRINTF(" resetting");174 dprintf(0," -"); 175 if (val & HOST_AHCI_EN) dprintf(0," ahci_enabled"); 176 if (val & HOST_IRQ_EN) dprintf(0," irq_enabled"); 177 if (val & HOST_RESET) dprintf(0," resetting"); 178 178 } else if (i == HOST_CAP2) { 179 NTPRINTF(" -");180 if (val & HOST_CAP2_BOH) NTPRINTF(" boh");181 if (val & HOST_CAP2_NVMHCI) NTPRINTF(" nvmhci");182 if (val & HOST_CAP2_APST) NTPRINTF(" apst");183 } 184 NTPRINTF("\n");179 dprintf(0," -"); 180 if (val & HOST_CAP2_BOH) dprintf(0," boh"); 181 if (val & HOST_CAP2_NVMHCI) dprintf(0," nvmhci"); 182 if (val & HOST_CAP2_APST) dprintf(0," apst"); 183 } 184 dprintf(0,"\n"); 185 185 } 186 186 } … … 228 228 if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags)) 229 229 { 230 DPRINTF(0,"error: invalid board index in PCI info\n");230 dprintf(0,"error: invalid board index in PCI info\n"); 231 231 return(-1); 232 232 } … … 446 446 while (((tmp = readl(ai->mmio + HOST_CTL)) & HOST_RESET) != 0) { 447 447 if (TimerCheckAndBlock(&Timer)) { 448 DPRINTF(0,"controller reset failed (0x%x)\n", tmp);448 dprintf(0,"controller reset failed (0x%x)\n", tmp); 449 449 return(-1); 450 450 } … … 558 558 559 559 /* couldn't enable AHCI mode */ 560 DPRINTF(0,"failed to enable AHCI mode on adapter %d\n", ad_no(ai));560 dprintf(0,"failed to enable AHCI mode on adapter %d\n", ad_no(ai)); 561 561 return(1); 562 562 } … … 635 635 636 636 #ifdef DAZ_NEW_CODE 637 ai->ports[p].dma_buf = MemAlloc (AHCI_PORT_PRIV_DMA_SZ);637 ai->ports[p].dma_buf = MemAllocAlign(AHCI_PORT_PRIV_DMA_SZ, 1024); 638 638 ai->ports[p].dma_buf_phys = MemPhysAdr(ai->ports[p].dma_buf); 639 639 #endif … … 714 714 if (Dev32Help_SetIRQ(irq_handlers[irq_map_cnt], ai->irq, 0) != 0) 715 715 { 716 DPRINTF(0,"failed to register exclusive interrupt\n");716 dprintf(0,"failed to register exclusive interrupt\n"); 717 717 return(-1); 718 718 } … … 963 963 if ((rc = ahci_stop_fis_rx(ai, p)) != 0) 964 964 { 965 DPRINTF(0,"error: failed to stop FIS receive (%d)\n", rc);965 dprintf(0,"error: failed to stop FIS receive (%d)\n", rc); 966 966 return(rc); 967 967 } … … 970 970 if ((rc = ahci_stop_engine(ai, p)) != 0) 971 971 { 972 DPRINTF(0,"error: failed to stop port HW engine (%d)\n", rc);972 dprintf(0,"error: failed to stop port HW engine (%d)\n", rc); 973 973 return(rc); 974 974 } … … 1632 1632 * reset, or worse. 1633 1633 */ 1634 ai->ports[p].error_count++; 1635 1634 1636 if (irq_stat & PORT_IRQ_UNK_FIS) 1635 1637 { … … 1642 1644 if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) 1643 1645 { 1644 DPRINTF(0,"warning: host bus [data] error for port #%d\n", p);1646 dprintf(0,"warning: host bus [data] error for port #%d\n", p); 1645 1647 reset_port = 1; 1646 1648 } 1647 1649 if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR)) 1648 1650 { 1649 DPRINTF(0,"warning: interface fatal error for port #%d\n", p);1651 dprintf(0,"warning: interface fatal error for port #%d\n", p); 1650 1652 reset_port = 1; 1651 1653 } … … 1661 1663 } 1662 1664 1663 DPRINTF(0,"port #%d interrupt error status: 0x%08lx; restarting port\n", p, irq_stat);1665 dprintf(0,"port #%d interrupt error status: 0x%08lx; restarting port\n", p, irq_stat); 1664 1666 1665 1667 /* Handle device-specific errors. Those errors typically involve restarting … … 1677 1679 void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1678 1680 { 1679 #ifdef DEBUG1680 1681 DPRINTF(7,"ahci_get_geometry(%d.%d.%d)\n", iorb_unit_adapter(pIorb), 1681 1682 iorb_unit_port(pIorb), iorb_unit_device(pIorb)); 1682 #endif1683 1683 1684 1684 ahci_exec_iorb(vIorb, pIorb, 0, cmd_func(pIorb, get_geometry)); … … 1690 1690 void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1691 1691 { 1692 #ifdef DEBUG1693 1692 DPRINTF(7,"ahci_unit_ready(%d.%d.%d)\n", iorb_unit_adapter(pIorb), 1694 1693 iorb_unit_port(pIorb), iorb_unit_device(pIorb)); 1695 #endif1696 1694 1697 1695 ahci_exec_iorb(vIorb, pIorb, 0, cmd_func(pIorb, unit_ready)); … … 1703 1701 void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1704 1702 { 1705 #ifdef DEBUG1706 1703 DPRINTF(7,"ahci_read(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(vIorb), 1707 1704 iorb_unit_port(pIorb), iorb_unit_device(pIorb), 1708 1705 ((IORB_EXECUTEIO *) pIorb)->RBA, 1709 1706 ((IORB_EXECUTEIO *) pIorb)->BlockCount); 1710 #endif1711 1707 1712 1708 ahci_exec_iorb(vIorb, pIorb, 1, cmd_func(pIorb, read)); … … 1718 1714 void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1719 1715 { 1720 #ifdef DEBUG1721 1716 DPRINTF(7,"ahci_verify(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb), 1722 1717 iorb_unit_port(pIorb), iorb_unit_device(pIorb), 1723 1718 ((IORB_EXECUTEIO *)pIorb)->RBA, 1724 1719 ((IORB_EXECUTEIO *)pIorb)->BlockCount); 1725 #endif1726 1720 1727 1721 ahci_exec_iorb(vIorb, pIorb, 0, cmd_func(pIorb, verify)); … … 1733 1727 void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb) 1734 1728 { 1735 #ifdef DEBUG1736 1729 DPRINTF(7,"ahci_write(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb), 1737 1730 iorb_unit_port(pIorb), iorb_unit_device(pIorb), 1738 1731 ((IORB_EXECUTEIO *)pIorb)->RBA, 1739 1732 ((IORB_EXECUTEIO *)pIorb)->BlockCount); 1740 #endif1741 1733 1742 1734 ahci_exec_iorb(vIorb, pIorb, 1, cmd_func(pIorb, write));
Note:
See TracChangeset
for help on using the changeset viewer.