Changeset 178 for trunk/src/os2ahci/os2ahci.h
- Timestamp:
- Nov 29, 2016, 5:30:22 AM (9 years ago)
- File:
-
- 1 edited
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trunk/src/os2ahci/os2ahci.h
r176 r178 4 4 * Copyright (c) 2011 thi.guten Software Development 5 5 * Copyright (c) 2011 Mensys B.V. 6 * Copyright (c) 2013-201 5David Azarewicz6 * Copyright (c) 2013-2016 David Azarewicz 7 7 * 8 8 * Authors: Christian Mueller, Markus Thielen … … 43 43 //#define LEGACY_APM 44 44 45 #define INCL_NOPMAPI 46 #define INCL_DOSINFOSEG 47 #define INCL_NO_SCB 48 #define INCL_DOSERRORS 49 #include <os2.h> 50 #include <dos.h> 51 #include <bseerr.h> 52 #include <dskinit.h> 53 #include <scb.h> 54 55 #include <devhdr.h> 56 #include <iorb.h> 57 #include <strat2.h> 58 #include <reqpkt.h> 59 60 /* NOTE: (Rousseau) 61 * The regular dhcalls.h from $(DDK)\base\h also works. 62 * The devhelp.h from $(DDK)\base\h produces inline assembler errors. 63 * The modified devhelp.h from ..\include works OK and is used because it 64 * generates a slightly smaller driver image. 65 */ 66 #ifdef __WATCOMC__ 67 /* include WATCOM specific DEVHELP stubs */ 68 #include <devhelp.h> 69 #else 70 #include <dhcalls.h> 71 #endif 72 73 #include <addcalls.h> 74 #include <rmcalls.h> 75 #include <devclass.h> 76 #include <devcmd.h> 77 #include <rmbase.h> 78 45 #include "Dev32lib.h" 46 #include "Dev32rmcalls.h" 47 #include <Dev32iorb.h> 79 48 #include "ahci.h" 80 49 #include "ahci-idc.h" … … 82 51 /* -------------------------- macros and constants ------------------------- */ 83 52 84 #define MAX_AD 8 /* maximum number of adapters */ 85 86 /* Timer pool size. In theory, we need one timer per outstanding command plus 87 * a few miscellaneous timers but it's unlikely we'll ever have outstanding 88 * commands on all devices on all ports on all apapters -- this would be 89 * 8 * 32 * 32 = 8192 outstanding commands on a maximum of 8 * 32 * 15 = 3840 90 * devices and that's a bit of an exaggeration. It should be more than enough 91 * to have 128 timers. 92 */ 93 #define TIMER_COUNT 128 94 #define TIMER_POOL_SIZE (sizeof(ADD_TIMER_POOL) + \ 95 TIMER_COUNT * sizeof(ADD_TIMER_DATA)) 53 #define MAX_AD 8 /* maximum number of adapters */ 54 55 #define TIMER_COUNT 128 96 56 97 57 /* default command timeout (can be overwritten in the IORB) */ 98 #define DEFAULT_TIMEOUT 58 #define DEFAULT_TIMEOUT 30000 99 59 100 60 /* Maximum number of retries for commands in the restart/reset context hooks. … … 106 66 * bit left before the ADD workspace structure would become too large... 107 67 */ 108 #define MAX_RETRIES 3 109 110 /* max/min macros */ 111 #define max(a, b) (a) > (b) ? (a) : (b) 112 #define min(a, b) (a) < (b) ? (a) : (b) 68 #define MAX_RETRIES 3 113 69 114 70 /* debug output macros */ 115 71 #ifdef DEBUG 116 #define dprintf if (debug > 0) printf 117 #define dphex if (debug > 0) phex 118 #define ddprintf if (debug > 1) printf 119 #define ddphex if (debug > 1) phex 120 #define dddprintf if (debug > 2) printf 121 #define dddphex if (debug > 2) phex 122 #define ntprintf printf_nts 123 #define aprintf printf 72 #define DPRINTF(a,b,...) dprintf(a, b, ##__VA_ARGS__) 73 #define DHEXDUMP(a,b,c,d,...) dHexDump(a, b, c, d, ##__VA_ARGS__) 74 #define NTPRINTF(...) dprintf(0, ##__VA_ARGS__) 75 #define DUMP_HOST_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_host_regs(a,b);} 76 #define DUMP_PORT_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_port_regs(a,b);} 124 77 #else 125 #define dprintf(a,...) 126 #define dphex(a,b,c,...) 127 #define ddprintf(a,...) 128 #define ddphex(a,b,c,...) 129 #define dddprintf(a,...) 130 #define dddphex(a,b,c,...) 131 #define ntprintf(a,...) 132 #define aprintf(a,...) 78 #define DPRINTF(a,b,...) 79 #define DHEXDUMP(a,b,c,d,...) 80 #define NTPRINTF(a,...) 81 #define DUMP_HOST_REGS(a,b) 82 #define DUMP_PORT_REGS(l,a,b) 133 83 #endif 134 84 … … 137 87 * with vprintf-like funcs) 138 88 */ 139 #define ciprintf if (verbosity > 0) cprintf 140 #define ciiprintf if (verbosity > 1) cprintf 141 142 /* TRACE macros (for our internal ring buffer trace) */ 143 #define AHCI_DEBUG_BUF_SIZE 0x10000UL /* 64k must be a power of 2 */ 144 #define AHCI_INFO_BUF_SIZE 0x1000UL /* 4k must be a power of 2 */ 89 #define ciprintf(a,...) {if (verbosity > 0) iprintf(a, ##__VA_ARGS__);} 90 #define ciiprintf(a,...) {if (verbosity > 1) iprintf(a, ##__VA_ARGS__);} 145 91 146 92 /* adapter number from AD_INFO pointer; mainly for dprintf() purposes */ 147 #define ad_no(ai) (((u16) ai - (u16) ad_infos) / sizeof(*ai)) 148 149 /* Convert far function address into NPFN (the DDK needs this all over the 150 * place and just casting to NPFN will produce a "segment lost in conversion" 151 * warning. Since casting to a u32 is a bit nasty for function pointers and 152 * might have to be revised for different compilers, we'll use a central 153 * macro for this crap. 154 */ 155 #define mk_NPFN(func) (NPFN) (u32) (func) 156 157 /* stdarg.h macros with explicit far pointers 158 * 159 * NOTE: The compiler pushes fixed arguments with 16 bits minimum, thus 160 * the last fixed argument (i.e. the one passed to va_start) must 161 * have at least 16 bits. Otherwise, the address calculation in 162 * va_start() will fail. 163 */ 164 typedef char _far *va_list; 93 #define ad_no(ai) ( ( (u32)ai - (u32)ad_infos ) / sizeof(*ai)) 94 95 #define MakeNear16PtrFromDiff(Base16, Base32, New32) \ 96 ( ( CastFar16ToULONG(Base16) + ( (ULONG)(New32) - (ULONG)(Base32) ) ) & 0xffff) 97 98 #define MakeFar16PtrFromDiff(Base16, Base32, New32) \ 99 CastULONGToFar16(CastFar16ToULONG(Base16) + ((ULONG)(New32) - (ULONG)(Base32)))) 100 101 /* Takes the selector from the first parameter, and the offset specified 102 * in the second parameter, and returns a flat pointer 103 */ 104 extern void *MakeFlatFromNear16(void __far16 *, USHORT); 105 #pragma aux MakeFlatFromNear16 = \ 106 "mov ax, bx" \ 107 "call Far16ToFlat" \ 108 parm nomemory [eax] [bx] value [eax] modify nomemory exact [eax]; 109 110 /* stdarg.h macros with explicit far pointers */ 111 typedef char *va_list; 165 112 #define va_start(va, last) va = (va_list) (&last + 1) 166 #define va_arg(va, type) ((type _far*) (va += sizeof(type)))[-1]113 #define va_arg(va, type) ((type *) (va += sizeof(type)))[-1] 167 114 #define va_end(va) va = 0 168 115 169 /* ctype macros */170 #define isupper(ch) ((ch) >= 'A' && (ch) <= 'Z')171 #define tolower(ch) (isupper(ch) ? (ch) + ('a' - 'A') : (ch))172 173 116 /* stddef macros */ 174 #define offsetof(s, e) ((u16) &((s *) 0)->e) 175 176 /* SMP spinlock compatibility macros for older DDKs using CLI/STI */ 177 #ifdef SPINLOCK_EMULATION 178 #define DevHelp_CreateSpinLock(p_sph) *(p_sph) = 0 179 #define DevHelp_FreeSpinLock(sph) 0 180 181 #define DevHelp_AcquireSpinLock(sph) if ((sph) != 0) \ 182 panic("recursive spinlock"); \ 183 (sph) = disable() 184 185 #define DevHelp_ReleaseSpinLock(sph) if (sph) { \ 186 (sph) = 0; \ 187 enable(); \ 188 } 189 #endif 117 #define offsetof(s, e) ((u32)&((s *)0)->e) 190 118 191 119 /* shortcut macros */ 192 #define spin_lock(sl) DevHelp_AcquireSpinLock(sl) 193 #define spin_unlock(sl) DevHelp_ReleaseSpinLock(sl) 194 195 /* Get AHCI port MMIO base from AD_INFO and port number. For the time being, 196 * MMIO addresses are assumed to be valid 16:16 pointers which implies 197 * that one GDT selector is allocated per adapter. 198 */ 199 #define port_base(ai, p) ((u8 _far *) (ai)->mmio + 0x100 + (p) * 0x80) 200 201 /* Get address of port-specific DMA scratch buffer. The total size of all DMA 202 * buffers required for 32 ports exceeds 65536 bytes, thus we need multiple 203 * GDT selectors to access all port DMA scratch buffers and some logic to map 204 * a port number to the corresponding DMA scratch buffer address. 205 */ 206 #define PORT_DMA_BUFS_PER_SEG ((size_t) (65536UL / AHCI_PORT_PRIV_DMA_SZ)) 207 #define PORT_DMA_BUF_SEGS ((AHCI_MAX_PORTS + PORT_DMA_BUFS_PER_SEG - 1) \ 208 / PORT_DMA_BUFS_PER_SEG) 209 #define PORT_DMA_SEG_SIZE ((u32) PORT_DMA_BUFS_PER_SEG * \ 210 (u32) AHCI_PORT_PRIV_DMA_SZ) 211 212 #define port_dma_base(ai, p) \ 213 ((AHCI_PORT_DMA _far *) ((ai)->dma_buf[(p) / PORT_DMA_BUFS_PER_SEG] + \ 214 ((p) % PORT_DMA_BUFS_PER_SEG) * AHCI_PORT_PRIV_DMA_SZ)) 215 216 #define port_dma_base_phys(ai, p) \ 217 ((ai)->dma_buf_phys + (u32) (p) * AHCI_PORT_PRIV_DMA_SZ) 120 #define spin_lock(sl) KernAcquireSpinLock(&sl) 121 #define spin_unlock(sl) KernReleaseSpinLock(&sl) 122 123 /* Get AHCI port MMIO base from AD_INFO and port number. */ 124 #define port_base(ai, p) ((u8 *) (ai)->mmio + 0x100 + (p) * 0x80) 125 #define port_dma_base(ai, p) ((AHCI_PORT_DMA *) ((ai)->dma_buf[(p)])) 126 #define port_dma_base_phys(ai, p) ((ai)->dma_buf_phys[(p)]) 218 127 219 128 /* Convert an SATA adapter/port/device address into a 16-bit IORB unit handle … … 229 138 (((u16) (p) & 0x0fU) << 4) | \ 230 139 (((u16) (d) & 0x0fU))) 231 #define iorb_unit_adapter(iorb) ((( u16) (iorb)->UnitHandle >> 8) & 0x07U)232 #define iorb_unit_port(iorb) ((( u16) (iorb)->UnitHandle >> 4) & 0x0fU)233 #define iorb_unit_device(iorb) (( u16) (iorb)->UnitHandle & 0x0fU)140 #define iorb_unit_adapter(iorb) (((iorb)->UnitHandle >> 8) & 0x07) 141 #define iorb_unit_port(iorb) (((iorb)->UnitHandle >> 4) & 0x0f) 142 #define iorb_unit_device(iorb) ((iorb)->UnitHandle & 0x0f) 234 143 235 144 /******************************************************************************* … … 244 153 245 154 /* access IORB ADD workspace */ 246 #define add_workspace(iorb) ((ADD_WORKSPACE _far*) &(iorb)->ADDWorkSpace)155 #define add_workspace(iorb) ((ADD_WORKSPACE *) &(iorb)->ADDWorkSpace) 247 156 248 157 … … 303 212 /* ------------------------ typedefs and structures ------------------------ */ 304 213 305 typedef unsigned int size_t;306 307 typedef struct {308 u32 Start;309 u32 End;310 } TIMER;311 312 214 /* PCI device information structure; this is used both for scanning and for 313 215 * identification purposes in 'AD_INFO'; based on the Linux pci_device_id … … 329 231 */ 330 232 typedef struct { 331 IORBH _far *volatile root; /* root of request list */332 IORBH _far *volatile tail; /* tail of request list */233 IORBH FAR16DATA *volatile vRoot; /* root of request list */ 234 IORBH FAR16DATA *volatile vTail; /* tail of request list */ 333 235 } IORB_QUEUE; 334 236 … … 352 254 353 255 struct { 354 unsigned allocated : 1;/* if != 0, device is allocated */355 unsigned present : 1;/* if != 0, device is present */356 unsigned lba48 : 1;/* if != 0, device supports 48-bit LBA */357 unsigned atapi : 1;/* if != 0, this is an ATAPI device */358 unsigned atapi_16 : 1;/* if != 0, device suports 16-byte cmds */359 unsigned removable : 1;/* if != 0, device has removable media */360 unsigned dev_type : 5;/* device type (UIB_TYPE_* in iorb.h) */361 unsigned ncq_max : 5;/* maximum tag number for queued commands */362 UNITINFO _far*unit_info; /* pointer to modified unit info */363 DEV_INFO 256 unsigned allocated :1; /* if != 0, device is allocated */ 257 unsigned present :1; /* if != 0, device is present */ 258 unsigned lba48 :1; /* if != 0, device supports 48-bit LBA */ 259 unsigned atapi :1; /* if != 0, this is an ATAPI device */ 260 unsigned atapi_16 :1; /* if != 0, device suports 16-byte cmds */ 261 unsigned removable :1; /* if != 0, device has removable media */ 262 unsigned dev_type :5; /* device type (UIB_TYPE_* in iorb.h) */ 263 unsigned ncq_max :5; /* maximum tag number for queued commands */ 264 UNITINFO *unit_info; /* pointer to modified unit info */ 265 DEV_INFO dev_info; 364 266 } devs[AHCI_MAX_DEVS]; 365 267 } P_INFO; … … 391 293 HRESOURCE rm_irq; /* resource handle for IRQ */ 392 294 393 u8 bus; /* PCI bus number */ 394 u8 dev_func; /* PCI device and function number */ 295 u16 bus_dev_func; /* PCI bus number PCI device and function number */ 395 296 u16 irq; /* interrupt number */ 396 297 397 298 u32 mmio_phys; /* physical address of MMIO region */ 398 299 u32 mmio_size; /* size of MMIO region */ 399 u8 _far*mmio; /* pointer to this adapter's MMIO region */400 401 u32 dma_buf_phys ; /* physical address of DMA scratch buffer */402 u8 _far *dma_buf[PORT_DMA_BUF_SEGS]; /* DMA scatch buffer*/300 u8 *mmio; /* pointer to this adapter's MMIO region */ 301 302 u32 dma_buf_phys[AHCI_MAX_PORTS]; /* physical address of DMA scratch buffer */ 303 u8 *dma_buf[AHCI_MAX_PORTS]; /* DMA scatch buffers */ 403 304 404 305 P_INFO ports[AHCI_MAX_PORTS]; /* SATA ports on this adapter */ … … 407 308 /* ADD workspace in IORB (must not exceed 16 bytes) */ 408 309 typedef struct { 409 void (*ppfunc)(IORBH _far *iorb); /*post-processing function */410 void *buf; /* response buffer (e.g. for identify cmds) */411 ULONG timer; /* timer for timeout procesing */412 USHORT blocks; /* number of blocks to be transferred */413 unsigned processing : 1; /*IORB is being processd */414 unsigned idempotent : 1; /*IORB is idempotent (can be retried) */415 unsigned queued_hw : 1; /*IORB has been queued to hardware */416 unsigned no_ncq : 1; /*must not use native command queuing */417 unsigned is_ncq : 1; /*should use native command queueing */418 unsigned complete : 1; /*IORB has completed processing */419 unsigned unaligned : 1; /*unaligned S/G; need to use transfer buffer */420 unsigned retries : 2; /*number of retries for this command */421 unsigned cmd_slot : 5; /*AHCI command slot for this IORB */422 } ADD_WORKSPACE; 310 void (*ppfunc)(IORBH FAR16DATA *vIorb, IORBH *pIorb); /* 00 post-processing function */ 311 void *buf; /* 04 response buffer (e.g. for identify cmds) */ 312 ULONG timer; /* 08 timer for timeout procesing */ 313 USHORT blocks; /* 0c number of blocks to be transferred */ 314 unsigned short processing :1; /* 0e IORB is being processd */ 315 unsigned short idempotent :1; /* IORB is idempotent (can be retried) */ 316 unsigned short queued_hw :1; /* IORB has been queued to hardware */ 317 unsigned short no_ncq :1; /* must not use native command queuing */ 318 unsigned short is_ncq :1; /* should use native command queueing */ 319 unsigned short complete :1; /* IORB has completed processing */ 320 unsigned short unaligned :1; /* unaligned S/G; need to use transfer buffer */ 321 unsigned short retries :2; /* number of retries for this command */ 322 unsigned short cmd_slot :5; /* AHCI command slot for this IORB */ 323 } ADD_WORKSPACE; /* 10 */ 423 324 424 325 /* sg_memcpy() direction */ … … 457 358 /* -------------------------- function prototypes -------------------------- */ 458 359 459 /* init.asm */ 460 extern u32 _cdecl readl (void _far *addr); 461 extern u32 _cdecl writel (void _far *addr, u32 val); 462 extern void _far * _cdecl memcpy (void _far *v_dst, void _far *v_src, int len); 463 extern void _far * _cdecl memset (void _far *p, int ch, size_t len); 464 extern void _cdecl _far restart_hook (void); 465 extern void _cdecl _far reset_hook (void); 466 extern void _cdecl _far engine_hook (void); 467 extern void _cdecl _far asm_krnl_exit (void); 468 extern void _cdecl udelay (u16 microseconds); 360 static inline unsigned long readl(void *a) 361 { 362 return *(volatile unsigned long*)a; 363 } 364 365 static inline void writel(void *a, unsigned long v) 366 { 367 *(volatile unsigned long*)a = v; 368 } 369 370 extern void shutdown_driver(void); 469 371 470 372 /* os2ahci.c */ 471 extern USHORT init_drv (RPINITIN _far*req);472 extern USHORT gen_ioctl (RP_GENIOCTL _far*ioctl);473 extern USHORT char_dev_input (RP_RWV _far*rwrb);474 extern USHORT exit_drv(int func);475 extern USHORT sr_drv(int func);476 extern void _cdecl _far _loadds add_entry (IORBH _far *iorb);477 extern void trigger_engine(void);478 extern int trigger_engine_1(void);479 extern void send_iorb (IORBH _far *iorb);480 extern void iocc_configuration (IORBH _far *iorb);481 extern void iocc_device_control (IORBH _far *iorb);482 extern void iocc_unit_control (IORBH _far *iorb);483 extern void iocm_device_table (IORBH _far *iorb);484 extern void iocc_geometry (IORBH _far *iorb);485 extern void iocc_execute_io (IORBH _far *iorb);486 extern void iocc_unit_status (IORBH _far *iorb);487 extern void iocc_adapter_passthru (IORBH _far *iorb);488 extern void iorb_queue_add (IORB_QUEUE _far *queue, IORBH _far *iorb);489 extern int iorb_queue_del (IORB_QUEUE _far *queue, IORBH _far *iorb);490 extern void iorb_seterr (IORBH _far *iorb, USHORT error_code);491 extern void iorb_done (IORBH _far *iorb);492 extern void iorb_complete (IORBH _far *iorb);493 extern void iorb_requeue (IORBH _far *iorb);494 extern void aws_free (ADD_WORKSPACE _far*aws);495 extern void lock_adapter(AD_INFO *ai);496 extern void unlock_adapter(AD_INFO *ai);497 extern void _ cdecl _far timeout_callback (ULONG timer_handle, ULONG p1, ULONG p2);498 extern void _ cdecl _far reset_watchdog (ULONG timer_handle, ULONG p1, ULONG p2);373 extern USHORT init_drv(REQPACKET *req); 374 extern USHORT gen_ioctl(REQPACKET *ioctl); 375 extern USHORT char_dev_input(REQPACKET *rwrb); 376 extern USHORT exit_drv(int func); 377 extern USHORT sr_drv(int func); 378 extern void add_entry(IORBH FAR16DATA *vIorb); 379 extern void trigger_engine(void); 380 extern int trigger_engine_1(void); 381 extern void send_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb); 382 extern void iocc_configuration (IORBH FAR16DATA *vIorb, IORBH *pIorb); 383 extern void iocc_device_control(IORBH FAR16DATA *vIorb, IORBH *pIorb); 384 extern void iocc_unit_control(IORBH FAR16DATA *vIorb, IORBH *pIorb); 385 extern void iocm_device_table(IORBH FAR16DATA *vIorb, IORBH *pIorb); 386 extern void iocc_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb); 387 extern void iocc_execute_io(IORBH FAR16DATA *vIorb, IORBH *pIorb); 388 extern void iocc_unit_status(IORBH FAR16DATA *vIorb, IORBH *pIorb); 389 extern void iocc_adapter_passthru(IORBH FAR16DATA *vIorb, IORBH *pIorb); 390 extern void iorb_queue_add(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb, IORBH *pIorb); 391 extern int iorb_queue_del(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb); 392 extern void iorb_seterr(IORBH *pIorb, USHORT error_code); 393 extern void iorb_done(IORBH FAR16DATA *vIorb, IORBH *pIorb); 394 extern void iorb_complete(IORBH FAR16DATA *vIorb, IORBH *pIorb); 395 extern void iorb_requeue(IORBH *pIorb); 396 extern void aws_free(ADD_WORKSPACE *aws); 397 extern void lock_adapter(AD_INFO *ai); 398 extern void unlock_adapter(AD_INFO *ai); 399 extern void __syscall timeout_callback(ULONG timer_handle, ULONG p1); 400 extern void __syscall reset_watchdog(ULONG timer_handle, ULONG p1); 499 401 500 402 /* ahci.c */ 501 extern int ahci_save_bios_config (AD_INFO *ai); 502 extern int ahci_restore_bios_config (AD_INFO *ai); 503 extern int ahci_restore_initial_config (AD_INFO *ai); 504 extern AHCI_PORT_CFG *ahci_save_port_config (AD_INFO *ai, int p); 505 extern void ahci_restore_port_config (AD_INFO *ai, int p, 506 AHCI_PORT_CFG *pc); 507 extern int ahci_enable_ahci (AD_INFO *ai); 508 extern int ahci_scan_ports (AD_INFO *ai); 509 extern int ahci_complete_init (AD_INFO *ai); 510 extern int ahci_reset_port (AD_INFO *ai, int p, int ei); 511 extern int ahci_start_port (AD_INFO *ai, int p, int ei); 512 extern void ahci_start_fis_rx (AD_INFO *ai, int p); 513 extern void ahci_start_engine (AD_INFO *ai, int p); 514 extern int ahci_stop_port (AD_INFO *ai, int p); 515 extern int ahci_stop_fis_rx (AD_INFO *ai, int p); 516 extern int ahci_stop_engine (AD_INFO *ai, int p); 517 extern int ahci_port_busy (AD_INFO *ai, int p); 518 extern void ahci_exec_iorb (IORBH _far *iorb, int ncq_capable, 519 int (*func)(IORBH _far *, int)); 520 extern void ahci_exec_polled_iorb (IORBH _far *iorb, 521 int (*func)(IORBH _far *, int), 522 ULONG timeout); 523 extern int ahci_exec_polled_cmd (AD_INFO *ai, int p, int d, 524 int timeout, int cmd, ...); 525 extern int ahci_set_dev_idle (AD_INFO *ai, int p, int d, int idle); 526 extern int ahci_flush_cache (AD_INFO *ai, int p, int d); 527 528 extern int ahci_intr (u16 irq); 529 extern void ahci_port_intr (AD_INFO *ai, int p); 530 extern void ahci_error_intr (AD_INFO *ai, int p, u32 irq_stat); 531 532 extern void ahci_get_geometry (IORBH _far *iorb); 533 extern void ahci_unit_ready (IORBH _far *iorb); 534 extern void ahci_read (IORBH _far *iorb); 535 extern void ahci_verify (IORBH _far *iorb); 536 extern void ahci_write (IORBH _far *iorb); 537 extern void ahci_execute_cdb (IORBH _far *iorb); 538 extern void ahci_execute_ata (IORBH _far *iorb); 403 extern int ahci_save_bios_config(AD_INFO *ai); 404 extern int ahci_restore_bios_config(AD_INFO *ai); 405 extern int ahci_restore_initial_config(AD_INFO *ai); 406 extern AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p); 407 extern void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc); 408 extern int ahci_enable_ahci(AD_INFO *ai); 409 extern int ahci_scan_ports(AD_INFO *ai); 410 extern int ahci_complete_init(AD_INFO *ai); 411 extern int ahci_reset_port(AD_INFO *ai, int p, int ei); 412 extern int ahci_start_port(AD_INFO *ai, int p, int ei); 413 extern void ahci_start_fis_rx(AD_INFO *ai, int p); 414 extern void ahci_start_engine(AD_INFO *ai, int p); 415 extern int ahci_stop_port(AD_INFO *ai, int p); 416 extern int ahci_stop_fis_rx(AD_INFO *ai, int p); 417 extern int ahci_stop_engine(AD_INFO *ai, int p); 418 extern int ahci_port_busy(AD_INFO *ai, int p); 419 extern void ahci_exec_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int ncq_capable, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int)); 420 extern void ahci_exec_polled_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int), ULONG timeout); 421 extern int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...); 422 extern int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle); 423 extern int ahci_flush_cache(AD_INFO *ai, int p, int d); 424 425 extern int ahci_intr(u16 irq); 426 extern void ahci_port_intr(AD_INFO *ai, int p); 427 extern void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat); 428 429 extern void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb); 430 extern void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb); 431 extern void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb); 432 extern void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb); 433 extern void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb); 434 extern void ahci_execute_cdb(IORBH FAR16DATA *vIorb, IORBH *pIorb); 435 extern void ahci_execute_ata(IORBH FAR16DATA *vIorb, IORBH *pIorb); 539 436 extern void ahci_dump_host_regs(AD_INFO *ai, int bios_regs); 540 437 extern void ahci_dump_port_regs(AD_INFO *ai, int p); 541 438 extern int ahci_reset_controller(AD_INFO *ai); 542 439 543 /* libc.c */ 544 extern void init_libc (void); 545 extern void init_com (long BaudRate); 546 extern int vsprintf (char _far *buf, const char *fmt, va_list va); 547 extern int sprintf (char _far *buf, const char *fmt, ...); 548 extern void vfprintf (const char *fmt, va_list va); 549 extern void _cdecl printf (const char *fmt, ...); 550 extern void _cdecl printf_nts (const char *fmt, ...); 551 extern void cprintf (const char *fmt, ...); 552 extern void phex (const void _far *p, int len, const char *fmt, ...); 553 extern size_t strlen (const char _far *s); 554 extern char _far *strcpy (char _far *dst, const char _far *src); 555 extern int memcmp (void _far *p1, void _far *p2, size_t len); 556 extern void sg_memcpy (SCATGATENTRY _far *sg_list, USHORT sg_cnt, 557 ULONG sg_off, void _far *buf, USHORT len, 558 SG_MEMCPY_DIRECTION dir); 559 extern long strtol (const char _far *buf, 560 const char _far * _far *ep, int base); 561 extern void *malloc (size_t len); 562 extern void free (void *ptr); 563 extern ULONG virt_to_phys (void _far *ptr); 564 extern void msleep (u32 millies); 565 extern void panic (char *msg); 566 extern int disable (void); 567 extern void enable (void); 568 extern void timer_init(TIMER far *pTimer, u32 Milliseconds); 569 extern int timer_check_and_block(TIMER far *pTimer); 440 extern void sg_memcpy(SCATGATENTRY *sg_list, USHORT sg_cnt, ULONG sg_off, void *buf, USHORT len, SG_MEMCPY_DIRECTION dir); 441 extern void panic(char *msg); 570 442 571 443 /* trace.c */ 572 extern void trace_init (u32); 573 extern void trace_exit (void); 574 extern void trace_write (u8 _far *s, int len); 575 extern u16 trace_read (u8 _far *buf, u16 cb_buf); 576 extern u16 trace_char_dev(RP_RWV _far *rwrb); 577 extern void build_user_info(int check); 444 extern void build_user_info(void); 578 445 579 446 /* pci.c */ 580 extern int add_pci_id (u16 vendor, u16 device); 581 extern void scan_pci_bus (void); 582 extern int pci_enable_int (UCHAR bus, UCHAR dev_func); 583 extern void pci_hack_virtualbox(void); 584 extern char *vendor_from_id (u16 vendor); 585 extern char *device_from_id (u16 device); 586 UCHAR pci_read_conf (UCHAR bus, UCHAR dev_func, UCHAR indx, 587 UCHAR size, ULONG _far *val); 588 UCHAR pci_write_conf (UCHAR bus, UCHAR dev_func, UCHAR indx, UCHAR size, 589 ULONG val); 447 extern int add_pci_id(u16 vendor, u16 device); 448 extern void scan_pci_bus(void); 449 extern int pci_enable_int(USHORT BusDevFunc); 450 extern void pci_hack_virtualbox(void); 451 extern char *vendor_from_id(u16 vendor); 452 extern char *device_from_id(u16 device); 590 453 591 454 /* ctxhook.c */ 592 extern void _ cdecl restart_ctxhook(ULONG parm);593 extern void _ cdecl reset_ctxhook(ULONG parm);594 extern void _ cdecl engine_ctxhook(ULONG parm);455 extern void _Syscall restart_ctxhook(ULONG parm); 456 extern void _Syscall reset_ctxhook(ULONG parm); 457 extern void _Syscall engine_ctxhook(ULONG parm); 595 458 596 459 /* apm.c */ 597 extern void apm_init(void);598 extern void suspend(void);599 extern void resume(void);460 extern void apm_init(void); 461 extern void suspend(void); 462 extern void resume(void); 600 463 601 464 /* ioctl.c */ 602 extern USHORT ioctl_get_devlist (RP_GENIOCTL _far*ioctl);603 extern USHORT ioctl_passthrough (RP_GENIOCTL _far*ioctl);604 extern USHORT ioctl_gen_dsk (RP_GENIOCTL _far*ioctl);605 extern USHORT ioctl_smart (RP_GENIOCTL _far*ioctl);465 extern USHORT ioctl_get_devlist(REQPACKET *ioctl); 466 extern USHORT ioctl_passthrough(REQPACKET *ioctl); 467 extern USHORT ioctl_gen_dsk(REQPACKET *ioctl); 468 extern USHORT ioctl_smart(REQPACKET *ioctl); 606 469 607 470 608 471 /* ---------------------------- global variables --------------------------- */ 609 472 610 extern char _cdecl end_of_data; /* label at the end of all data segments */ 611 extern void _cdecl _near end_of_code(); /* label at the end of all code segments */ 612 613 extern int debug; /* if != 0, print debug messages to COM1 */ 614 extern int thorough_scan; /* if != 0, perform thorough PCI scan */ 615 extern int init_reset; /* if != 0, reset ports during init */ 616 extern int force_write_cache; /* if != 0, force write cache */ 617 extern int verbosity; /* if != 0, show some info during boot */ 618 extern int use_lvm_info; 619 extern int wrap_trace_buffer; 620 621 extern HDRIVER rm_drvh; /* resource manager driver handle */ 622 extern USHORT add_handle; /* adapter device driver handle */ 623 extern UCHAR timer_pool[]; /* timer pool */ 624 extern char drv_name[]; /* driver name as string ("OS2AHCI") */ 625 626 extern PCI_ID pci_ids[]; /* SATA adapter PCI IDs */ 627 extern ULONG drv_lock; /* driver-level spinlock */ 628 extern ULONG com_lock; /* debug log spinlock */ 629 extern volatile PGINFOSEG gis; 630 extern IORB_QUEUE driver_queue; /* driver-level IORB queue */ 631 extern AD_INFO ad_infos[]; /* adapter information list */ 632 extern int ad_info_cnt; /* number of entries in ad_infos[] */ 633 extern u16 ad_ignore; /* bitmap with adapters to be ignored */ 634 extern int init_complete; /* if != 0, initialization has completed */ 635 extern int suspended; /* indicates if the driver is suspended */ 636 extern int resume_sleep_flag; 637 638 extern u16 com_base; /* debug COM port base address */ 473 extern int thorough_scan; /* if != 0, perform thorough PCI scan */ 474 extern int init_reset; /* if != 0, reset ports during init */ 475 extern int force_write_cache; /* if != 0, force write cache */ 476 extern int verbosity; /* if != 0, show some info during boot */ 477 extern int use_lvm_info; 478 479 extern HDRIVER rm_drvh; /* resource manager driver handle */ 480 extern USHORT add_handle; /* adapter device driver handle */ 481 extern char drv_name[]; /* driver name as string ("OS2AHCI") */ 482 483 extern PCI_ID pci_ids[]; /* SATA adapter PCI IDs */ 484 extern SpinLock_t drv_lock; /* driver-level spinlock */ 485 extern ULONG com_lock; /* debug log spinlock */ 486 extern IORB_QUEUE driver_queue; /* driver-level IORB queue */ 487 extern AD_INFO ad_infos[]; /* adapter information list */ 488 extern int ad_info_cnt; /* number of entries in ad_infos[] */ 489 extern u16 ad_ignore; /* bitmap with adapters to be ignored */ 490 extern int init_complete; /* if != 0, initialization has completed */ 491 extern int suspended; /* indicates if the driver is suspended */ 492 extern int resume_sleep_flag; 639 493 640 494 /* port restart context hook and input data */ 641 extern ULONG 642 extern volatile u32 495 extern ULONG restart_ctxhook_h; 496 extern volatile u32 ports_to_restart[MAX_AD]; 643 497 644 498 /* port reset context hook and input data */ 645 extern ULONG 646 extern ULONG 647 extern volatile u32 648 extern IORB_QUEUE 499 extern ULONG reset_ctxhook_h; 500 extern ULONG th_reset_watchdog; 501 extern volatile u32 ports_to_reset[MAX_AD]; 502 extern IORB_QUEUE abort_queue; 649 503 650 504 /* trigger engine context hook and input data */ 651 extern ULONG 505 extern ULONG engine_ctxhook_h; 652 506 653 507 /* apapter/port-specific options saved when parsing the command line */ 654 extern u8 emulate_scsi[MAX_AD][AHCI_MAX_PORTS]; 655 extern u8 enable_ncq[MAX_AD][AHCI_MAX_PORTS]; 656 extern u8 link_speed[MAX_AD][AHCI_MAX_PORTS]; 657 extern u8 link_power[MAX_AD][AHCI_MAX_PORTS]; 658 extern u8 track_size[MAX_AD][AHCI_MAX_PORTS]; 659 extern u8 port_ignore[MAX_AD][AHCI_MAX_PORTS]; 660 508 extern u8 emulate_scsi[MAX_AD][AHCI_MAX_PORTS]; 509 extern u8 enable_ncq[MAX_AD][AHCI_MAX_PORTS]; 510 extern u8 link_speed[MAX_AD][AHCI_MAX_PORTS]; 511 extern u8 link_power[MAX_AD][AHCI_MAX_PORTS]; 512 extern u8 track_size[MAX_AD][AHCI_MAX_PORTS]; 513 extern u8 port_ignore[MAX_AD][AHCI_MAX_PORTS]; 514 515 #ifdef DEBUG 516 extern void DumpIorb(IORBH *pIorb); 517 #endif 518
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