Changeset 178 for trunk/src/os2ahci/ahci.c

Timestamp:

Nov 29, 2016, 5:30:22 AM (9 years ago)

Author:

David Azarewicz

Message:

Major reorganization

File:

• trunk/src/os2ahci/ahci.c (modified) (93 diffs)

trunk/src/os2ahci/ahci.c

@@ -4 +4 @@
  * Copyright (c) 2011 thi.guten Software Development
  * Copyright (c) 2011 Mensys B.V.
- * Copyright (c) 2013-2015 David Azarewicz
+ * Copyright (c) 2013-2016 David Azarewicz
  *
  * Authors: Christian Mueller, Markus Thielen
@@ -43 +43 @@
 /* -------------------------- function prototypes -------------------------- */
 
-static void ahci_setup_device     (AD_INFO *ai, int p, int d, u16 *id_buf);
+static void ahci_setup_device(AD_INFO *ai, int p, int d, u16 *id_buf);
 
 /* ------------------------ global/static variables ------------------------ */
@@ -58 +58 @@
  *       pointers to all handler functions which may need to be overridden.
  */
-u16 initial_flags[] = {
+u16 initial_flags[] =
+{
   0,                                        /* board_ahci */
   AHCI_HFLAG_NO_NCQ |                       /* board_ahci_vt8251 */
@@ -84 +85 @@
  * index to the corresponding IRQ.
  */
-static u16      irq_map[MAX_AD];   /* IRQ level for each stub IRQ func */
-static int      irq_map_cnt;       /* number of IRQ stub funcs used */
+static u16 irq_map[MAX_AD];   /* IRQ level for each stub IRQ func */
+static int irq_map_cnt;       /* number of IRQ stub funcs used */
 
 /* ----------------------------- start of code ----------------------------- */
@@ -106 +107 @@
  * bit 0 will be set when the interrupt was not handled.
  */
-#define call_ahci_intr(i)   return(ahci_intr(irq_map[i]) >> 1)
-
-static USHORT _cdecl _far irq_handler_00(void)  { call_ahci_intr(0); }
-static USHORT _cdecl _far irq_handler_01(void)  { call_ahci_intr(1); }
-static USHORT _cdecl _far irq_handler_02(void)  { call_ahci_intr(2); }
-static USHORT _cdecl _far irq_handler_03(void)  { call_ahci_intr(3); }
-static USHORT _cdecl _far irq_handler_04(void)  { call_ahci_intr(4); }
-static USHORT _cdecl _far irq_handler_05(void)  { call_ahci_intr(5); }
-static USHORT _cdecl _far irq_handler_06(void)  { call_ahci_intr(6); }
-static USHORT _cdecl _far irq_handler_07(void)  { call_ahci_intr(7); }
-
-PFN irq_handlers[] = {
+#define call_ahci_intr(i)   return(ahci_intr(irq_map[i]))
+
+static USHORT _cdecl irq_handler_00(void)  { call_ahci_intr(0); }
+static USHORT _cdecl irq_handler_01(void)  { call_ahci_intr(1); }
+static USHORT _cdecl irq_handler_02(void)  { call_ahci_intr(2); }
+static USHORT _cdecl irq_handler_03(void)  { call_ahci_intr(3); }
+static USHORT _cdecl irq_handler_04(void)  { call_ahci_intr(4); }
+static USHORT _cdecl irq_handler_05(void)  { call_ahci_intr(5); }
+static USHORT _cdecl irq_handler_06(void)  { call_ahci_intr(6); }
+static USHORT _cdecl irq_handler_07(void)  { call_ahci_intr(7); }
+
+PFN irq_handlers[] =
+{
   (PFN) irq_handler_00, (PFN) irq_handler_01, (PFN) irq_handler_02,
   (PFN) irq_handler_03, (PFN) irq_handler_04, (PFN) irq_handler_05,
@@ -123 +125 @@
 };
 
+#ifdef DEBUG
 void ahci_dump_host_regs(AD_INFO *ai, int bios_regs)
 {
-  #ifdef DEBUG
   int i;
   u32 version;
 
-  aprintf("AHCI global registers for adapter %d %d:%d:%d irq=%d addr=0x%lx\n",
-      ad_no(ai), ai->bus, ai->dev_func>>3, ai->dev_func&7, ai->irq, ai->mmio_phys);
+  DPRINTF(2,"AHCI global registers for adapter %d %d:%d:%d irq=%d addr=0x%x\n",
+      ad_no(ai),
+      PCI_BUS_FROM_BDF(ai->bus_dev_func), PCI_DEV_FROM_BDF(ai->bus_dev_func),
+      PCI_FUNC_FROM_BDF(ai->bus_dev_func), ai->irq, ai->mmio_phys);
 
   for (i = 0; i <= HOST_CAP2; i += sizeof(u32)) {
@@ -144 +148 @@
     if (i == HOST_VERSION) version = val;
 
-    ntprintf(" %02x: %08lx", i, val);
+    NTPRINTF(" %02x: %08lx", i, val);
 
     if (i == HOST_CAP) {
-      ntprintf(" -");
-      if (val & HOST_CAP_64)         ntprintf(" 64bit");
-      if (val & HOST_CAP_NCQ)        ntprintf(" ncq");
-      if (val & HOST_CAP_SNTF)       ntprintf(" sntf");
-      if (val & HOST_CAP_MPS)        ntprintf(" mps");
-      if (val & HOST_CAP_SSS)        ntprintf(" sss");
-      if (val & HOST_CAP_ALPM)       ntprintf(" alpm");
-      if (val & HOST_CAP_LED)        ntprintf(" led");
-      if (val & HOST_CAP_CLO)        ntprintf(" clo");
-      if (val & HOST_CAP_ONLY)       ntprintf(" ahci_only");
-      if (val & HOST_CAP_PMP)        ntprintf(" pmp");
-      if (val & HOST_CAP_FBS)        ntprintf(" fbs");
-      if (val & HOST_CAP_PIO_MULTI)  ntprintf(" pio_multi");
-      if (val & HOST_CAP_SSC)        ntprintf(" ssc");
-      if (val & HOST_CAP_PART)       ntprintf(" part");
-      if (val & HOST_CAP_CCC)        ntprintf(" ccc");
-      if (val & HOST_CAP_EMS)        ntprintf(" ems");
-      if (val & HOST_CAP_SXS)        ntprintf(" sxs");
-      ntprintf(" cmd_slots:%d", (u16) ((val >> 8) & 0x1f) + 1);
-      ntprintf(" ports:%d",     (u16) (val & 0x1f) + 1);
+      NTPRINTF(" -");
+      if (val & HOST_CAP_64)         NTPRINTF(" 64bit");
+      if (val & HOST_CAP_NCQ)        NTPRINTF(" ncq");
+      if (val & HOST_CAP_SNTF)       NTPRINTF(" sntf");
+      if (val & HOST_CAP_MPS)        NTPRINTF(" mps");
+      if (val & HOST_CAP_SSS)        NTPRINTF(" sss");
+      if (val & HOST_CAP_ALPM)       NTPRINTF(" alpm");
+      if (val & HOST_CAP_LED)        NTPRINTF(" led");
+      if (val & HOST_CAP_CLO)        NTPRINTF(" clo");
+      if (val & HOST_CAP_ONLY)       NTPRINTF(" ahci_only");
+      if (val & HOST_CAP_PMP)        NTPRINTF(" pmp");
+      if (val & HOST_CAP_FBS)        NTPRINTF(" fbs");
+      if (val & HOST_CAP_PIO_MULTI)  NTPRINTF(" pio_multi");
+      if (val & HOST_CAP_SSC)        NTPRINTF(" ssc");
+      if (val & HOST_CAP_PART)       NTPRINTF(" part");
+      if (val & HOST_CAP_CCC)        NTPRINTF(" ccc");
+      if (val & HOST_CAP_EMS)        NTPRINTF(" ems");
+      if (val & HOST_CAP_SXS)        NTPRINTF(" sxs");
+      NTPRINTF(" cmd_slots:%d", ((val >> 8) & 0x1f) + 1);
+      NTPRINTF(" ports:%d",     (val & 0x1f) + 1);
     } else if (i == HOST_CTL) {
-      ntprintf(" -");
-      if (val & HOST_AHCI_EN)        ntprintf(" ahci_enabled");
-      if (val & HOST_IRQ_EN)         ntprintf(" irq_enabled");
-      if (val & HOST_RESET)          ntprintf(" resetting");
+      NTPRINTF(" -");
+      if (val & HOST_AHCI_EN)        NTPRINTF(" ahci_enabled");
+      if (val & HOST_IRQ_EN)         NTPRINTF(" irq_enabled");
+      if (val & HOST_RESET)          NTPRINTF(" resetting");
     } else if (i == HOST_CAP2) {
-      ntprintf(" -");
-      if (val & HOST_CAP2_BOH)       ntprintf(" boh");
-      if (val & HOST_CAP2_NVMHCI)    ntprintf(" nvmhci");
-      if (val & HOST_CAP2_APST)      ntprintf(" apst");
-    }
-    ntprintf("\n");
-  }
-  #endif
+      NTPRINTF(" -");
+      if (val & HOST_CAP2_BOH)       NTPRINTF(" boh");
+      if (val & HOST_CAP2_NVMHCI)    NTPRINTF(" nvmhci");
+      if (val & HOST_CAP2_APST)      NTPRINTF(" apst");
+    }
+    NTPRINTF("\n");
+  }
 }
 
 void ahci_dump_port_regs(AD_INFO *ai, int p)
 {
-  #ifdef DEBUG
-  u8 _far *port_mmio = port_base(ai, p);
-
-  aprintf("AHCI port %d registers:\n", p);
-  ntprintf(" PORT_CMD       = 0x%lx\n", readl(port_mmio + PORT_CMD));
-  ntprintf("command engine status:\n");
-  ntprintf(" PORT_SCR_ACT   = 0x%lx\n", readl(port_mmio + PORT_SCR_ACT));
-  ntprintf(" PORT_CMD_ISSUE = 0x%lx\n", readl(port_mmio + PORT_CMD_ISSUE));
-  ntprintf("link/device status:\n");
-  ntprintf(" PORT_SCR_STAT  = 0x%lx\n", readl(port_mmio + PORT_SCR_STAT));
-  ntprintf(" PORT_SCR_CTL   = 0x%lx\n", readl(port_mmio + PORT_SCR_CTL));
-  ntprintf(" PORT_SCR_ERR   = 0x%lx\n", readl(port_mmio + PORT_SCR_ERR));
-  ntprintf(" PORT_TFDATA    = 0x%lx\n", readl(port_mmio + PORT_TFDATA));
-  ntprintf("interrupt status:\n");
-  ntprintf(" PORT_IRQ_STAT  = 0x%lx\n", readl(port_mmio + PORT_IRQ_STAT));
-  ntprintf(" PORT_IRQ_MASK  = 0x%lx\n", readl(port_mmio + PORT_IRQ_MASK));
-  ntprintf(" HOST_IRQ_STAT  = 0x%lx\n", readl(ai->mmio + HOST_IRQ_STAT));
-  #endif
-}
+  u8 *port_mmio = port_base(ai, p);
+
+  dprintf(0,"AHCI port %d registers:\n", p);
+  dprintf(0,"  PORT_CMD       = 0x%x\n", readl(port_mmio + PORT_CMD));
+  dprintf(0," command engine status:\n");
+  dprintf(0,"  PORT_SCR_ACT   = 0x%x\n", readl(port_mmio + PORT_SCR_ACT));
+  dprintf(0,"  PORT_CMD_ISSUE = 0x%x\n", readl(port_mmio + PORT_CMD_ISSUE));
+  dprintf(0," link/device status:\n");
+  dprintf(0,"  PORT_SCR_STAT  = 0x%x\n", readl(port_mmio + PORT_SCR_STAT));
+  dprintf(0,"  PORT_SCR_CTL   = 0x%x\n", readl(port_mmio + PORT_SCR_CTL));
+  dprintf(0,"  PORT_SCR_ERR   = 0x%x\n", readl(port_mmio + PORT_SCR_ERR));
+  dprintf(0,"  PORT_TFDATA    = 0x%x\n", readl(port_mmio + PORT_TFDATA));
+  dprintf(0," interrupt status:\n");
+  dprintf(0,"  PORT_IRQ_STAT  = 0x%x\n", readl(port_mmio + PORT_IRQ_STAT));
+  dprintf(0,"  PORT_IRQ_MASK  = 0x%x\n", readl(port_mmio + PORT_IRQ_MASK));
+  dprintf(0,"  HOST_IRQ_STAT  = 0x%x\n", readl(ai->mmio + HOST_IRQ_STAT));
+}
+#endif
 
 /******************************************************************************
@@ -221 +223 @@
 
   /* save BIOS configuration */
-  for (i = 0; i < HOST_CAP2; i += sizeof(u32)) {
+  for (i = 0; i < HOST_CAP2; i += sizeof(u32))
+  {
     ai->bios_config[i / sizeof(u32)] = readl(ai->mmio + i);
   }
 
-  ddprintf("ahci_save_bios_config: BIOS AHCI mode is %d\n", ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN);
+  DPRINTF(3,"ahci_save_bios_config: BIOS AHCI mode is %d\n", ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN);
 
   /* HOST_CAP2 only exists for AHCI V1.2 and later */
-  if (ai->bios_config[HOST_VERSION / sizeof(u32)] >= 0x00010200L) {
+  if (ai->bios_config[HOST_VERSION / sizeof(u32)] >= 0x00010200L)
+  {
     ai->bios_config[HOST_CAP2 / sizeof(u32)] = readl(ai->mmio + HOST_CAP2);
-  } else {
+  }
+  else
+  {
     ai->bios_config[HOST_CAP2 / sizeof(u32)] = 0;
   }
 
   if ((ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) == 0 &&
-      ai->pci_vendor == PCI_VENDOR_ID_INTEL) {
+      ai->pci_vendor == PCI_VENDOR_ID_INTEL)
+  {
     /* Adapter is not in AHCI mode and the spec says a COMRESET is
      * required when switching from SATA to AHCI mode and vice versa.
@@ -242 +249 @@
   }
 
-  #ifdef DEBUG
-  /* print AHCI register debug information */
-  if (debug) ahci_dump_host_regs(ai, 1);
-  #endif
+  DUMP_HOST_REGS(2,ai,1);
 
   /* Save working copies of CAP, CAP2 and port_map and remove broken feature
@@ -255 +259 @@
   ai->port_map = ai->bios_config[HOST_PORTS_IMPL / sizeof(u32)];
 
-  if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags)) {
-    dprintf("error: invalid board index in PCI info\n");
+  if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags))
+  {
+    DPRINTF(0,"error: invalid board index in PCI info\n");
     return(-1);
   }
@@ -262 +267 @@
   ai->hw_ports = (ai->cap & 0x1f) + 1;
 
-  if ((ai->cap & HOST_CAP_64) && (ai->flags & AHCI_HFLAG_32BIT_ONLY)) {
+  if ((ai->cap & HOST_CAP_64) && (ai->flags & AHCI_HFLAG_32BIT_ONLY))
+  {
     /* disable 64-bit support for faulty controllers; OS/2 can't do 64 bits at
      * this point, of course, but who knows where all this will be in a few
@@ -270 +276 @@
   }
 
-  if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ)) {
-    dprintf("controller can't do NCQ, turning off CAP_NCQ\n");
+  if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ))
+  {
+    DPRINTF(1,"controller can't do NCQ, turning off CAP_NCQ\n");
     ai->cap &= ~HOST_CAP_NCQ;
   }
 
-  if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ)) {
-    dprintf("controller can do NCQ, turning on CAP_NCQ\n");
+  if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ))
+  {
+    DPRINTF(1,"controller can do NCQ, turning on CAP_NCQ\n");
     ai->cap |= HOST_CAP_NCQ;
   }
 
-  if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP)) {
-    dprintf("controller can't do PMP, turning off CAP_PMP\n");
+  if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP))
+  {
+    DPRINTF(1,"controller can't do PMP, turning off CAP_PMP\n");
     ai->cap |= HOST_CAP_PMP;
   }
 
-  if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF)) {
-    dprintf("controller can't do SNTF, turning off CAP_SNTF\n");
+  if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF))
+  {
+    DPRINTF(1,"controller can't do SNTF, turning off CAP_SNTF\n");
     ai->cap &= ~HOST_CAP_SNTF;
   }
 
-  if (ai->pci_vendor == PCI_VENDOR_ID_JMICRON &&
-      ai->pci_device == 0x2361 && ai->port_map != 1) {
-    dprintf("JMB361 has only one port, port_map 0x%lx -> 0x%lx\n", ai->port_map, 1);
+  if (ai->pci_vendor == PCI_VENDOR_ID_JMICRON && ai->pci_device == 0x2361 && ai->port_map != 1)
+  {
+    DPRINTF(1,"JMB361 has only one port, port_map 0x%x -> 0x%x\n", ai->port_map, 1);
     ai->port_map = 1;
     ai->hw_ports = 1;
@@ -307 +317 @@
    */
   ports = ai->hw_ports;
-  for (i = 0; i < AHCI_MAX_PORTS; i++) {
-    if (ai->port_map & (1UL << i)) {
+  for (i = 0; i < AHCI_MAX_PORTS; i++)
+  {
+    if (ai->port_map & (1UL << i))
+    {
       ports--;
     }
   }
-  if (ports < 0) {
+  if (ports < 0)
+  {
     /* more ports in port_map than in HOST_CAP & 0x1f */
     ports = ai->hw_ports;
-    dprintf("implemented port map (0x%lx) contains more ports than nr_ports (%d), using nr_ports\n", ai->port_map, ports);
+    DPRINTF(1,"implemented port map (0x%x) contains more ports than nr_ports (%d), using nr_ports\n", ai->port_map, ports);
     ai->port_map = (1UL << ports) - 1UL;
   }
 
   /* set maximum command slot number */
-  ai->cmd_max = (u16) ((ai->cap >> 8) & 0x1f);
+  ai->cmd_max = ((ai->cap >> 8) & 0x1f);
 
   return(0);
@@ -332 +345 @@
 int ahci_restore_bios_config(AD_INFO *ai)
 {
-  ddprintf("ahci_restore_bios_config: restoring AHCI BIOS configuration on adapter %d\n", ad_no(ai));
+  DPRINTF(3,"ahci_restore_bios_config: restoring AHCI BIOS configuration on adapter %d\n", ad_no(ai));
 
   /* Restore saved BIOS configuration; please note that HOST_CTL is restored
@@ -345 +358 @@
   readl(ai->mmio + HOST_CTL);
 
-  if ((ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) == 0 && ai->pci_vendor == PCI_VENDOR_ID_INTEL) {
-
+  if ((ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) == 0 && ai->pci_vendor == PCI_VENDOR_ID_INTEL)
+  {
     /* This BIOS apparently accesses the controller via SATA registers and
      * the AHCI spec says that we should issue a COMRESET on each port after
@@ -361 +374 @@
     int p;
 
-    for (p = 0; p < AHCI_MAX_PORTS; p++) {
-      if (ai->port_map & (1UL << p)) {
-        u8 _far *port_mmio = port_base(ai, p);
+    for (p = 0; p < AHCI_MAX_PORTS; p++)
+    {
+      if (ai->port_map & (1UL << p))
+      {
+        u8 *port_mmio = port_base(ai, p);
         u32 tmp;
 
@@ -388 +403 @@
 int ahci_restore_initial_config(AD_INFO *ai)
 {
-  ddprintf("ahci_restore_initial_config: restoring initial configuration on adapter %d\n", ad_no(ai));
+  DPRINTF(3,"ahci_restore_initial_config: restoring initial configuration on adapter %d\n", ad_no(ai));
 
   /* restore saved BIOS configuration */
@@ -413 +428 @@
     TIMER Timer;
 
-    dprintf("controller reset starting on adapter %d\n", ad_no(ai));
+    DPRINTF(2,"controller reset starting on adapter %d\n", ad_no(ai));
 
     /* we must be in AHCI mode, before using anything AHCI-specific, such as HOST_RESET. */
@@ -431 +446 @@
      * the hardware should be considered fried.
      */
-    timer_init(&Timer, 1000);
+    TimerInit(&Timer, 1000);
     while (((tmp = readl(ai->mmio + HOST_CTL)) & HOST_RESET) != 0) {
-      if (timer_check_and_block(&Timer)) {
-        dprintf("controller reset failed (0x%lx)\n", tmp);
+      if (TimerCheckAndBlock(&Timer)) {
+        DPRINTF(0,"controller reset failed (0x%x)\n", tmp);
         return(-1);
       }
@@ -448 +463 @@
       u32 tmp16 = 0;
 
-      ddprintf("ahci_reset_controller: intel detected\n");
+      DPRINTF(1,"ahci_reset_controller: intel detected\n");
       /* configure PCS */
-      pci_read_conf(ai->bus, ai->dev_func, 0x92, sizeof(u16), &tmp16);
+      PciReadConfig(ai->bus, ai->dev_func, 0x92, sizeof(u16), &tmp16);
       if ((tmp16 & ai->port_map) != ai->port_map) {
-        ddprintf("ahci_reset_controller: updating PCS %x/%x\n", (u16)tmp16, ai->port_map);
+        DPRINTF(3,"ahci_reset_controller: updating PCS %x/%x\n", tmp16, ai->port_map);
         tmp16 |= ai->port_map;
-        pci_write_conf(ai->bus, ai->dev_func, 0x92, sizeof(u16), tmp16);
+        PciWriteConfig(ai->bus, ai->dev_func, 0x92, sizeof(u16), tmp16);
       }
     }
@@ -472 +487 @@
 {
   AHCI_PORT_CFG *pc;
-  u8 _far *port_mmio = port_base(ai, p);
-
-  if ((pc = malloc(sizeof(*pc))) == NULL) {
-    return(NULL);
-  }
+  u8 *port_mmio = port_base(ai, p);
+
+  if ((pc = MemAlloc(sizeof(*pc))) == NULL) return(NULL);
 
   pc->cmd_list   = readl(port_mmio + PORT_LST_ADDR);
@@ -496 +509 @@
 void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
 
   /* stop the port, first */
   ahci_stop_port(ai, p);
 
-  if (ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN) {
+  if (ai->bios_config[HOST_CTL / sizeof(u32)] & HOST_AHCI_EN)
+  {
     /* BIOS uses AHCI, too, so we need to restore the port settings;
      * restoring PORT_CMD may well start the port again but that's what
@@ -516 +530 @@
   }
 
-  free(pc);
+  MemFree(pc);
 }
 
@@ -527 +541 @@
   int i;
 
-  if (ctl & HOST_AHCI_EN) {
+  if (ctl & HOST_AHCI_EN)
+  {
     /* AHCI mode already enabled */
     return(0);
@@ -533 +548 @@
 
   /* some controllers need AHCI_EN to be written multiple times */
-  for (i = 0; i < 5; i++) {
+  for (i = 0; i < 5; i++)
+  {
     ctl |= HOST_AHCI_EN;
     writel(ai->mmio + HOST_CTL, ctl);
     ctl = readl(ai->mmio + HOST_CTL);   /* flush && sanity check */
-    if (ctl & HOST_AHCI_EN) {
+    if (ctl & HOST_AHCI_EN)
+    {
       return(0);
     }
@@ -544 +561 @@
 
   /* couldn't enable AHCI mode */
-  dprintf("failed to enable AHCI mode on adapter %d\n", ad_no(ai));
+  DPRINTF(0,"failed to enable AHCI mode on adapter %d\n", ad_no(ai));
   return(1);
 }
@@ -575 +592 @@
   TIMER Timer;
 
-  if ((id_buf = malloc(ATA_ID_WORDS * sizeof(u16))) == NULL) {
-    return(-1);
-  }
-
-  if (ai->bios_config[0] == 0) {
-    /* first call */
-    ahci_save_bios_config(ai);
-  }
-
-  if (ahci_enable_ahci(ai)) {
-    goto exit_port_scan;
-  }
+  if ((id_buf = MemAlloc(ATA_ID_WORDS * sizeof(u16))) == NULL) return(-1);
+
+  if (ai->bios_config[0] == 0) ahci_save_bios_config(ai); /* first call */
+
+  if (ahci_enable_ahci(ai)) goto exit_port_scan;
 
   /* perform port scan */
-  dprintf("ahci_scan_ports: scanning ports on adapter %d\n", ad_no(ai));
-  for (p = 0; p < AHCI_MAX_PORTS; p++) {
+  DPRINTF(1,"ahci_scan_ports: scanning ports on adapter %d\n", ad_no(ai));
+  for (p = 0; p < AHCI_MAX_PORTS; p++)
+  {
     if (!(ai->port_map & (1UL << p))) continue;
     if (port_ignore[ad_no(ai)][p]) continue;
 
-    ddprintf("ahci_scan_ports: Wait till not busy on port %d\n", p);
+    DPRINTF(3,"ahci_scan_ports: Wait till not busy on port %d\n", p);
     /* wait until all active commands have completed on this port */
-    timer_init(&Timer, 250);
-    while (ahci_port_busy(ai, p)) {
-      if (timer_check_and_block(&Timer)) break;
-    }
-
-    if (!init_complete) {
-      if ((pc = ahci_save_port_config(ai, p)) == NULL) {
-        goto exit_port_scan;
-      }
+    TimerInit(&Timer, 250);
+    while (ahci_port_busy(ai, p))
+    {
+      if (TimerCheckAndBlock(&Timer)) break;
+    }
+
+    if (!init_complete)
+    {
+      if ((pc = ahci_save_port_config(ai, p)) == NULL) goto exit_port_scan;
     }
 
     /* start/reset port; if no device is attached, this is expected to fail */
-    if (init_reset) {
+    if (init_reset)
+    {
       rc = ahci_reset_port(ai, p, 0);
-    } else {
-      ddprintf("ahci_scan_ports: (re)starting port %d\n", p);
+    }
+    else
+    {
+      DPRINTF(3,"ahci_scan_ports: (re)starting port %d\n", p);
       ahci_stop_port(ai, p);
       rc = ahci_start_port(ai, p, 0);
     }
-    if (rc) {
+    if (rc)
+    {
       /* no device attached to this port */
       ai->port_map &= ~(1UL << p);
@@ -622 +637 @@
 
     /* this port seems to have a device attached and ready for commands */
-    ddprintf("ahci_scan_ports: port %d seems to be attached to a device; probing...\n", p);
+    DPRINTF(1,"ahci_scan_ports: port %d seems to be attached to a device; probing...\n", p);
 
     /* Get ATA(PI) identity. The so-called signature gives us a hint whether
@@ -632 +647 @@
      */
     is_ata = readl(port_base(ai, p) + PORT_SIG) == 0x00000101UL;
-    for (i = 0; i < 2; i++) {
+    for (i = 0; i < 2; i++)
+    {
       rc = ahci_exec_polled_cmd(ai, p, 0, 500,
                                 (is_ata) ? ATA_CMD_ID_ATA : ATA_CMD_ID_ATAPI,
-                                AP_VADDR, (void _far *) id_buf, 512,
+                                AP_VADDR, (void *) id_buf, ATA_ID_WORDS * sizeof(u16),
                                 AP_END);
-      if (rc == 0) {
-        break;
-      }
+      if (rc == 0) break;
 
       /* try again with ATA/ATAPI swapped */
@@ -645 +659 @@
     }
 
-    if (rc == 0) {
+    if (rc == 0)
+    {
       /* we have a valid IDENTIFY or IDENTIFY_PACKET response */
-      ddphex(id_buf, 512, "ATA_IDENTIFY%s results:\n", (is_ata) ? "" : "_PACKET");
+      DHEXDUMP(2,id_buf, ATA_ID_WORDS * sizeof(u16), "ATA_IDENTIFY%s results:\n", (is_ata) ? "" : "_PACKET");
       ahci_setup_device(ai, p, 0, id_buf);
-    } else {
+    }
+    else
+    {
       /* no device attached to this port */
       ai->port_map &= ~(1UL << p);
@@ -661 +678 @@
 
 exit_port_scan:
-  if (!init_complete) {
+  if (!init_complete)
+  {
     ahci_restore_bios_config(ai);
   }
-  free(id_buf);
+  MemFree(id_buf);
   return(0);
 }
@@ -676 +694 @@
 {
   int rc;
-  int p;
+  u32 p;
   int i;
 
-  dprintf("ahci_complete_init: completing initialization of adapter #%d\n", ad_no(ai));
+  DPRINTF(1,"ahci_complete_init: completing initialization of adapter #%d\n", ad_no(ai));
 
   /* register IRQ handlers; each IRQ level is registered only once */
-  for (i = 0; i < irq_map_cnt; i++) {
-    if (irq_map[i] == ai->irq) {
-      /* we already have this IRQ registered */
-      break;
-    }
-  }
-  if (i >= irq_map_cnt) {
-    dprintf("registering interrupt #%d\n", ai->irq);
-    if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 1) != 0) {
-      dprintf("failed to register shared interrupt\n");
-      if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 0) != 0) {
-        dprintf("failed to register exclusive interrupt\n");
+  for (i = 0; i < irq_map_cnt; i++)
+  {
+    if (irq_map[i] == ai->irq) break; /* we already have this IRQ registered */
+  }
+  if (i >= irq_map_cnt)
+  {
+    DPRINTF(2,"registering interrupt #%d\n", ai->irq);
+    if (Dev32Help_SetIRQ(irq_handlers[irq_map_cnt], ai->irq, 1) != 0)
+    {
+      DPRINTF(0,"failed to register shared interrupt\n");
+      if (Dev32Help_SetIRQ(irq_handlers[irq_map_cnt], ai->irq, 0) != 0)
+      {
+        DPRINTF(0,"failed to register exclusive interrupt\n");
         return(-1);
       }
@@ -701 +720 @@
 
   /* enable AHCI mode */
-  if ((rc = ahci_enable_ahci(ai)) != 0) {
-    return(rc);
-  }
+  if ((rc = ahci_enable_ahci(ai)) != 0) return(rc);
 
   /* Start all ports. The main purpose is to set the command list and FIS
@@ -710 +727 @@
    * enough if a previously detected device has problems.
    */
-  for (p = 0; p < AHCI_MAX_PORTS; p++) {
-    if (ai->port_map & (1UL << p)) {
-      if (init_reset) {
-        ddprintf("ahci_complete_init: resetting port %d\n", p);
+  for (p = 0; p < AHCI_MAX_PORTS; p++)
+  {
+    if (ai->port_map & (1UL << p))
+    {
+      if (init_reset)
+      {
+        DPRINTF(3,"ahci_complete_init: resetting port %d\n", p);
         ahci_reset_port(ai, p, 1);
-      } else {
-        ddprintf("ahci_complete_init: restarting port #%d\n", p);
+      }
+      else
+      {
+        DPRINTF(3,"ahci_complete_init: restarting port #%d\n", p);
         ahci_stop_port(ai, p);
         ahci_start_port(ai, p, 1);
@@ -734 +756 @@
   /* pci_enable_int(ai->bus, ai->dev_func); */
 
+  DPRINTF(1,"ahci_complete_init: done\n");
   return(0);
 }
@@ -751 +774 @@
 int ahci_reset_port(AD_INFO *ai, int p, int ei)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   u32 tmp;
   TIMER Timer;
 
-  dprintf("ahci_reset_port: resetting port %d.%d\n", ad_no(ai), p);
-  if (debug > 1) ahci_dump_port_regs(ai, p);
+  DPRINTF(2,"ahci_reset_port: resetting port %d.%d\n", ad_no(ai), p);
+  DUMP_PORT_REGS(2,ai,p);
 
   /* stop port engines (we don't care whether there is an error doing so) */
@@ -772 +795 @@
 
   /* set link speed and power management options */
-  ddprintf("ahci_reset_port: setting link speed and power management options\n");
+  DPRINTF(3,"ahci_reset_port: setting link speed and power management options\n");
   tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x00000fffUL;
-  tmp |= ((u32) link_speed[ad_no(ai)][p] & 0x0f) << 4;
-  tmp |= ((u32) link_power[ad_no(ai)][p] & 0x0f) << 8;
+  tmp |= (link_speed[ad_no(ai)][p] & 0x0f) << 4;
+  tmp |= (link_power[ad_no(ai)][p] & 0x0f) << 8;
   writel(port_mmio + PORT_SCR_CTL, tmp);
 
   /* issue COMRESET on the port */
-  ddprintf("ahci_reset_port: issuing COMRESET on port %d\n", p);
+  DPRINTF(3,"ahci_reset_port: issuing COMRESET on port %d\n", p);
   writel(port_mmio + PORT_SCR_CTL, tmp | 1);
   readl(port_mmio + PORT_SCR_CTL);  /* flush */
@@ -790 +813 @@
 
   /* wait for communication to be re-established after port reset */
-  dprintf("Wait for communication...\n");
-  timer_init(&Timer, 500);
-  while (((tmp = readl(port_mmio + PORT_SCR_STAT)) & 3) != 3) {
-    if (timer_check_and_block(&Timer)) {
-      dprintf("no device present after resetting port #%d (PORT_SCR_STAT = 0x%lx)\n", p, tmp);
+  DPRINTF(2,"Wait for communication...\n");
+  TimerInit(&Timer, 500);
+  while (((tmp = readl(port_mmio + PORT_SCR_STAT)) & 3) != 3)
+  {
+    if (TimerCheckAndBlock(&Timer))
+    {
+      DPRINTF(0,"no device present after resetting port #%d (PORT_SCR_STAT = 0x%x)\n", p, tmp);
       return(-1);
     }
@@ -804 +829 @@
 
   /* start port so we can receive the COMRESET FIS */
-  dprintf("ahci_reset_port: starting port %d again\n", p);
+  DPRINTF(2,"ahci_reset_port: starting port %d again\n", p);
   ahci_start_port(ai, p, ei);
 
   /* wait for device to be ready ((PxTFD & (BSY | DRQ | ERR)) == 0) */
-  timer_init(&Timer, 1000);
-  while (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
-    if (timer_check_and_block(&Timer)) {
-      dprintf("device not ready on port #%d (PORT_TFDATA = 0x%lx)\n", p, tmp);
+  TimerInit(&Timer, 1000);
+  while (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0)
+  {
+    if (TimerCheckAndBlock(&Timer))
+    {
+      DPRINTF(0,"device not ready on port #%d (PORT_TFDATA = 0x%x)\n", p, tmp);
       ahci_stop_port(ai, p);
       return(-1);
     }
   }
-  ddprintf("ahci_reset_port: PORT_TFDATA = 0x%lx\n", readl(port_mmio + PORT_TFDATA));
+  DPRINTF(3,"ahci_reset_port: PORT_TFDATA = 0x%x\n", readl(port_mmio + PORT_TFDATA));
 
   return(0);
@@ -826 +853 @@
 int ahci_start_port(AD_INFO *ai, int p, int ei)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   u32 status;
 
-  ddprintf("ahci_start_port %d.%d\n", ad_no(ai), p);
+  DPRINTF(3,"ahci_start_port %d.%d\n", ad_no(ai), p);
   /* check whether device presence is detected and link established */
 
   status = readl(port_mmio + PORT_SCR_STAT);
-  ddprintf("ahci_start_port: PORT_SCR_STAT = 0x%lx\n", status);
-  if ((status & 0xf) != 3) {
-    return(-1);
-  }
+  DPRINTF(3,"ahci_start_port: PORT_SCR_STAT = 0x%x\n", status);
+  if ((status & 0xf) != 3) return(-1);
 
   /* clear SError, if any */
   status = readl(port_mmio + PORT_SCR_ERR);
-  ddprintf("ahci_start_port: PORT_SCR_ERR  = 0x%lx\n", status);
+  DPRINTF(3,"ahci_start_port: PORT_SCR_ERR  = 0x%x\n", status);
   writel(port_mmio + PORT_SCR_ERR, status);
 
@@ -849 +874 @@
   ahci_start_engine(ai, p);
 
-  if (ei) {
+  if (ei)
+  {
     /* clear any pending interrupts on this port */
-    if ((status = readl(port_mmio + PORT_IRQ_STAT)) != 0) {
+    if ((status = readl(port_mmio + PORT_IRQ_STAT)) != 0)
+    {
       writel(port_mmio + PORT_IRQ_STAT, status);
     }
@@ -867 +894 @@
                                       PORT_IRQ_PIOS_FIS |
                                       PORT_IRQ_D2H_REG_FIS);
-  } else {
+  }
+  else
+  {
     writel(port_mmio + PORT_IRQ_MASK, 0);
   }
@@ -881 +910 @@
 void ahci_start_fis_rx(AD_INFO *ai, int p)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   u32 port_dma = port_dma_base_phys(ai, p);
   u32 tmp;
@@ -905 +934 @@
 void ahci_start_engine(AD_INFO *ai, int p)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   u32 tmp;
 
@@ -920 +949 @@
 int ahci_stop_port(AD_INFO *ai, int p)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   u32 tmp;
   int rc;
 
-  ddprintf("ahci_stop_port %d.%d\n", ad_no(ai), p);
+  DPRINTF(3,"ahci_stop_port %d.%d\n", ad_no(ai), p);
 
   /* disable port interrupts */
@@ -930 +959 @@
 
   /* disable FIS reception */
-  if ((rc = ahci_stop_fis_rx(ai, p)) != 0) {
-    dprintf("error: failed to stop FIS receive (%d)\n", rc);
+  if ((rc = ahci_stop_fis_rx(ai, p)) != 0)
+  {
+    DPRINTF(0,"error: failed to stop FIS receive (%d)\n", rc);
     return(rc);
   }
 
   /* disable command engine */
-  if ((rc = ahci_stop_engine(ai, p)) != 0) {
-    dprintf("error: failed to stop port HW engine (%d)\n", rc);
+  if ((rc = ahci_stop_engine(ai, p)) != 0)
+  {
+    DPRINTF(0,"error: failed to stop port HW engine (%d)\n", rc);
     return(rc);
   }
@@ -943 +974 @@
   /* clear any pending port IRQs */
   tmp = readl(port_mmio + PORT_IRQ_STAT);
-  if (tmp) {
-    writel(port_mmio + PORT_IRQ_STAT, tmp);
-  }
+  if (tmp) writel(port_mmio + PORT_IRQ_STAT, tmp);
   writel(ai->mmio + HOST_IRQ_STAT, 1UL << p);
 
@@ -965 +994 @@
 int ahci_stop_fis_rx(AD_INFO *ai, int p)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   TIMER Timer;
   u32 tmp;
@@ -977 +1006 @@
   /* wait for completion, spec says 500ms, give it 1000ms */
   status = 0;
-  timer_init(&Timer, 1000);
-  while (readl(port_mmio + PORT_CMD) & PORT_CMD_FIS_ON) {
-    status = timer_check_and_block(&Timer);
+  TimerInit(&Timer, 1000);
+  while (readl(port_mmio + PORT_CMD) & PORT_CMD_FIS_ON)
+  {
+    status = TimerCheckAndBlock(&Timer);
     if (status) break;
   }
@@ -995 +1025 @@
 int ahci_stop_engine(AD_INFO *ai, int p)
 {
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   TIMER Timer;
   int status;
@@ -1003 +1033 @@
 
   /* check if the port is already stopped */
-  if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) {
-    return 0;
-  }
+  if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) return 0;
 
   /* set port to idle */
@@ -1013 +1041 @@
   /* wait for engine to stop. This could be as long as 500 msec */
   status = 0;
-  timer_init(&Timer, 500);
-  while (readl(port_mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
-    status = timer_check_and_block(&Timer);
+  TimerInit(&Timer, 500);
+  while (readl(port_mmio + PORT_CMD) & PORT_CMD_LIST_ON)
+  {
+    status = TimerCheckAndBlock(&Timer);
     if (status) break;
   }
@@ -1027 +1056 @@
 int ahci_port_busy(AD_INFO *ai, int p)
 {
-  u8 _far *port_mmio = port_base(ai, p);
-
-  return(readl(port_mmio + PORT_SCR_ACT) != 0 ||
-         readl(port_mmio + PORT_CMD_ISSUE) != 0);
+  u8 *port_mmio = port_base(ai, p);
+
+  return(readl(port_mmio + PORT_SCR_ACT) != 0 || readl(port_mmio + PORT_CMD_ISSUE) != 0);
 }
 
@@ -1043 +1071 @@
  *       involve delays), we're going with the spinlock for the time being.
  */
-void ahci_exec_iorb(IORBH _far *iorb, int ncq_capable,
-                    int (*func)(IORBH _far *, int))
+void ahci_exec_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int ncq_capable, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int))
 {
   volatile u32 *cmds;
-  ADD_WORKSPACE _far *aws = add_workspace(iorb);
-  AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
-  P_INFO *port = ai->ports + iorb_unit_port(iorb);
+  ADD_WORKSPACE *aws = add_workspace(pIorb);
+  AD_INFO *ai = &ad_infos[iorb_unit_adapter(pIorb)];
+  P_INFO *port = &ai->ports[iorb_unit_port(pIorb)];
   ULONG timeout;
-  u8 _far *port_mmio = port_base(ai, iorb_unit_port(iorb));
+  u8 *port_mmio = port_base(ai, iorb_unit_port(pIorb));
   u16 cmd_max = ai->cmd_max;
   int i;
 
   /* determine timeout in milliseconds */
-  switch (iorb->Timeout) {
+  switch (pIorb->Timeout)
+  {
   case 0:
     timeout = DEFAULT_TIMEOUT;
@@ -1064 +1092 @@
     break;
   default:
-    timeout = iorb->Timeout * 1000;
+    timeout = pIorb->Timeout * 1000;
     break;
   }
+
+  DPRINTF(1,"---------- ahci_exec_iorb: iorb=%x\n", vIorb);
 
   /* Enable AHCI mode; apparently, the AHCI mode may end up becoming
@@ -1078 +1108 @@
   /* determine whether this will be an NCQ request */
   aws->is_ncq = 0;
-  if (ncq_capable && port->devs[iorb_unit_device(iorb)].ncq_max > 1 &&
-      (ai->cap & HOST_CAP_NCQ) && !aws->no_ncq && init_complete) {
+  if (ncq_capable && port->devs[iorb_unit_device(pIorb)].ncq_max > 1 &&
+      (ai->cap & HOST_CAP_NCQ) && !aws->no_ncq && init_complete)
+  {
 
     /* We can make this an NCQ request; limit command slots to the maximum
@@ -1087 +1118 @@
      */
     aws->is_ncq = 1;
-    if ((cmd_max = port->devs[iorb_unit_device(iorb)].ncq_max - 1) > ai->cmd_max) {
+    if ((cmd_max = port->devs[iorb_unit_device(pIorb)].ncq_max - 1) > ai->cmd_max)
+    {
       cmd_max = ai->cmd_max;
     }
-    ddprintf("NCQ command; cmd_max = %d->%d\n", (u16) ai->cmd_max, cmd_max);
+    DPRINTF(3,"NCQ command; cmd_max = %d->%d\n", ai->cmd_max, cmd_max);
   }
 
   /* make sure adapter is available */
   spin_lock(drv_lock);
-  if (!ai->busy) {
-
-    if (!init_complete) {
+  if (!ai->busy)
+  {
+
+    if (!init_complete)
+    {
       /* no IRQ handlers or context hooks availabe at this point */
       ai->busy = 1;
       spin_unlock(drv_lock);
-      ahci_exec_polled_iorb(iorb, func, timeout);
+      ahci_exec_polled_iorb(vIorb, pIorb, func, timeout);
       ai->busy = 0;
       return;
@@ -1107 +1141 @@
 
     /* make sure we don't mix NCQ and regular commands */
-    if (aws->is_ncq && port->reg_cmds == 0 || !aws->is_ncq && port->ncq_cmds == 0) {
-
+    if (aws->is_ncq && port->reg_cmds == 0 || !aws->is_ncq && port->ncq_cmds == 0)
+    {
       /* Find next available command slot. We use a simple round-robin
        * algorithm for this to prevent commands with higher slot indexes
@@ -1114 +1148 @@
        */
       cmds = (aws->is_ncq) ? &port->ncq_cmds : &port->reg_cmds;
-      for (i = 0; i <= cmd_max; i++) {
-        if (++(port->cmd_slot) > cmd_max) {
-          port->cmd_slot = 0;
-        }
-        if ((*cmds & (1UL << port->cmd_slot)) == 0) {
-          break;
-        }
+      for (i = 0; i <= cmd_max; i++)
+      {
+        if (++(port->cmd_slot) > cmd_max) port->cmd_slot = 0;
+        if ((*cmds & (1UL << port->cmd_slot)) == 0) break;
       }
 
-      if ((*cmds & (1UL << port->cmd_slot)) == 0) {
+      if ((*cmds & (1UL << port->cmd_slot)) == 0)
+      {
         /* found idle command slot; prepare command */
-        if (func(iorb, port->cmd_slot)) {
+        if (func(vIorb, pIorb, port->cmd_slot))
+        {
           /* Command preparation failed, or no HW command required; IORB
            * will already have the error code if there was an error.
            */
           spin_unlock(drv_lock);
-          iorb_done(iorb);
+          iorb_done(vIorb, pIorb);
           return;
         }
 
         /* start timer for this IORB */
-        ADD_StartTimerMS(&aws->timer, timeout, (PFN) timeout_callback, iorb, 0);
+        Timer_StartTimerMS(&aws->timer, timeout, timeout_callback, CastFar16ToULONG(vIorb));
 
         /* issue command to hardware */
@@ -1142 +1175 @@
         aws->cmd_slot = port->cmd_slot;
 
-        ddprintf("issuing command on slot %d\n", port->cmd_slot);
-        if (aws->is_ncq) {
+        DPRINTF(1,"Issuing command Slot=%d cmds=%x\n", port->cmd_slot, *cmds);
+        if (aws->is_ncq)
+        {
           writel(port_mmio + PORT_SCR_ACT, (1UL << port->cmd_slot));
           readl(port_mmio + PORT_SCR_ACT); /* flush */
@@ -1178 +1212 @@
  *       without the driver-level spinlock held.
  */
-void ahci_exec_polled_iorb(IORBH _far *iorb, int (*func)(IORBH _far *, int),
-                           ULONG timeout)
+void ahci_exec_polled_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int), ULONG timeout)
 {
   AHCI_PORT_CFG *pc = NULL;
-  AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
-  int p = iorb_unit_port(iorb);
-  u8 _far *port_mmio = port_base(ai, p);
+  AD_INFO *ai = ad_infos + iorb_unit_adapter(vIorb);
+  int p = iorb_unit_port(pIorb);
+  u8 *port_mmio = port_base(ai, p);
   TIMER Timer;
   int rc;
 
   /* enable AHCI mode */
-  if (ahci_enable_ahci(ai) != 0) {
-    iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
+  if (ahci_enable_ahci(ai) != 0)
+  {
+    iorb_seterr(pIorb, IOERR_ADAPTER_NONSPECIFIC);
     goto restore_bios_config;
   }
 
   /* check whether command slot 0 is available */
-  if ((readl(port_mmio + PORT_CMD_ISSUE) & 1) != 0) {
-    iorb_seterr(iorb, IOERR_DEVICE_BUSY);
+  if ((readl(port_mmio + PORT_CMD_ISSUE) & 1) != 0)
+  {
+    iorb_seterr(pIorb, IOERR_DEVICE_BUSY);
     goto restore_bios_config;
   }
 
   /* save port configuration */
-  if ((pc = ahci_save_port_config(ai, p)) == NULL) {
-    iorb_seterr(iorb, IOERR_CMD_SW_RESOURCE);
+  if ((pc = ahci_save_port_config(ai, p)) == NULL)
+  {
+    iorb_seterr(pIorb, IOERR_CMD_SW_RESOURCE);
     goto restore_bios_config;
   }
 
   /* restart/reset port (includes the necessary port configuration) */
-  if (init_reset) {
+  if (init_reset)
+  {
     /* As outlined in ahci_restore_bios_config(), switching back and
      * forth between SATA and AHCI mode requires a COMRESET to force
@@ -1214 +1251 @@
      * starting it.
      */
-    if (ahci_reset_port(ai, p, 0)) {
-      iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
+    if (ahci_reset_port(ai, p, 0))
+    {
+      iorb_seterr(pIorb, IOERR_ADAPTER_NONSPECIFIC);
       goto restore_bios_config;
     }
 
-  } else if (ahci_stop_port(ai, p) || ahci_start_port(ai, p, 0)) {
-    iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
+  }
+  else if (ahci_stop_port(ai, p) || ahci_start_port(ai, p, 0))
+  {
+    iorb_seterr(pIorb, IOERR_ADAPTER_NONSPECIFIC);
     goto restore_bios_config;
   }
 
   /* prepare command */
-  if (func(iorb, 0) == 0) {
+  if (func(vIorb, pIorb, 0) == 0)
+  {
     /* successfully prepared cmd; issue cmd and wait for completion */
-    ddprintf("executing polled cmd on slot 0...");
+    DPRINTF(3,"---------- executing polled cmd on slot 0...");
     writel(port_mmio + PORT_CMD_ISSUE, 1);
-    timer_init(&Timer, timeout);
-    while (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
-      rc = timer_check_and_block(&Timer);
+    TimerInit(&Timer, timeout);
+    while (readl(port_mmio + PORT_CMD_ISSUE) & 1)
+    {
+      rc = TimerCheckAndBlock(&Timer);
       if (rc) break;
     }
 
     /* 0x89 = BSY(0x80) | DRQ(0x08) | ERR(0x01) */
-    if (rc) {
-      dprintf(" timeout for IORB %Fp", iorb);
-      iorb_seterr(iorb, IOERR_ADAPTER_TIMEOUT);
-    } else if (readl(port_mmio + PORT_SCR_ERR) != 0 || readl(port_mmio + PORT_TFDATA) & 0x89) {
-      dprintf(" polled cmd error for IORB %Fp", iorb);
-      iorb_seterr(iorb, IOERR_DEVICE_NONSPECIFIC);
-      ahci_reset_port(ai, iorb_unit_port(iorb), 0);
-    } else {
+    if (rc)
+    {
+      DPRINTF(3," timeout for IORB %x", vIorb);
+      iorb_seterr(pIorb, IOERR_ADAPTER_TIMEOUT);
+    }
+    else if (readl(port_mmio + PORT_SCR_ERR) != 0 || readl(port_mmio + PORT_TFDATA) & 0x89)
+    {
+      DPRINTF(3," polled cmd error for IORB %x", vIorb);
+      iorb_seterr(pIorb, IOERR_DEVICE_NONSPECIFIC);
+      ahci_reset_port(ai, iorb_unit_port(pIorb), 0);
+    }
+    else
+    {
       /* successfully executed command */
-      if (add_workspace(iorb)->ppfunc != NULL) {
-        add_workspace(iorb)->ppfunc(iorb);
-      } else {
-        add_workspace(iorb)->complete = 1;
+      if (add_workspace(pIorb)->ppfunc != NULL)
+      {
+        add_workspace(pIorb)->ppfunc(vIorb, pIorb);
       }
-    }
-    ddprintf("\n");
+      else
+      {
+        add_workspace(pIorb)->complete = 1;
+      }
+    }
+    DPRINTF(3,"\n");
   }
 
 restore_bios_config:
   /* restore BIOS configuration */
-  if (pc != NULL) {
+  if (pc != NULL)
+  {
     ahci_restore_port_config(ai, p, pc);
   }
   ahci_restore_bios_config(ai);
 
-  if (add_workspace(iorb)->complete | (iorb->Status | IORB_ERROR)) {
-    iorb_done(iorb);
+  if (add_workspace(pIorb)->complete | (pIorb->Status | IORB_ERROR))
+  {
+    iorb_done(vIorb, pIorb);
   }
   return;
@@ -1279 +1331 @@
 {
   va_list va;
-  u8 _far *port_mmio = port_base(ai, p);
+  u8 *port_mmio = port_base(ai, p);
   u32 tmp;
   int rc;
@@ -1285 +1337 @@
 
   /* verify that command slot 0 is idle */
-  if (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
-    ddprintf("port %d slot 0 is not idle; not executing polled cmd\n", p);
+  if (readl(port_mmio + PORT_CMD_ISSUE) & 1)
+  {
+    DPRINTF(3,"port %d slot 0 is not idle; not executing polled cmd\n", p);
     return(-1);
   }
@@ -1292 +1345 @@
   /* fill in command slot 0 */
   va_start(va, cmd);
-  if ((rc = v_ata_cmd(ai, p, d, 0, cmd, va)) != 0) {
-    return(rc);
-  }
+  if ((rc = v_ata_cmd(ai, p, d, 0, cmd, va)) != 0) return(rc);
 
   /* start command execution for slot 0 */
-  ddprintf("executing polled cmd...");
+  DPRINTF(3,"---------- executing polled cmd...");
   writel(port_mmio + PORT_CMD_ISSUE, 1);
 
   /* wait until command has completed */
-  timer_init(&Timer, timeout);
+  TimerInit(&Timer, timeout);
   rc = 0;
-  while (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
-    rc = timer_check_and_block(&Timer);
-    if (rc) {
-      dprintf(" Timeout");
+  while (readl(port_mmio + PORT_CMD_ISSUE) & 1)
+  {
+    rc = TimerCheckAndBlock(&Timer);
+    if (rc)
+    {
+      DPRINTF(2," Timeout");
       break;
     }
@@ -1312 +1365 @@
 
   tmp = readl(port_mmio + PORT_SCR_ERR);
-  if (tmp & PORT_ERR_FAIL_BITS) {
-    dprintf(" SERR = 0x%08lx", tmp);
+  if (tmp & PORT_ERR_FAIL_BITS)
+  {
+    DPRINTF(2," SERR = 0x%08lx", tmp);
     rc = 1;
   }
   /* 0x89 = BSY(0x80) | DRQ(0x08) | ERR(0x01) */
-  if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
-    dprintf(" TFDATA = 0x%08lx", tmp);
+  if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0)
+  {
+    DPRINTF(2," TFDATA = 0x%08lx", tmp);
     rc = 1;
   }
 
-  if (rc) {
-    ddprintf("failed\n");
+  if (rc)
+  {
+    DPRINTF(3,"failed\n");
     ahci_reset_port(ai, p, 0);
     return(-1);
   }
-  ddprintf("success\n");
+  DPRINTF(3,"success\n");
   return(0);
 }
@@ -1342 +1398 @@
 int ahci_flush_cache(AD_INFO *ai, int p, int d)
 {
-  if (!ai->ports[p].devs[d].atapi) {
-    dprintf("flushing cache on %d.%d.%d\n", ad_no(ai), p, d);
+  if (!ai->ports[p].devs[d].atapi)
+  {
+    DPRINTF(2,"flushing cache on %d.%d.%d\n", ad_no(ai), p, d);
     return(ahci_exec_polled_cmd(ai, p, d, 30000,
            ai->ports[p].devs[d].lba48 ? ATA_CMD_FLUSH_EXT : ATA_CMD_FLUSH, AP_END));
@@ -1360 +1417 @@
 int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle)
 {
-  ddprintf("sending IDLE=%d command to port %d\n", idle, p);
-  return ahci_exec_polled_cmd(ai, p, d, 500, ATA_CMD_IDLE, AP_COUNT,
-                              idle ? 1 : 0, AP_END);
+  DPRINTF(3,"sending IDLE=%d command to port %d\n", idle, p);
+  return ahci_exec_polled_cmd(ai, p, d, 500, ATA_CMD_IDLE, AP_COUNT, idle ? 1 : 0, AP_END);
 }
 
@@ -1375 +1431 @@
  * the driver-level spinlock when actually changing the driver state (IORB
  * queues, ...)
- *
- * NOTE: OS/2 expects the carry flag set upon return from an interrupt
- *       handler if the interrupt has not been handled. We do this by
- *       shifting the return code from this function one bit to the right,
- *       thus the return code must set bit 0 in this case.
- */
+ */
+u32 DazCount = 0;
+
 int ahci_intr(u16 irq)
 {
@@ -1388 +1441 @@
   int p;
 
+  DPRINTF(1,"AI=%x",DazCount++);
+
   /* find adapter(s) with pending interrupts */
-  for (a = 0; a < ad_info_cnt; a++) {
+  for (a = 0; a < ad_info_cnt; a++)
+  {
     AD_INFO *ai = ad_infos + a;
 
-    if (ai->irq == irq && (irq_stat = readl(ai->mmio + HOST_IRQ_STAT)) != 0) {
+    if (ai->irq == irq && (irq_stat = readl(ai->mmio + HOST_IRQ_STAT)) != 0)
+    {
       /* this adapter has interrupts pending */
       u32 irq_masked = irq_stat & ai->port_map;
 
-      for (p = 0; p <= ai->port_max; p++) {
-        if (irq_masked & (1UL << p)) {
+      for (p = 0; p <= ai->port_max; p++)
+      {
+        if (irq_masked & (1UL << p))
+        {
           ahci_port_intr(ai, p);
         }
@@ -1409 +1468 @@
   }
 
-  if (handled) {
+  if (handled)
+  {
     /* Trigger state machine to process next IORBs, if any. Due to excessive
      * IORB requeue operations (e.g. when processing large unaligned reads or
      * writes), we may be stacking interrupts on top of each other. If we
      * detect this, we'll pass this on to the engine context hook.
-     *
-     * Rousseau:
-     * The "Physycal Device Driver Reference" states that it's a good idea
-     * to disable interrupts before doing EOI so that it can proceed for this
-     * level without being interrupted, which could cause stacked interrupts,
-     * possibly exhausting the interrupt stack.
-     * (?:\IBMDDK\DOCS\PDDREF.INF->Device Helper (DevHlp) Services)->EOI)
-     *
-     * This is what seemed to happen when running in VirtualBox.
-     * Since in VBox the AHCI-controller is a software implementation, it is
-     * just not fast enough to handle a large bulk of requests, like when JFS
-     * flushes it's caches.
-     *
-     * Cross referencing with DANIS506 shows she does the same in the
-     * state-machine code in s506sm.c around line 244; disable interrupts
-     * before doing the EOI.
-     *
-     * Comments on the disable() function state that SMP systems should use
-     * a spinlock, but putting the EOI before spin_unlock() did not solve the
-     * VBox ussue. This is probably because spin_unlock() enables interrupts,
-     * which implies we need to return from this handler with interrupts
-     * disabled.
      */
-    if ((u16) (u32) (void _far *) &irq_stat < 0xf000) {
-      ddprintf("IRQ stack running low; arming engine context hook\n");
+    #if 0
+    if ((u32)&irq_stat < 0xf000)
+    {
+      DPRINTF(0,"IRQ stack running low; arming engine context hook\n");
       /* Rousseau:
        * A context hook cannot be re-armed before it has completed.
@@ -1453 +1493 @@
        * This needs some more investigation.
        */
-      DevHelp_ArmCtxHook(0, engine_ctxhook_h);
-    } else {
+      KernArmHook(engine_ctxhook_h, 0, 0);
+    }
+    else
+    #endif
+    {
       spin_lock(drv_lock);
       trigger_engine();
       spin_unlock(drv_lock);
     }
-    /* disable interrupts to prevent stacking. (See comments above) */
-    disable();
-    /* complete the interrupt */
-    DevHelp_EOI(irq);
-    return(0);
-  } else {
-    return(1);
-  }
+    DevCli();
+    Dev32Help_EOI(irq);
+    return(1); /* handled */
+  }
+
+  return(0); /* not handled */
 }
 
@@ -1477 +1518 @@
 {
   IORB_QUEUE done_queue;
-  IORBH _far *iorb;
-  IORBH _far *next = NULL;
-  u8 _far *port_mmio = port_base(ai, p);
+  IORBH FAR16DATA *vIorb;
+  IORBH FAR16DATA *vNext = NULL;
+  u8 *port_mmio = port_base(ai, p);
   u32 irq_stat;
   u32 active_cmds;
@@ -1489 +1530 @@
   readl(port_mmio + PORT_IRQ_STAT); /* flush */
 
-  ddprintf("port interrupt for adapter %d port %d stat %lx stack frame %Fp\n",
-        ad_no(ai), p, irq_stat, (void _far *)&done_queue);
+  DPRINTF(3,"port interrupt A=%d Port=%d stat=%x\n", ad_no(ai), p, irq_stat);
   memset(&done_queue, 0x00, sizeof(done_queue));
 
-  if (irq_stat & PORT_IRQ_ERROR) {
+  if (irq_stat & PORT_IRQ_ERROR)
+  {
     /* this is an error interrupt;
      * disable port interrupts to avoid IRQ storm until error condition
@@ -1511 +1552 @@
    * commands have completed, too.
    */
-  if (ai->ports[p].ncq_cmds != 0) {
+  if (ai->ports[p].ncq_cmds != 0)
+  {
     active_cmds = readl(port_mmio + PORT_SCR_ACT);
     done_mask = ai->ports[p].ncq_cmds ^ active_cmds;
-    ddprintf("[ncq_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
-             active_cmds, done_mask);
-  } else {
+    DPRINTF(1,"[ncq_cmds]: active_cmds=0x%08x done_mask=0x%08x\n", active_cmds, done_mask);
+  }
+  else
+  {
     active_cmds = readl(port_mmio + PORT_CMD_ISSUE);
     done_mask = ai->ports[p].reg_cmds ^ active_cmds;
-    ddprintf("[reg_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
-             active_cmds, done_mask);
+    DPRINTF(1,"[reg_cmds]: active_cmds=0x%08x  done_mask=0x%08x\n", active_cmds, done_mask);
   }
 
@@ -1535 +1577 @@
    *        processed after releasing the spinlock.
    */
-  for (iorb = ai->ports[p].iorb_queue.root; iorb != NULL; iorb = next) {
-    ADD_WORKSPACE _far *aws = (ADD_WORKSPACE _far *) &iorb->ADDWorkSpace;
-    next = iorb->pNxtIORB;
-    if (aws->queued_hw && (done_mask & (1UL << aws->cmd_slot))) {
+  for (vIorb = ai->ports[p].iorb_queue.vRoot; vIorb != NULL; vIorb = vNext)
+  {
+    IORBH *pIorb = Far16ToFlat(vIorb);
+    ADD_WORKSPACE *aws = (ADD_WORKSPACE *) &pIorb->ADDWorkSpace;
+
+    vNext = pIorb->pNxtIORB;
+    if (aws->queued_hw && (done_mask & (1UL << aws->cmd_slot)))
+    {
       /* this hardware command has completed */
       ai->ports[p].ncq_cmds &= ~(1UL << aws->cmd_slot);
@@ -1544 +1590 @@
 
       /* call post-processing function, if any */
-      if (aws->ppfunc != NULL) {
-        aws->ppfunc(iorb);
-      } else {
-        aws->complete = 1;
+      if (aws->ppfunc != NULL) aws->ppfunc(vIorb, pIorb);
+      else aws->complete = 1;
+
+      if (aws->complete)
+      {
+        /* this IORB is complete; move IORB to our temporary done queue */
+        iorb_queue_del(&ai->ports[p].iorb_queue, vIorb);
+        iorb_queue_add(&done_queue, vIorb, pIorb);
+        aws_free(add_workspace(pIorb));
       }
-
-      if (aws->complete) {
-        /* this IORB is complete; move IORB to our temporary done queue */
-        iorb_queue_del(&ai->ports[p].iorb_queue, iorb);
-        iorb_queue_add(&done_queue, iorb);
-        aws_free(add_workspace(iorb));
-      }
     }
   }
@@ -1562 +1606 @@
 
   /* complete all IORBs in the done queue */
-  for (iorb = done_queue.root; iorb != NULL; iorb = next) {
-    next = iorb->pNxtIORB;
-    iorb_complete(iorb);
+  for (vIorb = done_queue.vRoot; vIorb != NULL; vIorb = vNext)
+  {
+    IORBH *pIorb = Far16ToFlat(vIorb);
+
+    vNext = pIorb->pNxtIORB;
+    iorb_complete(vIorb, pIorb);
   }
 }
@@ -1588 +1635 @@
    * reset, or worse.
    */
-  if (irq_stat & PORT_IRQ_UNK_FIS) {
+  if (irq_stat & PORT_IRQ_UNK_FIS)
+  {
     #ifdef DEBUG
-    u32 _far *unk = (u32 _far *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK);
-    dprintf("warning: unknown FIS %08lx %08lx %08lx %08lx\n", unk[0], unk[1], unk[2], unk[3]);
+    u32 *unk = (u32 *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK);
+    DPRINTF(0,"warning: unknown FIS %08lx %08lx %08lx %08lx\n", unk[0], unk[1], unk[2], unk[3]);
     #endif
     reset_port = 1;
   }
-  if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) {
-    dprintf("warning: host bus [data] error for port #%d\n", p);
+  if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR))
+  {
+    DPRINTF(0,"warning: host bus [data] error for port #%d\n", p);
     reset_port = 1;
   }
-  if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR)) {
-    dprintf("warning: interface fatal error for port #%d\n", p);
+  if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR))
+  {
+    DPRINTF(0,"warning: interface fatal error for port #%d\n", p);
     reset_port = 1;
   }
-  if (reset_port) {
+  if (reset_port)
+  {
     /* need to reset the port; leave this to the reset context hook */
 
     ports_to_reset[ad_no(ai)] |= 1UL << p;
-    DevHelp_ArmCtxHook(0, reset_ctxhook_h);
+    KernArmHook(reset_ctxhook_h, 0, 0);
 
     /* no point analyzing device errors after a reset... */
@@ -1613 +1664 @@
   }
 
-  dprintf("port #%d interrupt error status: 0x%08lx; restarting port\n",
-          p, irq_stat);
+  DPRINTF(0,"port #%d interrupt error status: 0x%08lx; restarting port\n", p, irq_stat);
 
   /* Handle device-specific errors. Those errors typically involve restarting
@@ -1621 +1671 @@
    */
   ports_to_restart[ad_no(ai)] |= 1UL << p;
-  DevHelp_ArmCtxHook(0, restart_ctxhook_h);
+  KernArmHook(restart_ctxhook_h, 0, 0);
 }
 
@@ -1628 +1678 @@
  * the same for non-removable devices.
  */
-void ahci_get_geometry(IORBH _far *iorb)
-{
-  dprintf("ahci_get_geometry(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
-          (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
-
-  ahci_exec_iorb(iorb, 0, cmd_func(iorb, get_geometry));
+void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb)
+{
+  #ifdef DEBUG
+  DPRINTF(2,"ahci_get_geometry(%d.%d.%d)\n", iorb_unit_adapter(pIorb),
+          iorb_unit_port(pIorb), iorb_unit_device(pIorb));
+  #endif
+
+  ahci_exec_iorb(vIorb, pIorb, 0, cmd_func(pIorb, get_geometry));
 }
 
@@ -1639 +1691 @@
  * Test whether unit is ready.
  */
-void ahci_unit_ready(IORBH _far *iorb)
-{
-  dprintf("ahci_unit_ready(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
-          (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
-
-  ahci_exec_iorb(iorb, 0, cmd_func(iorb, unit_ready));
+void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb)
+{
+  #ifdef DEBUG
+  DPRINTF(2,"ahci_unit_ready(%d.%d.%d)\n", iorb_unit_adapter(pIorb),
+          iorb_unit_port(pIorb), iorb_unit_device(pIorb));
+  #endif
+
+  ahci_exec_iorb(vIorb, pIorb, 0, cmd_func(pIorb, unit_ready));
 }
 
@@ -1650 +1704 @@
  * Read sectors from AHCI device.
  */
-void ahci_read(IORBH _far *iorb)
-{
-  dprintf("ahci_read(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
-          (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
-          (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
-          (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
-
-  ahci_exec_iorb(iorb, 1, cmd_func(iorb, read));
+void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb)
+{
+  #ifdef DEBUG
+  DPRINTF(2,"ahci_read(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(vIorb),
+          iorb_unit_port(pIorb), iorb_unit_device(pIorb),
+          ((IORB_EXECUTEIO *) pIorb)->RBA,
+          ((IORB_EXECUTEIO *) pIorb)->BlockCount);
+  #endif
+
+  ahci_exec_iorb(vIorb, pIorb, 1, cmd_func(pIorb, read));
 }
 
@@ -1663 +1719 @@
  * Verify readability of sectors on AHCI device.
  */
-void ahci_verify(IORBH _far *iorb)
-{
-  dprintf("ahci_verify(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
-          (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
-          (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
-          (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
-
-  ahci_exec_iorb(iorb, 0, cmd_func(iorb, verify));
+void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb)
+{
+  #ifdef DEBUG
+  DPRINTF(2,"ahci_verify(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb),
+          iorb_unit_port(pIorb), iorb_unit_device(pIorb),
+          ((IORB_EXECUTEIO *)pIorb)->RBA,
+          ((IORB_EXECUTEIO *)pIorb)->BlockCount);
+  #endif
+
+  ahci_exec_iorb(vIorb, pIorb, 0, cmd_func(pIorb, verify));
 }
 
@@ -1676 +1734 @@
  * Write sectors to AHCI device.
  */
-void ahci_write(IORBH _far *iorb)
-{
-  dprintf("ahci_write(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
-          (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
-          (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
-          (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
-
-  ahci_exec_iorb(iorb, 1, cmd_func(iorb, write));
+void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb)
+{
+  #ifdef DEBUG
+  DPRINTF(2,"ahci_write(%d.%d.%d, %d, %d)\n", iorb_unit_adapter(pIorb),
+          iorb_unit_port(pIorb), iorb_unit_device(pIorb),
+          ((IORB_EXECUTEIO *)pIorb)->RBA,
+          ((IORB_EXECUTEIO *)pIorb)->BlockCount);
+  #endif
+
+  ahci_exec_iorb(vIorb, pIorb, 1, cmd_func(pIorb, write));
 }
 
@@ -1689 +1749 @@
  * Execute SCSI (ATAPI) command.
  */
-void ahci_execute_cdb(IORBH _far *iorb)
-{
-  int a = iorb_unit_adapter(iorb);
-  int p = iorb_unit_port(iorb);
-  int d = iorb_unit_device(iorb);
-
-  dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
-        ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
+void ahci_execute_cdb(IORBH FAR16DATA *vIorb, IORBH *pIorb)
+{
+  int a = iorb_unit_adapter(pIorb);
+  int p = iorb_unit_port(pIorb);
+  int d = iorb_unit_device(pIorb);
+
+  DHEXDUMP(0,Far16ToFlat(((IORB_ADAPTER_PASSTHRU *)pIorb)->pControllerCmd),
+        ((IORB_ADAPTER_PASSTHRU *)pIorb)->ControllerCmdLen,
         "ahci_execute_cdb(%d.%d.%d): ", a, p, d);
 
-  if (ad_infos[a].ports[p].devs[d].atapi) {
-    ahci_exec_iorb(iorb, 0, atapi_execute_cdb);
-  } else {
-    iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
-    iorb_done(iorb);
+  if (ad_infos[a].ports[p].devs[d].atapi)
+  {
+    ahci_exec_iorb(vIorb, pIorb, 0, atapi_execute_cdb);
+  }
+  else
+  {
+    iorb_seterr(pIorb, IOERR_CMD_NOT_SUPPORTED);
+    iorb_done(vIorb, pIorb);
   }
 }
@@ -1711 +1774 @@
  * ATAPI devices because ATAPI devices will process some ATA commands as well.
  */
-void ahci_execute_ata(IORBH _far *iorb)
+void ahci_execute_ata(IORBH FAR16DATA *vIorb, IORBH *pIorb)
 {
   #ifdef DEBUG
-  int a = iorb_unit_adapter(iorb);
-  int p = iorb_unit_port(iorb);
-  int d = iorb_unit_device(iorb);
+  int a = iorb_unit_adapter(pIorb);
+  int p = iorb_unit_port(pIorb);
+  int d = iorb_unit_device(pIorb);
+
+  DHEXDUMP(0,Far16ToFlat(((IORB_ADAPTER_PASSTHRU *)pIorb)->pControllerCmd),
+        ((IORB_ADAPTER_PASSTHRU *)pIorb)->ControllerCmdLen,
+        "ahci_execute_ata(%d.%d.%d): ", a, p, d);
   #endif
 
-  dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
-        ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
-        "ahci_execute_ata(%d.%d.%d): ", a, p, d);
-
-  ahci_exec_iorb(iorb, 0, ata_execute_ata);
+  ahci_exec_iorb(vIorb, pIorb, 0, ata_execute_ata);
 }
 
@@ -1744 +1807 @@
   if (d >= AHCI_MAX_DEVS) return;
 
-  if (ai->port_max < p) {
-    ai->port_max = p;
-  }
-  if (ai->ports[p].dev_max < d) {
-    ai->ports[p].dev_max = d;
-  }
+  if (ai->port_max < p) ai->port_max = p;
+  if (ai->ports[p].dev_max < d) ai->ports[p].dev_max = d;
   memset(ai->ports[p].devs + d, 0x00, sizeof(*ai->ports[p].devs));
 
@@ -1757 +1816 @@
   ai->ports[p].devs[d].dev_type  = UIB_TYPE_DISK;
 
-  if (id_buf[ATA_ID_CONFIG] & 0x8000U) {
+  if (id_buf[ATA_ID_CONFIG] & 0x8000U)
+  {
     /* this is an ATAPI device; augment device information */
     ai->ports[p].devs[d].atapi     = 1;
@@ -1764 +1824 @@
     ai->ports[p].devs[d].ncq_max   = 1;
 
-  } else {
+  }
+  else
+  {
     /* complete ATA-specific device information */
-    if (enable_ncq[ad_no(ai)][p]) {
+    if (enable_ncq[ad_no(ai)][p])
+    {
       ai->ports[p].devs[d].ncq_max = id_buf[ATA_ID_QUEUE_DEPTH] & 0x001fU;
     }
-    if (ai->ports[p].devs[d].ncq_max < 1) {
+    if (ai->ports[p].devs[d].ncq_max < 1)
+    {
       /* NCQ not enabled for this device, or device doesn't support NCQ */
       ai->ports[p].devs[d].ncq_max = 1;
     }
-    if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x0400U) {
+    if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x0400U)
+    {
       ai->ports[p].devs[d].lba48   = 1;
     }
   }
 
-  dprintf("found device %d.%d.%d: removable = %d, dev_type = %d, atapi = %d, "
+  DPRINTF(2,"found device %d.%d.%d: removable = %d, dev_type = %d, atapi = %d, "
           "ncq_max = %d\n", ad_no(ai), p, d,
           ai->ports[p].devs[d].removable,
@@ -1798 +1863 @@
    * we distinguish only HDs and CD drives for now
    */
-  if (ai->ports[p].devs[d].removable) {
+  if (ai->ports[p].devs[d].removable)
+  {
     sprintf(dev_name, RM_CD_PREFIX "%s", p, d, ata_dev_name(id_buf));
-  } else {
+  }
+  else
+  {
     sprintf(dev_name, RM_HD_PREFIX "%s", p, d, ata_dev_name(id_buf));
   }
@@ -1816 +1884 @@
   /* try to detect virtualbox environment to enable a hack for IRQ routing */
   if (ai == ad_infos && ai->pci_vendor == 0x8086 && ai->pci_device == 0x2829 &&
-      !memcmp(ata_dev_name(id_buf), "VBOX HARDDISK", 13)) {
+      !memcmp(ata_dev_name(id_buf), "VBOX HARDDISK", 13))
+  {
     /* running inside virtualbox */
     pci_hack_virtualbox();