Changeset 125 for trunk/src/os2ahci/ata.c

Timestamp:

Oct 8, 2011, 10:28:48 PM (14 years ago)

Author:

cjm

Message:

Version 1.21

---

• Triggered by reports of performance loss with NCQ
• New command line flag "/F" to force using write buffers even when upstream I/O requested non-buffered I/O; the primary purpose of this flag is to debug the NCQ performance drop but the flag may or may not remain.

File:

• trunk/src/os2ahci/ata.c (modified) (4 diffs)

trunk/src/os2ahci/ata.c

@@ -234 +234 @@
    *    22 bits into 2 AHCI_SG elements.
    *
-   *  - The S/G element size for AHCI is what the spec calls "'0' based"
+   *  - The S/G element size for AHCI is what the spec calls '0'-based
    *    (i.e. 0 means 1 bytes). On top of that, the spec requires S/G transfer
    *    sizes to be even in the context of 16-bit transfers, thus bit '1'
@@ -248 +248 @@
    *    of this function will indicate how many OS/2 S/G entries were
    *    successfully mapped.
-   *
    */
   for (i = n = 0; i < sg_cnt; i++) {
@@ -891 +890 @@
                AP_END);
 
+  if (rc == 0) {
+    add_workspace(iorb)->ppfunc = ata_execute_ata_pp;
+  }
+
   return(rc);
+}
+
+/******************************************************************************
+ * Post processing function for ata_execute_ata(); the main purpose of this
+ * function is to copy the received D2H FIS (i.e. the device registers after
+ * command completion) back to the ATA command structure.
+ *
+ * See ata_cmd_to_fis() for an explanation of the mapping.
+ */
+void ata_execute_ata_pp(IORBH _far *iorb)
+{
+  AHCI_PORT_DMA _far *dma_base;
+  ATA_CMD _far *cmd;
+  AD_INFO *ai;
+  u8 _far *fis;
+  int p;
+
+  /* get address of D2H FIS */
+  ai = ad_infos + iorb_unit_adapter(iorb);
+  p = iorb_unit_port(iorb);
+  dma_base = port_dma_base(ai, p);
+  fis = dma_base->rx_fis + 0x40;
+
+  if (fis[0] != 0x34) {
+    /* this is not a D2H FIS - give up silently */
+    ddprintf("ata_execute_ata_pp(): D2H FIS type incorrect: %d\n", fis[0]);
+    add_workspace(iorb)->complete = 1;
+    return;
+  }
+
+  /* map D2H FIS to the original ATA controller command structure */
+  cmd = (ATA_CMD _far *) ((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd;
+
+  cmd->cmd      = fis[2];
+  cmd->device   = fis[7];
+  cmd->features = ((u16) fis[3])
+                | ((u16) fis[11]);
+  cmd->lba_l    = ((u32) fis[4])
+                | ((u32) fis[5] << 8)
+                | ((u32) fis[6] << 16)
+                | ((u32) fis[8] << 24);
+  cmd->lba_h    = ((u16) fis[9])
+                | ((u16) fis[10] << 8);
+  cmd->count    = ((u16) fis[12])
+                | ((u16) fis[13] << 8);
+
+  dphex(cmd, sizeof(*cmd), "ahci_execute_ata_pp(): cmd after completion:\n");
+
+  /* signal completion to interrupt handler */
+  add_workspace(iorb)->complete = 1;
 }
 
@@ -1036 +1089 @@
                    AP_SECTOR_48, (u32) sector, (u16) 0,
                    AP_FEATURES,  (u16) count,
-                   AP_COUNT,     (u16) (slot << 3), /* tag = slot */
+                   /* tag = slot */
+                   AP_COUNT,     (u16) (slot << 3),
                    AP_SGLIST,    sg_list, (u16) sg_cnt,
                    AP_DEVICE,    0x40,
-                   AP_DEVICE,    (write_through) ? 0x80 : 0, /* force unit access */
+                   /* force unit access */
+                   AP_DEVICE,    (write_through && !force_write_cache) ? 0x80 : 0,
                    AP_WRITE,     1,
                    AP_END);