[4] | 1 | /******************************************************************************
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| 2 | * ata.c - ATA command processing
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| 3 | *
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| 4 | * Copyright (c) 2010 Christian Mueller. Parts copied from/inspired by the
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| 5 | * Linux AHCI driver; those parts are (c) Linux AHCI/ATA maintainers
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| 6 | *
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| 7 | * This program is free software; you can redistribute it and/or modify
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| 8 | * it under the terms of the GNU General Public License as published by
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| 9 | * the Free Software Foundation; either version 2 of the License, or
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| 10 | * (at your option) any later version.
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| 11 | *
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| 12 | * This program is distributed in the hope that it will be useful,
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| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 15 | * GNU General Public License for more details.
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| 16 | *
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| 17 | * You should have received a copy of the GNU General Public License
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| 18 | * along with this program; if not, write to the Free Software
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| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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| 20 | */
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| 21 |
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| 22 | #include "os2ahci.h"
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| 23 | #include "ata.h"
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| 24 |
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| 25 | /* -------------------------- macros and constants ------------------------- */
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| 26 |
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| 27 | /* ------------------------ typedefs and structures ------------------------ */
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| 28 |
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| 29 | /* -------------------------- function prototypes -------------------------- */
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| 30 |
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| 31 | /* ------------------------ global/static variables ------------------------ */
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| 32 |
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| 33 | /* ----------------------------- start of code ----------------------------- */
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| 34 |
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| 35 | /******************************************************************************
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| 36 | * Initialize AHCI command slot, FIS and S/G list for the specified ATA
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| 37 | * command. The command parameters are passed as a variable argument list
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| 38 | * of type and value(s). The list is terminated by AP_END.
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| 39 | *
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| 40 | * Notes:
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| 41 | *
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| 42 | * - The specified command slot is expected to be idle; no checks are
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| 43 | * performed to prevent messing with a busy port.
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| 44 | *
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| 45 | * - Port multipliers are not supported, yet, thus 'd' should always
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| 46 | * be 0 for the time being.
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| 47 | *
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| 48 | * - 'cmd' is passwd as 16-bit integer because the compiler would push
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| 49 | * a 'u8' as 16-bit value (it's a fixed argument) and the stdarg
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| 50 | * macros would screw up the address of the first variable argument
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| 51 | * if the size of the last fixed argument wouldn't match what the
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| 52 | * compiler pushed on the stack.
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| 53 | *
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| 54 | * Return values:
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| 55 | * 0 : success
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| 56 | * > 0 : could not map all S/G entries; the return value is the number of
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| 57 | * S/G entries that could be mapped.
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| 58 | * < 0 : other error
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| 59 | */
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| 60 | int ata_cmd(AD_INFO *ai, int p, int d, int slot, int cmd, ...)
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| 61 | {
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| 62 | va_list va;
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| 63 | va_start(va, cmd);
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| 64 | return(v_ata_cmd(ai, p, d, slot, cmd, va));
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| 65 | }
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| 66 |
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| 67 | int v_ata_cmd(AD_INFO *ai, int p, int d, int slot, int cmd, va_list va)
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| 68 | {
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| 69 | AHCI_PORT_DMA _far *dma_base_virt;
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| 70 | AHCI_CMD_HDR _far *cmd_hdr;
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| 71 | AHCI_CMD_TBL _far *cmd_tbl;
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| 72 | SCATGATENTRY _far *sg_list = NULL;
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| 73 | SCATGATENTRY sg_single;
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| 74 | ATA_PARM ap;
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| 75 | ATA_CMD ata_cmd;
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| 76 | void _far *atapi_cmd = NULL;
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| 77 | u32 dma_base_phys;
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| 78 | u16 atapi_cmd_len = 0;
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| 79 | u16 ahci_flags = 0;
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| 80 | u16 sg_cnt = 0;
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| 81 | int i;
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| 82 | int n;
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| 83 |
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| 84 | /* --------------------------------------------------------------------------
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| 85 | * Initialize ATA command. The ATA command is set up with the main command
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| 86 | * value and a variable list of additional parameters such as the sector
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| 87 | * address, transfer count, ...
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| 88 | */
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| 89 | memset(&ata_cmd, 0x00, sizeof(ata_cmd));
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| 90 | ata_cmd.cmd = (u8) cmd;
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| 91 |
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| 92 | /* parse variable arguments */
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| 93 | do {
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| 94 | switch ((ap = va_arg(va, ATA_PARM))) {
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| 95 |
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| 96 | case AP_AHCI_FLAGS:
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| 97 | ahci_flags |= va_arg(va, u16);
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| 98 | break;
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| 99 |
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| 100 | case AP_H2D:
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| 101 | ahci_flags |= AHCI_CMD_WRITE;
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| 102 | break;
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| 103 |
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| 104 | case AP_FEATURES:
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| 105 | /* ATA features word */
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| 106 | ata_cmd.features = va_arg(va, u16);
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| 107 | break;
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| 108 |
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| 109 | case AP_COUNT:
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| 110 | /* transfer count */
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| 111 | ata_cmd.count = va_arg(va, u16);
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| 112 | break;
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| 113 |
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| 114 | case AP_SECTOR_28:
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| 115 | /* 28-bit sector address */
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| 116 | ata_cmd.lba_l = va_arg(va, u32);
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| 117 | if (ata_cmd.lba_l & 0xf0000000UL) {
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| 118 | dprintf("error: LBA-28 address %ld has more than 28 bits\n", ata_cmd.lba_l);
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| 119 | return(-1);
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| 120 | }
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| 121 | break;
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| 122 |
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| 123 | case AP_SECTOR_48:
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| 124 | /* 48-bit sector address */
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| 125 | ata_cmd.lba_l = va_arg(va, u32);
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| 126 | ata_cmd.lba_h = va_arg(va, u16);
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| 127 | break;
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| 128 |
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| 129 | case AP_DEVICE:
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| 130 | /* ATA device byte */
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| 131 | ata_cmd.device = va_arg(va, u16) >> 8;
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| 132 | break;
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| 133 |
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| 134 | case AP_SGLIST:
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| 135 | /* scatter/gather list in SCATGATENTRY/count format */
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| 136 | sg_list = va_arg(va, void _far *);
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| 137 | sg_cnt = va_arg(va, u16);
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| 138 | break;
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| 139 |
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| 140 | case AP_VADDR:
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| 141 | /* virtual buffer address in addr/len format (up to 4K) */
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| 142 | DevHelp_VirtToPhys(va_arg(va, void _far *), &sg_single.ppXferBuf);
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| 143 | sg_single.XferBufLen = va_arg(va, u16);
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| 144 | sg_list = &sg_single;
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| 145 | sg_cnt = 1;
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| 146 | break;
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| 147 |
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| 148 | case AP_ATAPI_CMD:
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| 149 | atapi_cmd = va_arg(va, void _far *);
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| 150 | atapi_cmd_len = va_arg(va, u16);
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| 151 | ahci_flags |= AHCI_CMD_ATAPI;
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| 152 | break;
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| 153 |
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| 154 | case AP_END:
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| 155 | break;
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| 156 |
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| 157 | default:
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| 158 | dprintf("error: v_ata_cmd() called with invalid parameter type (%d)\n", (int) ap);
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| 159 | return(-1);
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| 160 | }
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| 161 |
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| 162 | } while (ap != AP_END);
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| 163 |
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| 164 | /* --------------------------------------------------------------------------
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| 165 | * Fill in AHCI ATA command information. This includes the port command slot,
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| 166 | * the corresponding command FIS and the S/G list. The layout of the AHCI
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| 167 | * port DMA region is based on the Linux AHCI driver and looks like this:
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| 168 | *
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| 169 | * - 32 AHCI command headers (AHCI_CMD_HDR) with 32 bytes, each
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| 170 | * - 1 FIS receive area with 256 bytes (AHCI_RX_FIS_SZ)
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| 171 | * - 32 AHCI command tables, each consisting of
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| 172 | * - 64 bytes for command FIS
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| 173 | * - 16 bytes for ATAPI comands
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| 174 | * - 48 bytes reserved
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| 175 | * - 48 S/G entries (AHCI_SG) with 32 bytes, each
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| 176 | *
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| 177 | * Since the whole DMA buffer for all ports is larger than 64KB and we need
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| 178 | * multiple segments to address all of them, there are no virtual pointers
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| 179 | * to the individual elements in AD_INFO. Instead, we're relying on macros
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| 180 | * for getting the base address of a particular port's DMA region, then
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| 181 | * map a structure on top of that for convenience (AHCI_PORT_DMA).
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| 182 | */
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| 183 | dma_base_virt = port_dma_base(ai, p);
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| 184 | dma_base_phys = port_dma_base_phys(ai, p);
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| 185 |
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| 186 | /* AHCI command header */
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| 187 | cmd_hdr = dma_base_virt->cmd_hdr + slot;
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| 188 | memset(cmd_hdr, 0x00, sizeof(*cmd_hdr));
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| 189 | cmd_hdr->options = ((d & 0x0f) << 12);
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| 190 | cmd_hdr->options |= ahci_flags; /* AHCI commaand flags */
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| 191 | cmd_hdr->options |= 5; /* length of command FIS in 32-bit words */
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| 192 | cmd_hdr->tbl_addr = dma_base_phys + offsetof(AHCI_PORT_DMA, cmd_tbl[slot]);
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| 193 |
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| 194 | /* AHCI command table */
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| 195 | cmd_tbl = dma_base_virt->cmd_tbl + slot;
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| 196 | memset(cmd_tbl, 0x00, sizeof(*cmd_tbl));
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| 197 | ata_cmd_to_fis(cmd_tbl->cmd_fis, &ata_cmd, d);
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| 198 |
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| 199 | if (atapi_cmd != NULL) {
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| 200 | /* copy ATAPI command */
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| 201 | memcpy(cmd_tbl->atapi_cmd, atapi_cmd, atapi_cmd_len);
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| 202 | }
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| 203 |
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| 204 | /* PRDT (S/G list)
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| 205 | *
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| 206 | * - The S/G list for AHCI adapters is limited to 22 bits for the transfer
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| 207 | * size of each element, thus we need to split S/G elements larger than
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| 208 | * 22 bits into 2 AHCI_SG elements.
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| 209 | *
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| 210 | * - The S/G element size for AHCI is what the spec calls "'0' based"
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| 211 | * (i.e. 0 means 1 bytes). On top of that, the spec requires S/G transfer
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| 212 | * sizes to be even in the context of 16-bit transfers, thus bit '1'
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| 213 | * always needs to be set.
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| 214 | *
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| 215 | * - AHCI_MAX_SG_ELEMENT_LEN defines the maximum size of an AHCI S/G
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| 216 | * element in bytes, ignoring the '0'-based methodology (i.e. 1 << 22).
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| 217 | *
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| 218 | * - There's a limit on the maximum number of S/G elements in the port DMA
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| 219 | * buffer (AHCI_MAX_SG) which is lower than the HW maximum. It's beyond
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| 220 | * the control of this function to split commands which require more
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| 221 | * than AHCI_MAX_SG entries. In order to help the caller, the return value
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| 222 | * of this function will indicate how many OS/2 S/G entries were
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| 223 | * successfully be mapped.
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| 224 | *
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| 225 | */
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| 226 | for (i = n = 0; i < sg_cnt; i++) {
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| 227 | u32 sg_addr = sg_list[i].ppXferBuf;
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| 228 | u32 sg_size = sg_list[i].XferBufLen;
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| 229 |
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| 230 | do {
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| 231 | u32 chunk = (sg_size > AHCI_MAX_SG_ELEMENT_LEN) ? AHCI_MAX_SG_ELEMENT_LEN
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| 232 | : sg_size;
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| 233 | if (n >= AHCI_MAX_SG) {
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| 234 | /* couldn't store all S/G elements in our DMA buffer */
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| 235 | ddprintf("ata_cmd(): too many S/G elements\n");
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| 236 | return(i - 1);
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| 237 | }
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| 238 | ddprintf("s/g list element: addr = 0x%08lx, size = 0x%04lx\n", sg_addr, chunk);
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| 239 | cmd_tbl->sg_list[n].addr = sg_addr;
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| 240 | cmd_tbl->sg_list[n].size = chunk - 1;
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| 241 | sg_addr += chunk;
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| 242 | sg_size -= chunk;
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| 243 | n++;
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| 244 | } while (sg_size > 0);
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| 245 | }
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| 246 |
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| 247 | /* set final S/G count in AHCI command header */
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| 248 | cmd_hdr->options |= (u32) n << 16;
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| 249 |
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| 250 | if (debug >= 2) {
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| 251 | printf("ATA command for %d.%d.%d:\n", ad_no(ai), p, d);
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| 252 | phex(cmd_hdr, offsetof(AHCI_CMD_HDR, reserved), "cmd_hdr: ");
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| 253 | phex(&ata_cmd, sizeof(ata_cmd), "ata_cmd: ");
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| 254 | if (atapi_cmd != NULL) {
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| 255 | phex(atapi_cmd, atapi_cmd_len, "atapi_cmd: ");
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| 256 | }
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| 257 | if (n > 0) {
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| 258 | phex(cmd_tbl->sg_list, sizeof(*cmd_tbl->sg_list) * n, "sg_list: ");
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| 259 | }
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| 260 | }
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| 261 |
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| 262 | return(0);
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| 263 | }
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| 264 |
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| 265 | /******************************************************************************
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| 266 | * Fill SATA command FIS with values extracted from an ATA command structure.
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| 267 | * The command FIS buffer (fis) is expected to be initialized to 0s. The
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| 268 | * structure of the FIS maps to the ATA shadow register block, including
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| 269 | * registers which can be written twice to store 16 bits (called 'exp').
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| 270 | *
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| 271 | * The FIS structure looks like this (using LSB notation):
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| 272 | *
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| 273 | * +----------------+----------------+----------------+----------------+
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| 274 | * 00 | FIS type (27h) | C|R|R|R|PMP | Command | Features |
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| 275 | * +----------------+----------------+----------------+----------------+
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| 276 | * 04 | LBA 7:0 | LBA 15:8 | LBA 23:16 | R|R|R|D|Head |
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| 277 | * +----------------+----------------+----------------+----------------+
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| 278 | * 08 | LBA 31:24 | LBA 40:32 | LBA 47:40 | Features exp |
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| 279 | * +----------------+----------------+----------------+----------------+
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| 280 | * 12 | Count 7:0 | Count 15:8 | Reserved | Control |
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| 281 | * +----------------+----------------+----------------+----------------+
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| 282 | * 16 | Reserved | Reserved | Reserved | Reserved |
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| 283 | * +----------------+----------------+----------------+----------------+
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| 284 | */
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| 285 | void ata_cmd_to_fis(u8 _far *fis, ATA_CMD _far *ata_cmd, int d)
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| 286 | {
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| 287 | fis[0] = 0x27; /* register - host to device FIS */
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| 288 | fis[1] = (u8) (d & 0xf); /* port multiplier number */
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| 289 | fis[1] |= 0x80; /* bit 7 indicates Command FIS */
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| 290 | fis[2] = (u8) ata_cmd->cmd;
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| 291 | fis[3] = (u8) ata_cmd->features;
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| 292 |
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| 293 | fis[4] = (u8) ata_cmd->lba_l;
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| 294 | fis[5] = (u8) (ata_cmd->lba_l >> 8);
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| 295 | fis[6] = (u8) (ata_cmd->lba_l >> 16);
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| 296 | fis[7] = (u8) ata_cmd->device;
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| 297 |
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| 298 | fis[8] = (u8) (ata_cmd->lba_l >> 24);
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| 299 | fis[9] = (u8) ata_cmd->lba_h;
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| 300 | fis[10] = (u8) (ata_cmd->lba_h >> 8);
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| 301 | fis[11] = (u8) (ata_cmd->features >> 8);
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| 302 |
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| 303 | fis[12] = (u8) ata_cmd->count;
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| 304 | fis[13] = (u8) (ata_cmd->count >> 8);
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| 305 | }
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| 306 |
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| 307 | /******************************************************************************
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| 308 | * Get device or media geometry. Device and media geometry are expected to be
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| 309 | * the same for non-removable devices, which will always be the case for the
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| 310 | * ATA devices we're dealing with (hard disks). ATAPI is a different story
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| 311 | * and handled by atapi_get_geometry().
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| 312 | */
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| 313 | int ata_get_geometry(IORBH _far *iorb, int slot)
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| 314 | {
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| 315 | ADD_WORKSPACE _far *aws = add_workspace(iorb);
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| 316 | int rc;
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| 317 |
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| 318 | /* allocate buffer for ATA identify information */
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| 319 | if ((aws->buf = malloc(ATA_ID_WORDS * sizeof(u16))) == NULL) {
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| 320 | iorb_seterr(iorb, IOERR_CMD_SW_RESOURCE);
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| 321 | return(-1);
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| 322 | }
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| 323 |
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| 324 | /* request ATA identify information */
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| 325 | aws->ppfunc = ata_get_geometry_pp;
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| 326 | rc = ata_cmd(ad_infos + iorb_unit_adapter(iorb),
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| 327 | iorb_unit_port(iorb),
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| 328 | iorb_unit_device(iorb),
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| 329 | slot,
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| 330 | ATA_CMD_ID_ATA,
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| 331 | AP_VADDR, (void _far *) aws->buf, ATA_ID_WORDS * sizeof(u16),
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| 332 | AP_END);
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| 333 |
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| 334 | if (rc != 0) {
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| 335 | free(aws->buf);
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| 336 | aws->buf = NULL;
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| 337 | iorb_seterr(iorb, IOERR_CMD_ADD_SOFTWARE_FAILURE);
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| 338 | }
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| 339 |
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| 340 | return(rc);
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| 341 | }
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| 342 |
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| 343 | /******************************************************************************
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| 344 | * Post processing function for ata_get_geometry(): convert the ATA identify
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| 345 | * information to OS/2 IOCC_GEOMETRY information.
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| 346 | */
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| 347 | void ata_get_geometry_pp(IORBH _far *iorb)
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| 348 | {
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| 349 | GEOMETRY _far *geometry = ((IORB_GEOMETRY _far *) iorb)->pGeometry;
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| 350 | USHORT geometry_len = ((IORB_GEOMETRY _far *) iorb)->GeometryLen;
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| 351 | u16 *id_buf = add_workspace(iorb)->buf;
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| 352 |
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| 353 | /* Fill-in geometry information; os2ahci has been designed for devices
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| 354 | * adhering to the ATA spec v8 or later, thus the real geometry doesn't
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| 355 | * really matter (it's actually marked "obsolete" in the ATA 8 specs).
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| 356 | * In order to maintain compatibitily to the BIOS and partition tables,
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| 357 | * we'll use the same algorithm as used by typical PC BIOS versions:
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| 358 | *
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| 359 | * - 512 bytes per sector
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| 360 | * - 255 heads
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| 361 | * - 63 sectors per track
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| 362 | * - x cylinders (calculated)
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| 363 | *
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| 364 | * Please note that os2ahci currently does not support ATA sectors larger
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| 365 | * than 512 bytes, therefore relies on the translation logic built into the
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| 366 | * corresponding ATA disks. In theory, partitions should be aligned to the
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| 367 | * large sectors to prevent needless mapping all over the place but HPFS
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| 368 | * uses logical block sizes smaller than the typical large sectors found on
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| 369 | * modern hard disks so this won't make much of a difference. Large sector
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| 370 | * support will be evaluated at a later time (it's unclear right now whether
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| 371 | * HPFS would even support anything larger than 512 bytes).
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| 372 | *
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| 373 | * Another limitation is that OS/2 has a 32-bit variable for the total number
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| 374 | * of sectors, limiting the maximum capacity to roughly 2TB. This is another
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| 375 | * issue that needs to be addressed sooner or later; large sectors could
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| 376 | * raise this limit to something like 8TB but this is not really much of a
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| 377 | * difference. Maybe there's something in later DDKs that allows more than
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| 378 | * 32 bits?
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| 379 | */
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| 380 | memset(geometry, 0x00, geometry_len);
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| 381 |
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| 382 | /* extract total number of sectors */
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| 383 | if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x40) {
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| 384 | /* 48-bit LBA supported */
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| 385 | if (id_buf[ATA_ID_LBA_CAPACITY_2 + 2] != 0) {
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| 386 | /* more than 32 bits for number of sectors */
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| 387 | dprintf("warning: limiting disk %d.%d.%d to 2TB\n",
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| 388 | iorb_unit_adapter(iorb), iorb_unit_port(iorb),
|
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| 389 | iorb_unit_device(iorb));
|
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| 390 | geometry->TotalSectors = 0xffffffffUL;
|
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| 391 | } else {
|
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| 392 | geometry->TotalSectors = *((u32 *) (id_buf + ATA_ID_LBA_CAPACITY_2));
|
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| 393 | }
|
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| 394 | } else {
|
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| 395 | /* 28-bit LBA */
|
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| 396 | geometry->TotalSectors = *((u32 *) (id_buf + ATA_ID_LBA_CAPACITY)) &
|
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| 397 | 0x0fffffffUL;
|
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| 398 | }
|
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| 399 |
|
---|
| 400 | geometry->BytesPerSector = 512;
|
---|
| 401 | geometry->NumHeads = 255;
|
---|
| 402 | geometry->SectorsPerTrack = 63;
|
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| 403 | geometry->TotalCylinders = geometry->TotalSectors /
|
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| 404 | ((u32) geometry->NumHeads *
|
---|
| 405 | (u32) geometry->SectorsPerTrack);
|
---|
| 406 | }
|
---|
| 407 |
|
---|
| 408 | /******************************************************************************
|
---|
| 409 | * Test whether unit is ready.
|
---|
| 410 | */
|
---|
| 411 | int ata_unit_ready(IORBH _far *iorb, int slot)
|
---|
| 412 | {
|
---|
| 413 | /* This is a NOP for ATA devices (at least right now); returning an error
|
---|
| 414 | * without setting an error code means ahci_exec_iorb() will not queue any
|
---|
| 415 | * HW command and the IORB will complete successfully.
|
---|
| 416 | */
|
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| 417 | ((IORB_UNIT_STATUS _far *) iorb)->UnitStatus = US_READY | US_POWER;
|
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| 418 | return(-1);
|
---|
| 419 | }
|
---|
| 420 |
|
---|
| 421 | /******************************************************************************
|
---|
| 422 | * Read sectors from AHCI device.
|
---|
| 423 | */
|
---|
| 424 | int ata_read(IORBH _far *iorb, int slot)
|
---|
| 425 | {
|
---|
| 426 | IORB_EXECUTEIO _far *io = (IORB_EXECUTEIO _far *) iorb;
|
---|
| 427 | AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
|
---|
| 428 | int p = iorb_unit_port(iorb);
|
---|
| 429 | int d = iorb_unit_device(iorb);
|
---|
| 430 | int rc;
|
---|
| 431 |
|
---|
| 432 | /* prepare read command */
|
---|
| 433 | if (io->RBA >= (1UL << 28) || io->BlockCount > 256) {
|
---|
| 434 | /* need LBA48 for this command */
|
---|
| 435 | if (!ai->ports[p].devs[d].lba48) {
|
---|
| 436 | iorb_seterr(iorb, IOERR_RBA_LIMIT);
|
---|
| 437 | return(-1);
|
---|
| 438 | }
|
---|
| 439 | rc = ata_cmd(ai, p, d, slot, ATA_CMD_READ_EXT,
|
---|
| 440 | AP_SECTOR_48, (u32) io->RBA, (u16) 0,
|
---|
| 441 | AP_COUNT, (u16) io->BlockCount,
|
---|
| 442 | AP_SGLIST, io->pSGList, (u16) io->cSGList,
|
---|
| 443 | AP_DEVICE, 0x4000,
|
---|
| 444 | AP_END);
|
---|
| 445 | } else {
|
---|
| 446 | rc = ata_cmd(ai, p, d, slot, ATA_CMD_READ,
|
---|
| 447 | AP_SECTOR_28, (u32) io->RBA,
|
---|
| 448 | AP_COUNT, (u16) io->BlockCount & 0xffU,
|
---|
| 449 | AP_SGLIST, io->pSGList, (u16) io->cSGList,
|
---|
| 450 | AP_DEVICE, 0x4000,
|
---|
| 451 | AP_END);
|
---|
| 452 | }
|
---|
| 453 |
|
---|
| 454 | return(rc);
|
---|
| 455 | }
|
---|
| 456 |
|
---|
| 457 | /******************************************************************************
|
---|
| 458 | * Verify readability of sectors on AHCI device.
|
---|
| 459 | */
|
---|
| 460 | int ata_verify(IORBH _far *iorb, int slot)
|
---|
| 461 | {
|
---|
| 462 | IORB_EXECUTEIO _far *io = (IORB_EXECUTEIO _far *) iorb;
|
---|
| 463 | AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
|
---|
| 464 | int p = iorb_unit_port(iorb);
|
---|
| 465 | int d = iorb_unit_device(iorb);
|
---|
| 466 | int rc;
|
---|
| 467 |
|
---|
| 468 | /* prepare verify command */
|
---|
| 469 | if (io->RBA >= (1UL << 28) || io->BlockCount > 256) {
|
---|
| 470 | /* need LBA48 for this command */
|
---|
| 471 | if (!ai->ports[p].devs[d].lba48) {
|
---|
| 472 | iorb_seterr(iorb, IOERR_RBA_LIMIT);
|
---|
| 473 | return(-1);
|
---|
| 474 | }
|
---|
| 475 | rc = ata_cmd(ai, p, d, slot, ATA_CMD_VERIFY_EXT,
|
---|
| 476 | AP_SECTOR_48, (u32) io->RBA, (u16) 0,
|
---|
| 477 | AP_COUNT, (u16) io->BlockCount,
|
---|
| 478 | AP_SGLIST, io->pSGList, (u16) io->cSGList,
|
---|
| 479 | AP_DEVICE, 0x4000,
|
---|
| 480 | AP_END);
|
---|
| 481 | } else {
|
---|
| 482 | rc = ata_cmd(ai, p, d, slot, ATA_CMD_VERIFY,
|
---|
| 483 | AP_SECTOR_28, (u32) io->RBA,
|
---|
| 484 | AP_COUNT, (u16) io->BlockCount & 0xffU,
|
---|
| 485 | AP_SGLIST, io->pSGList, (u16) io->cSGList,
|
---|
| 486 | AP_END);
|
---|
| 487 | }
|
---|
| 488 |
|
---|
| 489 | return(rc);
|
---|
| 490 | }
|
---|
| 491 |
|
---|
| 492 | /******************************************************************************
|
---|
| 493 | * Write sectors to AHCI device.
|
---|
| 494 | */
|
---|
| 495 | int ata_write(IORBH _far *iorb, int slot)
|
---|
| 496 | {
|
---|
| 497 | IORB_EXECUTEIO _far *io = (IORB_EXECUTEIO _far *) iorb;
|
---|
| 498 | AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
|
---|
| 499 | int p = iorb_unit_port(iorb);
|
---|
| 500 | int d = iorb_unit_device(iorb);
|
---|
| 501 | int rc;
|
---|
| 502 |
|
---|
| 503 | /* prepare write command */
|
---|
| 504 | if (io->RBA >= (1UL << 28) || io->BlockCount > 256) {
|
---|
| 505 | /* need LBA48 for this command */
|
---|
| 506 | if (!ai->ports[p].devs[d].lba48) {
|
---|
| 507 | iorb_seterr(iorb, IOERR_RBA_LIMIT);
|
---|
| 508 | return(-1);
|
---|
| 509 | }
|
---|
| 510 | rc = ata_cmd(ai, p, d, slot, ATA_CMD_WRITE_EXT,
|
---|
| 511 | AP_SECTOR_48, (u32) io->RBA, (u16) 0,
|
---|
| 512 | AP_COUNT, (u16) io->BlockCount,
|
---|
| 513 | AP_SGLIST, io->pSGList, (u16) io->cSGList,
|
---|
| 514 | AP_DEVICE, 0x4000,
|
---|
| 515 | AP_END);
|
---|
| 516 | } else {
|
---|
| 517 | rc = ata_cmd(ai, p, d, slot, ATA_CMD_WRITE,
|
---|
| 518 | AP_SECTOR_28, (u32) io->RBA,
|
---|
| 519 | AP_COUNT, (u16) io->BlockCount & 0xffU,
|
---|
| 520 | AP_SGLIST, io->pSGList, (u16) io->cSGList,
|
---|
| 521 | AP_DEVICE, 0x4000,
|
---|
| 522 | AP_END);
|
---|
| 523 | }
|
---|
| 524 |
|
---|
| 525 | return(rc);
|
---|
| 526 | }
|
---|
| 527 |
|
---|
| 528 | /******************************************************************************
|
---|
| 529 | * Execute ATA command.
|
---|
| 530 | */
|
---|
| 531 | int ata_execute_ata(IORBH _far *iorb, int slot)
|
---|
| 532 | {
|
---|
| 533 | iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
|
---|
| 534 | return(-1);
|
---|
| 535 | }
|
---|
| 536 |
|
---|
| 537 | /******************************************************************************
|
---|
| 538 | * Request sense information (which means "read ATA log page" for ATA devices)
|
---|
| 539 | */
|
---|
| 540 | int ata_req_sense(IORBH _far *iorb, int slot)
|
---|
| 541 | {
|
---|
| 542 | iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
|
---|
| 543 | return(-1);
|
---|
| 544 | }
|
---|
| 545 |
|
---|
| 546 | /******************************************************************************
|
---|
| 547 | * Extract vendor and device name from an ATA INDENTIFY buffer. Since strings
|
---|
| 548 | * in the indentify buffer are byte-swapped, we need to swap them back.
|
---|
| 549 | */
|
---|
| 550 | char *ata_dev_name(u16 *id_buf)
|
---|
| 551 | {
|
---|
| 552 | static char dev_name[ATA_ID_PROD_LEN + 1];
|
---|
| 553 | char *t = dev_name;
|
---|
| 554 | char *s = (char *) (id_buf + ATA_ID_PROD);
|
---|
| 555 | int i;
|
---|
| 556 |
|
---|
| 557 | dev_name[sizeof(dev_name)-1] = '\0';
|
---|
| 558 |
|
---|
| 559 | for (i = 0; i < ATA_ID_PROD_LEN / 2; i++) {
|
---|
| 560 | *(t++) = s[1];
|
---|
| 561 | *(t++) = s[0];
|
---|
| 562 | s += 2;
|
---|
| 563 | }
|
---|
| 564 |
|
---|
| 565 | return(dev_name);
|
---|
| 566 | }
|
---|
| 567 |
|
---|