"Low power sub-threshold asynchronous quasi-delay-insensitive 32-bit ..."

Weng-Geng Ho et al. (2015)

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DOI: 10.1049/IET-CDS.2014.0103

access: closed

type: Journal Article

metadata version: 2020-10-26

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Weng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang:
Low power sub-threshold asynchronous quasi-delay-insensitive 32-bit arithmetic and logic unit based on autonomous signal-validity half-buffer. IET Circuits Devices Syst. 9(4): 309-318 (2015)

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