"Test Generation for Analog Circuits Using Partial Numerical Simulation."

Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee (1999)

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DOI: 10.1109/ICVD.1999.745220

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee:
Test Generation for Analog Circuits Using Partial Numerical Simulation. VLSI Design 1999: 597-602

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