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Integer programming based topology selection of cell-level analog circuits

Published: 01 November 2006 Publication History

Abstract

A new approach to cell-level analog circuit synthesis is presented. This approach formulates analog synthesis as a Mixed-Integer Nonlinear Programming (MINLP) problem in order to allow simultaneous topology and parameter selection. Topology choices are represented as binary integer variables and design parameters (e.g., device sizes and bias voltages) as continuous variables. Examples using a Branch and Bound method to efficiently solve the MINLP problem for CMOS two-stage op amps are given

Cited By

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  • (2023)Automatic Op-Amp Generation From Specification to LayoutIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.329637442:12(4378-4390)Online publication date: 1-Dec-2023
  • (2022)Topology optimization of operational amplifier in continuous space via graph embeddingProceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3539889(142-147)Online publication date: 14-Mar-2022
  • (2021)Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586306(517-522)Online publication date: 5-Dec-2021
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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 14, Issue 4
November 2006
128 pages

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IEEE Press

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Published: 01 November 2006

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Cited By

View all
  • (2023)Automatic Op-Amp Generation From Specification to LayoutIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.329637442:12(4378-4390)Online publication date: 1-Dec-2023
  • (2022)Topology optimization of operational amplifier in continuous space via graph embeddingProceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3539889(142-147)Online publication date: 14-Mar-2022
  • (2021)Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586306(517-522)Online publication date: 5-Dec-2021
  • (2020)Structural synthesis of operational amplifiers based on functional block modelingProceedings of the 39th International Conference on Computer-Aided Design10.1145/3400302.3415782(1-6)Online publication date: 2-Nov-2020
  • (2017)Automated topology synthesis of analog and RF integrated circuitsIntegration, the VLSI Journal10.1016/j.vlsi.2016.10.01756:C(128-138)Online publication date: 1-Jan-2017
  • (2013)PAGEProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485723(1849-1854)Online publication date: 18-Mar-2013
  • (2013)Operating-point driven formulation for analog computer-aided designAnalog Integrated Circuits and Signal Processing10.1007/s10470-012-9998-174:2(345-353)Online publication date: 1-Feb-2013
  • (2012)GENOM-POFProceedings of the 14th annual conference on Genetic and evolutionary computation10.1145/2330163.2330318(1119-1126)Online publication date: 7-Jul-2012
  • (2011)A geometric programming aided knowledge based approach for analog circuit synthesis and sizingProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973096(411-414)Online publication date: 2-May-2011
  • (2009)Massively multi-topology sizing of analog integrated circuitsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874794(706-711)Online publication date: 20-Apr-2009
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