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Roofline measurement application

Published: 08 January 2015 Publication History

Abstract

The roofline 2-axis method refers to the number of floating-point operations to be executed every second as a graph resulting from the difference between the floating-point operation speed between the CPU and the memory, corresponding to the intensity of operations for access to the main memory shown in the log graph. This tells us that the floating-point computation speeds of up to come out in the kernel that was randomly determined by developers. In addition, by presenting the guidelines on what can be pulled out floating-point performance of the best in the kernel that was given shall correct any part in terms of software, programming can be performed efficiently. In this paper, a method of to be realized in ARM mode of the roofline, to be used in general desktops, was designed by applying the calculation method of the other. Furthermore, by providing this through the Android application, the operating system most dominant in the environment, we used the roofline graph fabricated by applying the built environment performance, which was increased gradually and visually. This had the advantage of confirming the rate evaluation of the device users and many developers via the application easily in a portable manner. Then, using the application, different rooflines according to core type were provided, providing us with an intuitive graphical user interface.

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Cited By

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  • (2017)Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2017.7858371(494-499)Online publication date: Jan-2017
  • (2017)Hardware-software collaboration for dark silicon heterogeneous many-core systemsFuture Generation Computer Systems10.1016/j.future.2016.09.01268(234-247)Online publication date: Mar-2017

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cover image ACM Conferences
IMCOM '15: Proceedings of the 9th International Conference on Ubiquitous Information Management and Communication
January 2015
674 pages
ISBN:9781450333771
DOI:10.1145/2701126
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Publication History

Published: 08 January 2015

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Author Tags

  1. hardware performance counter
  2. mobile AP
  3. monitoring
  4. multicore processor

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  • Research-article

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  • Ministry of Education

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IMCOM '15
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Overall Acceptance Rate 213 of 621 submissions, 34%

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View all
  • (2017)Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2017.7858371(494-499)Online publication date: Jan-2017
  • (2017)Hardware-software collaboration for dark silicon heterogeneous many-core systemsFuture Generation Computer Systems10.1016/j.future.2016.09.01268(234-247)Online publication date: Mar-2017

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