research-article

On improving the uniqueness of silicon-based physically unclonable functions via optical proximity correction

Authors:

Ankur SrivastavaAuthors Info & Claims

DAC '12: Proceedings of the 49th Annual Design Automation Conference

Pages 96 - 105

https://doi.org/10.1145/2228360.2228379

Published: 03 June 2012 Publication History

Abstract

Physically Unclonable Functions (PUFs) are effective for security applications because they generate unique signatures that are resistant to cloning attempts as well as physical tampering. A silicon PUF is a special circuit embedded in an IC that relies on random fabrication process variations to produce a unique signature for its native IC. While current research directions have focused on improving PUF quality at the architectural level, little work has explicitly targeted their fundamental source of randomness, the fabrication process. During IC fabrication, Optical Proximity Correction (OPC) is typically used to suppress manufacturing variations. In this paper, we recognize that this is actually counterintuitive for PUFs. We provide a novel framework which enables OPC to increase the effects of manufacturing variations within PUF circuitry and produce more randomness in PUFs for greater uniqueness and reliability. The proposed OPC techniques are validated using a population of 100 ring oscillator PUFs. Results show that our schemes provide over five times larger variation in ring oscillator delay, improve PUF uniqueness by 5%, and improve PUF reliability by as much as 70% when compared to conventional OPC.

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Cited By

Paul SMukherjee TBanerjee PSur-Kolay S(2023)Concurrent Steiner Tree Selection for Global routing with EUVL Flare ReductionIntegration, the VLSI Journal10.1016/j.vlsi.2023.04.00792:C(66-76)Online publication date: 1-Sep-2023
https://dl.acm.org/doi/10.1016/j.vlsi.2023.04.007
Lomash Chandra Acharya Singh KGupta NDargupally MMishra NSharma AAcharya ARamakrishnan VMandal ADasgupta SAnand Bulusu (2023)Prediction of variation aware F in ring oscillators (ROs) to mitigate the impact of aging on RO-PUFSolid-State Electronics10.1016/j.sse.2023.108790210(108790)Online publication date: Dec-2023
https://doi.org/10.1016/j.sse.2023.108790
Ramanujam SBurleson W(2021)Reconfiguring the Mux-Based Arbiter PUF using FeFETs2021 22nd International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED51717.2021.9424328(257-262)Online publication date: 7-Apr-2021
https://doi.org/10.1109/ISQED51717.2021.9424328
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On improving the uniqueness of silicon-based physically unclonable functions via optical proximity correction

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Published In

cover image ACM Conferences

DAC '12: Proceedings of the 49th Annual Design Automation Conference

June 2012

1357 pages

ISBN:9781450311991

DOI:10.1145/2228360

General Chair:
Patrick Groeneveld
Magma Design Automation, Inc., San Jose, CA
,
Program Chairs:
Donatella Sciuto
Politecnico di Milano, Milano, Italy
,
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

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Published: 03 June 2012

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DAC '12

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DAC '12: The 49th Annual Design Automation Conference 2012

June 3 - 7, 2012

California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Paul SMukherjee TBanerjee PSur-Kolay S(2023)Concurrent Steiner Tree Selection for Global routing with EUVL Flare ReductionIntegration, the VLSI Journal10.1016/j.vlsi.2023.04.00792:C(66-76)Online publication date: 1-Sep-2023
https://dl.acm.org/doi/10.1016/j.vlsi.2023.04.007
Lomash Chandra Acharya Singh KGupta NDargupally MMishra NSharma AAcharya ARamakrishnan VMandal ADasgupta SAnand Bulusu (2023)Prediction of variation aware F in ring oscillators (ROs) to mitigate the impact of aging on RO-PUFSolid-State Electronics10.1016/j.sse.2023.108790210(108790)Online publication date: Dec-2023
https://doi.org/10.1016/j.sse.2023.108790
Ramanujam SBurleson W(2021)Reconfiguring the Mux-Based Arbiter PUF using FeFETs2021 22nd International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED51717.2021.9424328(257-262)Online publication date: 7-Apr-2021
https://doi.org/10.1109/ISQED51717.2021.9424328
Khan RSilva HNoor NJin CMuneer SDirisaglik FCywar ANguyen Pvan Dijk MGokirmak A(2019)Exploiting Lithography Limits for Hardware Security Applications2019 IEEE 19th International Conference on Nanotechnology (IEEE-NANO)10.1109/NANO46743.2019.8993902(9-12)Online publication date: Jul-2019
https://doi.org/10.1109/NANO46743.2019.8993902
Kamal KMuresan R(2019)Mixed-Signal Physically Unclonable Function With CMOS Capacitive CellsIEEE Access10.1109/ACCESS.2019.29387297(130977-130998)Online publication date: 2019
https://doi.org/10.1109/ACCESS.2019.2938729
Che WSaqib FPlusquellic J(2018)Novel Offset Techniques for Improving Bitstring Quality of a Hardware-Embedded Delay PUFIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.278527026:4(733-743)Online publication date: Apr-2018
https://doi.org/10.1109/TVLSI.2017.2785270
Wang WYona YDiggavi SGupta P(2018)Design and Analysis of Stability-Guaranteed PUFsIEEE Transactions on Information Forensics and Security10.1109/TIFS.2017.277476113:4(978-992)Online publication date: Apr-2018
https://doi.org/10.1109/TIFS.2017.2774761
Shen HRahman FShakya BXu XTehranipoor MForte D(2017)Poly-Si-Based Physical Unclonable FunctionsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.273353125:11(3207-3217)Online publication date: Nov-2017
https://doi.org/10.1109/TVLSI.2017.2733531
Miao JLi MRoy SMa YYu B(2017)SD-PUF: Spliced Digital Physical Unclonable FunctionIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.2740296(1-1)Online publication date: 2017
https://doi.org/10.1109/TCAD.2017.2740296
Chang CZheng YZhang L(2017)A Retrospective and a Look Forward: Fifteen Years of Physical Unclonable Function AdvancementIEEE Circuits and Systems Magazine10.1109/MCAS.2017.271330517:3(32-62)Online publication date: Nov-2018
https://doi.org/10.1109/MCAS.2017.2713305
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