OMPL2001 Result: Hewlett-Packard Company HP Integrity Superdome 16-way (1500 MHz Itanium 2)

Benchmark	Reference Time	Base Runtime	Base Ratio	Peak Runtime	Peak Ratio
311.wupwise_l	9200	1346	109350	1306	112668
313.swim_l	12500	1726	115851	1726	115851
315.mgrid_l	13500	2147	100618	2147	100618
317.applu_l	13500	2514	85908	2514	85908
321.equake_l	13000	4539	45829	4539	45829
325.apsi_l	10500	1767	95059	1767	95059
327.gafort_l	11000	1970	89326	1970	89326
329.fma3d_l	23500	4101	91683	4101	91683
331.art_l	25000	3177	125886	3177	125886
SPECompLbase2001	92418
	SPECompLpeak2001	92725

Benchmark

Reference
Time

Base
Runtime

Base
Ratio

Peak
Runtime

Peak
Ratio

311.wupwise_l

9200

1346

109350

1306

112668

313.swim_l

12500

1726

115851

1726

115851

315.mgrid_l

13500

2147

100618

2147

100618

317.applu_l

13500

2514

85908

2514

85908

321.equake_l

13000

4539

45829

4539

45829

325.apsi_l

10500

1767

95059

1767

95059

327.gafort_l

11000

1970

89326

1970

89326

329.fma3d_l

23500

4101

91683

4101

91683

331.art_l

25000

3177

125886

3177

125886

SPECompLbase2001

92418

SPECompLpeak2001

92725

Hardware

Hardware Vendor:

Hewlett-Packard Company

Model Name:

HP Integrity Superdome 16-way (1500 MHz Itanium 2)

CPU:

Intel Itanium 2

CPU MHz:

1500

FPU:

Integrated

CPU(s) enabled:

CPU(s) orderable:

6 to 16 by 2

Primary Cache:

L1 Inst/Data: 16 KB, associativity = 4

Secondary Cache:

L2 Unified: 256 KB, associativity = 8

L3 Cache:

L3 Unified: 6144 KB, associativity = 24

Other Cache:

None

Memory:

64GB (128 * 512MB DIMMs)

Disk Subsystem:

root disk 1x36 SCSI
9x36GB Fibrechannel (striped)

Other Hardware:

Software

OpenMP Threads:

Parallel:

OpenMP

Operating System:

HPUX11i-TCOE B.11.23

Compiler:

HP C/ANSI C Compiler B.11.23
HP aC++ Compiler B.11.23
HP Fortran 90 Compiler B.11.23
HP LIBF90 PHSS_29620
HP F90 Compiler PHSS_29663
HP aC++ Compiler PHSS_29655
HP C Compiler PHSS_29656
u2comp/be/plugin library PHSS_29657

File System:

vxfs

System State:

Multi-user

Notes / Tuning Information
User environment: MP_IDLE_THREADS_WAIT=-1 OMP_FIRST_USE=0 Base: F90 +Ofaster +DSitanium2 +Oopenmp +Oinfo +DD64 -minshared cc +Ofaster +Oopenmp +DD64 +Oinfo +DSitanium2 -minshared -AOe +Ofltacc=default submit = chatr -s +id disable +pd 64k +pi 64k $commandexe; \ _M_ARENA_OPTS=64:32 _M_SBA_OPTS=16348:150:256 \ mpsched -T FILL $command Peak: 311.wupwise_l: +Ofaster +O3 +DSitanium2 +Oopenmp +Oinfo +DD64 -minshared +cat -Wl,+pd64k -Wl,+pi64k ONESTEP = true 313.swim_l: basepeak=true 315.mgrid_l: basepeak=true 317.applu_l: basepeak=true 321.equake_l: basepeak=true 325.apsi_l: basepeak=true 327.gafort_l: basepeak=true 329.fma3d_l: basepeak=true 331.art_l: basepeak=true Alternate Sources: ifdef version of art from SPEC Web site ompl2001-fabs-20030401.tar.gz used for Base and Peak 331.art_l Kernel Paramters (/stand/system): maxdsiz 0xc0000000 maxdsiz_64bit 0x3ffbfffffff maxssiz 0x17f00000 maxssiz_64bit 0x40000000 maxtsiz 0x40000000 maxtsiz_64bit 0x40000000 vps_pagesize 4096 vps_ceiling 16384 dbc_min_pct 20 dbc_max_pct 20 swapmem_on 0 Notes: System was configured with 1/2 of memory interleaved and 1/2 of memory local to each cell System configured as a single partition with 4 cells and 4 processors per cell Threads were assigned to cpus using the FILL strategy from the HP-UX mpsched utility Memory tuning is documented in man page malloc(3C) _M_ARENA_OPTS=64:32 64 malloc arenas, 32 4k pages expansion _M_SBA_OPTS=16348:150:256 16384 maxfast size, 150 small blocks, 256 grain size

Notes / Tuning Information

  User environment:
     MP_IDLE_THREADS_WAIT=-1
     OMP_FIRST_USE=0
 
  Base:
     F90  +Ofaster +DSitanium2 +Oopenmp   
          +Oinfo +DD64 -minshared  
     cc   +Ofaster +Oopenmp +DD64 +Oinfo +DSitanium2
          -minshared -AOe +Ofltacc=default
    submit = chatr -s +id disable +pd 64k +pi 64k $commandexe;  \
         _M_ARENA_OPTS=64:32 _M_SBA_OPTS=16348:150:256 \
            mpsched -T FILL $command 
  
  Peak:
    311.wupwise_l:  +Ofaster +O3 +DSitanium2 +Oopenmp 
      +Oinfo +DD64 -minshared +cat -Wl,+pd64k -Wl,+pi64k
      ONESTEP = true

    313.swim_l:  basepeak=true
 
    315.mgrid_l:  basepeak=true
 
    317.applu_l:  basepeak=true
 
    321.equake_l:  basepeak=true
 
    325.apsi_l: basepeak=true

    327.gafort_l: basepeak=true
 
    329.fma3d_l: basepeak=true
 
    331.art_l:  basepeak=true

 Alternate Sources:  
   ifdef version of art 
   from SPEC Web site  ompl2001-fabs-20030401.tar.gz
     used for Base and Peak 331.art_l
 
 
  Kernel Paramters (/stand/system):
     maxdsiz         0xc0000000
     maxdsiz_64bit   0x3ffbfffffff
     maxssiz         0x17f00000
     maxssiz_64bit   0x40000000
     maxtsiz         0x40000000
     maxtsiz_64bit   0x40000000
     vps_pagesize    4096
     vps_ceiling     16384
     dbc_min_pct     20
     dbc_max_pct     20
     swapmem_on      0
 
Notes:

  System was configured with 1/2 of memory interleaved and
    1/2 of memory local to each cell

  System configured as a single partition with 4 cells and 
    4 processors per cell

  Threads were assigned to cpus using the FILL strategy
    from the HP-UX mpsched utility

  Memory tuning is documented in man page malloc(3C)
    _M_ARENA_OPTS=64:32
      64 malloc arenas, 32 4k pages expansion
    _M_SBA_OPTS=16348:150:256
      16384 maxfast size, 150 small blocks, 256 grain size

First published at SPEC.org on 15-Oct-2003

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