Invoke Intel C Compiler
Invoke Intel C++ Compiler
Invoke Intel Fortran Compiler
This option specifies if source files are in free format.
Tells the compiler to conform to the c99 language standard.
Enables the parallelizer to generate multithreaded code based on OpenMP* directives.
Enables O2 optimizations plus more aggressive optimizations, such as prefetching, scalar replacement, and loop and memory access transformations. Enables optimizations for maximum speed.
Optimizes for Intel processors with Advanced Vector Extensions 2 (AVX2).
Defines the memory model. Possible values are: - small: restrict code and data to the first 2GB of address space. All accesses of code and data can be done with Instruction Pointer (IP)-relative addressing. - medium: restrict code to the first 2GB, places no memory restriction on data. Accesses of code can be done with IP-relative addressing, but accesses of data must be done with absolute addressing. - large: Places no memory restriction on code or data. All accesses of code and data must be done with absolute addressing.
Causes Intel-provided libraries to be linked in dynamically.
Enables the parallelizer to generate multithreaded code based on OpenMP* directives.
Enables O2 optimizations plus more aggressive optimizations, such as prefetching, scalar replacement, and loop and memory access transformations. Enables optimizations for maximum speed.
Optimizes for Intel processors with Advanced Vector Extensions 2 (AVX2).
Defines the memory model. Possible values are: - small: restrict code and data to the first 2GB of address space. All accesses of code and data can be done with Instruction Pointer (IP)-relative addressing. - medium: restrict code to the first 2GB, places no memory restriction on data. Accesses of code can be done with IP-relative addressing, but accesses of data must be done with absolute addressing. - large: Places no memory restriction on code or data. All accesses of code and data must be done with absolute addressing.
Causes Intel-provided libraries to be linked in dynamically.
Enables the parallelizer to generate multithreaded code based on OpenMP* directives.
Enables O2 optimizations plus more aggressive optimizations, such as prefetching, scalar replacement, and loop and memory access transformations. Enables optimizations for maximum speed.
Optimizes for Intel processors with Advanced Vector Extensions 2 (AVX2).
Defines the memory model. Possible values are: - small: restrict code and data to the first 2GB of address space. All accesses of code and data can be done with Instruction Pointer (IP)-relative addressing. - medium: restrict code to the first 2GB, places no memory restriction on data. Accesses of code can be done with IP-relative addressing, but accesses of data must be done with absolute addressing. - large: Places no memory restriction on code or data. All accesses of code and data must be done with absolute addressing.
Causes Intel-provided libraries to be linked in dynamically.
This BIOS option allows the enabling/disabling of a processor feature that reduces the latency of memory accesses.
Setting this option to disabled may improve performance for bandwidth limited applications.
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For questions about the meanings of these flags, please contact the tester.
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Copyright 2012-2014 Standard Performance Evaluation Corporation
Tested with SPEC OMP2012 v1.0.
Report generated on Fri Nov 14 10:56:19 2014 by SPEC OMP2012 flags formatter v538.