SPEC CPU(R)2017 Floating Point Rate Result Dell Inc. PowerEdge R540 (Intel Xeon Gold 5218R, 2.10 GHz) CPU2017 License: 55 Test date: Jun-2020 Test sponsor: Dell Inc. Hardware availability: Feb-2020 Tested by: Dell Inc. Software availability: Apr-2020 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 80 1746 459 * 40 852 471 S 503.bwaves_r 80 1741 461 S 40 852 471 * 507.cactuBSSN_r 80 349 290 S 80 349 290 S 507.cactuBSSN_r 80 350 289 * 80 350 289 * 508.namd_r 80 464 164 S 80 464 164 S 508.namd_r 80 466 163 * 80 466 163 * 510.parest_r 80 1850 113 S 40 725 144 S 510.parest_r 80 1852 113 * 40 725 144 * 511.povray_r 80 803 233 S 80 680 275 S 511.povray_r 80 803 233 * 80 682 274 * 519.lbm_r 80 774 109 * 80 774 109 * 519.lbm_r 80 773 109 S 80 773 109 S 521.wrf_r 80 923 194 * 40 410 218 S 521.wrf_r 80 909 197 S 40 410 218 * 526.blender_r 80 575 212 * 80 575 212 * 526.blender_r 80 575 212 S 80 575 212 S 527.cam4_r 80 630 222 * 80 630 222 * 527.cam4_r 80 629 223 S 80 629 223 S 538.imagick_r 80 360 553 * 80 360 553 * 538.imagick_r 80 360 553 S 80 360 553 S 544.nab_r 80 375 359 S 80 375 359 S 544.nab_r 80 375 359 * 80 375 359 * 549.fotonik3d_r 80 2172 144 S 80 2172 144 S 549.fotonik3d_r 80 2173 143 * 80 2173 143 * 554.roms_r 80 1433 88.7 * 40 600 106 * 554.roms_r 80 1429 89.0 S 40 596 107 S ================================================================================= 503.bwaves_r 80 1746 459 * 40 852 471 * 507.cactuBSSN_r 80 350 289 * 80 350 289 * 508.namd_r 80 466 163 * 80 466 163 * 510.parest_r 80 1852 113 * 40 725 144 * 511.povray_r 80 803 233 * 80 682 274 * 519.lbm_r 80 774 109 * 80 774 109 * 521.wrf_r 80 923 194 * 40 410 218 * 526.blender_r 80 575 212 * 80 575 212 * 527.cam4_r 80 630 222 * 80 630 222 * 538.imagick_r 80 360 553 * 80 360 553 * 544.nab_r 80 375 359 * 80 375 359 * 549.fotonik3d_r 80 2173 143 * 80 2173 143 * 554.roms_r 80 1433 88.7 * 40 600 106 * SPECrate(R)2017_fp_base 209 SPECrate(R)2017_fp_peak 221 HARDWARE -------- CPU Name: Intel Xeon Gold 5218R Max MHz: 4000 Nominal: 2100 Enabled: 40 cores, 2 chips, 2 threads/core Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 27.5 MB I+D on chip per chip Other: None Memory: 384 GB (12 x 32 GB 2Rx4 PC4-2933V-R, running at 2666) Storage: 1 x 480 GB SATA SSD Other: None SOFTWARE -------- OS: Red Hat Enterprise Linux 8.2 kernel 4.18.0-193.el8.x86_64 Compiler: C/C++: Version 19.1.1.217 of Intel C/C++ Compiler for Linux; Fortran: Version 19.1.1.217 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 2.7.7 released May-2020 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS set to prefer performance at the cost of additional power usage. Compiler Notes -------------- The inconsistent Compiler version information under Compiler Version section is due to a discrepancy in Intel Compiler. The correct version of C/C++ compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux The correct version of Fortran compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017-ic19.1u1/lib/intel64:/home/cpu2017-ic19.1u1/je5.0.1-64" MALLOC_CONF = "retain:true" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7980XE CPU + 64GB RAM memory using Redhat Enterprise Linux 8.0 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS settings: Sub NUMA Cluster enabled Virtualization Technology disabled System Profile set to Custom CPU Performance set to Maximum Performance C States set to Autonomous C1E disabled Uncore Frequency set to Dynamic Energy Efficiency Policy set to Performance Memory Patrol Scrub set to standard Logical Processor enabled CPU Interconnect Bus Link Power Management disabled PCI ASPM L1 Link Power Management disabled UPI Prefetch enabled LLC Prefetch disabled Dead Line LLC Alloc enabled Directory AtoS disabled Sysinfo program /home/cpu2017-ic19.1u1/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on RHEL-8-2-SUT Thu Jun 18 22:29:12 2020 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 5218R CPU @ 2.10GHz 2 "physical id"s (chips) 80 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 20 siblings : 40 physical 0: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 physical 1: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 80 On-line CPU(s) list: 0-79 Thread(s) per core: 2 Core(s) per socket: 20 Socket(s): 2 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 5218R CPU @ 2.10GHz Stepping: 7 CPU MHz: 1946.722 CPU max MHz: 4000.0000 CPU min MHz: 800.0000 BogoMIPS: 4200.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 28160K NUMA node0 CPU(s): 0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60,64,68,72,76 NUMA node1 CPU(s): 1,5,9,13,17,21,25,29,33,37,41,45,49,53,57,61,65,69,73,77 NUMA node2 CPU(s): 2,6,10,14,18,22,26,30,34,38,42,46,50,54,58,62,66,70,74,78 NUMA node3 CPU(s): 3,7,11,15,19,23,27,31,35,39,43,47,51,55,59,63,67,71,75,79 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts pku ospke avx512_vnni md_clear flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 28160 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 72 76 node 0 size: 95277 MB node 0 free: 85706 MB node 1 cpus: 1 5 9 13 17 21 25 29 33 37 41 45 49 53 57 61 65 69 73 77 node 1 size: 96763 MB node 1 free: 96128 MB node 2 cpus: 2 6 10 14 18 22 26 30 34 38 42 46 50 54 58 62 66 70 74 78 node 2 size: 96763 MB node 2 free: 96551 MB node 3 cpus: 3 7 11 15 19 23 27 31 35 39 43 47 51 55 59 63 67 71 75 79 node 3 size: 96762 MB node 3 free: 96524 MB node distances: node 0 1 2 3 0: 10 21 11 21 1: 21 10 21 11 2: 11 21 10 21 3: 21 11 21 10 From /proc/meminfo MemTotal: 394821456 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="Red Hat Enterprise Linux" VERSION="8.2 (Ootpa)" ID="rhel" ID_LIKE="fedora" VERSION_ID="8.2" PLATFORM_ID="platform:el8" PRETTY_NAME="Red Hat Enterprise Linux 8.2 (Ootpa)" ANSI_COLOR="0;31" redhat-release: Red Hat Enterprise Linux release 8.2 (Ootpa) system-release: Red Hat Enterprise Linux release 8.2 (Ootpa) system-release-cpe: cpe:/o:redhat:enterprise_linux:8.2:ga uname -a: Linux RHEL-8-2-SUT 4.18.0-193.el8.x86_64 #1 SMP Fri Mar 27 14:35:58 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: itlb_multihit: KVM: Vulnerable CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling tsx_async_abort: Mitigation: Clear CPU buffers; SMT vulnerable run-level 3 Jun 18 16:14 last=5 SPEC is set to: /home/cpu2017-ic19.1u1 Filesystem Type Size Used Avail Use% Mounted on /dev/mapper/rhel-home xfs 392G 7.0G 385G 2% /home From /sys/devices/virtual/dmi/id BIOS: Dell Inc. 2.7.7 05/06/2020 Vendor: Dell Inc. Product: PowerEdge R540 Product Family: PowerEdge Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 1x 00AD00B300AD HMA84GR7CJR4N-WM 32 GB 2 rank 2933 6x 00AD063200AD HMA84GR7CJR4N-WM 32 GB 2 rank 2933 5x 00AD069D00AD HMA84GR7CJR4N-WM 32 GB 2 rank 2933 4x Not Specified Not Specified (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 519.lbm_r(base, peak) 538.imagick_r(base, peak) | 544.nab_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 508.namd_r(base, peak) 510.parest_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base) 526.blender_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base) 526.blender_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 507.cactuBSSN_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak) | 554.roms_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using both C and C++: icpc icc Benchmarks using Fortran, C, and C++: icpc icc ifort Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc C++ benchmarks: -m64 -qnextgen -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Fortran benchmarks: -m64 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using both Fortran and C: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using both C and C++: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using Fortran, C, and C++: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using both C and C++: icpc icc Benchmarks using Fortran, C, and C++: icpc icc ifort Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 519.lbm_r: basepeak = yes 538.imagick_r: basepeak = yes 544.nab_r: basepeak = yes C++ benchmarks: 508.namd_r: basepeak = yes 510.parest_r: -m64 -qnextgen -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Fortran benchmarks: 503.bwaves_r: -m64 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 549.fotonik3d_r: basepeak = yes 554.roms_r: Same as 503.bwaves_r Benchmarks using both Fortran and C: 521.wrf_r: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 527.cam4_r: basepeak = yes Benchmarks using both C and C++: 511.povray_r: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 526.blender_r: basepeak = yes Benchmarks using Fortran, C, and C++: 507.cactuBSSN_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revA.html http://www.spec.org/cpu2017/flags/Dell-Platform-Flags-PowerEdge-revE10.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revA.xml http://www.spec.org/cpu2017/flags/Dell-Platform-Flags-PowerEdge-revE10.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2020-06-18 23:29:11-0400. Report generated on 2020-07-07 14:30:50 by CPU2017 text formatter v6255. Originally published on 2020-07-07.