SPEC CPU2017 Platform Settings for NEC Express5800 Intel-based systems

Firmware / BIOS / Microcode Settings

Firmware Settings

One or more of the following settings may have been set. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.

Intel Hyper-Threading (Default = Enabled):

This feature allows enabling or disabling of logical processor cores on processors supporting Intel Hyper-Threading (HT). When enabled, each physical processor core operates as two logical processor cores. When disabled, each physical core operates as only one logical processor core. Enabling this option can improve overall performance for applications that benefit from a higher processor core count.

Intel Virtualization Technology (Intel VT) (Default = Enabled):

When enabled, a hypervisor or operating system supporting this option can use hardware capabilities provided by Intel VT. Some hypervisors require that you enable Intel VT. You can leave this set to enabled even if you are not using a hypervisor or an operating system that uses this option. With default BIOS settings as shipped with most systems, the default state for this setting is Enabled. However, this setting can change it's default setting depending on the Workload Profile that is selected, or what Workload Profile is default for the a certain system.

Intel VT-d (Default = Enabled):

If enabled, a hypervisor or operating system supporting this option can use hardware capabilities provided by Intel VT for Directed I/O. You can leave this set to enabled even if you are not using a hypervisor or an operating system that uses this option. With default BIOS settings as shipped with most systems, the default state for this setting is Enabled. However, this setting can change it's default setting depending on the Workload Profile that is selected, or what Workload Profile is default for the a certain system.

SR-IOV (Default = Enabled):

If enabled, SR-IOV support enables a hypervisor to create virtual instances of PCI-express device, potentially increasing performance. If enabled, the BIOS allocates additional resources to PCI-express devices. You can leave this option set to enabled even if you are not using a hypervisor. With default BIOS settings as shipped with most systems, the default state for this setting is Enabled. However, this setting can change it's default setting depending on the Workload Profile that is selected, or what Workload Profile is default for the a certain system.

Adjacent Sector Prefetch (Default = Enabled):

This option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within a 128-byte sector that contains the data needed due to a cache line miss. In some cases, setting this option to disabled can improve performance. Typically, setting this option to enabled provides better performance. Only disable this option after performing application benchmarking to verify improved performance in the environment.

DCU Stream Prefetcher (Default = Enabled):

This option allows enabling/disabling the function of Data Cache Unit (DCU) Stream prefetcher. If this option sets to enabled, when the DCU Stream prefetcher detects multiple loads from the same line done within a time limit, it prefetches the next line into the L1 data cache. In some cases, setting this option to disabled can improve performance. Typically, setting this option to enabled provides better performance. Only disable this option after performing application benchmarking to verify improved performance in your environment.

Thermal Configuration (Default = Optimal Cooling):

This feature allows the user to select the fan cooling solution for the system. Values for this BIOS option can be:

• Optimal Cooling: Provides the most efficient solution by configuring fan speeds to the minimum required to provide adequate cooling.
• Increased Cooling: Will run fans at higher speeds to provide additional cooling. Increased Cooling should be selected when third-party storage controllers are cabled to the embedded hard drive cage, or if the system is experiencing thermal issues that cannot be resolved in another manner.
• Maximum Cooling: Will provide the maximum cooling available by this platform.

LLC Dead Line Allocation (Default = Enabled):

In the Skylake cache scheme, mid-level cache (MLC) evictions are filled into the last level cache (LLC). If a line is evicted from the MLC to the LLC, the Skylake core can flag the evicted MLC lines as "dead". This means that the lines are not likely to be read again. This option allows dead lines to be dropped and never fill the LLC if the option is disabled. Values for this BIOS option can be:

• Disabled: Disabling this option can save space in the LLC by never filling dead lines into the LLC. This can and prevent useful data from being evicted.
• Enabled: Opportunistically fill dead lines in LLC, if space is available.

Stale A to S (Default = Disabled):

The in-memory directory has three states: invalid (I), snoopAll (A), and shared (S). Invalid (I) state means the data is clean and does not exist in any other socket`s cache. The snoopAll (A) state means the data may exist in another socket in exclusive or modified state. Shared (S) state means the data is clean and may be shared across one or more socket`s caches. When doing a read to memory, if the directory line is in the A state we must snoop all the other sockets because another socket may have the line in modified state. If this is the case, the snoop will return the modified data. However, it may be the case that a line is read in A state and all the snoops come back a miss. This can happen if another socket read the line earlier and then silently dropped it from its cache without modifying it. Values for this BIOS option can be:

• Disabled: Disabling this option allows the feature to process memory directories as described above.
• Enabled: In the situation where a line in A state returns only snoop misses, the line will transition to S state. That way, subsequent reads to the line will encounter it in S state and not have to snoop, saving latency and snoop bandwidth.

Stale A to S may be beneficial in a workload where there are many cross-socket reads.

LLC Prefetch (Default = Disabled):

This option configures the processor Last Level Cache (LLC) prefetch feature as a result of the non-inclusive cache architecture. The LLC prefetcher exists on top of other prefetchers that that can prefetch data in the core data cache unit (DCU) and mid-level cache(MLC). In some cases, setting this option to disabled can improve performance. Typically, setting this option to enable provides better performance. Values for this BIOS option can be:

• Disabled: Disabling this option can forces data to fill the MLC before prefetching data to the LLC.
• Enabled: Giving the core prefetcher the ability to prefetch data directly to the LLC without filling the MLC.

NUMA Group Size Optimization (Default = Flat):

This feature allows the user to configure how the BIOS reports the size of a NUMA node (number of logical processors), which assists the Operating System in grouping processors for application use (referred to as Kgroups). Values for this BIOS option can be:

• Clustered: Might provide better performance for some workloads due to optimizing the resulting groups along NUMA boundaries.
• Flat: Might provide better performance for some workloads that cannot take advantage of processors spanning multiple groups. This setting would be necessary to help this class of applications utilize more logical processors.

Sub-NUMA Clustering (Default = Disabled):

Sub-NUMA Clustering(SNC) breaks up the last level cache (LLC) into disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. SNC improves average latency to the LLC and memory. SNC is a replacement for the cluster on die (COD) feature found in previous processor families. For a multi-socketed system, all SNC clusters are mapped to unique NUMA domains. (See also IMC interleaving.) Values for this BIOS option can be:

• Disabled: The LLC is treated as one cluster when this option is disabled
• Enabled: Utilizes LLC capacity more efficiently and reduces latency due to core/IMC proximity. This may provide performance improvement on NUMA-aware operating systems

XPT Prefetcher (Default = Auto):

This option configures the processor Xtended Prediciton Table (XPT) prefetch feature. The XPT prefetcher exists on top of other prefetchers that that can prefetch data in the core DCU, MLC, and LLC. The XPT prefetcher will issue a speculative DRAM read request in parallel to an LLC lookup. This prefetch bypasses the LLC, saving latency. In some cases, setting this option to disabled can improve performance. Typically, setting this option to enable provides better performance. This option must be enabled when Sub-NUMA Clustering is enabled. Values for this BIOS option can be:

• Auto: Allows a read request sent to the LLC to speculatively issue a copy of the read to the memory controller requesting the prefetch.
• Disabled: Does not allow the LLC to speculatively issue copies of reads. Disabling this will also disables Sub-NUMA Cluster (SNC).
• Enabled: This setting is not supported. Use this option with Auto or Disabled setting.

Uncore Frequency Scaling (Default = Auto):

This option controls the frequency scaling of the processor`s internal buses (the uncore). Values for this BIOS option can be:

• Auto: Enabled the processor to dynamically change frequencies based on the workload.
• Maximum: Enables tuning for latency.
• Minimum: Enables tuning for power consumption.

Workload Profile (Default = Custom):

This option allows a user to choose one workload profile that best fits the user`s needs. The workload profiles control many power and performance settings that are relevant to general workload areas. Values for this BIOS option can be:

• General Power Efficient Compute, General Peak Frequency Compute, General Throughput Compute, Virtualization - Power Efficient, Virtualization - Max Performance, Low Latency, Mission Critical, Transaction Application Processing, High Performance Compute (HPC), Decision Support, Graphic Processing, I/O Throughput, or Custom.
• Setting the Workload Profile to any option except Custom allows the server to automatically configure various BIOS settings. These BIOS settings control many power and performance settings that are relevant to general workload areas that fit the profile name.
  • General Power Efficient Compute: Minimum Processor Idle Power Core C-State set to C6 State, Minimum Processor Idle Power Package C-state set to Package C6 (retention) State, Energy/Performance Bias set to Balanced Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Flat, Sub-NUMA Clustering set to Disabled, Uncore Frequency Scaling set to Auto
  • General Peak Frequency Compute: Minimum Processor Idle Power Package C-state set to Package C6 (retention) State, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered, Uncore Frequency Scaling set to Maximum
  • General Throughput Compute: Minimum Processor Idle Power Package C-state set to Package C6 (retention) State, Energy/Performance Bias set to Maximum Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered, Sub-NUMA Clustering set to Enabled
  • Virtualization - Power Efficient: SR-IOV set to Enabled, Intel Virtualization Technology (Intel VT) set to Enabled, Intel VT-d set to Enabled, Minimum Processor Idle Power Core C-State set to C6 State, Minimum Processor Idle Power Package C-state set to Package C6 (retention) State, Energy/Performance Bias set to Balanced Performance, NUMA Group Size Optimization set to Clustered, Sub-NUMA Clustering set to Disabled, Uncore Frequency Scaling set to Auto
  • Virtualization - Max Performance: SR-IOV set to Enabled, Intel Virtualization Technology (Intel VT) set to Enabled, Intel VT-d set to Enabled, Minimum Processor Idle Power Core C-State set to No C-states, Minimum Processor Idle Power Package C-state set to No Package State, Energy/Performance Bias set to Maximum Performance, NUMA Group Size Optimization set to Clustered, Sub-NUMA Clustering set to Enabled, Uncore Frequency Scaling set to Maximum
  • Low Latency: SR-IOV set to Disabled, Intel Virtualization Technology (Intel VT) set to Disabled, Intel VT-d set to Disabled, Minimum Processor Idle Power Core C-State set to No C-states, Minimum Processor Idle Power Package C-state set to No Package State, Energy/Performance Bias set to Maximum Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered, Memory Patrol Scrubbing set to Disabled, Uncore Frequency Scaling set to Maximum
  • Mission Critical: Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled
  • Transaction Application Processing: Minimum Processor Idle Power Core C-State set to No C-states, Minimum Processor Idle Power Package C-state set to No Package State, Energy/Performance Bias set to Maximum Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered
  • High Performance Compute (HPC): SR-IOV set to Disabled, Intel Virtualization Technology (Intel VT) set to Disabled, Intel VT-d set to Disabled, Minimum Processor Idle Power Core C-State set to No C-states, Minimum Processor Idle Power Package C-state set to No Package State, Energy/Performance Bias set to Maximum Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered, Uncore Frequency Scaling set to Maximum
  • Decision Support: Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered
  • Graphic Processing: SR-IOV set to Disabled, Intel Virtualization Technology (Intel VT) set to Disabled, Intel VT-d set to Disabled, Energy/Performance Bias set to Maximum Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered, Uncore Frequency Scaling set to Maximum
  • I/O Throughput: Energy/Performance Bias set to Maximum Performance, Adjacent Sector Prefetch set to Enabled, DCU Stream Prefetcher set to Enabled, NUMA Group Size Optimization set to Clustered, Uncore Frequency Scaling set to Maximum
• Setting the Workload Profile to Custom allows a user to set any BIOS setting to any supported setting. Choosing Custom after selecting an initial profile does not change the settings controlled by the profile previously selected without user intervention.

Minimum Processor Idle Power Core C-State (Default = No C-States):

This option can only be configured if the Workload Profile is set to Custom, or this option is not a dependent value for the Workload Profile. This feature selects the processor's lowest idle power state (C-state) that the operating system uses. The higher the C-state, the lower the power usage of that idle state (C6 is the lowest power idle state supported by the processor). Values for this setting can be:

• C6 State: While in C6, the core PLLs are turned off, the core caches are flushed and the core state is saved to the Last Level Cache. Power Gates are used to reduce power consumption to close to zero. C6 is considered an inactive core.
• C1E State: C1E is defined as the enhanced halt state. While in C1E no instructions are being executed. C1E considered an active core.
• No C-states: No C-states is defined as C0, which is defined as the active state. While in C0, instructions are being executed by the core.

Minimum Processor Idle Power Package C-State (Default = No Package State):

This option can only be configured if the Workload Profile is set to Custom, or this option is not a dependent value for the Workload Profile. This feature selects the processor's lowest idle package power state (C-state) that is enabled. The processor will automatically transition into the package C-states based on the Core C-states, in which cores on the processor have transitioned. The higher the package C-state, the lower the power usage of that idle package state. Package C6 (retention) is the lowest power idle package state supported by the processor). Values for this setting can be:

• Package C6 (retention) State: All cores have saved their architectural state and have had their core voltages reduced to zero volts. The LLC retains context, but no accesses can be made to the LLC in this state, the cores must break out to the internal state package C2 for snoops to occur.
• Package C6 (non-retention) State: All cores have saved their architectural state and have had their core voltages reduced to zero volts. The LLC does not retain context, and no accesses can be made to the LLC in this state, the cores must break out to the internal state package C2 for snoops to occur.
• No Package State: All cores are in an active state and have not entered any power saving state.

Energy/Performance Bias (Default = Balanced Performance):

This option can only be configured if the Workload Profile is set to Custom, or this option is not a dependent value for the Workload Profile. This option configures several processor subsystems to optimize the processor's performance and power usage. Values for this BIOS setting can be:

• Balanced Performance: Provides optimum performance efficiency and is recommended for most environments.
• Maximum Performance: Should be used for environments that require the highest performance and lowest latency but are not sensitive to power consumption.
• Balanced Power: Similar to Balanced Performance but this option prioritizes more power savings at the sacrifice of performance.
• Power Savings Mode: Should only be used in environments that are power sensitive and are willing to accept reduced performance.

Memory Patrol Scrubbing (Default = Enabled):

This option allows for correction of soft memory errors. Over the length of system runtime, the risk of producing multi-bit and uncorrected errors is reduced with this option. Values for this BIOS setting can be:

• Enabled: Correction of soft memory errors can occur during runtime.
• Disabled: Soft memory error correction is turned off during runtime.

Advanced Memory Protection (Default = Advanced ECC Support):

Use this option to configure additional memory protection with ECC (Error Checking and Correcting). Options and support vary per system. When the memory configuration supports the Fault Tolerant Memory (ADDDC) mode and the Workload Profile setting is other than Low Latency and Custom, Advanced Memory Protection is automatically changed to Fault Tolerant Memory (ADDDC) mode.

• Advanced ECC Support keeps all installed memory available for use while still protecting the system against all single-bit failures and certain multi-bit failures.
• Online Spare with Advanced ECC Support enables a system to automatically map out a group of memory that is detected to be at an increased risk of receiving uncorrected memory errors based on an advanced analysis of corrected memory errors. The mapped out memory is automatically replaced by a spare group of memory without interrupting the system.
• Mirrored Memory with Advanced ECC Support provides the maximum protection against uncorrected memory errors that might otherwise result in a system failure.
• Fault Tolerant Advanced Double Device Data Correction (ADDDC) enables the system to correct memory errors and continue to operate in cases of multiple DRAM device failures on a DIMM. This provides protection against uncorrectable memory errors beyond what is available with Advanced ECC.

Enhanced Processor Performance (Default = Disabled):

Use this option to enable the Enhanced Processor Performance setting. When enabled, this option will adjust the processor settings to a more aggressive setting that can result in improved performance, but may result in higher power consumption. Values for this BIOS option can be either Disabled or Enabled.

Last updated October 11, 2019.