Compilers: Oracle Solaris Studio 12.2
Operating systems: Solaris 10 9/10
Last updated: 23-Feb-2011 gr
The text for many of the descriptions below was taken from the Oracle Studio Compiler Documentation, which is copyright © 2007-2010 Oracle Corporation, Inc. The original documentation can be found at docs.sun.com.
This document has both optimization flags (in the immediately following section) and a description of Platform Settings
Selecting one of the following will take you directly to that section:
Assumes global pointers are not aliased (restricted).
This option turns on analysis of data access patterns for scalars and arrays regions accessed in each loop. The information is used by various loop transformations such as loop fusion for determining profitability of those transformations.
Unlike regular data dependence analysis, this analyzes detailed array sections accessed in a loop, so the analysis can be expensive in terms of compilation time.
Increase the probability that the compiler will perform memcpy/memset transformations.
Ignore parallelization factors in loop interchange heuristics.
When considering whether to interchange loops, set memory store operation weight to n. A higher value of n indicates a greater performance cost for stores.
Control the optimizer's loop inliner; set the minimum call site frequency counter in order to consider a routine for inlining.
Control the optimizer's loop inliner; Set inline callee size limit to n. The unit roughly corresponds to the number of instructions.
Control the optimizer's loop inliner; The inliner is allowed to increase the size of the program by up to n%.
Control the optimizer's loop inliner; Allow routines to increase by up to n. The unit roughly corresponds to the number of instructions.
Control the optimizer's loop inliner; Perform maximum inlining (without considering code size increase).
Control the optimizer's loop inliner; Allow routines that are called recursively to still be eligible for inlining.
Inliner only considers routines smaller than n pseudo instructions as possible inline candidates.
Increase the probability that loop induction variables will replaced, so that some extraneous code can be eliminated from loops.
Controls the alignment of data in common blocks and standard numeric sequence types. The value specified indicates the maximum alignment (in bytes) for data elements within common blocks and standard numeric sequence types.
Ignore parallelization factors in loop distribution heuristics.
Reconstruct array subscripts during memory allocation merging and data layout program transformation.
The option instructs the compiler on the number of threads to use for automatically parallelized regions. The nthreads value is only applicable for parallelized regions in the modules that are compiled with this option. The value specified by this option will override any values previously set by the OMP_NUM_THREADS or PARALLEL environment variable. The runtime library may choose to alter the number of threads unless the environment variable OMP_DYNAMIC is set to false.
Note that this is a flag to the "iropt" component of the compilation system. In general, flags may be sent to iropt using "Qoption iropt" from the "f90" and "CC" commands; or using "-W2," from the "cc" command.
Do speculative prefetching for link-list data structures; perform prefetching n iterations ahead.
Do speculative prefetching for link-list data structures; do not attempt prefetching for innermost loops.
Do prefetching for one-level indirect memory references.
Enable padding of arrays by n.
Convert multiple short memory load operations into single long load operations.
Perform loop tiling which is enabled by loop skewing. Loop skewing is a transformation that transforms a non-fully interchangeable loop nest to a fully interchangeable loop nest. The optional b<n> sets the tiling block size to n.
Increase the probability that small-trip-count inner loops will be fully unrolled.
Increase the probability that small-trip-count inner loops will be fully unrolled.
Enable optimization of critical control paths
Assume data is naturally aligned.
Used for 403.gcc: allow use of compiler's internal builtin alloca.
Allows the compiler to assume that your code does not rely on setting of the errno variable.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Selects faster (but nonstandard) handling of floating point arithmetic exceptions and gradual underflow. The spelling "-fns=yes" is equivalent to "-fns".
Allow optimizer to use x87 hardware instructions for sine, cosine, and rsqrt. The precision and rounding effects are determined by the underlying hardware implementation, rather than by standard IEEE754 semantics.
Controls simplifying assumptions for floating point arithmetic:
Evaluate float expressions as single precision.
Sets the IEEE 754 trapping mode to common exceptions (invalid, division by zero, and overflow).
Turns off all IEEE 754 trapping modes.
Includes symbols in the executable. If the optimization level is -xO3 or lower, some optimizations may be disabled when -g is present. At -xO4 or higher, full optimization is performed, even when -g is present.
Includes symbols in the executable. If the optimization level is -xO3 or lower, some optimizations may be disabled when -g0 is present. At -xO4 or higher, full optimization is performed, even when -g0 is present.
Use iropt in the profile phase of the compiler iropt is the Global optimizer.
Links in a library of general purpose memory allocation routines which can be faster than those found in libc, at the expense of more virtual memory consumed.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Disables use of the compiler-provided Cstd header files.
Link with multi-threaded memory allocator library. Functions in this library provide concurrent access to heap space.
Include a library containing chip-specific memory routines.
Include the optimized math library. This option usually generates faster code, but may produce slightly different results. Usually these results will differ only in the last bit.
Include a library with vectorized versions of some elementary mathematical functions.
Link with the Apache C++ Standard Library ("stdcxx"). The conventions for naming libraries are described in the README that comes with stdcxx; for example, "std8D" indicates a 64-bit shared library with optimization enabled; "std8d" is a 32-bit shared library with optimization enabled.
Adds the directory for the Apache C++ Standard Library include files to the search path at compile time.
Adds the directory for the Apache C++ Standard Library to the search path at link time
Specifies library search directory for the Apache C++ Standard Library for use by the runtime linker. The information is recorded in the object file and passed to the runtime linker.
Use STLport's Standard Library implementation instead of the default libCstd.
The libsunmath math library contains functions that are not specified by any standard but are useful in numerical software. It also contains many of the functions that are in libm.so.2 but not in libm.so.1.
Link with MicroQuill's SmartHeap library for Solaris. This is a library that optimizes calls to new, delete, malloc and free.
The -R flag specifies library search directories to the runtime linker. The information is recorded in the object file and passed to the runtime linker.
The version of SmartHeap that is used can be one of:
Usse object-caching memory allocation library
Specifies the memory model for the compiled binary object. Use -m32 to create 32-bit executables and shared libraries. The default is 32-bit.
Specifies the memory model for the compiled binary object. Use -m64 to create 64-bit executables and shared libraries. The default is 32-bit.
Reads mapfile as a text file of directives to ld.
Do not allow C++ exceptions. A throw specification on a function is accepted but ignored; the compiler does not generate exception code.
Cancels forcing expressions to have the precision of the result.
There are several scheduling passes in the compiler. This option allows early passes to move instructions across call instructions.
Allow the enhanced pipeline scheduler (EPS) to use speculative (non-faulting) loads.
Use enhanced pipeline scheduling (EPS) and selective scheduling algorithms for instruction scheduling.
The number of live variables allowed at any given point is n more than the number of physical registers. Setting n to a significantly large number (e.g., 100) will disable register pressure heuristics in EPS.
Set the EPS window size, that is, the number of instructions it will consider across all paths when trying to find independent instructions to schedule a parallel group. Larger values may result in better run time, at the cost of increased compile time.
Sets the aggressiveness of the trace formation, where n is 4, 5, or 6. The higher the value of n, the lower the branch probability needed to include a basic block in a trace.
Turn on optimization to reduce branch after branch penalty: nops will be inserted to prevent one branch from occupying the delay slot of another branch.
Use profile feedback data to predict values and attempt to generate faster code along these control paths, even at the expense of possibly slower code along paths leading to different values. Correct code is generated for all paths.
Do function entry alignment at n-byte boundaries.
Peels the most frequent test branches/cases off a switch until the branch probability reaches less than 1/n. This is effective only when profile feedback is used
Control irregular loop prefetching; turns the module on (1) or off (0) (default is on for F90; off for C/C++)
Control irregular loop prefetching; sets the prefetch look ahead distance, in bytes. The default is 256.
Control irregular loop prefetching; a setting of "1" means force user settings to override internally computed values.
Control irregular loop prefetching; a setting of "1" means force the optimization to be turned on for all languages.
Turns on prefetching for outer loops
Control irregular loop prefetching; use weak prefetches in the general loop prefetch.
Control irregular loop prefetching; sets the number of attempts at prefetching. If not specified, t=2 if -xprefetch_level=3 has been set; otherwise, defaults to t=1.
Specifies that all loops can be pipelined without needing to be concerned about loop-carried dependencies.
In pipelined loops, use floating point divide instructions for signed integer division.
Set number of outstanding prefetches in pipelined loops to <n>
Turn off prefetching in the prolog of modulo scheduled loops.
Turn off prefetching for stores in the pipeliner.
Turn off the use of strong prefetches in modulo scheduled loops.
Assert (to the pipeliner) that unsigned int computations will not overflow.
Reduce the probability that the compiler will hoist sethi insructions out of loops.
Do not perform loop distribution transformations.
Disable loop tiling optimization in iropt
Disable loop unroll and jam optimization in iropt
-sched_first_pass=0 turns off first pass of instruction scheduler (second pass is off by default).
-sched_first_pass=1 turns on first pass of instruction scheduler.
Allocate routine local variables on the stack.
Enable unrolling loops n times where possible.
Specifies the degree of conformance with the ISO C standard: -Xc indicates strict conformance, whereas -Xa indicates ISO C plus some K&R compatibility extensions.
Specify degree of aliasing to be assumed by the compiler. Specifying -xalias without a list gives the best performance for most programs that do not violate Fortran aliasing rules, and corresponds to: -xalias=no%dummy,no%craypointer,no%actual,no%overindex,no%ftnpointer
Allows the compiler to perform type-based alias analysis at the specified alias level:
Allows the compiler to perform type-based alias analysis:
Specifies which instructions can be used. Among the choices are:
Generate binaries assuming the associated process is restricted to the lower 32bit address space
Turn on automatic parallelization for multiple processors.
Substitute intrinsic functions or inline system functions where profitable for performance.
Specifies no functions from the standard libraries are substituted or inlined.
Do not assume callee-save registers are saved. -xcallee=yes is the default.
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Enable optimization and inlining across source files
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Turn off inlining.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Use inline expansion for math library, libm.
Select the optimized math library.
Link with Sun supplied licensed sunperf library.
Perform link-time optimizations, such as branch optimization and cache coloring.
Specify optimization level. Can be written either as -xOn or -On, where n indicates:
If multiple arrays are placed in common, insert padding between them for better use of cache. n specifies the amount of padding to apply, in units that are the same size as the array elements. If no parameter is specified then the compiler selects one automatically.
Pad local variables, for better use of cache.
Set the preferred page size for running the program.
Set the preferred stack page size for running the program.
Set the preferred heap page size for running the program.
Generates code for the Pentium processor.
Enable generation of prefetch instructions on those architectures that support prefetch. val may be one of the following:
If only -xprefetch is specified, -xprefetch=auto,explicit is assumed.
The default is -xprefetch=auto,explicit.
Generate indirect prefetches for data arrays accessed indirectly.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Fortran is 2. The default for C and C++ is 1.
Specifies how far to prefetch ahead (in loop iterations)
Collect profile data for feedback-directed optimization (FDO). If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths. As of the Sun Studio 12 version of the compiler suite, the training run gathers information about data values on SPARC systems, but not on x86 systems. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Analyze loops for reductions such as dot products, maximum and minimum finding.
Allow the compiler to use the frame-pointer register (%ebp on IA32, %rbp on x64) as an unallocated callee-saves register.
Treat pointer-valued function parameters as restricted pointers.
Enables the use of non-faulting loads when used in conjunction with -xarch=v8plus. Assumes that no memory based traps will occur.
Selects options appropriate for the system where the compile is taking place, including architecture, chip, and cache sizes. (These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively.)
Enable unrolling loops n times where possible.
Synonym for -unroll=n
Allow the compiler to transform math library calls within loops into calls to the vector math library. Specifying
Turns on verbose mode, showing how command options expand. Shows each component as it is invoked.
Controls compiler verbosity. There are several values that can be used with this flag:
The default is -verbose=%none.
Same as -verbose=diags.
This flag will cause the Fortran compiler to emit verbose messages.
Directs the compiler to print the name and version ID of each component as the compiler executes.
Same as -verbose=version.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
This library is necessary to get functions used for accessing name services. As there are no network-enabled CPU2006 benchmarks, this flag should not be used.
One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
Intel VT-d: Disabled
VT-d, if enabled, supports remapping of I/O DMA transfers for virtualization.
Hardware Prefetch
This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm.
Adjacent Cache Line Prefetch
This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within an 128-byte sector that contains the data needed due to a cache line miss.
C-State : Disabled
Enable/Disable CPUs to enter C-State (lower power CPU state) while the system is idle. This helps to lower power consumption when enabled.
Data Reuse Optimization : Disabled
Enabling this BIOS option reduces the frequency of L3 cache updates from L1.
This may improve performance by reducing the internal bandwidth consumed by constantly updating L1 cache lines in L3.
Since this results in more fetches to main memory, setting this option to Disabled may improve performance in some cases. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.
autoup=<n>
When the file system flush daemon fsflush runs, it writes to disk all modified file buffers that are more
than n seconds old.
lpg_alloc_prefer=<n>
0 = the OS may allocate remote pages if the size requested is readily available in a remote locality group (default)
1 = Set lgroup page allocation to strongly prefer local pages.
maxusers=<n>
To increase the number of user processes derived by the system
rlim_fd_cur=<n>
Defines the soft limit on file descriptors that a single process can have open.
tune_t_fsflushr=<n>
Controls the number of seconds between runs of the file system flush daemon, fsflush.
zfs:zfs_arc_max=<n>
Controls the amount of memory used in bytes by ZFS for caching of file system buffers.
ZFS RAIDZ
In mirrored storage pool configuration, ZFS provides a RAID-Z configuration with either single or double parity fault tolerance. Single-parity RAID-Z is similar to RAID-5. Double-parity RAID-Z is similar to RAID-6.
OMP_DYNAMIC=<TRUE|FALSE>
Enables (TRUE) or disables (FALSE) dynamic adjustment of the number of threads available for execution of parallel
regions. The default is TRUE.
OMP_NESTED=<TRUE|FALSE>
Enables or disables nested parallelism. Value is either TRUE or FALSE. The default is FALSE.
OMP_NUM_THREADS=<n>
If programs have been compiled with -xautopar, this environment variable can be set to the number of
processors that programs should use.
PARALLEL=<n>
If programs have been compiled with -xautopar, this environment variable can be set to the number of
processors that programs should use.
STACKSIZE=<n>
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
SUNW_MP_PROCBIND=<n>
This environment variable can be used to bind the LWPs (lightweight processes) managed by the microtasking library,
libmtsk, to processors. Performance can be enhanced with processor binding, but performance degradation will occur if
multiple LWPs are bound to the same processor.
The value for SUNW_MP_PROCBIND can be:
Integers in the above denote the "logical" processor IDs to which the LWPs are to be bound. Logical processor IDs are
consecutive integers that start with 0, and may or may not be identical to the actual processsor IDs. If n processors are
available online, then their logical processor IDs are 0, 1, ..., n-1.
By default, LWPs are not bound to processors. It is left up to the operating system, Solaris, to schedule LWPs onto processors.
If the value "TRUE" is used, the operating system will bind processes to processors, starting with processor 0.
SUNW_MP_THR_IDLE=SPIN
Controls the end-of-task status of each helper thread executing the parallel part of a program. You can set the value
to spin, sleep ns, or sleep nms. The default is SPIN -- the thread spins (or busy-waits) after completing a parallel task
until a new parallel task arrives.
ulimit -s <n>
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.
submit=echo 'pbind -b...' > dobmk; sh dobmk
When running multiple copies of benchmarks, the SPEC config file feature submit is sometimes used to
cause individual jobs to be bound to specific processors. If so, the specific command may be found in the config file; here
is a brief guide to understanding that command: