| Compilers |
Oracle Developer Studio 12.6
|
|---|---|
| Operating systems: | Solaris 10 and 11 |
| Copyright: |
The text for many of the descriptions below was excerpted from the Oracle Developer Studio Compiler Documentation, which is copyright © 2017 Oracle Corporation. The original documentation can be found at http://docs.oracle.com/. |
Selecting one of the following will take you directly to that section:
[optimizer flag]
Increase the probability that the compiler will perform memcpy/memset transformations.
[optimizer]
Ignore parallelization factors in loop interchange heuristics.
[optimizer]
When considering whether to interchange loops, set memory store operation weight to n. A higher value of n indicates a greater performance cost for stores.
[optimizer]
Do aggressive loop fully unrolling based on the size and trip count of the loop.
[optimizer flag]
Control the optimizer's loop inliner; set the minimum call site frequency counter in order to consider a routine for inlining.
[optimizer flag]
Control the optimizer's loop inliner; Set inline callee size limit to n. The unit roughly corresponds to the number of instructions.
[optimizer flag]
Control the optimizer's loop inliner; The inliner is allowed to increase the size of the program by up to n%.
[optimizer flag]
Control the optimizer's loop inliner; Allow routines to increase by up to n. The unit roughly corresponds to the number of instructions.
[optimizer flag]
Control the optimizer's loop inliner; Perform maximum inlining (without considering code size increase).
[optimizer flag]
Control the optimizer's loop inliner; Allow routines that are called recursively to still be eligible for inlining.
[optimizer flag]
Inliner only considers routines smaller than n pseudo instructions as possible inline candidates.
[optimizer flag]
Increase the probability that loop induction variables will replaced, so that some extraneous code can be eliminated from loops.
[optimizer flag]
Ignore parallelization factors in loop distribution heuristics.
[optimizer flag]
Reconstruct array subscripts during memory allocation merging and data layout program transformation.
The option instructs the compiler on the number of threads to use for automatically parallelized regions. The nthreads value is only applicable for parallelized regions in the modules that are compiled with this option. The value specified by this option will override any values previously set by the OMP_NUM_THREADS or PARALLEL environment variable. The runtime library may choose to alter the number of threads unless the environment variable OMP_DYNAMIC is set to false.
Note that this is a flag to the "iropt" component of the compilation system. In general, flags may be sent to iropt using "Qoption iropt" from the "f90" and "CC" commands; or using "-W2," from the "cc" command.
[optimizer flag]
Do speculative prefetching for link-list data structures; perform prefetching n iterations ahead.
[optimizer flag]
Do speculative prefetching for link-list data structures; do not attempt prefetching for innermost loops.
[optimizer flag]
Allow prefetching through up to n levels of indirect memory references.
Enable padding of arrays by n.
Structure Array Contraction reduces strides in a hot loop accessing a big array. This is done by collecting only the hot fields into a new structure and rearranging the dimensions in the new array (of the new structure) to minimize stride width, e.g. a[x][y] to a[y][x]
[optimizer flag]
Convert multiple short memory operations into single long memory operations.
[optimizer flag]
Perform loop tiling which is enabled by loop skewing. Loop skewing is a transformation that transforms a non-fully interchangeable loop nest to a fully interchangeable loop nest. The optional b<n> sets the tiling block size to n.
[optimizer flag]
Increase the probability that small-trip-count inner loops will be fully unrolled.
[optimizer flag]
Enable optimization of critical control paths
Assume data is naturally aligned.
Used for 403.gcc: allow use of compiler's internal builtin alloca.
Allows the compiler to assume that your code does not rely on setting of the errno variable.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
The compiler's treatment of extern inline functions conforms by default to the behavior specified by the ISO/IEC 9899:1999 C standard.
The compiler's treatment of extern inline functions conforms by default to the behavior specified by the ISO/IEC 9899:1999 C standard.
Enables the use of the fused multiply-add instruction.
Selects faster (but nonstandard) handling of floating point arithmetic exceptions and gradual underflow.
Controls simplifying assumptions for floating point arithmetic:
Evaluate float expressions as single precision.
Sets the IEEE 754 trapping mode to common exceptions (invalid, division by zero, and overflow).
Turns off all IEEE 754 trapping modes.
Includes symbols in the executable. If the optimization level is -xO3 or lower, some optimizations may be disabled when -g is present. At -xO4 or higher, full optimization is performed, even when -g is present.
Includes symbols in the executable. If the optimization level is -xO3 or lower, some optimizations may be disabled when -g0 is present. At -xO4 or higher, full optimization is performed, even when -g0 is present.
Produce file and line number as well as simple parameter information that is considered crucial during post-mortem debugging.
Links in a library of general purpose memory allocation routines which can be faster than those found in libc, at the expense of more virtual memory consumed.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Disables use of the compiler-provided Cstd header files.
Include a library containing chip-specific memory routines.
Include the optimized math library. This option usually generates faster code, but may produce slightly different results. Usually these results will differ only in the last bit.
Include the optimized heap memory managment library.
Include a library with malloc/free optimized for use in multithreaded applications.
Include a library with vectorized versions of some elementary mathematical functions.
Use the Apache stdcxx version 4 library that is installed as part of Oracle Solaris, instead of the default libCstd.
Use STLport's Standard Library implementation instead of the default libCstd.
Disables use STLport's Standard Library implementation.
The libsunmath math library contains functions that are not specified by any standard but are useful in numerical software. It also contains many of the functions that are in libm.so.2 but not in libm.so.1.
Links in a library of "object caching" memory allocation routines which can be faster than those found in libc.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
Specifies the LP64 model: 32-bit ints, 64-bit longs and pointers types.
Links in a linker mapfile that aligns text, data, and bss on $3 ${4}B boundaries.
Links in a linker mapfile that enables the creation of a 'bss' segment, and aligns the segment at 4MB. This effectively provides an appropriate alignment for large page mapping of the heap.
Do not allow C++ exceptions. A throw specification on a function is accepted but ignored; the compiler does not generate exception code.
Do not allow C++ exceptions. A throw specification on a function is accepted but ignored; the compiler does not generate exception code.
[code generator flag]
There are several scheduling passes in the compiler. This option allows early passes to move instructions across call instructions.
[code generator flag]
Allow the enhanced pipeline scheduler (EPS) to use speculative (non-faulting) loads.
[code generator flag]
Use enhanced pipeline scheduling (EPS) and selective scheduling algorithms for instruction scheduling.
[code generator flag]
The number of live variables allowed at any given point is n more than the number of physical registers. Setting n to a significantly large number (e.g., 100) will disable register pressure heuristics in EPS.
[code generator flag]
Set the EPS window size, that is, the number of instructions it will consider across all paths when trying to find independent instructions to schedule a parallel group. Larger values may result in better run time, at the cost of increased compile time.
[code generator flag]
Sets the aggressiveness of the trace formation, where n is 4, 5, or 6. The higher the value of n, the lower the branch probability needed to include a basic block in a trace.
[code generator flag]
Enable the (late) trace scheduler. This is a new feature of the compiler which is being tuned from release to release. It may become the default in a future release.
[code generator flag]
When performing trace scheduling, enable the conversion of loads to non-faulting loads inside the trace.
[code generator flag]
Turn on optimization to reduce branch after branch penalty: nops will be inserted to prevent one branch from occupying the delay slot of another branch.
[code generator flag]
Use profile feedback data to predict values and attempt to generate faster code along these control paths, even at the expense of possibly slower code along paths leading to different values. Correct code is generated for all paths.
[code generator flag]
Do function entry alignment at n-byte boundaries.
[code generator flag]
Single- and double-precision floating-point division operations are approximated based on the SPARC64 X reciprocal approximation instructions (frcpa[sd]). This option has no effect unless -xarch=sparcace or -xarch=sparcaceplus, and -fsimple=2 are both in effect. In this situation, the use of -fns=yes is strongly advised. These approximated floating-point division operations do not conform to IEEE-754. Furthermore, spurious floating-point exceptions can be raised in certain corner cases. In particular, the invalid operation exception is raised when the divisor is subnormal or an infinity, or when the dividend is an infinity and the divisor is near the overflow threshold (i.e. with magnitude greater than 2^126 or 2^1022 in single- or double-precision respectively).
[code generator flag]
Single- and double-precision floating-point square root operations are approximated based on the SPARC64 X approximation instructions (frsqrta[sd]). This option has no effect unless -xarch=sparcace or -xarch=sparcaceplus, and -fsimple=2 are both in effect. In this situation, the use of -fns=yes is strongly advised. These approximated floating-point square root operations do not conform to IEEE-754.
[code generator flag]
The reciprocal of single- and double-precision floating-point square root operations are approximated based on the SPARC64 X approximation instructions (frsqrta[sd]). This option has no effect unless -xarch=sparcace or -xarch=sparcaceplus, and -fsimple=2 are both in effect. In this situation, the use of -fns=yes is strongly advised. Furthermore, DZ exception is never raised when input is a positive subnormal or a zero, and a positive zero is returned instead of infinity with appropriate sign.
[code generator flag]
Peels the most frequent test branches/cases off a switch until the branch probability reaches less than 1/n. This is effective only when profile feedback is used
[code generator flag]
Control irregular loop prefetching; turns the module on (1) or off (0) (default is on for F90/F95; for C/C++ the default is off unless -xprefetch=auto or -xprefetch_level=[2|3] is present, in which case the default is on)
[code generator flag]
Control irregular loop prefetching; sets the prefetch look ahead distance, in bytes. The default is 256.
[code generator flag]
Control irregular loop prefetching; a setting of "1" means force user settings to override internally computed values.
[code generator flag]
Control irregular loop prefetching; a setting of "1" means force the optimization to be turned on for all languages.
[code generator flag]
Insert indirect prefetches when the indirect access chain spans across basic blocks.
[code generator flag]
Indicates to the compiler to insert n extra prefetches for each indirect access in outer loops
[code generator flag]
Turns on prefetching for outer loops
[code generator flag]
Use prefetch with function code 1 (prefetch for one read) for memory accesses which are read only.
[code generator flag]
Use prefetch with function code 3 (prefetch for one write) for memory accesses which are read and then written.
[code generator flag]
Control irregular loop prefetching; use weak prefetches in the general loop prefetch.
[code generator flag]
Use prefetch with function code 3 (prefetch for one write) for memory accesses which are written only.
[code generator flag]
Control irregular loop prefetching; sets the number of attempts at prefetching. If not specified, t=2 if -xprefetch_level=3 has been set; otherwise, defaults to t=1.
[code generator flag]
Enable the loop unroller (en=1 enables, en=0 disables) for loops with control flow, with an unroll count of 4.
[code generator flag]
Specifies that all loops can be pipelined without needing to be concerned about loop-carried dependencies.
[code generator flag]
In pipelined loops, use floating point divide instructions for signed integer division.
[code generator flag]
Disable prefetching within modulo scheduling (used in software pipelining).
[code generator flag]
Set number of outstanding prefetches in pipelined loops to <n>
[code generator flag]
Turn off prefetching in the prolog of modulo scheduled loops.
[code generator flag]
Turn off prefetching for stores in the pipeliner.
[code generator flag]
Turn off the use of strong prefetches in modulo scheduled loops.
[code generator flag]
Allow the pipeliner to unroll multi-instruction loops that set integer condition codes
[code generator flag]
Assert (to the pipeliner) that unsigned int computations will not overflow.
[code generator flag]
Reduce the probability that the compiler will hoist sethi insructions out of loops.
[code generator flag]
During Expansion (that is, prior to register allocation), use the 'movcc' instruction to implement min and max operations. The options for use of movcc include:
If the "Ex" is followed by the optional character "1", then movcc will be applied during the first phase of peephole optimization, but not during later phases.
Do not perform loop distribution transformations.
[optimizer flag]
Disable loop unroll and jam optimization in iropt
Allocate routine local variables on the stack.
Link with static libraries. When the value "%all" is chosen, then all available static libraries are used. Note that the set of libraries may change from release to release, and that many libraries are available only in dynamic form.
Selects the C language dialect.
Selects the C++ language dialect.
Controls various template options:
The default is -template=no%wholeclass,no%extdef.
Specifies the degree of conformance with the ISO C standard: -Xc indicates strict conformance, whereas -Xa indicates ISO C plus some K&R compatibility extensions.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Allows the compiler to perform type-based alias analysis:
Specifies which instructions can be used. Among the choices are:
Turn on automatic parallelization for multiple processors.
Substitute intrinsic functions or inline system functions where profitable for performance.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai[/ti], where:
Do not perform any of the runtime check for stack overflow of the main thread in a singly-threaded program as well as slave-thread stacks in a multi-threaded program.
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Analyze loops for inter-iteration data dependencies, and do loop restructuring. Loop restructuring includes loop interchange, loop fusion, scalar replacement, and elimination of "dead" array assignments.
Turn off inlining.
Use this option to manually change the heuristics used by the compiler for deciding when to inline a function call.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Use inline expansion for math library, libm.
Select the optimized math library.
Perform link-time optimizations on the resulting executable over and above any optimizations in the object files. These optimizations are performed at link time by analyzing the object binary code. The meanings of the options are:
0. The link optimizer is disabled. (This is the default.)
1. Perform optimizations based on control flow analysis, including instruction cache coloring and branch optimizations, at link time.
2. Perform additional data flow analysis, including dead-code elimination and address computation simplification, at link time.
Sets the maximum assumed data alignment:
Specify optimization level n:
Enable explicit parallelization with OpenMP directives.
If multiple arrays are placed in common, insert padding between them for better use of cache. n specifies the amount of padding to apply, in units that are the same size as the array elements. If no parameter is specified then the compiler selects one automatically.
Pad local variables, for better use of cache.
Set the preferred page size for running the program.
Set the preferred heap page size for running the program.
Set the preferred stack page size for running the program.
Control generation of prefetch instructions.
(Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
Generate indirect prefetches for data arrays accessed indirectly.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Oracle Developer Studio C and Oracle Developer Studio C++ is 1. The default for Oracle Developer Studio Fortran is 2.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Analyze loops for reductions such as dot products, maximum and minimum finding.
Treat pointer-valued function parameters as restricted pointers.
Enables the use of non-faulting loads when used in conjunction with -xarch=v8plus. Assumes that no memory based traps will occur.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Enable unrolling loops n times where possible.
Controll the vector math library.
The mangle6 sub-option selects correct name mangling that might not be compatible with prior compiler releases.
Ensure that there are no surprises if the benchmarks are run in an environment where file system metadata uses 64 bits.
Include the designated file as if it were mentioned on the first line of the source file in a #include preprocessor directive.
This library is necessary to get full implementation of _Complex data types on Solaris 8 and Solaris 9. It is not necessary (and should not be used) on Solaris 10.
Treat character constants and variables declared as 'char' as unsigned.
Declares that all files (other than scratch files) should be interpreted as big-endian with 8-btye alignment.
Prepend the string "error:" to error messages, to make them easier to see.
Turns on verbose mode, showing how command options expand. Shows each component as it is invoked.
Controls compiler verbosity. There are several values that can be used with this flag:
The default is -verbose=%none.
Same as -verbose=diags.
This flag will cause the Oracle Developer Studio Fortran compiler to emit verbose messages.
Directs the compiler to print the name and version ID of each component as the compiler executes.
Same as -verbose=version.
Report memory used by the optimizer.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
MTEXCLUSIVE
If set to "Y", additional memory allocation buckets will be created, so that threads will not need to share buckets
unless more than 2*NCPUS threads are created. This variable is used by mtmalloc.
SUNW_MP_PROCBIND
Binds threads in an OpenMP program to the virtual processors enumerated in the assignment. Can also be set to TRUE,
which casues threads to be bound in a round-robin fashion.
SUNW_MP_THR_IDLE
Specifies whether idle threads should SLEEP or SPIN.
STACKSIZE=<n>
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
ulimit -s <n>
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.
Note that the "heap" and the "stack" share space; if your application allocates large amounts of memory on the heap,
then you may find that the stack limit should not be set to "unlimited". A commonly used setting for SPEC CPU2006 purposes
is a stack size of 128MB (131072K).