Compilers: Sun Studio 11
Operating systems: Solaris 10
Last updated: 18-Jul-2006 cds
The text for many of the descriptions below was taken from the Sun Studio 11 Compiler Documentation, which is copyright © 2005 Sun Microsystems, Inc. The original documentation can be found at docs.sun.com.
Selecting one of the following will take you directly to that section:
[optimizer flag]
Assumes global pointers are not aliased (restricted).
[optimizer flag]
Asked compiler folks for description TBD
[optimizer flag]
Increase the probability that the compiler will perform memcpy/memset transformations.
[global optimizer flag]
Use iropt in the profile phase of the compiler iropt is the Global optimizer.
[optimizer]
Ignore parallelization factors in loop interchange heuristics.
[optimizer]
When considering whether to interchange loops, set memory store operation weight to n. A higher value of n indicates a greater performance cost for stores.
[optimizer flag]
Control the optimizer's loop inliner; set the minimum call site frequency counter in order to consider a routine for inlining.
[optimizer flag]
Control the optimizer's loop inliner; Set inline callee size limit to n. The unit roughly corresponds to the number of instructions.
[optimizer flag]
Control the optimizer's loop inliner; The inliner is allowed to increase the size of the program by up to n%.
[optimizer flag]
Control the optimizer's loop inliner; Allow routines to increase by up to n. The unit roughly corresponds to the number of instructions.
[optimizer flag]
Control the optimizer's loop inliner; Perform maximum inlining (without considering code size increase).
[optimizer flag]
Control the optimizer's loop inliner; Allow routines that are called recursively to still be eligible for inlining.
[optimizer flag]
Inliner only considers routines smaller than n pseudo instructions as possible inline candidates.
[optimizer flag]
Increase the probability that loop induction variables will replaced, so that some extraneous code can be eliminated from loops.
[optimizer flag]
Ignore parallelization factors in loop distribution heuristics.
[optimizer flag]
Reconstruct array subscripts during memory allocation merging and data layout program transformation.
[optimizer flag]
Do speculative prefetching for link-list data structures; perform prefetching n iterations ahead.
[optimizer flag]
Do speculative prefetching for link-list data structures; do not attempt prefetching for innermost loops.
[optimizer flag]
Do prefetching for one-level indirect memory references.
Enable padding of arrays by n.
[optimizer flag]
Convert multiple short memory load operations into single long load operations.
[optimizer flag]
Perform loop tiling which is enabled by loop skewing. Loop skewing is a transformation that transforms a non-fully interchangeable loop nest to a fully interchangeable loop nest. The optional b<n> sets the tiling block size to n.
[optimizer flag]
Increase the probability that small-trip-count inner loops will be fully unrolled.
[optimizer flag]
Enable optimization of critical control paths
Assume data is naturally aligned.
Used for 403.gcc: allow use of compiler's internal builtin alloca.
Allows the compiler to assume that your code does not rely on setting of the errno variable.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Selects faster (but nonstandard) handling of floating point arithmetic exceptions and gradual underflow.
Allow optimizer to use x87 hardware instructions for sine, cosine, and rsqrt. The precision and rounding effects are determined by the underlying hardware implementation, rather than by standard IEEE754 semantics.
Allow optimizer to use x87 hardware instructions for sine, cosine, and rsqrt. The precision and rounding effects are determined by the underlying hardware implementation, rather than by standard IEEE754 semantics.
Controls simplifying assumptions for floating point arithmetic:
Evaluate float expressions as single precision.
Sets the IEEE 754 trapping mode to common exceptions (invalid, division by zero, and overflow).
Turns off all IEEE 754 trapping modes.
Includes symbols in the executable. If the optimization level is -xO3 or lower, some optimizations may be disabled when -g is present. At -xO4 or higher, full optimization is performed, even when -g is present.
Includes symbols in the executable. If the optimization level is -xO3 or lower, some optimizations may be disabled when -g0 is present. At -xO4 or higher, full optimization is performed, even when -g0 is present.
Links in a library of general purpose memory allocation routines which can be faster than those found in libc, at the expense of more virtual memory consumed.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Include a library containing chip-specific memory routines.
Include the optimized math library. This option usually generates faster code, but may produce slightly different results. Usually these results will differ only in the last bit.
Include a library with vectorized versions of some elementary mathematical functions.
Use STLport's Standard Library implementation instead of the default libCstd.
The libsunmath math library contains functions that are not specified by any standard but are useful in numerical software. It also contains many of the functions that are in libm.so.2 but not in libm.so.1.
Reads mapfile as a text file of directives to ld.
Do not allow C++ exceptions. A throw specification on a function is accepted but ignored; the compiler does not generate exception code.
Cancels forcing expressions to have the precision of the result.
[optimizer flag]
Do not assume callee-save registers are saved. -xcallee=yes is the default.
[optimizer flag]
Do not perform loop distribution transformations.
[code generator flag]
There are several scheduling passes in the compiler. This option allows early passes to move instructions across call instructions.
[code generator flag]
Allow the enhanced pipeline scheduler (EPS) to use speculative (non-faulting) loads.
[code generator flag]
Use enhanced pipeline scheduling (EPS) and selective scheduling algorithms for instruction scheduling.
[code generator flag]
The number of live variables allowed at any given point is n more than the number of physical registers. Setting n to a significantly large number (e.g., 100) will disable register pressure heuristics in EPS.
[code generator flag]
Set the EPS window size, that is, the number of instructions it will consider across all paths when trying to find independent instructions to schedule a parallel group. Larger values may result in better run time, at the cost of increased compile time.
[code generator flag]
Sets the aggressiveness of the trace formation, where n is 4, 5, or 6. The higher the value of n, the lower the branch probability needed to include a basic block in a trace.
[code generator flag]
Turn on optimization to reduce branch after branch penalty: nops will be inserted to prevent one branch from occupying the delay slot of another branch.
[code generator flag]
Use profile feedback data to predict values and attempt to generate faster code along these control paths, even at the expense of possibly slower code along paths leading to different values. Correct code is generated for all paths.
[code generator flag]
Do function entry alignment at n-byte boundaries.
[code generator flag]
Peels the most frequent test branches/cases off a switch until the branch probability reaches less than 1/n. This is effective only when profile feedback is used
[code generator flag]
Control irregular loop prefetching; turns the module on (1) or off (0) (default is on for F90; off for C/C++)
[code generator flag]
Control irregular loop prefetching; sets the prefetch look ahead distance, in bytes. The default is 256.
[code generator flag]
Control irregular loop prefetching; a setting of "1" means force user settings to override internally computed values.
[code generator flag]
Control irregular loop prefetching; a setting of "1" means force the optimization to be turned on for all languages.
[code generator flag]
Turns on prefetching for outer loops
[code generator flag]
Control irregular loop prefetching; use weak prefetches in the general loop prefetch.
[code generator flag]
Control irregular loop prefetching; sets the number of attempts at prefetching. If not specified, t=2 if -xprefetch_level=3 has been set; otherwise, defaults to t=1.
[code generator flag]
Specifies that all loops can be pipelined without needing to be concerned about loop-carried dependencies.
[code generator flag]
In pipelined loops, use floating point divide instructions for signed integer division.
[code generator flag]
Set number of outstanding prefetches in pipelined loops to <n>
[code generator flag]
Turn off prefetching in the prolog of modulo scheduled loops.
[code generator flag]
Turn off prefetching for stores in the pipeliner.
[code generator flag]
Turn off the use of strong prefetches in modulo scheduled loops.
[code generator flag]
Assert (to the pipeliner) that unsigned int computations will not overflow.
[code generator flag]
Reduce the probability that the compiler will hoist sethi insructions out of loops.
Allocate routine local variables on the stack.
Specifies the degree of conformance with the ISO C standard: -Xc indicates strict conformance, whereas -Xa indicates ISO C plus some K&R compatibility extensions.
Specify degree of aliasing to be assumed by the compiler. Specifying -xalias without a list gives the best performance for most programs that do not violate Fortran aliasing rules, and corresponds to: -xalias=no%dummy,no%craypointer,no%actual,no%overindex,no%ftnpointer
Allows the compiler to perform type-based alias analysis at the specified alias level:
Allows the compiler to perform type-based alias analysis:
Specifies which instructions can be used. Among the choices are:
Turn on automatic parallelization for multiple processors.
Substitute intrinsic functions or inline system functions where profitable for performance.
Specifies no functions from the standard libraries are substituted or inlined.
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Turn off inlining.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Use inline expansion for math library, libm.
Select the optimized math library.
Link with Sun supplied licensed sunperf library.
Perform link-time optimizations, such as branch optimization and cache coloring.
Specify optimization level n:
If multiple arrays are placed in common, insert padding between them for better use of cache. n specifies the amount of padding to apply, in units that are the same size as the array elements. If no parameter is specified then the compiler selects one automatically.
Pad local variables, for better use of cache.
Set the preferred page size for running the program.
Set the preferred stack page size for running the program.
Enable generation of prefetch instructions on those architectures that support prefetch. val may be one of the following:
If only -xprefetch is specified, -xprefetch=auto,explicit is assumed.
Generate indirect prefetches for data arrays accessed indirectly.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Fortran is 2. The default for C and C++ is 1.
Collect profile data for feedback-directed optimization (FDO). If an option directory is named, the feedback will be stored there. When FDO is used, the training run gathers information regarding execution paths. As of the Sun Studio 11 version of the compiler suite, the training run gathers information about data values on SPARC systems, but not on x86 systems. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Analyze loops for reductions such as dot products, maximum and minimum finding.
Allow the compiler to use the frame-pointer register (%ebp on IA32, %rbp on AMD64) as an unallocated callee-saves register.
Treat pointer-valued function parameters as restricted pointers.
Enables the use of non-faulting loads when used in conjunction with -xarch=v8plus. Assumes that no memory based traps will occur.
Selects options appropriate for the system where the compile is taking place, including architecture, chip, and cache sizes. (These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively.)
Enable unrolling loops n times where possible.
Synonym for -unroll=n
Enable unrolling loops n times where possible.
Enable optimization and inlining across source files
Allow the compiler to transform math library calls within loops into calls to the vector math library. Specifying
Turns on verbose mode, showing how command options expand. Shows each component as it is invoked.
Controls compiler verbosity. There are several values that can be used with this flag:
The default is -verbose=%none.
Same as -verbose=diags.
This flag will cause the Fortran compiler to emit verbose messages.
Directs the compiler to print the name and version ID of each component as the compiler executes.
Same as -verbose=version.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
This library is necessary to get functions used for accessing name services. As there are no network-enabled CPU2006 benchmarks, this flag should not be used.
Platform settings
One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
Node Interleaving Enabled (Default = Disabled):
This BIOS option allows the enabling/disabling of memory interleaving across CPU nodes. When disabled, each CPU chip can only access memory within its own node.
autoup=<n> (Unix)
When the file system flush daemon fsflush runs, it writes to disk all modified file buffers that are more
than n seconds old.
PARALLEL=<n> (Unix)
If programs have been compiled with -xautopar, this environment variable can be set to the number of
processors that programs should use.
STACKSIZE=<n> (Unix)
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
submit=echo 'pbind -b...' > dobmk; sh dobmk (SPEC tools, Unix)
When running multiple copies of benchmarks, the SPEC config file feature submit is sometimes used to
cause individual jobs to be bound to specific processors. If so, the specific command may be found in the config file; here
is a brief guide to understanding that command:
tune_t_fsflushr=<n> (Unix)
Controls the number of seconds between runs of the file system flush daemon, fsflush.
ulimit -s <n> (Unix)
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.