SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2007 Standard Performance Evaluation Corporation
Hewlett-Packard Company
ProLiant BL480c (1.86 GHz, Intel Xeon processor E5320)
SPECint2000 = 1971     
SPECint_base2000 = 1966     
SPEC license # 3 Tested by: Hewlett-Packard Company Test date: Feb-2007 Hardware Avail: Jan-2007 Software Avail: Nov-2006
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 121    1158      121    1157      164.gzip base result bar (1158)
164.gzip peak result bar (1157)
175.vpr 1400 96.9  1445      95.0  1474      175.vpr base result bar (1445)
175.vpr peak result bar (1474)
176.gcc 1100 49.5  2221      49.5  2221      176.gcc base result bar (2221)
176.gcc peak result bar (2221)
181.mcf 1800 56.4  3191      56.2  3204      181.mcf base result bar (3191)
181.mcf peak result bar (3204)
186.crafty 1000 58.8  1702      58.8  1700      186.crafty base result bar (1702)
186.crafty peak result bar (1700)
197.parser 1800 116    1548      116    1553      197.parser base result bar (1548)
197.parser peak result bar (1553)
252.eon 1300 53.6  2426      53.6  2427      252.eon base result bar (2426)
252.eon peak result bar (2427)
253.perlbmk 1800 80.0  2250      79.7  2260      253.perlbmk base result bar (2250)
253.perlbmk peak result bar (2260)
254.gap 1100 58.5  1880      58.5  1880      254.gap base result bar (1880)
254.gap peak result bar (1880)
255.vortex 1900 57.7  3295      57.7  3295      255.vortex base result bar (3295)
255.vortex peak result bar (3295)
256.bzip2 1500 104    1447      104    1447      256.bzip2 base result bar (1447)
256.bzip2 peak result bar (1447)
300.twolf 3000 137    2182      137    2182      300.twolf base result bar (2182)
300.twolf peak result bar (2182)
SPECint_base2000 1966       
  SPECint2000 1971       

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: ProLiant BL480c (1.86 GHz, Intel Xeon processor E5320)
CPU: Intel Xeon processor E5320 (1.86 GHz, 2x4 MB L2 shared, 1066 MHz bus)
CPU MHz: 1860
FPU: Integrated
CPU(s) enabled: 4 cores, 1 chip, 4 cores/chip
CPU(s) orderable: 1,2 chips
Parallel: No
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 8 MB I+D on chip per chip (4 MB shared per 2 cores)
L3 Cache: N/A
Other Cache: N/A
Memory: 16 GB (8x2 GB PC2-5300F CL5)
Disk Subsystem: 1x72 GB 10 K SAS
Other Hardware:
Software
Operating System: Windows Server 2003 Enterprise x64 Edition SP1
Compiler: Intel C++ Compiler for 32-bit applications,
(Version 9.1 Build 20061103Z)
Microsoft Visual Studio .NET 2003 (v7.1.3088, for libraries)
MicroQuill Smartheap Library 8.0
File System: NTFS
System State: Default
Notes / Tuning Information 
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use

 Base tuning for C programs:   -fast         +FDO  ONESTEP=yes shlw32M.lib
 Base tuning for C++ programs: -fast -Qcxx_features +FDO  ONESTEP=yes
 Portability flags:
   176.gcc: -Dalloca=_alloca /F10000000 
   186.crafty: -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
   164.gzip:     -fast               +FDO  ONESTEP=yes 
   175.vpr:      -fast               +FDO  ONESTEP=yes
   176.gcc:      basepeak=1
   181.mcf:      -fast               +FDO  
   186.crafty:   -fast -Oa           +FDO  ONESTEP=yes shlw32M.lib 
   197.parser:   -fast               +FDO  ONESTEP=yes
   252.eon:      -fast               +FDO
   253.perlbmk:  -fast -Oa           +FDO  ONESTEP=yes shlw32M.lib
   254.gap:      -fast               +FDO  ONESTEP=yes
   255.vortex:   -fast               +FDO  ONESTEP=yes shlw32M.lib
   256.bzip2:    basepeak=1
   300.twolf:    -fast               +FDO              shlw32M.lib
 BIOS Configuration Notes
   Power Regulator set to Static High Performance Mode
   Adjacent Sector Prefetch disabled
 Other Configuration Notes
   The start /b /wait /affinity command is used to bind CPU(s) to processes.

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Copyright © 1999-2007 Standard Performance Evaluation Corporation

First published at SPEC.org on 20-Mar-2007

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