SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
HP Integrity rx7620-16 (1.6GHz/6MB Itanium 2, 2 cells)
SPECint_rate2000 = 134    
SPECint_rate_base2000 = 134    
SPEC license # 3 Tested by: HP Richardson Test date: Jan-2005 Hardware Avail: Jan-2005 Software Avail: Jan-2005
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (96.6)
164.gzip peak result bar (96.6)
164.gzip 8 134    96.6   8 134    96.6  
175.vpr base result bar (110)
175.vpr peak result bar (110)
175.vpr 8 118    110     8 118    110    
176.gcc base result bar (161)
176.gcc peak result bar (161)
176.gcc 8 63.2  161     8 63.2  161    
181.mcf base result bar (175)
181.mcf peak result bar (175)
181.mcf 8 95.7  175     8 95.7  175    
186.crafty base result bar (122)
186.crafty peak result bar (122)
186.crafty 8 76.1  122     8 76.1  122    
197.parser base result bar (102)
197.parser peak result bar (102)
197.parser 8 163    102     8 163    102    
252.eon base result bar (184)
252.eon peak result bar (184)
252.eon 8 65.5  184     8 65.5  184    
253.perlbmk base result bar (134)
253.perlbmk peak result bar (134)
253.perlbmk 8 125    134     8 125    134    
254.gap base result bar (87.9)
254.gap peak result bar (87.9)
254.gap 8 116    87.9   8 116    87.9  
255.vortex base result bar (203)
255.vortex peak result bar (203)
255.vortex 8 86.7  203     8 86.7  203    
256.bzip2 base result bar (134)
256.bzip2 peak result bar (134)
256.bzip2 8 104    134     8 104    134    
300.twolf base result bar (151)
300.twolf peak result bar (151)
300.twolf 8 185    151     8 185    151    
  SPECint_rate_base2000 134      
  SPECint_rate2000 134    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: HP Integrity rx7620-16 (1.6GHz/6MB Itanium 2, 2 cells)
CPU: Intel Itanium 2 (1.6GHz/6MB, 400MHz FSB)
CPU MHz: 1600
FPU: Integrated
CPU(s) enabled: 8 cores, 8 chips, 1 core/chip
CPU(s) orderable: 2 to 8 by 2
Parallel: no
Primary Cache: 16KBI + 16KBD on chip, per core
Secondary Cache: 256KB (I+D) on chip, per core
L3 Cache: 6.0MB (I+D) on chip, per core
Other Cache: N/A
Memory: 32GB (32x1GB DIMMs)
Disk Subsystem: 4x36GB 15K rpm SCSI (striped)
Other Hardware: N/A
Software
Operating System: HPUX11i-TCOE B.11.23.0409
Compiler: HP C/ANSI C Compiler C.06.00
HP aC++ Compiler C.06.00
File System: vxfs
System State: Multi-user
Notes / Tuning Information
 Portability Flags
 176.gcc     : -DHOST_WORDS_BIG_ENDIAN
 186.crafty  : -DHP
 252.eon     : -DFMAX_IS_DOUBLE 
 253.perlbmk : -DSPEC_CPU2000_HP
 254.gap     : -DSPEC_CPU2000_HP -DSYS_IS_USG -DSYS_HAS_IOCTL_PROTO
               -DSYS_HAS_TIME_PROTO -DSYS_HAS_CALLOC_PROTO
 
 Base Flags
   all       : +Oprofile=collect:all/+Oprofile=use
   C         : +Ofaster -exec +Otype_safety=ansi
   C++       : +Ofaster +Otype_safety=ansi
 
 Peak Flags
   same as base (basepeak=true set globally)
 
 Kernel Tunables:
   dbc_max_pct=20
   dbc_min_pct=20
   maxdsiz=3221225472
   maxssiz=401604608
   maxdsiz_64bit=4396972761584
   maxssiz_64bit=1073741824
   vps_pagesize=4096
   vps_ceiling=16384

 Notes:
 
 The system under test had the HP-UX 11i v2 (version 11.23.0409,
   September, 2004) Technical Computing Operating Environment and
   AR1204 compilers installed, along with the following patches:

   PHSS_31849 linker + fdp cumulative patch
   PHSS_31850 assembler patch 
   PHSS_31851 Integrity Unwind Library 
   PHSS_31852 aC++ Runtime (IA: A.05.60, PA A.03.60)
   PHSS_31853 Math Library Cumulative Patch 
   PHSS_31854 milli cumulative patch 

 System was configured with 1/2 of memory interleaved and
   1/2 of memory local to each cell

 System was configured as a single partition with 2 cells and
   4 processors per cell.  

 Filesystem used for SPEC runs mounted "tmplog"

 Processes were assigned to localities using the
   HP-UX mpsched utility



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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 27-Jan-2005

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