SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Unisys Corporation
ES7000 Orion 540
SPECint_rate2000 = 255    
SPECint_rate_base2000 = 240    
SPEC license # 15 Tested by: Unisys Corporation Test date: Jun-2003 Hardware Avail: Jul-2003 Software Avail: May-2003
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (205)
164.gzip peak result bar (212)
164.gzip 32 253    205     32 245    212    
175.vpr base result bar (186)
175.vpr peak result bar (205)
175.vpr 32 280    186     32 253    205    
176.gcc base result bar (255)
176.gcc peak result bar (255)
176.gcc 32 160    255     32 160    255    
181.mcf base result bar (99.9)
181.mcf peak result bar (101)
181.mcf 32 669    99.9   32 664    101    
186.crafty base result bar (372)
186.crafty peak result bar (397)
186.crafty 32 99.7  372     32 93.6  397    
197.parser base result bar (313)
197.parser peak result bar (332)
197.parser 32 214    313     32 201    332    
252.eon base result bar (458)
252.eon peak result bar (526)
252.eon 32 105    458     32 91.8  526    
253.perlbmk base result bar (283)
253.perlbmk peak result bar (352)
253.perlbmk 32 236    283     32 190    352    
254.gap base result bar (73.3)
254.gap peak result bar (73.6)
254.gap 32 557    73.3   32 555    73.6  
255.vortex base result bar (289)
255.vortex peak result bar (318)
255.vortex 32 244    289     32 222    318    
256.bzip2 base result bar (226)
256.bzip2 peak result bar (226)
256.bzip2 32 247    226     32 247    226    
300.twolf base result bar (512)
300.twolf peak result bar (528)
300.twolf 32 217    512     32 211    528    
  SPECint_rate_base2000 240      
  SPECint_rate2000 255    

Hardware
Hardware Vendor: Unisys Corporation
Model Name: ES7000 Orion 540
CPU: Intel Xeon MP
CPU MHz: 2800
FPU: Integrated
CPU(s) enabled: 32 cores, 32 chips, 1 core/chip
CPU(s) orderable: 16,20,24,28,32
Parallel: No
Primary Cache: 12K(I) micro-ops + 8KBD on chip
Secondary Cache: 512KB(I+D) on chip
L3 Cache: 2048KB(I+D) on-die
Other Cache: 32MB L4 cache off chip per 4 CPUs
Memory: 8GB
Disk Subsystem: 2X36GB SCSI RAID 0 DISKS (15K rpm each)
Other Hardware:
Software
Operating System: Windows Server 2003 Datacenter Build 3790
Compiler: Intel C++ Compiler 7.1 Build 20030307Z
Microsoft Visual .NET 7.0.9466
MicroQuill SmartHeap Library 6.0
File System: NTFS
System State: Default
Notes / Tuning Information
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 Base tuning for C programs  : -Qxi -Qipo -Qfp_port
 Base tuning for C++ programs: -QxW -Qipo -GX -GR
 Portability flags:
 176.gcc: -Dalloca=_alloca /F10000000
 186.crafy: -DNT_i386
 253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
 254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
 164.gzip:     -QxW -Qipo -Oa -Oi- +FDO 
 175.vpr:      -QxW -Qipo     -O3  +FDO 
 176.gcc:      same as base
 181.mcf:      -QxW -Qipo     -O3 +FDO
 186.crafty:   -QxW -Qipo -Oa -O3 +FDO  
 197.parser:   -QxW -Qipo     -O3 +FDO
 252.eon:      -QxW -Qipo     -O3 +FDO
 253.perlbmk:  -QxW -Qipo     -O3 +FDO shlW32M.lib
 254.gap:      same as base
 255.vortex    -QxW -Qipo     -O3 +FDO 
 256.bzip2:    same as base
 300.twolf:    -QxW -Qipo     -O3 +FDO shlW32M.lib
 The memory was configured using Unisys Server Sentinel System Management product.


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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 15-Jul-2003

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