SPEC CPU®2017 Floating Point Rate Result

Copyright 2017-2021 Standard Performance Evaluation Corporation

Inspur Corporation

Inspur NF5466M6 (Intel Xeon Silver 4310)

SPECrate®2017_fp_base = 20200

SPECrate®2017_fp_peak = 20300

CPU2017 License: 3358 Test Date: Sep-2021
Test Sponsor: Inspur Corporation Hardware Availability: May-2021
Tested by: Inspur Corporation Software Availability: Dec-2020

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Silver 4310
  Max MHz: 3300
  Nominal: 2100
Enabled: 24 cores, 2 chips, 2 threads/core
Orderable: 1,2 chips
Cache L1: 32 KB I + 48 KB D on chip per core
  L2: 1.25 MB I+D on chip per core
  L3: 18 MB I+D on chip per chip
  Other: None
Memory: 1 TB (32 x 32 GB 2Rx8 PC4-3200AA-R, running at
2666)
Storage: 1 x 1.6 TB NVME SSD
Other: None
Software
OS: Red Hat Enterprise Linux release 8.2 (Ootpa)
4.18.0-193.el8.x86_64
Compiler: C/C++: Version 2021.1 of Intel oneAPI DPC++/C++
Compiler Build 20201113 for Linux;
C/C++: Version 2021.1 of Intel C/C++
Compiler Classic Build 20201112 for Linux;
Fortran: Version 2021.1 of Intel Fortran
Compiler Classic Build 20201112 for Linux
Parallel: No
Firmware: Version 05.00.02 released May-2021
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 64-bit
Other: jemalloc memory allocator V5.0.1
Power Management: BIOS and OS set to prefer performance at the cost
of additional power usage.

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate®2017_fp_base 20200
SPECrate®2017_fp_peak 20300
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 48 911 528 911 529 911 528 24 467 516 467 515 466 516
507.cactuBSSN_r 48 231 263 232 262 233 261 48 231 263 232 262 233 261
508.namd_r 48 376 121 375 122 375 122 48 376 121 375 122 375 122
510.parest_r 48 1007 125 1007 125 1007 125 24 470 134 470 134 470 134
511.povray_r 48 613 183 613 183 611 184 48 529 212 537 209 530 212
519.lbm_r 48 273 185 273 185 273 186 48 273 185 273 185 273 186
521.wrf_r 48 521 206 524 205 523 206 24 322 167 320 168 321 167
526.blender_r 48 423 173 422 173 423 173 48 423 173 422 173 423 173
527.cam4_r 48 471 178 453 185 468 179 48 471 178 453 185 468 179
538.imagick_r 48 274 436 280 427 320 374 48 274 436 280 427 320 374
544.nab_r 48 287 282 287 281 287 281 48 285 284 285 283 285 284
549.fotonik3d_r 48 1112 168 1113 168 1112 168 48 1112 168 1113 168 1112 168
554.roms_r 48 756 101 758 101 759 101 24 345 110 347 110 343 111

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"
 SCALING_GOVERNOR set to Performance

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/CPU2017/lib/intel64:/home/CPU2017/je5.0.1-64"
MALLOC_CONF = "retain:true"

General Notes

 Binaries compiled on a system with 1x Intel Core i9-7980XE CPU + 64GB RAM
 memory using Red Hat Enterprise Linux 8.1
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
 numactl --interleave=all runcpu <etc>

 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.

 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5,
 and the system compiler gcc 4.8.5;
 sources available from jemalloc.net or
 https://github.com/jemalloc/jemalloc/releases

Platform Notes

 BIOS configuration:
 ENERGY_PERF_BIAS_CFG mode set to Performance
 Hardware Prefetch set to Disable
 VT Support set to Disable
 C1E Support set to Disable
 Sub NUMA Cluster (SNC) set to Enable

 Sysinfo program /home/CPU2017/bin/sysinfo
 Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d
 running on localhost.localdomain Thu Sep 16 19:40:37 2021

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Silver 4310 CPU @ 2.10GHz
       2  "physical id"s (chips)
       48 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 12
       siblings  : 24
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11
       physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11

 From lscpu from util-linux 2.32.1:
      Architecture:        x86_64
      CPU op-mode(s):      32-bit, 64-bit
      Byte Order:          Little Endian
      CPU(s):              48
      On-line CPU(s) list: 0-47
      Thread(s) per core:  2
      Core(s) per socket:  12
      Socket(s):           2
      NUMA node(s):        4
      Vendor ID:           GenuineIntel
      CPU family:          6
      Model:               106
      Model name:          Intel(R) Xeon(R) Silver 4310 CPU @ 2.10GHz
      Stepping:            6
      CPU MHz:             2700.000
      CPU max MHz:         3300.0000
      CPU min MHz:         800.0000
      BogoMIPS:            4200.00
      Virtualization:      VT-x
      L1d cache:           48K
      L1i cache:           32K
      L2 cache:            1280K
      L3 cache:            18432K
      NUMA node0 CPU(s):   0-5,24-29
      NUMA node1 CPU(s):   6-11,30-35
      NUMA node2 CPU(s):   12-17,36-41
      NUMA node3 CPU(s):   18-23,42-47
      Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid
      aperfmperf pni pclmulqdq dtes64 ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm
      pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c
      rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 invpcid_single ssbd mba ibrs
      ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust
      bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap
      avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt
      xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local wbnoinvd
      dtherm ida arat pln pts avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq
      avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid md_clear pconfig flush_l1d
      arch_capabilities

 /proc/cpuinfo cache data
    cache size : 18432 KB

 From numactl --hardware
 WARNING: a numactl 'node' might or might not correspond to a physical chip.
   available: 4 nodes (0-3)
   node 0 cpus: 0 1 2 3 4 5 24 25 26 27 28 29
   node 0 size: 257638 MB
   node 0 free: 249292 MB
   node 1 cpus: 6 7 8 9 10 11 30 31 32 33 34 35
   node 1 size: 258017 MB
   node 1 free: 252065 MB
   node 2 cpus: 12 13 14 15 16 17 36 37 38 39 40 41
   node 2 size: 258044 MB
   node 2 free: 252031 MB
   node 3 cpus: 18 19 20 21 22 23 42 43 44 45 46 47
   node 3 size: 258042 MB
   node 3 free: 252077 MB
   node distances:
   node   0   1   2   3
     0:  10  11  20  20
     1:  11  10  20  20
     2:  20  20  10  11
     3:  20  20  11  10

 From /proc/meminfo
    MemTotal:       1056504820 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /sbin/tuned-adm active
     Current active profile: throughput-performance

 /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has
    performance

 From /etc/*release* /etc/*version*
    os-release:
       NAME="Red Hat Enterprise Linux"
       VERSION="8.2 (Ootpa)"
       ID="rhel"
       ID_LIKE="fedora"
       VERSION_ID="8.2"
       PLATFORM_ID="platform:el8"
       PRETTY_NAME="Red Hat Enterprise Linux 8.2 (Ootpa)"
       ANSI_COLOR="0;31"
    redhat-release: Red Hat Enterprise Linux release 8.2 (Ootpa)
    system-release: Red Hat Enterprise Linux release 8.2 (Ootpa)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:8.2:ga

 uname -a:
    Linux localhost.localdomain 4.18.0-193.el8.x86_64 #1 SMP Fri Mar 27 14:35:58 UTC 2020
    x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Enhanced IBRS, IBPB:
                                                        conditional, RSB filling
 CVE-2020-0543 (Special Register Buffer Data Sampling): No status reported
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 Sep 16 11:59

 SPEC is set to: /home/CPU2017
    Filesystem            Type  Size  Used Avail Use% Mounted on
    /dev/mapper/rhel-home xfs   1.5T   90G  1.4T   7% /home

 From /sys/devices/virtual/dmi/id
     Vendor:         Inspur
     Product:        NF5466M6
     Product Family: Family
     Serial:         380983478

 Additional information from dmidecode 3.2 follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is "intended to
 allow hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     32x Micron 18ASF4G72PDZ-3G2E1 32 GB 2 rank 3200, configured at 2666

 BIOS:
    BIOS Vendor:       American Megatrends Inc.
    BIOS Version:      05.00.02
    BIOS Date:         05/22/2021
    BIOS Revision:     5.22

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 519.lbm_r(base, peak) 538.imagick_r(base, peak)
                | 544.nab_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++             | 508.namd_r(base, peak) 510.parest_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base) 526.blender_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base) 526.blender_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak)
                | 554.roms_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base) 527.cam4_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base) 527.cam4_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icx 

C++ benchmarks:

 icpx 

Fortran benchmarks:

 ifort 

Benchmarks using both Fortran and C:

 ifort   icx 

Benchmarks using both C and C++:

 icpx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifort 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -w   -std=c11   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

C++ benchmarks:

 -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Fortran benchmarks:

 -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -nostandard-realloc-lhs   -align array32byte   -auto   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Benchmarks using both Fortran and C:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -auto   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Benchmarks using both C and C++:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Benchmarks using Fortran, C, and C++:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -auto   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Peak Compiler Invocation

C benchmarks:

 icx 

C++ benchmarks:

 icpx 

Fortran benchmarks:

 ifort 

Benchmarks using both Fortran and C:

521.wrf_r:  ifort   icc 
527.cam4_r:  ifort   icx 

Benchmarks using both C and C++:

511.povray_r:  icpc   icc 
526.blender_r:  icpx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifort 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

519.lbm_r:  basepeak = yes 
538.imagick_r:  basepeak = yes 
544.nab_r:  -w   -std=c11   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -flto   -Ofast   -qopt-mem-layout-trans=4   -fimf-accuracy-bits=14:sqrt   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

C++ benchmarks:

508.namd_r:  basepeak = yes 
510.parest_r:  -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Fortran benchmarks:

503.bwaves_r:  -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -nostandard-realloc-lhs   -align array32byte   -auto   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 
549.fotonik3d_r:  basepeak = yes 
554.roms_r:  Same as 503.bwaves_r 

Benchmarks using both Fortran and C:

521.wrf_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 
527.cam4_r:  basepeak = yes 

Benchmarks using both C and C++:

511.povray_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 
526.blender_r:  basepeak = yes 

Benchmarks using Fortran, C, and C++:

507.cactuBSSN_r:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html,
http://www.spec.org/cpu2017/flags/Inspur-Platform-Settings-V2.1.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml,
http://www.spec.org/cpu2017/flags/Inspur-Platform-Settings-V2.1.xml.