SPEC CPU®2017 Floating Point Rate Result

Cisco Systems

Cisco UCS C480 M5 (Intel Xeon Gold 6138,
2.00 GHz)

SPECrate®2017_fp_base = 36900

SPECrate®2017_fp_peak = 37500

CPU2017 License:	9019	Test Date:	Feb-2019
Test Sponsor:	Cisco Systems	Hardware Availability:	Aug-2017
Tested by:	Cisco Systems	Software Availability:	Oct-2018

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name:	Intel Xeon Gold 6138
Max MHz:	3700
Nominal:	2000
Enabled:	80 cores, 4 chips, 2 threads/core
Orderable:	2,4 Chips
Cache L1:	32 KB I + 32 KB D on chip per core
L2:	1 MB I+D on chip per core
L3:	27.5 MB I+D on chip per chip
Other:	None
Memory:	1536 GB (48 x 32 GB 2Rx4 PC4-2666V-R)
Storage:	1 x 1 TB HDD, 7.2K RPM
Other:	None

Software
OS:	SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.120-92.70-default
Compiler:	C/C++: Version 19.0.0.117 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.0.117 of Intel Fortran Compiler for Linux
Parallel:	No
Firmware:	Version 3.1.3e released Jun-2018
File System:	xfs
System State:	Run level 3 (multi-user)
Base Pointers:	64-bit
Peak Pointers:	64-bit
Other:	None
Power Management:	--

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
SPECrate®2017_fp_base			36900
SPECrate®2017_fp_peak			37500
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r	160	1797	893	1797	893	1795	894	160	1799	892	1794	894	1794	894
507.cactuBSSN_r	160	692	293	691	293	690	294	160	687	295	691	293	689	294
508.namd_r	160	524	290	531	286	531	286	160	529	287	529	287	528	288
510.parest_r	160	2256	185	2253	186	2257	185	160	2260	185	2260	185	2258	185
511.povray_r	160	898	416	887	421	889	420	160	767	487	764	489	764	489
519.lbm_r	160	770	219	769	219	769	219	160	770	219	770	219	770	219
521.wrf_r	160	905	396	905	396	920	389	160	893	401	897	400	895	401
526.blender_r	160	631	386	623	391	622	391	160	623	391	624	390	624	390
527.cam4_r	160	659	425	658	425	661	423	160	643	435	644	435	644	435
538.imagick_r	160	451	883	453	878	455	875	160	448	887	454	877	453	878
544.nab_r	160	416	647	418	644	419	643	160	419	643	420	640	420	642
549.fotonik3d_r	160	2147	290	2144	291	2145	291	160	2144	291	2143	291	2150	290
554.roms_r	160	1503	169	1479	172	1479	172	160	1482	172	1483	171	1479	172

Submit Notes

 The taskset mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate taskset commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64"

 Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS Controls
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9
 running on linux-9r4j Tue Feb  5 12:49:51 2019

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6138 CPU @ 2.00GHz
       4  "physical id"s (chips)
       160 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 20
       siblings  : 40
       physical 0: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28
       physical 1: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28
       physical 2: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28
       physical 3: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                160
      On-line CPU(s) list:   0-159
      Thread(s) per core:    2
      Core(s) per socket:    20
      Socket(s):             4
      NUMA node(s):          8
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Gold 6138 CPU @ 2.00GHz
      Stepping:              4
      CPU MHz:               2699.999
      CPU max MHz:           3700.0000
      CPU min MHz:           1000.0000
      BogoMIPS:              3995.68
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              28160K
      NUMA node0 CPU(s):     0-2,5,6,10-12,15,16,80-82,85,86,90-92,95,96
      NUMA node1 CPU(s):     3,4,7-9,13,14,17-19,83,84,87-89,93,94,97-99
      NUMA node2 CPU(s):     20-22,25,26,30-32,35,36,100-102,105,106,110-112,115,116
      NUMA node3 CPU(s):     23,24,27-29,33,34,37-39,103,104,107-109,113,114,117-119
      NUMA node4 CPU(s):     40-42,45,46,50-52,55,56,120-122,125,126,130-132,135,136
      NUMA node5 CPU(s):     43,44,47-49,53,54,57-59,123,124,127-129,133,134,137-139
      NUMA node6 CPU(s):     60-62,65,66,70-72,75,76,140-142,145,146,150-152,155,156
      NUMA node7 CPU(s):     63,64,67-69,73,74,77-79,143,144,147-149,153,154,157-159
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts
      dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp
      retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle
      avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt
      clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc

 /proc/cpuinfo cache data
    cache size : 28160 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 8 nodes (0-7)
   node 0 cpus: 0 1 2 5 6 10 11 12 15 16 80 81 82 85 86 90 91 92 95 96
   node 0 size: 192093 MB
   node 0 free: 180811 MB
   node 1 cpus: 3 4 7 8 9 13 14 17 18 19 83 84 87 88 89 93 94 97 98 99
   node 1 size: 193528 MB
   node 1 free: 185488 MB
   node 2 cpus: 20 21 22 25 26 30 31 32 35 36 100 101 102 105 106 110 111 112 115 116
   node 2 size: 193528 MB
   node 2 free: 185656 MB
   node 3 cpus: 23 24 27 28 29 33 34 37 38 39 103 104 107 108 109 113 114 117 118 119
   node 3 size: 193528 MB
   node 3 free: 185536 MB
   node 4 cpus: 40 41 42 45 46 50 51 52 55 56 120 121 122 125 126 130 131 132 135 136
   node 4 size: 193528 MB
   node 4 free: 185523 MB
   node 5 cpus: 43 44 47 48 49 53 54 57 58 59 123 124 127 128 129 133 134 137 138 139
   node 5 size: 193528 MB
   node 5 free: 185560 MB
   node 6 cpus: 60 61 62 65 66 70 71 72 75 76 140 141 142 145 146 150 151 152 155 156
   node 6 size: 193528 MB
   node 6 free: 185571 MB
   node 7 cpus: 63 64 67 68 69 73 74 77 78 79 143 144 147 148 149 153 154 157 158 159
   node 7 size: 193525 MB
   node 7 free: 185495 MB
   node distances:
   node   0   1   2   3   4   5   6   7
     0:  10  11  21  21  21  21  21  21
     1:  11  10  21  21  21  21  21  21
     2:  21  21  10  11  21  21  21  21
     3:  21  21  11  10  21  21  21  21
     4:  21  21  21  21  10  11  21  21
     5:  21  21  21  21  11  10  21  21
     6:  21  21  21  21  21  21  10  11
     7:  21  21  21  21  21  21  11  10

 From /proc/meminfo
    MemTotal:       1583913048 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-9r4j 4.4.120-92.70-default #1 SMP Wed Mar 14 15:59:43 UTC 2018 (52a83de)
    x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2017-5754 (Meltdown):          Mitigation: PTI
 CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization
 CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB

 run-level 3 Dec 27 14:13

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda1      xfs   930G   97G  834G  11% /

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS Cisco Systems, Inc. C480M5.3.1.3e.0.0613181101 06/13/2018
   Memory:
    48x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 519.lbm_r(base, peak) 538.imagick_r(base, peak)
                | 544.nab_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++             | 508.namd_r(base, peak) 510.parest_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base, peak) 526.blender_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak)
                | 554.roms_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base, peak) 527.cam4_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.0.117 Build 20180804
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

icc -m64 -std=c11

C++ benchmarks:

icpc -m64

Fortran benchmarks:

ifort -m64

Base Portability Flags

503.bwaves_r:	-DSPEC_LP64
507.cactuBSSN_r:	-DSPEC_LP64
508.namd_r:	-DSPEC_LP64
510.parest_r:	-DSPEC_LP64
511.povray_r:	-DSPEC_LP64
519.lbm_r:	-DSPEC_LP64
521.wrf_r:	-DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian
526.blender_r:	-DSPEC_LP64 -DSPEC_LINUX -funsigned-char
527.cam4_r:	-DSPEC_LP64 -DSPEC_CASE_FLAG
538.imagick_r:	-DSPEC_LP64
544.nab_r:	-DSPEC_LP64
549.fotonik3d_r:	-DSPEC_LP64
554.roms_r:	-DSPEC_LP64

Base Optimization Flags

C benchmarks:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3

C++ benchmarks:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3

Fortran benchmarks:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte

Benchmarks using both Fortran and C:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte

Benchmarks using both C and C++:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3

Benchmarks using Fortran, C, and C++:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte

Peak Compiler Invocation

C benchmarks:

icc -m64 -std=c11

C++ benchmarks:

icpc -m64

Fortran benchmarks:

ifort -m64

Benchmarks using both Fortran and C:

ifort -m64 icc -m64 -std=c11

Benchmarks using both C and C++:

icpc -m64 icc -m64 -std=c11

Benchmarks using Fortran, C, and C++:

icpc -m64 icc -m64 -std=c11 ifort -m64

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

519.lbm_r:	-prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3
538.imagick_r:	-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3
544.nab_r:	Same as 538.imagick_r

C++ benchmarks:

508.namd_r:	-prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3
510.parest_r:	-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3

Fortran benchmarks:

503.bwaves_r:	-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte
549.fotonik3d_r:	Same as 503.bwaves_r
554.roms_r:	-prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte

Benchmarks using both Fortran and C:

-prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte

Benchmarks using both C and C++:

511.povray_r:	-prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3
526.blender_r:	-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3

Benchmarks using Fortran, C, and C++:

-xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -auto -nostandard-realloc-lhs -align array32byte

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.2019-01-15.html,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.2019-01-15.xml,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml.